1 /* _NVRM_COPYRIGHT_BEGIN_
3 * Copyright 1999-2001 by NVIDIA Corporation. All rights reserved. All
4 * information contained herein is proprietary and confidential to NVIDIA
5 * Corporation. Any use, reproduction, or disclosure without the written
6 * permission of NVIDIA Corporation is prohibited.
18 #define NV_MIN(_a,_b) ((_a) < (_b) ? (_a) : (_b))
21 #define NV_MAX(_a,_b) ((_a) > (_b) ? (_a) : (_b))
24 /* NVIDIA's reserved major character device number (Linux). */
25 #define NV_MAJOR_DEVICE_NUMBER 195
27 /* most cards in a single system */
28 #define NV_MAX_DEVICES 16
30 /* NOTE: using an ioctl() number > 55 will overflow! */
31 #define NV_IOCTL_MAGIC 'F'
32 #define NV_IOCTL_BASE 200
33 #define NV_ESC_CARD_INFO (NV_IOCTL_BASE + 0)
34 #define NV_ESC_ENV_INFO (NV_IOCTL_BASE + 2)
35 #define NV_ESC_MODULE_RESET (NV_IOCTL_BASE + 4)
36 #define NV_ESC_ALLOC_OS_EVENT (NV_IOCTL_BASE + 6)
37 #define NV_ESC_FREE_OS_EVENT (NV_IOCTL_BASE + 7)
38 #define NV_ESC_STATUS_CODE (NV_IOCTL_BASE + 9)
39 #define NV_ESC_CHECK_VERSION_STR (NV_IOCTL_BASE + 10)
40 #define NV_ESC_IOCTL_XFER_CMD (NV_IOCTL_BASE + 11)
43 #define NV_PLATFORM_MAX_IOCTL_SIZE 255
44 #elif (defined(NV_LINUX) || defined(NV_BSD))
45 #define NV_PLATFORM_MAX_IOCTL_SIZE 4096
47 #error "The maximum ioctl() argument size is undefined!"
51 * #define an absolute maximum used as a sanity check for the
52 * NV_ESC_IOCTL_XFER_CMD ioctl() size argument.
54 #define NV_ABSOLUTE_MAX_IOCTL_SIZE 4096
57 * Solaris provides no more than 8 bits for the argument size in
58 * the ioctl() command encoding; make sure we don't exceed this
61 #define __NV_IOWR_ASSERT(type) ((sizeof(type) <= NV_PLATFORM_MAX_IOCTL_SIZE) ? 1 : -1)
62 #define __NV_IOWR(nr, type) ({ \
63 typedef char __NV_IOWR_TYPE_SIZE_ASSERT[__NV_IOWR_ASSERT(type)]; \
64 _IOWR(NV_IOCTL_MAGIC, (nr), type); \
68 * ioctl()'s with parameter structures too large for the
69 * _IOC cmd layout use the nv_ioctl_xfer_t structure
70 * and the NV_ESC_IOCTL_XFER_CMD ioctl() to pass the actual
71 * size and user argument pointer into the RM, which
72 * will then copy it to/from kernel space in separate steps.
74 typedef struct nv_ioctl_xfer
78 NvP64 ptr NV_ALIGN_BYTES(8);
81 typedef struct nv_ioctl_card_info
83 NvU16 flags; /* see below */
84 NvU8 bus; /* bus number (PCI, AGP, etc) */
85 NvU8 slot; /* card slot */
86 NvU16 vendor_id; /* PCI vendor id */
89 NvU32 reg_address; /* register aperture */
91 NvU32 fb_address; /* framebuffer aperture */
93 } nv_ioctl_card_info_t;
95 #define NV_IOCTL_CARD_INFO_BUS_TYPE_PCI 0x0001
96 #define NV_IOCTL_CARD_INFO_BUS_TYPE_AGP 0x0002
97 #define NV_IOCTL_CARD_INFO_BUS_TYPE_PCI_EXPRESS 0x0003
99 #define NV_IOCTL_CARD_INFO_FLAG_PRESENT 0x0001
100 #define NV_IOCTL_CARD_INFO_FLAG_NEED_MSYNC 0x0002
102 #define SIM_ENV_GPU 0
103 #define SIM_ENV_IKOS 1
104 #define SIM_ENV_CSIM 2
106 #define NV_SLI_DISABLED 0
107 #define NV_SLI_ENABLED 1
109 typedef struct nv_ioctl_env_info
113 } nv_ioctl_env_info_t;
117 * this used to be used to verify client/rm interaction both ways by
118 * overloading the structure passed into the NV_IOCTL_CARD_INFO ioctl.
119 * This interface is deprecated and NV_IOCTL_CHECK_VERSION_STR should
120 * be used instead. We keep the structure and defines here so that RM
121 * can recognize and handle old clients.
123 typedef struct nv_ioctl_rm_api_old_version
129 } nv_ioctl_rm_api_old_version_t;
131 #define NV_RM_API_OLD_VERSION_MAGIC_REQ 0x0197fade
132 #define NV_RM_API_OLD_VERSION_MAGIC_REP 0xbead2929
133 #define NV_RM_API_OLD_VERSION_MAGIC_LAX_REQ (NV_RM_API_OLD_VERSION_MAGIC_REQ ^ '1')
134 #define NV_RM_API_OLD_VERSION_MAGIC_OVERRIDE_REQ (NV_RM_API_OLD_VERSION_MAGIC_REQ ^ '2')
135 #define NV_RM_API_OLD_VERSION_MAGIC_IGNORE 0xffffffff
137 /* debug tool to force module count to 0 */
138 #define NV_IOCTL_MODULE_RESET _IO(NV_IOCTL_MAGIC, NV_ESC_MODULE_RESET)
141 typedef struct nv_ioctl_alloc_os_event
148 } nv_ioctl_alloc_os_event_t;
151 typedef struct nv_ioctl_free_os_event
157 } nv_ioctl_free_os_event_t;
160 typedef struct nv_ioctl_status_code
165 } nv_ioctl_status_code_t;
167 /* check version string */
168 #define NV_RM_API_VERSION_STRING_LENGTH 64
170 typedef struct nv_ioctl_rm_api_version
174 char versionString[NV_RM_API_VERSION_STRING_LENGTH];
175 } nv_ioctl_rm_api_version_t;
177 #define NV_RM_API_VERSION_CMD_STRICT 0
178 #define NV_RM_API_VERSION_CMD_RELAXED '1'
179 #define NV_RM_API_VERSION_CMD_OVERRIDE '2'
181 #define NV_RM_API_VERSION_REPLY_UNRECOGNIZED 0
182 #define NV_RM_API_VERSION_REPLY_RECOGNIZED 1
187 * ptr arithmetic convenience
192 volatile V008 Reg008[1];
193 volatile V016 Reg016[1];
194 volatile V032 Reg032[1];
195 } nv_hwreg_t, * nv_phwreg_t;
198 #define NVRM_PCICFG_NUM_BARS 6
199 #define NVRM_PCICFG_BAR_OFFSET(i) (0x10 + (i) * 4)
200 #define NVRM_PCICFG_BAR_REQTYPE_MASK 0x00000001
201 #define NVRM_PCICFG_BAR_REQTYPE_MEMORY 0x00000000
202 #define NVRM_PCICFG_BAR_MEMTYPE_MASK 0x00000006
203 #define NVRM_PCICFG_BAR_MEMTYPE_64BIT 0x00000004
204 #define NVRM_PCICFG_BAR_ADDR_MASK 0xfffffff0
206 #define NV_GPU_NUM_BARS 3
207 #define NV_GPU_BAR_INDEX_REGS 0
208 #define NV_GPU_BAR_INDEX_FB 1
209 #define NV_GPU_BAR_INDEX_IMEM 2
228 #if defined(NVCPU_X86_64)
229 #define NV_STACK_SIZE (RM_PAGE_SIZE * 3)
231 #define NV_STACK_SIZE (RM_PAGE_SIZE * 2)
234 typedef struct nv_stack_s
238 U008 stack[NV_STACK_SIZE-16] __attribute__ ((aligned(16)));
242 * this is a wrapper for unix events
243 * unlike the events that will be returned to clients, this includes
244 * kernel-specific data, such as file pointer, etc..
246 typedef struct nv_event_s
251 void *file; /* per file-descriptor data pointer */
254 struct nv_event_s *next;
257 typedef struct nv_kern_mapping_s
261 struct nv_kern_mapping_s *next;
270 void *priv; /* private data */
271 void *os_state; /* os-specific device state */
276 /* PCI config info */
283 U032 pci_cfg_space[16];
285 /* physical characteristics */
286 nv_aperture_t bars[NV_GPU_NUM_BARS];
288 nv_aperture_t *fb, ud;
289 nv_aperture_t agp, bc;
291 NvU32 interrupt_line;
300 U032 rc_timer_enabled;
302 /* list of events allocated for this device */
303 nv_event_t *event_list;
305 nv_kern_mapping_t *kern_mappings;
307 BOOL nv_pm_S4_available;
308 BOOL is_passthru_mode;
316 #define NV_FLAG_OPEN 0x0001
317 #define NV_FLAG_WAS_POSTED 0x0002
318 #define NV_FLAG_CONTROL 0x0004
319 #define NV_FLAG_MAP_REGS_EARLY 0x0008
320 #define NV_FLAG_USE_BAR0_CFG 0x0010
321 #define NV_FLAG_USES_MSI 0x0020
323 #define NV_PM_APM_SUSPEND 0x0001
324 #define NV_PM_APM_RESUME 0x0002
325 #define NV_PM_ACPI_HIBERNATE 0x0003
326 #define NV_PM_ACPI_STANDBY 0x0004
327 #define NV_PM_ACPI_RESUME 0x0005
329 #define NV_AGP_STATUS_DISABLED 0x0000
330 #define NV_AGP_STATUS_ENABLED 0x0001
331 #define NV_AGP_STATUS_FAILED 0x0002
333 #define NV_AGP_ENABLED(nv) ((nv)->agp_status & NV_AGP_STATUS_ENABLED)
334 #define NV_AGP_FAILED(nv) ((nv)->agp_status & NV_AGP_STATUS_FAILED)
336 #define NV_NVAGP_ENABLED(nv) ((nv)->agp_config & NVOS_AGP_CONFIG_NVAGP)
337 #define NV_OSAGP_ENABLED(nv) ((nv)->agp_config & NVOS_AGP_CONFIG_OSAGP)
339 #define NV_PRIMARY_VGA(nv) ((nv)->primary_vga)
342 * The ACPI specification defines IDs for various ACPI video
343 * extension events like display switch events, AC/battery
344 * events, docking events, etc..
345 * Whenever an ACPI event is received by the corresponding
346 * event handler installed within the core NVIDIA driver, the
347 * code can verify the event ID before processing it.
349 #define ACPI_DISPLAY_DEVICE_CHANGE_EVENT 0x80
350 #define NVIF_NOTIFY_DISPLAY_DETECT 0xCB
351 #define NVIF_DISPLAY_DEVICE_CHANGE_EVENT NVIF_NOTIFY_DISPLAY_DETECT
353 * NVIDIA ACPI event IDs to be passed into the core NVIDIA
354 * driver for various events like display switch events,
355 * AC/battery events, docking events, etc..
357 #define NV_SYSTEM_ACPI_DISPLAY_SWITCH_EVENT 0x8001
358 #define NV_SYSTEM_ACPI_BATTERY_POWER_EVENT 0x8002
359 #define NV_SYSTEM_ACPI_DOCK_EVENT 0x8003
362 * Status bit definitions for display switch hotkey events.
364 #define NV_HOTKEY_STATUS_DISPLAY_ENABLE_LCD 0x01
365 #define NV_HOTKEY_STATUS_DISPLAY_ENABLE_CRT 0x02
366 #define NV_HOTKEY_STATUS_DISPLAY_ENABLE_TV 0x04
367 #define NV_HOTKEY_STATUS_DISPLAY_ENABLE_DFP 0x08
370 * NVIDIA ACPI sub-event IDs (event types) to be passed into
371 * to core NVIDIA driver for ACPI events.
373 #define NV_SYSTEM_ACPI_EVENT_VALUE_DISPLAY_SWITCH_DEFAULT 0
374 #define NV_SYSTEM_ACPI_EVENT_VALUE_POWER_EVENT_AC 0
375 #define NV_SYSTEM_ACPI_EVENT_VALUE_POWER_EVENT_BATTERY 1
376 #define NV_SYSTEM_ACPI_EVENT_VALUE_DOCK_EVENT_UNDOCKED 0
377 #define NV_SYSTEM_ACPI_EVENT_VALUE_DOCK_EVENT_DOCKED 1
379 #define NV_ACPI_NVIF_HANDLE_PRESENT 0x01
380 #define NV_ACPI_DSM_HANDLE_PRESENT 0x02
381 #define NV_ACPI_WMMX_HANDLE_PRESENT 0x04
383 #define NV_ACPI_METHOD_NVIF 0x01
384 #define NV_ACPI_METHOD_DSM_NBSI 0x02
385 #define NV_ACPI_METHOD_WMMX 0x03
387 #define NV_NBSI_REVISION_ID 0x00000101
390 ** where we hide our nv_state_t * ...
392 #define NV_SET_NV_STATE(pgpu,p) ((pgpu)->pOsHwInfo = (p))
393 #define NV_GET_NV_STATE(pgpu) ((nv_state_t *)(pgpu)->pOsHwInfo)
395 /* mmap(2) offsets */
397 #define IS_REG_OFFSET(nv, offset, length) \
398 (((offset) >= (nv)->regs->address) && \
399 (((offset) + ((length)-1)) <= (nv)->regs->address + ((nv)->regs->size-1)))
401 #define IS_FB_OFFSET(nv, offset, length) \
402 (((offset) >= (nv)->fb->address) && \
403 (((offset) + ((length)-1)) <= (nv)->fb->address + ((nv)->fb->size-1)))
405 #define IS_UD_OFFSET(nv, offset, length) \
406 (((nv)->ud.address != 0) && ((nv)->ud.size != 0) && \
407 ((offset) >= (nv)->ud.address) && \
408 (((offset) + ((length)-1)) <= (nv)->ud.address + ((nv)->ud.size-1)))
410 #define IS_BC_OFFSET(nv, offset, length) \
411 (((nv)->bc.address != 0) && ((nv)->bc.size != 0) && \
412 ((offset) >= (nv)->bc.address) && \
413 (((offset) + ((length)-1)) <= (nv)->bc.address + ((nv)->bc.size-1)))
415 #define IS_AGP_OFFSET(nv, offset, length) \
416 ((NV_AGP_ENABLED(nv)) && \
417 ((offset) >= (nv)->agp.address) && \
418 (((offset) + ((length)-1)) <= (nv)->agp.address + ((nv)->agp.size-1)))
420 /* duplicated from nvos.h for external builds */
421 #ifndef NVOS_AGP_CONFIG_DISABLE_AGP
422 # define NVOS_AGP_CONFIG_DISABLE_AGP (0x00000000)
424 #ifndef NVOS_AGP_CONFIG_NVAGP
425 # define NVOS_AGP_CONFIG_NVAGP (0x00000001)
427 #ifndef NVOS_AGP_CONFIG_OSAGP
428 # define NVOS_AGP_CONFIG_OSAGP (0x00000002)
430 #ifndef NVOS_AGP_CONFIG_ANYAGP
431 # define NVOS_AGP_CONFIG_ANYAGP (0x00000003)
435 /* device name length; must be atleast 8 */
437 #define NV_DEVICE_NAME_LENGTH 40
439 #define NV_MAX_ISR_DELAY_US 20000
440 #define NV_MAX_ISR_DELAY_MS (NV_MAX_ISR_DELAY_US / 1000)
442 #define NV_TIMERCMP(a, b, CMP) \
443 (((a)->tv_sec == (b)->tv_sec) ? \
444 ((a)->tv_usec CMP (b)->tv_usec) : ((a)->tv_sec CMP (b)->tv_sec))
446 #define NV_TIMERADD(a, b, result) \
448 (result)->tv_sec = (a)->tv_sec + (b)->tv_sec; \
449 (result)->tv_usec = (a)->tv_usec + (b)->tv_usec; \
450 if ((result)->tv_usec >= 1000000) \
452 ++(result)->tv_sec; \
453 (result)->tv_usec -= 1000000; \
457 #define NV_TIMERSUB(a, b, result) \
459 (result)->tv_sec = (a)->tv_sec - (b)->tv_sec; \
460 (result)->tv_usec = (a)->tv_usec - (b)->tv_usec; \
461 if ((result)->tv_usec < 0) \
463 --(result)->tv_sec; \
464 (result)->tv_usec += 1000000; \
468 #define NV_ALIGN_DOWN(v,g) ((v) & ~((g) - 1))
469 #define NV_ALIGN_UP(v,g) (((v) + ((g) - 1)) & ~((g) - 1))
472 * driver internal interfaces
478 * ---------------------------------------------------------------------------
480 * Function prototypes for UNIX specific OS interface.
482 * ---------------------------------------------------------------------------
486 * Make sure that arguments to and from the core resource manager
487 * are passed and expected on the stack. define duplicated in os-interface.h
489 #if !defined(NV_API_CALL)
490 #if defined(NVCPU_X86)
491 #if defined(__use_altstack__)
492 #define NV_API_CALL __attribute__((regparm(0),altstack(false)))
494 #define NV_API_CALL __attribute__((regparm(0)))
496 #elif defined(NVCPU_X86_64) && defined(__use_altstack__)
497 #define NV_API_CALL __attribute__((altstack(false)))
501 #endif /* !defined(NV_API_CALL) */
504 NvU64 NV_API_CALL nv_dma_to_mmap_token (nv_state_t *, NvU64);
506 void* NV_API_CALL nv_alloc_kernel_mapping (nv_state_t *, NvU64, U032, void **);
507 S032 NV_API_CALL nv_free_kernel_mapping (nv_state_t *, void *, void *);
509 NvU64 NV_API_CALL nv_get_kern_phys_address (NvU64);
510 NvU64 NV_API_CALL nv_get_user_phys_address (NvU64);
511 void* NV_API_CALL nv_get_adapter_state (U016, U016);
513 void NV_API_CALL nv_lock_rm (nv_state_t *);
514 void NV_API_CALL nv_unlock_rm (nv_state_t *);
516 void NV_API_CALL nv_set_dma_address_size (nv_state_t *, U032 );
518 RM_STATUS NV_API_CALL nv_alloc_pages (nv_state_t *, U032, U032, U032, U032, NvU64 *, void **);
519 RM_STATUS NV_API_CALL nv_free_pages (nv_state_t *, U032, U032, U032, U032, void *);
521 RM_STATUS NV_API_CALL nv_agp_init (nv_state_t *, void **, void *, U032);
522 RM_STATUS NV_API_CALL nv_agp_teardown (nv_state_t *);
524 S032 NV_API_CALL nv_start_rc_timer (nv_state_t *);
525 S032 NV_API_CALL nv_stop_rc_timer (nv_state_t *);
527 void NV_API_CALL nv_post_event (nv_state_t *, nv_event_t *, U032, U032);
528 S032 NV_API_CALL nv_get_event (nv_state_t *, void *, nv_event_t *, U032 *);
530 S032 NV_API_CALL nv_no_incoherent_mappings (void);
532 void NV_API_CALL nv_verify_pci_config (nv_state_t *, BOOL);
534 void* NV_API_CALL nv_i2c_add_adapter (nv_state_t *, U032);
535 BOOL NV_API_CALL nv_i2c_del_adapter (nv_state_t *, void *);
537 void NV_API_CALL nv_acpi_methods_init (U032 *);
538 void NV_API_CALL nv_acpi_methods_uninit (void);
540 RM_STATUS NV_API_CALL nv_acpi_method (U032, U032, U032, void *, U016, U032 *, void *, U016 *);
543 * ---------------------------------------------------------------------------
545 * Function prototypes for Resource Manager interface.
547 * ---------------------------------------------------------------------------
550 BOOL NV_API_CALL rm_init_rm (nv_stack_t *);
551 BOOL NV_API_CALL rm_shutdown_rm (nv_stack_t *);
552 BOOL NV_API_CALL rm_init_private_state (nv_stack_t *, nv_state_t *);
553 BOOL NV_API_CALL rm_free_private_state (nv_stack_t *, nv_state_t *);
554 BOOL NV_API_CALL rm_init_adapter (nv_stack_t *, nv_state_t *);
555 BOOL NV_API_CALL rm_disable_adapter (nv_stack_t *, nv_state_t *);
556 BOOL NV_API_CALL rm_shutdown_adapter (nv_stack_t *, nv_state_t *);
557 void NV_API_CALL rm_set_interrupts (nv_stack_t *, BOOL);
558 BOOL NV_API_CALL rm_ioctl (nv_stack_t *, nv_state_t *, void *, U032, void *);
559 BOOL NV_API_CALL rm_isr (nv_stack_t *, nv_state_t *, U032 *);
560 void NV_API_CALL rm_isr_bh (nv_stack_t *, nv_state_t *);
561 RM_STATUS NV_API_CALL rm_power_management (nv_stack_t *, nv_state_t *, U032, U032);
562 RM_STATUS NV_API_CALL rm_save_low_res_mode (nv_stack_t *, nv_state_t *);
563 U032 NV_API_CALL rm_get_vbios_version (nv_stack_t *, nv_state_t *, U032 *, U032 *, U032 *, U032 *, U032 *);
564 void NV_API_CALL rm_free_unused_clients (nv_stack_t *, nv_state_t *, void *);
566 void NV_API_CALL rm_update_agp_config (nv_stack_t *, nv_state_t *);
567 RM_STATUS NV_API_CALL rm_init_agp (nv_stack_t *, nv_state_t *);
568 RM_STATUS NV_API_CALL rm_teardown_agp (nv_stack_t *, nv_state_t *);
570 RM_STATUS NV_API_CALL rm_alloc_agp_pages (nv_stack_t *, nv_state_t *, U032, void **, U032 *);
571 RM_STATUS NV_API_CALL rm_free_agp_pages (nv_stack_t *, nv_state_t *, void *);
573 RM_STATUS NV_API_CALL rm_alloc_agp_bitmap (nv_stack_t *, nv_state_t *, U032, U032 *);
574 RM_STATUS NV_API_CALL rm_free_agp_bitmap (nv_stack_t *, nv_state_t *, U032, U032);
575 RM_STATUS NV_API_CALL rm_set_agp_bitmap (nv_stack_t *, nv_state_t *, void *);
576 RM_STATUS NV_API_CALL rm_clear_agp_bitmap (nv_stack_t *, nv_state_t *, void **);
578 RM_STATUS NV_API_CALL rm_read_registry_dword (nv_stack_t *, nv_state_t *, U008 *, U008 *, U032 *);
579 RM_STATUS NV_API_CALL rm_write_registry_dword (nv_stack_t *, nv_state_t *, U008 *, U008 *, U032);
580 RM_STATUS NV_API_CALL rm_read_registry_binary (nv_stack_t *, nv_state_t *, U008 *, U008 *, U008 *, U032 *);
581 RM_STATUS NV_API_CALL rm_write_registry_binary (nv_stack_t *, nv_state_t *, U008 *, U008 *, U008 *, U032);
583 RM_STATUS NV_API_CALL rm_run_rc_callback (nv_stack_t *, nv_state_t *);
584 RM_STATUS NV_API_CALL rm_get_device_name (nv_stack_t *, nv_state_t *, U032, U032, U008*);
586 RM_STATUS NV_API_CALL rm_validate_pfn_range (nv_stack_t *, nv_state_t *, void *, U032, U032, BOOL);
587 NvU64 NV_API_CALL nv_rdtsc (void);
589 void NV_API_CALL rm_register_compatible_ioctls (nv_stack_t *);
590 void NV_API_CALL rm_unregister_compatible_ioctls (nv_stack_t *);
592 BOOL NV_API_CALL rm_is_legacy_device (nv_stack_t *, U016, BOOL);
593 BOOL NV_API_CALL rm_is_supported_device (nv_stack_t *, nv_state_t *);
595 RM_STATUS NV_API_CALL rm_i2c_read_buffer (nv_stack_t *, nv_state_t *, void *, U008, U032, U008 *);
596 RM_STATUS NV_API_CALL rm_i2c_write_buffer (nv_stack_t *, nv_state_t *, void *, U008, U032, U008 *);
597 RM_STATUS NV_API_CALL rm_i2c_smbus_write_quick (nv_stack_t *, nv_state_t *, void *, U008, U008);
598 RM_STATUS NV_API_CALL rm_i2c_smbus_read_buffer (nv_stack_t *, nv_state_t *, void *, U008, U008, U032, U008 *);
599 RM_STATUS NV_API_CALL rm_i2c_smbus_write_buffer (nv_stack_t *, nv_state_t *, void *, U008, U008, U032, U008 *);
601 void NV_API_CALL rm_check_pci_config_space (nv_stack_t *, nv_state_t *nv, BOOL, BOOL, BOOL);
603 RM_STATUS NV_API_CALL rm_i2c_remove_adapters (nv_stack_t *, nv_state_t *);
605 RM_STATUS NV_API_CALL rm_perform_version_check (nv_stack_t *, nv_ioctl_rm_api_version_t *);
607 RM_STATUS NV_API_CALL rm_system_event (nv_stack_t *, U032, U032);
609 #define rm_disable_interrupts(sp) rm_set_interrupts((sp),FALSE)
610 #define rm_enable_interrupts(sp) rm_set_interrupts((sp),TRUE)
616 static inline int nv_count_bits(NvU64 word)
620 bits = (word & 0x5555555555555555ULL) + ((word >> 1) & 0x5555555555555555ULL);
621 bits = (bits & 0x3333333333333333ULL) + ((bits >> 2) & 0x3333333333333333ULL);
622 bits = (bits & 0x0f0f0f0f0f0f0f0fULL) + ((bits >> 4) & 0x0f0f0f0f0f0f0f0fULL);
623 bits = (bits & 0x00ff00ff00ff00ffULL) + ((bits >> 8) & 0x00ff00ff00ff00ffULL);
624 bits = (bits & 0x0000ffff0000ffffULL) + ((bits >> 16) & 0x0000ffff0000ffffULL);
625 bits = (bits & 0x00000000ffffffffULL) + ((bits >> 32) & 0x00000000ffffffffULL);