#include <sys/param.h>
+#ifdef __FreeBSD__
- #if __FreeBSD_version >= 700000
+ #if __FreeBSD_version >= 800000
+ #error This driver does not support FreeBSD 8.x/-CURRENT!
+ #endif
+ #if __FreeBSD_version >= 700000 && __FreeBSD_version < 700055
#error This driver does not support FreeBSD 7.x/-CURRENT!
#endif
#if __FreeBSD_version >= 600000 && __FreeBSD_version < 600034
#include <sys/sysctl.h>
#include <machine/cpu.h>
+#ifdef __FreeBSD__
#include <machine/resource.h>
+#else
+#include <sys/resource.h>
+#endif
#include <machine/clock.h>
#include <machine/stdarg.h>
+#ifdef __FreeBSD__
#include <machine/bus.h>
+ #include <machine/specialreg.h>
+#else
+#include <sys/bus.h>
+#endif
#include <sys/conf.h>
#include <sys/rman.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <sys/kdb.h>
+#else
+#include <bus/pci/pcireg.h>
+#include <bus/pci/pcivar.h>
+#endif
#include <sys/filedesc.h>
+ #if __FreeBSD_version >= 700055
+ #include <sys/priv.h>
+ #endif
+
#include <sys/lock.h>
+#ifdef __FreeBSD__
#include <sys/mutex.h>
#include <sys/sx.h>
#include <sys/condvar.h>
} nvidia_softc_t;
-
+#define CDEV_MAJOR 180
#define CDEV_CTL_MINOR 255
extern devclass_t nvidia_devclass;
extern const char *pNVRM_ID;
++typedef struct thread d_thread_t;
++#define malloc kmalloc
++#define sprintf ksprintf
++__inline static void
++free(void *addr, struct malloc_type *type)
++{
++ if (addr != NULL)
++ kfree(addr, type);
++}
++
++#define pte_load(p) (*(p))
++#define pte_store(p, v) (*(p) = (v))
++#define pte_clear(p) pte_store((p), 0)
++void pmap_invalidate_range(struct pmap *pmap, vm_offset_t sva, vm_offset_t eva);
++
#define PCIR_CAP_LIST_ID 0x00
#define PCIR_CAP_LIST_NEXT 0x01
#define PCIR_CAP_ID_AGP 0x02
#define PCIR_CAP_ID_EXP 0x10
- #ifndef PCIS_DISPLAY_3D
- #define PCIS_DISPLAY_3D 0x02
+ #if !defined(PCIS_DISPLAY_3D)
+ #define PCIS_DISPLAY_3D 0x002
+ #endif
+ #if !defined(PCIM_CMD_INTXDIS)
+ #define PCIM_CMD_INTXDIS 0x400
+ #endif
+
+ #if !defined(PAT_UNCACHEABLE)
+ #define PAT_UNCACHEABLE 0x00
+ #endif
+ #if !defined(PAT_WRITE_COMBINING)
+ #define PAT_WRITE_COMBINING 0x01
+ #endif
+ #if !defined(PAT_WRITE_BACK)
+ #define PAT_WRITE_BACK 0x06
+ #endif
+
-#if __FreeBSD_version < 602110 || __FreeBSD_version >= 700000 && __FreeBSD_version < 700055
++#if defined(__DragonFly__) || \
++ (__FreeBSD_version < 602110 || __FreeBSD_version >= 700000 && __FreeBSD_version < 700055)
+ static inline int pmap_change_attr(vm_offset_t va, vm_size_t size, int mode)
+ {
+ vm_offset_t tmp;
+ pt_entry_t *ptep;
+
+ if (mode == PAT_UNCACHEABLE) {
+ for (tmp = va; tmp < (va + size); tmp += PAGE_SIZE) {
+ ptep = vtopte(tmp);
+ pte_store(ptep, pte_load(ptep) | PG_N);
+ }
- pmap_invalidate_range(kernel_pmap, va, tmp);
++ pmap_invalidate_range(&kernel_pmap, va, tmp);
+ }
+
+ return 0;
+ }
+
+ static inline void *pmap_mapdev_attr(vm_paddr_t pa, vm_size_t size, int mode)
+ {
+ vm_offset_t tmp, va;
+ uint32_t cache_bits;
+
- va = kmem_alloc_nofault(kernel_map, size);
++ va = kmem_alloc_nofault(&kernel_map, size);
+ if (va != 0) {
+ cache_bits = (mode != PAT_WRITE_BACK) ? PG_N : 0;
+ for (tmp = va; tmp < (va + size); tmp += PAGE_SIZE) {
+ pt_entry_t *ptep = vtopte(tmp);
+ pte_store(ptep, pa | PG_RW | PG_V | PG_G | cache_bits);
+ pa += PAGE_SIZE;
+ }
- pmap_invalidate_range(kernel_pmap, va, tmp);
++ pmap_invalidate_range(&kernel_pmap, va, tmp);
+ }
+
+ return (void *)va;
+ }
#endif
+ static inline void pmap_unmapdev_attr(vm_offset_t va, vm_size_t size)
+ {
-#if __FreeBSD_version < 602110 || __FreeBSD_version >= 700000 && __FreeBSD_version < 700055
++#if defined(__DragonFly__) || \
++ (__FreeBSD_version < 602110 || __FreeBSD_version >= 700000 && __FreeBSD_version < 700055)
+ vm_offset_t tmp;
+
+ if (va != 0) {
+ size = NV_ALIGN_UP(size, PAGE_SIZE);
+ for (tmp = va; tmp < (va + size); tmp += PAGE_SIZE)
+ pte_clear(vtopte(tmp));
- pmap_invalidate_range(kernel_pmap, va, tmp);
- kmem_free(kernel_map, va, size);
++ pmap_invalidate_range(&kernel_pmap, va, tmp);
++ kmem_free(&kernel_map, va, size);
+ }
+ #else
+ pmap_unmapdev(va, size);
+ #endif
+ }
+
/*
* Entries in the NVIDIA glue-layer registry are now described by the new
* shared nv_parm_t structure; please review nvidia_os_registry.c in case
#define __NV_IOC_TYPE(_cmd) (((_cmd) >> 8) & 0xff)
#define __NV_IOC_NR(_cmd) (((_cmd) >> 0) & 0xff)
+ #define __NV_IOC_SIZE(_cmd) (((_cmd) >> 16) & 0x1fff)
-extern uma_zone_t nvidia_stack_t_zone;
+MALLOC_DECLARE(M_NV_STACK);
#define NV_UMA_ZONE_ALLOC_STACK(ptr) \
{ \
if (os_alloc_contig_pages(&address, size) != RM_OK)
return -ENOMEM;
- /* XXX: Fix me? (cache_type) */
- at = malloc(sizeof(struct nvidia_alloc), M_NVIDIA, M_WAITOK | M_ZERO);
+ at = kmalloc(sizeof(struct nvidia_alloc), M_NVIDIA, M_WAITOK | M_ZERO);
if (!at) {
os_free_contig_pages(address, size);
return -ENOMEM;
struct nvidia_softc *sc = nv->os_state;
void *address;
u_int32_t i, size;
+ int status;
size = count * PAGE_SIZE;
- at = malloc(sizeof(struct nvidia_alloc), M_NVIDIA, M_WAITOK | M_ZERO);
+ at = kmalloc(sizeof(struct nvidia_alloc), M_NVIDIA, M_WAITOK | M_ZERO);
if (!at) {
return -ENOMEM;
}
SLIST_REMOVE(&sc->alloc_list, at, nvidia_alloc, list);
for (i = 0; i < count; i++) {
- vm_page_lock_queues();
vm_page_unwire(PHYS_TO_VM_PAGE(at->pte_array[i]), 0);
- vm_page_unlock_queues();
}
+ if (at->cache_type != NV_MEMORY_CACHED)
+ pmap_change_attr(at->address, at->size, PAT_WRITE_BACK);
+
free((void *)at->address, M_NVIDIA);
free(at, M_NVIDIA);