sys/dev/netif/em/if_em.c

   1 /*
   2  * Copyright (c) 2004 Joerg Sonnenberger <joerg@bec.de>.  All rights reserved.
   3  *
   4  * Copyright (c) 2001-2008, Intel Corporation
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  *  1. Redistributions of source code must retain the above copyright notice,
  11  *     this list of conditions and the following disclaimer.
  12  *
  13  *  2. Redistributions in binary form must reproduce the above copyright
  14  *     notice, this list of conditions and the following disclaimer in the
  15  *     documentation and/or other materials provided with the distribution.
  16  *
  17  *  3. Neither the name of the Intel Corporation nor the names of its
  18  *     contributors may be used to endorse or promote products derived from
  19  *     this software without specific prior written permission.
  20  *
  21  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  22  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  24  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  25  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  31  * POSSIBILITY OF SUCH DAMAGE.
  32  *
  33  *
  34  * Copyright (c) 2005 The DragonFly Project.  All rights reserved.
  35  *
  36  * This code is derived from software contributed to The DragonFly Project
  37  * by Matthew Dillon <dillon@backplane.com>
  38  *
  39  * Redistribution and use in source and binary forms, with or without
  40  * modification, are permitted provided that the following conditions
  41  * are met:
  42  *
  43  * 1. Redistributions of source code must retain the above copyright
  44  *    notice, this list of conditions and the following disclaimer.
  45  * 2. Redistributions in binary form must reproduce the above copyright
  46  *    notice, this list of conditions and the following disclaimer in
  47  *    the documentation and/or other materials provided with the
  48  *    distribution.
  49  * 3. Neither the name of The DragonFly Project nor the names of its
  50  *    contributors may be used to endorse or promote products derived
  51  *    from this software without specific, prior written permission.
  52  *
  53  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  56  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
  57  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  58  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
  59  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  60  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
  61  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  62  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  63  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  64  * SUCH DAMAGE.
  65  *
  66  */
  67 /*
  68  * SERIALIZATION API RULES:
  69  *
  70  * - If the driver uses the same serializer for the interrupt as for the
  71  *   ifnet, most of the serialization will be done automatically for the
  72  *   driver.
  73  *
  74  * - ifmedia entry points will be serialized by the ifmedia code using the
  75  *   ifnet serializer.
  76  *
  77  * - if_* entry points except for if_input will be serialized by the IF
  78  *   and protocol layers.
  79  *
  80  * - The device driver must be sure to serialize access from timeout code
  81  *   installed by the device driver.
  82  *
  83  * - The device driver typically holds the serializer at the time it wishes
  84  *   to call if_input.
  85  *
  86  * - We must call lwkt_serialize_handler_enable() prior to enabling the
  87  *   hardware interrupt and lwkt_serialize_handler_disable() after disabling
  88  *   the hardware interrupt in order to avoid handler execution races from
  89  *   scheduled interrupt threads.
  90  *
  91  *   NOTE!  Since callers into the device driver hold the ifnet serializer,
  92  *   the device driver may be holding a serializer at the time it calls
  93  *   if_input even if it is not serializer-aware.
  94  */
  95
  96 #include "opt_ifpoll.h"
  97
  98 #include <sys/param.h>
  99 #include <sys/bus.h>
 100 #include <sys/endian.h>
 101 #include <sys/interrupt.h>
 102 #include <sys/kernel.h>
 103 #include <sys/ktr.h>
 104 #include <sys/malloc.h>
 105 #include <sys/mbuf.h>
 106 #include <sys/proc.h>
 107 #include <sys/rman.h>
 108 #include <sys/serialize.h>
 109 #include <sys/socket.h>
 110 #include <sys/sockio.h>
 111 #include <sys/sysctl.h>
 112 #include <sys/systm.h>
 113
 114 #include <net/bpf.h>
 115 #include <net/ethernet.h>
 116 #include <net/if.h>
 117 #include <net/if_arp.h>
 118 #include <net/if_dl.h>
 119 #include <net/if_media.h>
 120 #include <net/if_poll.h>
 121 #include <net/ifq_var.h>
 122 #include <net/vlan/if_vlan_var.h>
 123 #include <net/vlan/if_vlan_ether.h>
 124
 125 #include <netinet/ip.h>
 126 #include <netinet/tcp.h>
 127 #include <netinet/udp.h>
 128
 129 #include <bus/pci/pcivar.h>
 130 #include <bus/pci/pcireg.h>
 131
 132 #include <dev/netif/ig_hal/e1000_api.h>
 133 #include <dev/netif/ig_hal/e1000_82571.h>
 134 #include <dev/netif/em/if_em.h>
 135
 136 #define EM_NAME "Intel(R) PRO/1000 Network Connection "
 137 #define EM_VER  " 7.2.4"
 138
 139 #define _EM_DEVICE(id, ret)     \
 140         { EM_VENDOR_ID, E1000_DEV_ID_##id, ret, EM_NAME #id EM_VER }
 141 #define EM_EMX_DEVICE(id)       _EM_DEVICE(id, -100)
 142 #define EM_DEVICE(id)           _EM_DEVICE(id, 0)
 143 #define EM_DEVICE_NULL  { 0, 0, 0, NULL }
 144
 145 static const struct em_vendor_info em_vendor_info_array[] = {
 146         EM_DEVICE(82540EM),
 147         EM_DEVICE(82540EM_LOM),
 148         EM_DEVICE(82540EP),
 149         EM_DEVICE(82540EP_LOM),
 150         EM_DEVICE(82540EP_LP),
 151
 152         EM_DEVICE(82541EI),
 153         EM_DEVICE(82541ER),
 154         EM_DEVICE(82541ER_LOM),
 155         EM_DEVICE(82541EI_MOBILE),
 156         EM_DEVICE(82541GI),
 157         EM_DEVICE(82541GI_LF),
 158         EM_DEVICE(82541GI_MOBILE),
 159
 160         EM_DEVICE(82542),
 161
 162         EM_DEVICE(82543GC_FIBER),
 163         EM_DEVICE(82543GC_COPPER),
 164
 165         EM_DEVICE(82544EI_COPPER),
 166         EM_DEVICE(82544EI_FIBER),
 167         EM_DEVICE(82544GC_COPPER),
 168         EM_DEVICE(82544GC_LOM),
 169
 170         EM_DEVICE(82545EM_COPPER),
 171         EM_DEVICE(82545EM_FIBER),
 172         EM_DEVICE(82545GM_COPPER),
 173         EM_DEVICE(82545GM_FIBER),
 174         EM_DEVICE(82545GM_SERDES),
 175
 176         EM_DEVICE(82546EB_COPPER),
 177         EM_DEVICE(82546EB_FIBER),
 178         EM_DEVICE(82546EB_QUAD_COPPER),
 179         EM_DEVICE(82546GB_COPPER),
 180         EM_DEVICE(82546GB_FIBER),
 181         EM_DEVICE(82546GB_SERDES),
 182         EM_DEVICE(82546GB_PCIE),
 183         EM_DEVICE(82546GB_QUAD_COPPER),
 184         EM_DEVICE(82546GB_QUAD_COPPER_KSP3),
 185
 186         EM_DEVICE(82547EI),
 187         EM_DEVICE(82547EI_MOBILE),
 188         EM_DEVICE(82547GI),
 189
 190         EM_EMX_DEVICE(82571EB_COPPER),
 191         EM_EMX_DEVICE(82571EB_FIBER),
 192         EM_EMX_DEVICE(82571EB_SERDES),
 193         EM_EMX_DEVICE(82571EB_SERDES_DUAL),
 194         EM_EMX_DEVICE(82571EB_SERDES_QUAD),
 195         EM_EMX_DEVICE(82571EB_QUAD_COPPER),
 196         EM_EMX_DEVICE(82571EB_QUAD_COPPER_BP),
 197         EM_EMX_DEVICE(82571EB_QUAD_COPPER_LP),
 198         EM_EMX_DEVICE(82571EB_QUAD_FIBER),
 199         EM_EMX_DEVICE(82571PT_QUAD_COPPER),
 200
 201         EM_EMX_DEVICE(82572EI_COPPER),
 202         EM_EMX_DEVICE(82572EI_FIBER),
 203         EM_EMX_DEVICE(82572EI_SERDES),
 204         EM_EMX_DEVICE(82572EI),
 205
 206         EM_EMX_DEVICE(82573E),
 207         EM_EMX_DEVICE(82573E_IAMT),
 208         EM_EMX_DEVICE(82573L),
 209
 210         EM_DEVICE(82583V),
 211
 212         EM_EMX_DEVICE(80003ES2LAN_COPPER_SPT),
 213         EM_EMX_DEVICE(80003ES2LAN_SERDES_SPT),
 214         EM_EMX_DEVICE(80003ES2LAN_COPPER_DPT),
 215         EM_EMX_DEVICE(80003ES2LAN_SERDES_DPT),
 216
 217         EM_DEVICE(ICH8_IGP_M_AMT),
 218         EM_DEVICE(ICH8_IGP_AMT),
 219         EM_DEVICE(ICH8_IGP_C),
 220         EM_DEVICE(ICH8_IFE),
 221         EM_DEVICE(ICH8_IFE_GT),
 222         EM_DEVICE(ICH8_IFE_G),
 223         EM_DEVICE(ICH8_IGP_M),
 224         EM_DEVICE(ICH8_82567V_3),
 225
 226         EM_DEVICE(ICH9_IGP_M_AMT),
 227         EM_DEVICE(ICH9_IGP_AMT),
 228         EM_DEVICE(ICH9_IGP_C),
 229         EM_DEVICE(ICH9_IGP_M),
 230         EM_DEVICE(ICH9_IGP_M_V),
 231         EM_DEVICE(ICH9_IFE),
 232         EM_DEVICE(ICH9_IFE_GT),
 233         EM_DEVICE(ICH9_IFE_G),
 234         EM_DEVICE(ICH9_BM),
 235
 236         EM_EMX_DEVICE(82574L),
 237         EM_EMX_DEVICE(82574LA),
 238
 239         EM_DEVICE(ICH10_R_BM_LM),
 240         EM_DEVICE(ICH10_R_BM_LF),
 241         EM_DEVICE(ICH10_R_BM_V),
 242         EM_DEVICE(ICH10_D_BM_LM),
 243         EM_DEVICE(ICH10_D_BM_LF),
 244         EM_DEVICE(ICH10_D_BM_V),
 245
 246         EM_DEVICE(PCH_M_HV_LM),
 247         EM_DEVICE(PCH_M_HV_LC),
 248         EM_DEVICE(PCH_D_HV_DM),
 249         EM_DEVICE(PCH_D_HV_DC),
 250
 251         EM_DEVICE(PCH2_LV_LM),
 252         EM_DEVICE(PCH2_LV_V),
 253
 254         /* required last entry */
 255         EM_DEVICE_NULL
 256 };
 257
 258 static int      em_probe(device_t);
 259 static int      em_attach(device_t);
 260 static int      em_detach(device_t);
 261 static int      em_shutdown(device_t);
 262 static int      em_suspend(device_t);
 263 static int      em_resume(device_t);
 264
 265 static void     em_init(void *);
 266 static void     em_stop(struct adapter *);
 267 static int      em_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
 268 static void     em_start(struct ifnet *);
 269 #ifdef IFPOLL_ENABLE
 270 static void     em_npoll(struct ifnet *, struct ifpoll_info *);
 271 static void     em_npoll_compat(struct ifnet *, void *, int);
 272 #endif
 273 static void     em_watchdog(struct ifnet *);
 274 static void     em_media_status(struct ifnet *, struct ifmediareq *);
 275 static int      em_media_change(struct ifnet *);
 276 static void     em_timer(void *);
 277
 278 static void     em_intr(void *);
 279 static void     em_intr_mask(void *);
 280 static void     em_intr_body(struct adapter *, boolean_t);
 281 static void     em_rxeof(struct adapter *, int);
 282 static void     em_txeof(struct adapter *);
 283 static void     em_tx_collect(struct adapter *);
 284 static void     em_tx_purge(struct adapter *);
 285 static void     em_enable_intr(struct adapter *);
 286 static void     em_disable_intr(struct adapter *);
 287
 288 static int      em_dma_malloc(struct adapter *, bus_size_t,
 289                     struct em_dma_alloc *);
 290 static void     em_dma_free(struct adapter *, struct em_dma_alloc *);
 291 static void     em_init_tx_ring(struct adapter *);
 292 static int      em_init_rx_ring(struct adapter *);
 293 static int      em_create_tx_ring(struct adapter *);
 294 static int      em_create_rx_ring(struct adapter *);
 295 static void     em_destroy_tx_ring(struct adapter *, int);
 296 static void     em_destroy_rx_ring(struct adapter *, int);
 297 static int      em_newbuf(struct adapter *, int, int);
 298 static int      em_encap(struct adapter *, struct mbuf **);
 299 static void     em_rxcsum(struct adapter *, struct e1000_rx_desc *,
 300                     struct mbuf *);
 301 static int      em_txcsum(struct adapter *, struct mbuf *,
 302                     uint32_t *, uint32_t *);
 303 static int      em_tso_pullup(struct adapter *, struct mbuf **);
 304 static int      em_tso_setup(struct adapter *, struct mbuf *,
 305                     uint32_t *, uint32_t *);
 306
 307 static int      em_get_hw_info(struct adapter *);
 308 static int      em_is_valid_eaddr(const uint8_t *);
 309 static int      em_alloc_pci_res(struct adapter *);
 310 static void     em_free_pci_res(struct adapter *);
 311 static int      em_reset(struct adapter *);
 312 static void     em_setup_ifp(struct adapter *);
 313 static void     em_init_tx_unit(struct adapter *);
 314 static void     em_init_rx_unit(struct adapter *);
 315 static void     em_update_stats(struct adapter *);
 316 static void     em_set_promisc(struct adapter *);
 317 static void     em_disable_promisc(struct adapter *);
 318 static void     em_set_multi(struct adapter *);
 319 static void     em_update_link_status(struct adapter *);
 320 static void     em_smartspeed(struct adapter *);
 321 static void     em_set_itr(struct adapter *, uint32_t);
 322 static void     em_disable_aspm(struct adapter *);
 323
 324 /* Hardware workarounds */
 325 static int      em_82547_fifo_workaround(struct adapter *, int);
 326 static void     em_82547_update_fifo_head(struct adapter *, int);
 327 static int      em_82547_tx_fifo_reset(struct adapter *);
 328 static void     em_82547_move_tail(void *);
 329 static void     em_82547_move_tail_serialized(struct adapter *);
 330 static uint32_t em_82544_fill_desc(bus_addr_t, uint32_t, PDESC_ARRAY);
 331
 332 static void     em_print_debug_info(struct adapter *);
 333 static void     em_print_nvm_info(struct adapter *);
 334 static void     em_print_hw_stats(struct adapter *);
 335
 336 static int      em_sysctl_stats(SYSCTL_HANDLER_ARGS);
 337 static int      em_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
 338 static int      em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS);
 339 static int      em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS);
 340 #ifdef IFPOLL_ENABLE
 341 static int      em_sysctl_npoll_stfrac(SYSCTL_HANDLER_ARGS);
 342 static int      em_sysctl_npoll_cpuid(SYSCTL_HANDLER_ARGS);
 343 #endif
 344 static void     em_add_sysctl(struct adapter *adapter);
 345
 346 /* Management and WOL Support */
 347 static void     em_get_mgmt(struct adapter *);
 348 static void     em_rel_mgmt(struct adapter *);
 349 static void     em_get_hw_control(struct adapter *);
 350 static void     em_rel_hw_control(struct adapter *);
 351 static void     em_enable_wol(device_t);
 352
 353 static device_method_t em_methods[] = {
 354         /* Device interface */
 355         DEVMETHOD(device_probe,         em_probe),
 356         DEVMETHOD(device_attach,        em_attach),
 357         DEVMETHOD(device_detach,        em_detach),
 358         DEVMETHOD(device_shutdown,      em_shutdown),
 359         DEVMETHOD(device_suspend,       em_suspend),
 360         DEVMETHOD(device_resume,        em_resume),
 361         { 0, 0 }
 362 };
 363
 364 static driver_t em_driver = {
 365         "em",
 366         em_methods,
 367         sizeof(struct adapter),
 368 };
 369
 370 static devclass_t em_devclass;
 371
 372 DECLARE_DUMMY_MODULE(if_em);
 373 MODULE_DEPEND(em, ig_hal, 1, 1, 1);
 374 DRIVER_MODULE(if_em, pci, em_driver, em_devclass, NULL, NULL);
 375
 376 /*
 377  * Tunables
 378  */
 379 static int      em_int_throttle_ceil = EM_DEFAULT_ITR;
 380 static int      em_rxd = EM_DEFAULT_RXD;
 381 static int      em_txd = EM_DEFAULT_TXD;
 382 static int      em_smart_pwr_down = 0;
 383
 384 /* Controls whether promiscuous also shows bad packets */
 385 static int      em_debug_sbp = FALSE;
 386
 387 static int      em_82573_workaround = 1;
 388 static int      em_msi_enable = 1;
 389
 390 TUNABLE_INT("hw.em.int_throttle_ceil", &em_int_throttle_ceil);
 391 TUNABLE_INT("hw.em.rxd", &em_rxd);
 392 TUNABLE_INT("hw.em.txd", &em_txd);
 393 TUNABLE_INT("hw.em.smart_pwr_down", &em_smart_pwr_down);
 394 TUNABLE_INT("hw.em.sbp", &em_debug_sbp);
 395 TUNABLE_INT("hw.em.82573_workaround", &em_82573_workaround);
 396 TUNABLE_INT("hw.em.msi.enable", &em_msi_enable);
 397
 398 /* Global used in WOL setup with multiport cards */
 399 static int      em_global_quad_port_a = 0;
 400
 401 /* Set this to one to display debug statistics */
 402 static int      em_display_debug_stats = 0;
 403
 404 #if !defined(KTR_IF_EM)
 405 #define KTR_IF_EM       KTR_ALL
 406 #endif
 407 KTR_INFO_MASTER(if_em);
 408 KTR_INFO(KTR_IF_EM, if_em, intr_beg, 0, "intr begin");
 409 KTR_INFO(KTR_IF_EM, if_em, intr_end, 1, "intr end");
 410 KTR_INFO(KTR_IF_EM, if_em, pkt_receive, 4, "rx packet");
 411 KTR_INFO(KTR_IF_EM, if_em, pkt_txqueue, 5, "tx packet");
 412 KTR_INFO(KTR_IF_EM, if_em, pkt_txclean, 6, "tx clean");
 413 #define logif(name)     KTR_LOG(if_em_ ## name)
 414
 415 static int
 416 em_probe(device_t dev)
 417 {
 418         const struct em_vendor_info *ent;
 419         uint16_t vid, did;
 420
 421         vid = pci_get_vendor(dev);
 422         did = pci_get_device(dev);
 423
 424         for (ent = em_vendor_info_array; ent->desc != NULL; ++ent) {
 425                 if (vid == ent->vendor_id && did == ent->device_id) {
 426                         device_set_desc(dev, ent->desc);
 427                         device_set_async_attach(dev, TRUE);
 428                         return (ent->ret);
 429                 }
 430         }
 431         return (ENXIO);
 432 }
 433
 434 static int
 435 em_attach(device_t dev)
 436 {
 437         struct adapter *adapter = device_get_softc(dev);
 438         struct ifnet *ifp = &adapter->arpcom.ac_if;
 439         int tsize, rsize;
 440         int error = 0;
 441         uint16_t eeprom_data, device_id, apme_mask;
 442         driver_intr_t *intr_func;
 443
 444         adapter->dev = adapter->osdep.dev = dev;
 445
 446         callout_init_mp(&adapter->timer);
 447         callout_init_mp(&adapter->tx_fifo_timer);
 448
 449         /* Determine hardware and mac info */
 450         error = em_get_hw_info(adapter);
 451         if (error) {
 452                 device_printf(dev, "Identify hardware failed\n");
 453                 goto fail;
 454         }
 455
 456         /* Setup PCI resources */
 457         error = em_alloc_pci_res(adapter);
 458         if (error) {
 459                 device_printf(dev, "Allocation of PCI resources failed\n");
 460                 goto fail;
 461         }
 462
 463         /*
 464          * For ICH8 and family we need to map the flash memory,
 465          * and this must happen after the MAC is identified.
 466          */
 467         if (adapter->hw.mac.type == e1000_ich8lan ||
 468             adapter->hw.mac.type == e1000_ich9lan ||
 469             adapter->hw.mac.type == e1000_ich10lan ||
 470             adapter->hw.mac.type == e1000_pchlan ||
 471             adapter->hw.mac.type == e1000_pch2lan) {
 472                 adapter->flash_rid = EM_BAR_FLASH;
 473
 474                 adapter->flash = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
 475                                         &adapter->flash_rid, RF_ACTIVE);
 476                 if (adapter->flash == NULL) {
 477                         device_printf(dev, "Mapping of Flash failed\n");
 478                         error = ENXIO;
 479                         goto fail;
 480                 }
 481                 adapter->osdep.flash_bus_space_tag =
 482                     rman_get_bustag(adapter->flash);
 483                 adapter->osdep.flash_bus_space_handle =
 484                     rman_get_bushandle(adapter->flash);
 485
 486                 /*
 487                  * This is used in the shared code
 488                  * XXX this goof is actually not used.
 489                  */
 490                 adapter->hw.flash_address = (uint8_t *)adapter->flash;
 491         }
 492
 493         switch (adapter->hw.mac.type) {
 494         case e1000_82571:
 495         case e1000_82572:
 496                 /*
 497                  * Pullup extra 4bytes into the first data segment, see:
 498                  * 82571/82572 specification update errata #7
 499                  *
 500                  * NOTE:
 501                  * 4bytes instead of 2bytes, which are mentioned in the
 502                  * errata, are pulled; mainly to keep rest of the data
 503                  * properly aligned.
 504                  */
 505                 adapter->flags |= EM_FLAG_TSO_PULLEX;
 506                 /* FALL THROUGH */
 507
 508         case e1000_82573:
 509         case e1000_82574:
 510         case e1000_80003es2lan:
 511                 adapter->flags |= EM_FLAG_TSO;
 512                 break;
 513
 514         default:
 515                 break;
 516         }
 517
 518         /* Do Shared Code initialization */
 519         if (e1000_setup_init_funcs(&adapter->hw, TRUE)) {
 520                 device_printf(dev, "Setup of Shared code failed\n");
 521                 error = ENXIO;
 522                 goto fail;
 523         }
 524
 525         e1000_get_bus_info(&adapter->hw);
 526
 527         /*
 528          * Validate number of transmit and receive descriptors.  It
 529          * must not exceed hardware maximum, and must be multiple
 530          * of E1000_DBA_ALIGN.
 531          */
 532         if ((em_txd * sizeof(struct e1000_tx_desc)) % EM_DBA_ALIGN != 0 ||
 533             (adapter->hw.mac.type >= e1000_82544 && em_txd > EM_MAX_TXD) ||
 534             (adapter->hw.mac.type < e1000_82544 && em_txd > EM_MAX_TXD_82543) ||
 535             em_txd < EM_MIN_TXD) {
 536                 device_printf(dev, "Using %d TX descriptors instead of %d!\n",
 537                     EM_DEFAULT_TXD, em_txd);
 538                 adapter->num_tx_desc = EM_DEFAULT_TXD;
 539         } else {
 540                 adapter->num_tx_desc = em_txd;
 541         }
 542         if ((em_rxd * sizeof(struct e1000_rx_desc)) % EM_DBA_ALIGN != 0 ||
 543             (adapter->hw.mac.type >= e1000_82544 && em_rxd > EM_MAX_RXD) ||
 544             (adapter->hw.mac.type < e1000_82544 && em_rxd > EM_MAX_RXD_82543) ||
 545             em_rxd < EM_MIN_RXD) {
 546                 device_printf(dev, "Using %d RX descriptors instead of %d!\n",
 547                     EM_DEFAULT_RXD, em_rxd);
 548                 adapter->num_rx_desc = EM_DEFAULT_RXD;
 549         } else {
 550                 adapter->num_rx_desc = em_rxd;
 551         }
 552
 553         adapter->hw.mac.autoneg = DO_AUTO_NEG;
 554         adapter->hw.phy.autoneg_wait_to_complete = FALSE;
 555         adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
 556         adapter->rx_buffer_len = MCLBYTES;
 557
 558         /*
 559          * Interrupt throttle rate
 560          */
 561         if (em_int_throttle_ceil == 0) {
 562                 adapter->int_throttle_ceil = 0;
 563         } else {
 564                 int throttle = em_int_throttle_ceil;
 565
 566                 if (throttle < 0)
 567                         throttle = EM_DEFAULT_ITR;
 568
 569                 /* Recalculate the tunable value to get the exact frequency. */
 570                 throttle = 1000000000 / 256 / throttle;
 571
 572                 /* Upper 16bits of ITR is reserved and should be zero */
 573                 if (throttle & 0xffff0000)
 574                         throttle = 1000000000 / 256 / EM_DEFAULT_ITR;
 575
 576                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
 577         }
 578
 579         e1000_init_script_state_82541(&adapter->hw, TRUE);
 580         e1000_set_tbi_compatibility_82543(&adapter->hw, TRUE);
 581
 582         /* Copper options */
 583         if (adapter->hw.phy.media_type == e1000_media_type_copper) {
 584                 adapter->hw.phy.mdix = AUTO_ALL_MODES;
 585                 adapter->hw.phy.disable_polarity_correction = FALSE;
 586                 adapter->hw.phy.ms_type = EM_MASTER_SLAVE;
 587         }
 588
 589         /* Set the frame limits assuming standard ethernet sized frames. */
 590         adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN;
 591         adapter->min_frame_size = ETH_ZLEN + ETHER_CRC_LEN;
 592
 593         /* This controls when hardware reports transmit completion status. */
 594         adapter->hw.mac.report_tx_early = 1;
 595
 596         /*
 597          * Create top level busdma tag
 598          */
 599         error = bus_dma_tag_create(NULL, 1, 0,
 600                         BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
 601                         NULL, NULL,
 602                         BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT,
 603                         0, &adapter->parent_dtag);
 604         if (error) {
 605                 device_printf(dev, "could not create top level DMA tag\n");
 606                 goto fail;
 607         }
 608
 609         /*
 610          * Allocate Transmit Descriptor ring
 611          */
 612         tsize = roundup2(adapter->num_tx_desc * sizeof(struct e1000_tx_desc),
 613                          EM_DBA_ALIGN);
 614         error = em_dma_malloc(adapter, tsize, &adapter->txdma);
 615         if (error) {
 616                 device_printf(dev, "Unable to allocate tx_desc memory\n");
 617                 goto fail;
 618         }
 619         adapter->tx_desc_base = adapter->txdma.dma_vaddr;
 620
 621         /*
 622          * Allocate Receive Descriptor ring
 623          */
 624         rsize = roundup2(adapter->num_rx_desc * sizeof(struct e1000_rx_desc),
 625                          EM_DBA_ALIGN);
 626         error = em_dma_malloc(adapter, rsize, &adapter->rxdma);
 627         if (error) {
 628                 device_printf(dev, "Unable to allocate rx_desc memory\n");
 629                 goto fail;
 630         }
 631         adapter->rx_desc_base = adapter->rxdma.dma_vaddr;
 632
 633         /* Allocate multicast array memory. */
 634         adapter->mta = kmalloc(ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES,
 635             M_DEVBUF, M_WAITOK);
 636
 637         /* Indicate SOL/IDER usage */
 638         if (e1000_check_reset_block(&adapter->hw)) {
 639                 device_printf(dev,
 640                     "PHY reset is blocked due to SOL/IDER session.\n");
 641         }
 642
 643         /*
 644          * Start from a known state, this is important in reading the
 645          * nvm and mac from that.
 646          */
 647         e1000_reset_hw(&adapter->hw);
 648
 649         /* Make sure we have a good EEPROM before we read from it */
 650         if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 651                 /*
 652                  * Some PCI-E parts fail the first check due to
 653                  * the link being in sleep state, call it again,
 654                  * if it fails a second time its a real issue.
 655                  */
 656                 if (e1000_validate_nvm_checksum(&adapter->hw) < 0) {
 657                         device_printf(dev,
 658                             "The EEPROM Checksum Is Not Valid\n");
 659                         error = EIO;
 660                         goto fail;
 661                 }
 662         }
 663
 664         /* Copy the permanent MAC address out of the EEPROM */
 665         if (e1000_read_mac_addr(&adapter->hw) < 0) {
 666                 device_printf(dev, "EEPROM read error while reading MAC"
 667                     " address\n");
 668                 error = EIO;
 669                 goto fail;
 670         }
 671         if (!em_is_valid_eaddr(adapter->hw.mac.addr)) {
 672                 device_printf(dev, "Invalid MAC address\n");
 673                 error = EIO;
 674                 goto fail;
 675         }
 676
 677         /* Allocate transmit descriptors and buffers */
 678         error = em_create_tx_ring(adapter);
 679         if (error) {
 680                 device_printf(dev, "Could not setup transmit structures\n");
 681                 goto fail;
 682         }
 683
 684         /* Allocate receive descriptors and buffers */
 685         error = em_create_rx_ring(adapter);
 686         if (error) {
 687                 device_printf(dev, "Could not setup receive structures\n");
 688                 goto fail;
 689         }
 690
 691         /* Manually turn off all interrupts */
 692         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
 693
 694         /* Determine if we have to control management hardware */
 695         if (e1000_enable_mng_pass_thru(&adapter->hw))
 696                 adapter->flags |= EM_FLAG_HAS_MGMT;
 697
 698         /*
 699          * Setup Wake-on-Lan
 700          */
 701         apme_mask = EM_EEPROM_APME;
 702         eeprom_data = 0;
 703         switch (adapter->hw.mac.type) {
 704         case e1000_82542:
 705         case e1000_82543:
 706                 break;
 707
 708         case e1000_82573:
 709         case e1000_82583:
 710                 adapter->flags |= EM_FLAG_HAS_AMT;
 711                 /* FALL THROUGH */
 712
 713         case e1000_82546:
 714         case e1000_82546_rev_3:
 715         case e1000_82571:
 716         case e1000_82572:
 717         case e1000_80003es2lan:
 718                 if (adapter->hw.bus.func == 1) {
 719                         e1000_read_nvm(&adapter->hw,
 720                             NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
 721                 } else {
 722                         e1000_read_nvm(&adapter->hw,
 723                             NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 724                 }
 725                 break;
 726
 727         case e1000_ich8lan:
 728         case e1000_ich9lan:
 729         case e1000_ich10lan:
 730         case e1000_pchlan:
 731         case e1000_pch2lan:
 732                 apme_mask = E1000_WUC_APME;
 733                 adapter->flags |= EM_FLAG_HAS_AMT;
 734                 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
 735                 break;
 736
 737         default:
 738                 e1000_read_nvm(&adapter->hw,
 739                     NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
 740                 break;
 741         }
 742         if (eeprom_data & apme_mask)
 743                 adapter->wol = E1000_WUFC_MAG | E1000_WUFC_MC;
 744
 745         /*
 746          * We have the eeprom settings, now apply the special cases
 747          * where the eeprom may be wrong or the board won't support
 748          * wake on lan on a particular port
 749          */
 750         device_id = pci_get_device(dev);
 751         switch (device_id) {
 752         case E1000_DEV_ID_82546GB_PCIE:
 753                 adapter->wol = 0;
 754                 break;
 755
 756         case E1000_DEV_ID_82546EB_FIBER:
 757         case E1000_DEV_ID_82546GB_FIBER:
 758         case E1000_DEV_ID_82571EB_FIBER:
 759                 /*
 760                  * Wake events only supported on port A for dual fiber
 761                  * regardless of eeprom setting
 762                  */
 763                 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
 764                     E1000_STATUS_FUNC_1)
 765                         adapter->wol = 0;
 766                 break;
 767
 768         case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
 769         case E1000_DEV_ID_82571EB_QUAD_COPPER:
 770         case E1000_DEV_ID_82571EB_QUAD_FIBER:
 771         case E1000_DEV_ID_82571EB_QUAD_COPPER_LP:
 772                 /* if quad port adapter, disable WoL on all but port A */
 773                 if (em_global_quad_port_a != 0)
 774                         adapter->wol = 0;
 775                 /* Reset for multiple quad port adapters */
 776                 if (++em_global_quad_port_a == 4)
 777                         em_global_quad_port_a = 0;
 778                 break;
 779         }
 780
 781         /* XXX disable wol */
 782         adapter->wol = 0;
 783
 784         /* Polling setup */
 785 #ifdef IFPOLL_ENABLE
 786         adapter->npoll_stfrac = 40 - 1; /* 1/40 polling freq */
 787         adapter->npoll_cpuid = device_get_unit(dev) % ncpus2;
 788 #endif
 789
 790         /* Setup OS specific network interface */
 791         em_setup_ifp(adapter);
 792
 793         /* Add sysctl tree, must after em_setup_ifp() */
 794         em_add_sysctl(adapter);
 795
 796         /* Reset the hardware */
 797         error = em_reset(adapter);
 798         if (error) {
 799                 device_printf(dev, "Unable to reset the hardware\n");
 800                 goto fail;
 801         }
 802
 803         /* Initialize statistics */
 804         em_update_stats(adapter);
 805
 806         adapter->hw.mac.get_link_status = 1;
 807         em_update_link_status(adapter);
 808
 809         /* Do we need workaround for 82544 PCI-X adapter? */
 810         if (adapter->hw.bus.type == e1000_bus_type_pcix &&
 811             adapter->hw.mac.type == e1000_82544)
 812                 adapter->pcix_82544 = TRUE;
 813         else
 814                 adapter->pcix_82544 = FALSE;
 815
 816         if (adapter->pcix_82544) {
 817                 /*
 818                  * 82544 on PCI-X may split one TX segment
 819                  * into two TX descs, so we double its number
 820                  * of spare TX desc here.
 821                  */
 822                 adapter->spare_tx_desc = 2 * EM_TX_SPARE;
 823         } else {
 824                 adapter->spare_tx_desc = EM_TX_SPARE;
 825         }
 826         if (adapter->flags & EM_FLAG_TSO)
 827                 adapter->spare_tx_desc = EM_TX_SPARE_TSO;
 828
 829         /*
 830          * Keep following relationship between spare_tx_desc, oact_tx_desc
 831          * and tx_int_nsegs:
 832          * (spare_tx_desc + EM_TX_RESERVED) <=
 833          * oact_tx_desc <= EM_TX_OACTIVE_MAX <= tx_int_nsegs
 834          */
 835         adapter->oact_tx_desc = adapter->num_tx_desc / 8;
 836         if (adapter->oact_tx_desc > EM_TX_OACTIVE_MAX)
 837                 adapter->oact_tx_desc = EM_TX_OACTIVE_MAX;
 838         if (adapter->oact_tx_desc < adapter->spare_tx_desc + EM_TX_RESERVED)
 839                 adapter->oact_tx_desc = adapter->spare_tx_desc + EM_TX_RESERVED;
 840
 841         adapter->tx_int_nsegs = adapter->num_tx_desc / 16;
 842         if (adapter->tx_int_nsegs < adapter->oact_tx_desc)
 843                 adapter->tx_int_nsegs = adapter->oact_tx_desc;
 844
 845         /* Non-AMT based hardware can now take control from firmware */
 846         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
 847             EM_FLAG_HAS_MGMT && adapter->hw.mac.type >= e1000_82571)
 848                 em_get_hw_control(adapter);
 849
 850         /*
 851          * Missing Interrupt Following ICR read:
 852          *
 853          * 82571/82572 specification update errata #76
 854          * 82573 specification update errata #31
 855          * 82574 specification update errata #12
 856          * 82583 specification update errata #4
 857          */
 858         intr_func = em_intr;
 859         if ((adapter->flags & EM_FLAG_SHARED_INTR) &&
 860             (adapter->hw.mac.type == e1000_82571 ||
 861              adapter->hw.mac.type == e1000_82572 ||
 862              adapter->hw.mac.type == e1000_82573 ||
 863              adapter->hw.mac.type == e1000_82574 ||
 864              adapter->hw.mac.type == e1000_82583))
 865                 intr_func = em_intr_mask;
 866
 867         error = bus_setup_intr(dev, adapter->intr_res, INTR_MPSAFE,
 868                                intr_func, adapter, &adapter->intr_tag,
 869                                ifp->if_serializer);
 870         if (error) {
 871                 device_printf(dev, "Failed to register interrupt handler");
 872                 ether_ifdetach(&adapter->arpcom.ac_if);
 873                 goto fail;
 874         }
 875
 876         ifp->if_cpuid = rman_get_cpuid(adapter->intr_res);
 877         KKASSERT(ifp->if_cpuid >= 0 && ifp->if_cpuid < ncpus);
 878         return (0);
 879 fail:
 880         em_detach(dev);
 881         return (error);
 882 }
 883
 884 static int
 885 em_detach(device_t dev)
 886 {
 887         struct adapter *adapter = device_get_softc(dev);
 888
 889         if (device_is_attached(dev)) {
 890                 struct ifnet *ifp = &adapter->arpcom.ac_if;
 891
 892                 lwkt_serialize_enter(ifp->if_serializer);
 893
 894                 em_stop(adapter);
 895
 896                 e1000_phy_hw_reset(&adapter->hw);
 897
 898                 em_rel_mgmt(adapter);
 899                 em_rel_hw_control(adapter);
 900
 901                 if (adapter->wol) {
 902                         E1000_WRITE_REG(&adapter->hw, E1000_WUC,
 903                                         E1000_WUC_PME_EN);
 904                         E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 905                         em_enable_wol(dev);
 906                 }
 907
 908                 bus_teardown_intr(dev, adapter->intr_res, adapter->intr_tag);
 909
 910                 lwkt_serialize_exit(ifp->if_serializer);
 911
 912                 ether_ifdetach(ifp);
 913         } else if (adapter->memory != NULL) {
 914                 em_rel_hw_control(adapter);
 915         }
 916         bus_generic_detach(dev);
 917
 918         em_free_pci_res(adapter);
 919
 920         em_destroy_tx_ring(adapter, adapter->num_tx_desc);
 921         em_destroy_rx_ring(adapter, adapter->num_rx_desc);
 922
 923         /* Free Transmit Descriptor ring */
 924         if (adapter->tx_desc_base)
 925                 em_dma_free(adapter, &adapter->txdma);
 926
 927         /* Free Receive Descriptor ring */
 928         if (adapter->rx_desc_base)
 929                 em_dma_free(adapter, &adapter->rxdma);
 930
 931         /* Free top level busdma tag */
 932         if (adapter->parent_dtag != NULL)
 933                 bus_dma_tag_destroy(adapter->parent_dtag);
 934
 935         /* Free sysctl tree */
 936         if (adapter->sysctl_tree != NULL)
 937                 sysctl_ctx_free(&adapter->sysctl_ctx);
 938
 939         if (adapter->mta != NULL)
 940                 kfree(adapter->mta, M_DEVBUF);
 941
 942         return (0);
 943 }
 944
 945 static int
 946 em_shutdown(device_t dev)
 947 {
 948         return em_suspend(dev);
 949 }
 950
 951 static int
 952 em_suspend(device_t dev)
 953 {
 954         struct adapter *adapter = device_get_softc(dev);
 955         struct ifnet *ifp = &adapter->arpcom.ac_if;
 956
 957         lwkt_serialize_enter(ifp->if_serializer);
 958
 959         em_stop(adapter);
 960
 961         em_rel_mgmt(adapter);
 962         em_rel_hw_control(adapter);
 963
 964         if (adapter->wol) {
 965                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
 966                 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
 967                 em_enable_wol(dev);
 968         }
 969
 970         lwkt_serialize_exit(ifp->if_serializer);
 971
 972         return bus_generic_suspend(dev);
 973 }
 974
 975 static int
 976 em_resume(device_t dev)
 977 {
 978         struct adapter *adapter = device_get_softc(dev);
 979         struct ifnet *ifp = &adapter->arpcom.ac_if;
 980
 981         lwkt_serialize_enter(ifp->if_serializer);
 982
 983         em_init(adapter);
 984         em_get_mgmt(adapter);
 985         if_devstart(ifp);
 986
 987         lwkt_serialize_exit(ifp->if_serializer);
 988
 989         return bus_generic_resume(dev);
 990 }
 991
 992 static void
 993 em_start(struct ifnet *ifp)
 994 {
 995         struct adapter *adapter = ifp->if_softc;
 996         struct mbuf *m_head;
 997
 998         ASSERT_SERIALIZED(ifp->if_serializer);
 999
1000         if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
1001                 return;
1002
1003         if (!adapter->link_active) {
1004                 ifq_purge(&ifp->if_snd);
1005                 return;
1006         }
1007
1008         while (!ifq_is_empty(&ifp->if_snd)) {
1009                 /* Now do we at least have a minimal? */
1010                 if (EM_IS_OACTIVE(adapter)) {
1011                         em_tx_collect(adapter);
1012                         if (EM_IS_OACTIVE(adapter)) {
1013                                 ifp->if_flags |= IFF_OACTIVE;
1014                                 adapter->no_tx_desc_avail1++;
1015                                 break;
1016                         }
1017                 }
1018
1019                 logif(pkt_txqueue);
1020                 m_head = ifq_dequeue(&ifp->if_snd, NULL);
1021                 if (m_head == NULL)
1022                         break;
1023
1024                 if (em_encap(adapter, &m_head)) {
1025                         ifp->if_oerrors++;
1026                         em_tx_collect(adapter);
1027                         continue;
1028                 }
1029
1030                 /* Send a copy of the frame to the BPF listener */
1031                 ETHER_BPF_MTAP(ifp, m_head);
1032
1033                 /* Set timeout in case hardware has problems transmitting. */
1034                 ifp->if_timer = EM_TX_TIMEOUT;
1035         }
1036 }
1037
1038 static int
1039 em_ioctl(struct ifnet *ifp, u_long command, caddr_t data, struct ucred *cr)
1040 {
1041         struct adapter *adapter = ifp->if_softc;
1042         struct ifreq *ifr = (struct ifreq *)data;
1043         uint16_t eeprom_data = 0;
1044         int max_frame_size, mask, reinit;
1045         int error = 0;
1046
1047         ASSERT_SERIALIZED(ifp->if_serializer);
1048
1049         switch (command) {
1050         case SIOCSIFMTU:
1051                 switch (adapter->hw.mac.type) {
1052                 case e1000_82573:
1053                         /*
1054                          * 82573 only supports jumbo frames
1055                          * if ASPM is disabled.
1056                          */
1057                         e1000_read_nvm(&adapter->hw,
1058                             NVM_INIT_3GIO_3, 1, &eeprom_data);
1059                         if (eeprom_data & NVM_WORD1A_ASPM_MASK) {
1060                                 max_frame_size = ETHER_MAX_LEN;
1061                                 break;
1062                         }
1063                         /* FALL THROUGH */
1064
1065                 /* Limit Jumbo Frame size */
1066                 case e1000_82571:
1067                 case e1000_82572:
1068                 case e1000_ich9lan:
1069                 case e1000_ich10lan:
1070                 case e1000_pch2lan:
1071                 case e1000_82574:
1072                 case e1000_82583:
1073                 case e1000_80003es2lan:
1074                         max_frame_size = 9234;
1075                         break;
1076
1077                 case e1000_pchlan:
1078                         max_frame_size = 4096;
1079                         break;
1080
1081                 /* Adapters that do not support jumbo frames */
1082                 case e1000_82542:
1083                 case e1000_ich8lan:
1084                         max_frame_size = ETHER_MAX_LEN;
1085                         break;
1086
1087                 default:
1088                         max_frame_size = MAX_JUMBO_FRAME_SIZE;
1089                         break;
1090                 }
1091                 if (ifr->ifr_mtu > max_frame_size - ETHER_HDR_LEN -
1092                     ETHER_CRC_LEN) {
1093                         error = EINVAL;
1094                         break;
1095                 }
1096
1097                 ifp->if_mtu = ifr->ifr_mtu;
1098                 adapter->max_frame_size =
1099                     ifp->if_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1100
1101                 if (ifp->if_flags & IFF_RUNNING)
1102                         em_init(adapter);
1103                 break;
1104
1105         case SIOCSIFFLAGS:
1106                 if (ifp->if_flags & IFF_UP) {
1107                         if ((ifp->if_flags & IFF_RUNNING)) {
1108                                 if ((ifp->if_flags ^ adapter->if_flags) &
1109                                     (IFF_PROMISC | IFF_ALLMULTI)) {
1110                                         em_disable_promisc(adapter);
1111                                         em_set_promisc(adapter);
1112                                 }
1113                         } else {
1114                                 em_init(adapter);
1115                         }
1116                 } else if (ifp->if_flags & IFF_RUNNING) {
1117                         em_stop(adapter);
1118                 }
1119                 adapter->if_flags = ifp->if_flags;
1120                 break;
1121
1122         case SIOCADDMULTI:
1123         case SIOCDELMULTI:
1124                 if (ifp->if_flags & IFF_RUNNING) {
1125                         em_disable_intr(adapter);
1126                         em_set_multi(adapter);
1127                         if (adapter->hw.mac.type == e1000_82542 &&
1128                             adapter->hw.revision_id == E1000_REVISION_2)
1129                                 em_init_rx_unit(adapter);
1130 #ifdef IFPOLL_ENABLE
1131                         if (!(ifp->if_flags & IFF_NPOLLING))
1132 #endif
1133                                 em_enable_intr(adapter);
1134                 }
1135                 break;
1136
1137         case SIOCSIFMEDIA:
1138                 /* Check SOL/IDER usage */
1139                 if (e1000_check_reset_block(&adapter->hw)) {
1140                         device_printf(adapter->dev, "Media change is"
1141                             " blocked due to SOL/IDER session.\n");
1142                         break;
1143                 }
1144                 /* FALL THROUGH */
1145
1146         case SIOCGIFMEDIA:
1147                 error = ifmedia_ioctl(ifp, ifr, &adapter->media, command);
1148                 break;
1149
1150         case SIOCSIFCAP:
1151                 reinit = 0;
1152                 mask = ifr->ifr_reqcap ^ ifp->if_capenable;
1153                 if (mask & IFCAP_RXCSUM) {
1154                         ifp->if_capenable ^= IFCAP_RXCSUM;
1155                         reinit = 1;
1156                 }
1157                 if (mask & IFCAP_TXCSUM) {
1158                         ifp->if_capenable ^= IFCAP_TXCSUM;
1159                         if (ifp->if_capenable & IFCAP_TXCSUM)
1160                                 ifp->if_hwassist |= EM_CSUM_FEATURES;
1161                         else
1162                                 ifp->if_hwassist &= ~EM_CSUM_FEATURES;
1163                 }
1164                 if (mask & IFCAP_TSO) {
1165                         ifp->if_capenable ^= IFCAP_TSO;
1166                         if (ifp->if_capenable & IFCAP_TSO)
1167                                 ifp->if_hwassist |= CSUM_TSO;
1168                         else
1169                                 ifp->if_hwassist &= ~CSUM_TSO;
1170                 }
1171                 if (mask & IFCAP_VLAN_HWTAGGING) {
1172                         ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
1173                         reinit = 1;
1174                 }
1175                 if (reinit && (ifp->if_flags & IFF_RUNNING))
1176                         em_init(adapter);
1177                 break;
1178
1179         default:
1180                 error = ether_ioctl(ifp, command, data);
1181                 break;
1182         }
1183         return (error);
1184 }
1185
1186 static void
1187 em_watchdog(struct ifnet *ifp)
1188 {
1189         struct adapter *adapter = ifp->if_softc;
1190
1191         ASSERT_SERIALIZED(ifp->if_serializer);
1192
1193         /*
1194          * The timer is set to 5 every time start queues a packet.
1195          * Then txeof keeps resetting it as long as it cleans at
1196          * least one descriptor.
1197          * Finally, anytime all descriptors are clean the timer is
1198          * set to 0.
1199          */
1200
1201         if (E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1202             E1000_READ_REG(&adapter->hw, E1000_TDH(0))) {
1203                 /*
1204                  * If we reach here, all TX jobs are completed and
1205                  * the TX engine should have been idled for some time.
1206                  * We don't need to call if_devstart() here.
1207                  */
1208                 ifp->if_flags &= ~IFF_OACTIVE;
1209                 ifp->if_timer = 0;
1210                 return;
1211         }
1212
1213         /*
1214          * If we are in this routine because of pause frames, then
1215          * don't reset the hardware.
1216          */
1217         if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
1218             E1000_STATUS_TXOFF) {
1219                 ifp->if_timer = EM_TX_TIMEOUT;
1220                 return;
1221         }
1222
1223         if (e1000_check_for_link(&adapter->hw) == 0)
1224                 if_printf(ifp, "watchdog timeout -- resetting\n");
1225
1226         ifp->if_oerrors++;
1227         adapter->watchdog_events++;
1228
1229         em_init(adapter);
1230
1231         if (!ifq_is_empty(&ifp->if_snd))
1232                 if_devstart(ifp);
1233 }
1234
1235 static void
1236 em_init(void *xsc)
1237 {
1238         struct adapter *adapter = xsc;
1239         struct ifnet *ifp = &adapter->arpcom.ac_if;
1240         device_t dev = adapter->dev;
1241         uint32_t pba;
1242
1243         ASSERT_SERIALIZED(ifp->if_serializer);
1244
1245         em_stop(adapter);
1246
1247         /*
1248          * Packet Buffer Allocation (PBA)
1249          * Writing PBA sets the receive portion of the buffer
1250          * the remainder is used for the transmit buffer.
1251          *
1252          * Devices before the 82547 had a Packet Buffer of 64K.
1253          *   Default allocation: PBA=48K for Rx, leaving 16K for Tx.
1254          * After the 82547 the buffer was reduced to 40K.
1255          *   Default allocation: PBA=30K for Rx, leaving 10K for Tx.
1256          *   Note: default does not leave enough room for Jumbo Frame >10k.
1257          */
1258         switch (adapter->hw.mac.type) {
1259         case e1000_82547:
1260         case e1000_82547_rev_2: /* 82547: Total Packet Buffer is 40K */
1261                 if (adapter->max_frame_size > 8192)
1262                         pba = E1000_PBA_22K; /* 22K for Rx, 18K for Tx */
1263                 else
1264                         pba = E1000_PBA_30K; /* 30K for Rx, 10K for Tx */
1265                 adapter->tx_fifo_head = 0;
1266                 adapter->tx_head_addr = pba << EM_TX_HEAD_ADDR_SHIFT;
1267                 adapter->tx_fifo_size =
1268                     (E1000_PBA_40K - pba) << EM_PBA_BYTES_SHIFT;
1269                 break;
1270
1271         /* Total Packet Buffer on these is 48K */
1272         case e1000_82571:
1273         case e1000_82572:
1274         case e1000_80003es2lan:
1275                 pba = E1000_PBA_32K; /* 32K for Rx, 16K for Tx */
1276                 break;
1277
1278         case e1000_82573: /* 82573: Total Packet Buffer is 32K */
1279                 pba = E1000_PBA_12K; /* 12K for Rx, 20K for Tx */
1280                 break;
1281
1282         case e1000_82574:
1283         case e1000_82583:
1284                 pba = E1000_PBA_20K; /* 20K for Rx, 20K for Tx */
1285                 break;
1286
1287         case e1000_ich8lan:
1288                 pba = E1000_PBA_8K;
1289                 break;
1290
1291         case e1000_ich9lan:
1292         case e1000_ich10lan:
1293 #define E1000_PBA_10K   0x000A
1294                 pba = E1000_PBA_10K;
1295                 break;
1296
1297         case e1000_pchlan:
1298         case e1000_pch2lan:
1299                 pba = E1000_PBA_26K;
1300                 break;
1301
1302         default:
1303                 /* Devices before 82547 had a Packet Buffer of 64K.   */
1304                 if (adapter->max_frame_size > 8192)
1305                         pba = E1000_PBA_40K; /* 40K for Rx, 24K for Tx */
1306                 else
1307                         pba = E1000_PBA_48K; /* 48K for Rx, 16K for Tx */
1308         }
1309         E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
1310
1311         /* Get the latest mac address, User can use a LAA */
1312         bcopy(IF_LLADDR(ifp), adapter->hw.mac.addr, ETHER_ADDR_LEN);
1313
1314         /* Put the address into the Receive Address Array */
1315         e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1316
1317         /*
1318          * With the 82571 adapter, RAR[0] may be overwritten
1319          * when the other port is reset, we make a duplicate
1320          * in RAR[14] for that eventuality, this assures
1321          * the interface continues to function.
1322          */
1323         if (adapter->hw.mac.type == e1000_82571) {
1324                 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1325                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1326                     E1000_RAR_ENTRIES - 1);
1327         }
1328
1329         /* Reset the hardware */
1330         if (em_reset(adapter)) {
1331                 device_printf(dev, "Unable to reset the hardware\n");
1332                 /* XXX em_stop()? */
1333                 return;
1334         }
1335         em_update_link_status(adapter);
1336
1337         /* Setup VLAN support, basic and offload if available */
1338         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1339
1340         if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
1341                 uint32_t ctrl;
1342
1343                 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1344                 ctrl |= E1000_CTRL_VME;
1345                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1346         }
1347
1348         /* Configure for OS presence */
1349         em_get_mgmt(adapter);
1350
1351         /* Prepare transmit descriptors and buffers */
1352         em_init_tx_ring(adapter);
1353         em_init_tx_unit(adapter);
1354
1355         /* Setup Multicast table */
1356         em_set_multi(adapter);
1357
1358         /* Prepare receive descriptors and buffers */
1359         if (em_init_rx_ring(adapter)) {
1360                 device_printf(dev, "Could not setup receive structures\n");
1361                 em_stop(adapter);
1362                 return;
1363         }
1364         em_init_rx_unit(adapter);
1365
1366         /* Don't lose promiscuous settings */
1367         em_set_promisc(adapter);
1368
1369         ifp->if_flags |= IFF_RUNNING;
1370         ifp->if_flags &= ~IFF_OACTIVE;
1371
1372         callout_reset(&adapter->timer, hz, em_timer, adapter);
1373         e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1374
1375         /* MSI/X configuration for 82574 */
1376         if (adapter->hw.mac.type == e1000_82574) {
1377                 int tmp;
1378
1379                 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1380                 tmp |= E1000_CTRL_EXT_PBA_CLR;
1381                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1382                 /*
1383                  * XXX MSIX
1384                  * Set the IVAR - interrupt vector routing.
1385                  * Each nibble represents a vector, high bit
1386                  * is enable, other 3 bits are the MSIX table
1387                  * entry, we map RXQ0 to 0, TXQ0 to 1, and
1388                  * Link (other) to 2, hence the magic number.
1389                  */
1390                 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, 0x800A0908);
1391         }
1392
1393 #ifdef IFPOLL_ENBLE
1394         /*
1395          * Only enable interrupts if we are not polling, make sure
1396          * they are off otherwise.
1397          */
1398         if (ifp->if_flags & IFF_NPOLLING)
1399                 em_disable_intr(adapter);
1400         else
1401 #endif /* IFPOLL_ENABLE */
1402                 em_enable_intr(adapter);
1403
1404         /* AMT based hardware can now take control from firmware */
1405         if ((adapter->flags & (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT)) ==
1406             (EM_FLAG_HAS_MGMT | EM_FLAG_HAS_AMT) &&
1407             adapter->hw.mac.type >= e1000_82571)
1408                 em_get_hw_control(adapter);
1409
1410         /* Don't reset the phy next time init gets called */
1411         adapter->hw.phy.reset_disable = TRUE;
1412 }
1413
1414 #ifdef IFPOLL_ENABLE
1415
1416 static void
1417 em_npoll_compat(struct ifnet *ifp, void *arg __unused, int count)
1418 {
1419         struct adapter *adapter = ifp->if_softc;
1420
1421         ASSERT_SERIALIZED(ifp->if_serializer);
1422
1423         if (adapter->npoll_stcount-- == 0) {
1424                 uint32_t reg_icr;
1425
1426                 adapter->npoll_stcount = adapter->npoll_stfrac;
1427
1428                 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1429                 if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1430                         callout_stop(&adapter->timer);
1431                         adapter->hw.mac.get_link_status = 1;
1432                         em_update_link_status(adapter);
1433                         callout_reset(&adapter->timer, hz, em_timer, adapter);
1434                 }
1435         }
1436
1437         em_rxeof(adapter, count);
1438         em_txeof(adapter);
1439
1440         if (!ifq_is_empty(&ifp->if_snd))
1441                 if_devstart(ifp);
1442 }
1443
1444 static void
1445 em_npoll(struct ifnet *ifp, struct ifpoll_info *info)
1446 {
1447         struct adapter *adapter = ifp->if_softc;
1448
1449         ASSERT_SERIALIZED(ifp->if_serializer);
1450
1451         if (info != NULL) {
1452                 int cpuid = adapter->npoll_cpuid;
1453
1454                 info->ifpi_rx[cpuid].poll_func = em_npoll_compat;
1455                 info->ifpi_rx[cpuid].arg = NULL;
1456                 info->ifpi_rx[cpuid].serializer = ifp->if_serializer;
1457
1458                 if (ifp->if_flags & IFF_RUNNING)
1459                         em_disable_intr(adapter);
1460                 ifp->if_npoll_cpuid = cpuid;
1461         } else {
1462                 if (ifp->if_flags & IFF_RUNNING)
1463                         em_enable_intr(adapter);
1464                 ifp->if_npoll_cpuid = -1;
1465         }
1466 }
1467
1468 #endif /* IFPOLL_ENABLE */
1469
1470 static void
1471 em_intr(void *xsc)
1472 {
1473         em_intr_body(xsc, TRUE);
1474 }
1475
1476 static void
1477 em_intr_body(struct adapter *adapter, boolean_t chk_asserted)
1478 {
1479         struct ifnet *ifp = &adapter->arpcom.ac_if;
1480         uint32_t reg_icr;
1481
1482         logif(intr_beg);
1483         ASSERT_SERIALIZED(ifp->if_serializer);
1484
1485         reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1486
1487         if (chk_asserted &&
1488             ((adapter->hw.mac.type >= e1000_82571 &&
1489               (reg_icr & E1000_ICR_INT_ASSERTED) == 0) ||
1490              reg_icr == 0)) {
1491                 logif(intr_end);
1492                 return;
1493         }
1494
1495         /*
1496          * XXX: some laptops trigger several spurious interrupts
1497          * on em(4) when in the resume cycle. The ICR register
1498          * reports all-ones value in this case. Processing such
1499          * interrupts would lead to a freeze. I don't know why.
1500          */
1501         if (reg_icr == 0xffffffff) {
1502                 logif(intr_end);
1503                 return;
1504         }
1505
1506         if (ifp->if_flags & IFF_RUNNING) {
1507                 if (reg_icr &
1508                     (E1000_ICR_RXT0 | E1000_ICR_RXDMT0 | E1000_ICR_RXO))
1509                         em_rxeof(adapter, -1);
1510                 if (reg_icr & E1000_ICR_TXDW) {
1511                         em_txeof(adapter);
1512                         if (!ifq_is_empty(&ifp->if_snd))
1513                                 if_devstart(ifp);
1514                 }
1515         }
1516
1517         /* Link status change */
1518         if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1519                 callout_stop(&adapter->timer);
1520                 adapter->hw.mac.get_link_status = 1;
1521                 em_update_link_status(adapter);
1522
1523                 /* Deal with TX cruft when link lost */
1524                 em_tx_purge(adapter);
1525
1526                 callout_reset(&adapter->timer, hz, em_timer, adapter);
1527         }
1528
1529         if (reg_icr & E1000_ICR_RXO)
1530                 adapter->rx_overruns++;
1531
1532         logif(intr_end);
1533 }
1534
1535 static void
1536 em_intr_mask(void *xsc)
1537 {
1538         struct adapter *adapter = xsc;
1539
1540         E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
1541         /*
1542          * NOTE:
1543          * ICR.INT_ASSERTED bit will never be set if IMS is 0,
1544          * so don't check it.
1545          */
1546         em_intr_body(adapter, FALSE);
1547         E1000_WRITE_REG(&adapter->hw, E1000_IMS, IMS_ENABLE_MASK);
1548 }
1549
1550 static void
1551 em_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
1552 {
1553         struct adapter *adapter = ifp->if_softc;
1554         u_char fiber_type = IFM_1000_SX;
1555
1556         ASSERT_SERIALIZED(ifp->if_serializer);
1557
1558         em_update_link_status(adapter);
1559
1560         ifmr->ifm_status = IFM_AVALID;
1561         ifmr->ifm_active = IFM_ETHER;
1562
1563         if (!adapter->link_active)
1564                 return;
1565
1566         ifmr->ifm_status |= IFM_ACTIVE;
1567
1568         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
1569             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
1570                 if (adapter->hw.mac.type == e1000_82545)
1571                         fiber_type = IFM_1000_LX;
1572                 ifmr->ifm_active |= fiber_type | IFM_FDX;
1573         } else {
1574                 switch (adapter->link_speed) {
1575                 case 10:
1576                         ifmr->ifm_active |= IFM_10_T;
1577                         break;
1578                 case 100:
1579                         ifmr->ifm_active |= IFM_100_TX;
1580                         break;
1581
1582                 case 1000:
1583                         ifmr->ifm_active |= IFM_1000_T;
1584                         break;
1585                 }
1586                 if (adapter->link_duplex == FULL_DUPLEX)
1587                         ifmr->ifm_active |= IFM_FDX;
1588                 else
1589                         ifmr->ifm_active |= IFM_HDX;
1590         }
1591 }
1592
1593 static int
1594 em_media_change(struct ifnet *ifp)
1595 {
1596         struct adapter *adapter = ifp->if_softc;
1597         struct ifmedia *ifm = &adapter->media;
1598
1599         ASSERT_SERIALIZED(ifp->if_serializer);
1600
1601         if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1602                 return (EINVAL);
1603
1604         switch (IFM_SUBTYPE(ifm->ifm_media)) {
1605         case IFM_AUTO:
1606                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1607                 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1608                 break;
1609
1610         case IFM_1000_LX:
1611         case IFM_1000_SX:
1612         case IFM_1000_T:
1613                 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1614                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1615                 break;
1616
1617         case IFM_100_TX:
1618                 adapter->hw.mac.autoneg = FALSE;
1619                 adapter->hw.phy.autoneg_advertised = 0;
1620                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1621                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1622                 else
1623                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1624                 break;
1625
1626         case IFM_10_T:
1627                 adapter->hw.mac.autoneg = FALSE;
1628                 adapter->hw.phy.autoneg_advertised = 0;
1629                 if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX)
1630                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1631                 else
1632                         adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
1633                 break;
1634
1635         default:
1636                 if_printf(ifp, "Unsupported media type\n");
1637                 break;
1638         }
1639
1640         /*
1641          * As the speed/duplex settings my have changed we need to
1642          * reset the PHY.
1643          */
1644         adapter->hw.phy.reset_disable = FALSE;
1645
1646         em_init(adapter);
1647
1648         return (0);
1649 }
1650
1651 static int
1652 em_encap(struct adapter *adapter, struct mbuf **m_headp)
1653 {
1654         bus_dma_segment_t segs[EM_MAX_SCATTER];
1655         bus_dmamap_t map;
1656         struct em_buffer *tx_buffer, *tx_buffer_mapped;
1657         struct e1000_tx_desc *ctxd = NULL;
1658         struct mbuf *m_head = *m_headp;
1659         uint32_t txd_upper, txd_lower, txd_used, cmd = 0;
1660         int maxsegs, nsegs, i, j, first, last = 0, error;
1661
1662         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1663                 error = em_tso_pullup(adapter, m_headp);
1664                 if (error)
1665                         return error;
1666                 m_head = *m_headp;
1667         }
1668
1669         txd_upper = txd_lower = 0;
1670         txd_used = 0;
1671
1672         /*
1673          * Capture the first descriptor index, this descriptor
1674          * will have the index of the EOP which is the only one
1675          * that now gets a DONE bit writeback.
1676          */
1677         first = adapter->next_avail_tx_desc;
1678         tx_buffer = &adapter->tx_buffer_area[first];
1679         tx_buffer_mapped = tx_buffer;
1680         map = tx_buffer->map;
1681
1682         maxsegs = adapter->num_tx_desc_avail - EM_TX_RESERVED;
1683         KASSERT(maxsegs >= adapter->spare_tx_desc,
1684                 ("not enough spare TX desc"));
1685         if (adapter->pcix_82544) {
1686                 /* Half it; see the comment in em_attach() */
1687                 maxsegs >>= 1;
1688         }
1689         if (maxsegs > EM_MAX_SCATTER)
1690                 maxsegs = EM_MAX_SCATTER;
1691
1692         error = bus_dmamap_load_mbuf_defrag(adapter->txtag, map, m_headp,
1693                         segs, maxsegs, &nsegs, BUS_DMA_NOWAIT);
1694         if (error) {
1695                 if (error == ENOBUFS)
1696                         adapter->mbuf_alloc_failed++;
1697                 else
1698                         adapter->no_tx_dma_setup++;
1699
1700                 m_freem(*m_headp);
1701                 *m_headp = NULL;
1702                 return error;
1703         }
1704         bus_dmamap_sync(adapter->txtag, map, BUS_DMASYNC_PREWRITE);
1705
1706         m_head = *m_headp;
1707         adapter->tx_nsegs += nsegs;
1708
1709         if (m_head->m_pkthdr.csum_flags & CSUM_TSO) {
1710                 /* TSO will consume one TX desc */
1711                 adapter->tx_nsegs += em_tso_setup(adapter, m_head,
1712                     &txd_upper, &txd_lower);
1713         } else if (m_head->m_pkthdr.csum_flags & EM_CSUM_FEATURES) {
1714                 /* TX csum offloading will consume one TX desc */
1715                 adapter->tx_nsegs += em_txcsum(adapter, m_head,
1716                                                &txd_upper, &txd_lower);
1717         }
1718         i = adapter->next_avail_tx_desc;
1719
1720         /* Set up our transmit descriptors */
1721         for (j = 0; j < nsegs; j++) {
1722                 /* If adapter is 82544 and on PCIX bus */
1723                 if(adapter->pcix_82544) {
1724                         DESC_ARRAY desc_array;
1725                         uint32_t array_elements, counter;
1726
1727                         /*
1728                          * Check the Address and Length combination and
1729                          * split the data accordingly
1730                          */
1731                         array_elements = em_82544_fill_desc(segs[j].ds_addr,
1732                                                 segs[j].ds_len, &desc_array);
1733                         for (counter = 0; counter < array_elements; counter++) {
1734                                 KKASSERT(txd_used < adapter->num_tx_desc_avail);
1735
1736                                 tx_buffer = &adapter->tx_buffer_area[i];
1737                                 ctxd = &adapter->tx_desc_base[i];
1738
1739                                 ctxd->buffer_addr = htole64(
1740                                     desc_array.descriptor[counter].address);
1741                                 ctxd->lower.data = htole32(
1742                                     E1000_TXD_CMD_IFCS | txd_lower |
1743                                     desc_array.descriptor[counter].length);
1744                                 ctxd->upper.data = htole32(txd_upper);
1745
1746                                 last = i;
1747                                 if (++i == adapter->num_tx_desc)
1748                                         i = 0;
1749
1750                                 txd_used++;
1751                         }
1752                 } else {
1753                         tx_buffer = &adapter->tx_buffer_area[i];
1754                         ctxd = &adapter->tx_desc_base[i];
1755
1756                         ctxd->buffer_addr = htole64(segs[j].ds_addr);
1757                         ctxd->lower.data = htole32(E1000_TXD_CMD_IFCS |
1758                                                    txd_lower | segs[j].ds_len);
1759                         ctxd->upper.data = htole32(txd_upper);
1760
1761                         last = i;
1762                         if (++i == adapter->num_tx_desc)
1763                                 i = 0;
1764                 }
1765         }
1766
1767         adapter->next_avail_tx_desc = i;
1768         if (adapter->pcix_82544) {
1769                 KKASSERT(adapter->num_tx_desc_avail > txd_used);
1770                 adapter->num_tx_desc_avail -= txd_used;
1771         } else {
1772                 KKASSERT(adapter->num_tx_desc_avail > nsegs);
1773                 adapter->num_tx_desc_avail -= nsegs;
1774         }
1775
1776         /* Handle VLAN tag */
1777         if (m_head->m_flags & M_VLANTAG) {
1778                 /* Set the vlan id. */
1779                 ctxd->upper.fields.special =
1780                     htole16(m_head->m_pkthdr.ether_vlantag);
1781
1782                 /* Tell hardware to add tag */
1783                 ctxd->lower.data |= htole32(E1000_TXD_CMD_VLE);
1784         }
1785
1786         tx_buffer->m_head = m_head;
1787         tx_buffer_mapped->map = tx_buffer->map;
1788         tx_buffer->map = map;
1789
1790         if (adapter->tx_nsegs >= adapter->tx_int_nsegs) {
1791                 adapter->tx_nsegs = 0;
1792
1793                 /*
1794                  * Report Status (RS) is turned on
1795                  * every tx_int_nsegs descriptors.
1796                  */
1797                 cmd = E1000_TXD_CMD_RS;
1798
1799                 /*
1800                  * Keep track of the descriptor, which will
1801                  * be written back by hardware.
1802                  */
1803                 adapter->tx_dd[adapter->tx_dd_tail] = last;
1804                 EM_INC_TXDD_IDX(adapter->tx_dd_tail);
1805                 KKASSERT(adapter->tx_dd_tail != adapter->tx_dd_head);
1806         }
1807
1808         /*
1809          * Last Descriptor of Packet needs End Of Packet (EOP)
1810          */
1811         ctxd->lower.data |= htole32(E1000_TXD_CMD_EOP | cmd);
1812
1813         /*
1814          * Advance the Transmit Descriptor Tail (TDT), this tells the E1000
1815          * that this frame is available to transmit.
1816          */
1817         if (adapter->hw.mac.type == e1000_82547 &&
1818             adapter->link_duplex == HALF_DUPLEX) {
1819                 em_82547_move_tail_serialized(adapter);
1820         } else {
1821                 E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), i);
1822                 if (adapter->hw.mac.type == e1000_82547) {
1823                         em_82547_update_fifo_head(adapter,
1824                             m_head->m_pkthdr.len);
1825                 }
1826         }
1827         return (0);
1828 }
1829
1830 /*
1831  * 82547 workaround to avoid controller hang in half-duplex environment.
1832  * The workaround is to avoid queuing a large packet that would span
1833  * the internal Tx FIFO ring boundary.  We need to reset the FIFO pointers
1834  * in this case.  We do that only when FIFO is quiescent.
1835  */
1836 static void
1837 em_82547_move_tail_serialized(struct adapter *adapter)
1838 {
1839         struct e1000_tx_desc *tx_desc;
1840         uint16_t hw_tdt, sw_tdt, length = 0;
1841         bool eop = 0;
1842
1843         ASSERT_SERIALIZED(adapter->arpcom.ac_if.if_serializer);
1844
1845         hw_tdt = E1000_READ_REG(&adapter->hw, E1000_TDT(0));
1846         sw_tdt = adapter->next_avail_tx_desc;
1847
1848         while (hw_tdt != sw_tdt) {
1849                 tx_desc = &adapter->tx_desc_base[hw_tdt];
1850                 length += tx_desc->lower.flags.length;
1851                 eop = tx_desc->lower.data & E1000_TXD_CMD_EOP;
1852                 if (++hw_tdt == adapter->num_tx_desc)
1853                         hw_tdt = 0;
1854
1855                 if (eop) {
1856                         if (em_82547_fifo_workaround(adapter, length)) {
1857                                 adapter->tx_fifo_wrk_cnt++;
1858                                 callout_reset(&adapter->tx_fifo_timer, 1,
1859                                         em_82547_move_tail, adapter);
1860                                 break;
1861                         }
1862                         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), hw_tdt);
1863                         em_82547_update_fifo_head(adapter, length);
1864                         length = 0;
1865                 }
1866         }
1867 }
1868
1869 static void
1870 em_82547_move_tail(void *xsc)
1871 {
1872         struct adapter *adapter = xsc;
1873         struct ifnet *ifp = &adapter->arpcom.ac_if;
1874
1875         lwkt_serialize_enter(ifp->if_serializer);
1876         em_82547_move_tail_serialized(adapter);
1877         lwkt_serialize_exit(ifp->if_serializer);
1878 }
1879
1880 static int
1881 em_82547_fifo_workaround(struct adapter *adapter, int len)
1882 {
1883         int fifo_space, fifo_pkt_len;
1884
1885         fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1886
1887         if (adapter->link_duplex == HALF_DUPLEX) {
1888                 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
1889
1890                 if (fifo_pkt_len >= (EM_82547_PKT_THRESH + fifo_space)) {
1891                         if (em_82547_tx_fifo_reset(adapter))
1892                                 return (0);
1893                         else
1894                                 return (1);
1895                 }
1896         }
1897         return (0);
1898 }
1899
1900 static void
1901 em_82547_update_fifo_head(struct adapter *adapter, int len)
1902 {
1903         int fifo_pkt_len = roundup2(len + EM_FIFO_HDR, EM_FIFO_HDR);
1904
1905         /* tx_fifo_head is always 16 byte aligned */
1906         adapter->tx_fifo_head += fifo_pkt_len;
1907         if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1908                 adapter->tx_fifo_head -= adapter->tx_fifo_size;
1909 }
1910
1911 static int
1912 em_82547_tx_fifo_reset(struct adapter *adapter)
1913 {
1914         uint32_t tctl;
1915
1916         if ((E1000_READ_REG(&adapter->hw, E1000_TDT(0)) ==
1917              E1000_READ_REG(&adapter->hw, E1000_TDH(0))) &&
1918             (E1000_READ_REG(&adapter->hw, E1000_TDFT) ==
1919              E1000_READ_REG(&adapter->hw, E1000_TDFH)) &&
1920             (E1000_READ_REG(&adapter->hw, E1000_TDFTS) ==
1921              E1000_READ_REG(&adapter->hw, E1000_TDFHS)) &&
1922             (E1000_READ_REG(&adapter->hw, E1000_TDFPC) == 0)) {
1923                 /* Disable TX unit */
1924                 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
1925                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL,
1926                     tctl & ~E1000_TCTL_EN);
1927
1928                 /* Reset FIFO pointers */
1929                 E1000_WRITE_REG(&adapter->hw, E1000_TDFT,
1930                     adapter->tx_head_addr);
1931                 E1000_WRITE_REG(&adapter->hw, E1000_TDFH,
1932                     adapter->tx_head_addr);
1933                 E1000_WRITE_REG(&adapter->hw, E1000_TDFTS,
1934                     adapter->tx_head_addr);
1935                 E1000_WRITE_REG(&adapter->hw, E1000_TDFHS,
1936                     adapter->tx_head_addr);
1937
1938                 /* Re-enable TX unit */
1939                 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
1940                 E1000_WRITE_FLUSH(&adapter->hw);
1941
1942                 adapter->tx_fifo_head = 0;
1943                 adapter->tx_fifo_reset_cnt++;
1944
1945                 return (TRUE);
1946         } else {
1947                 return (FALSE);
1948         }
1949 }
1950
1951 static void
1952 em_set_promisc(struct adapter *adapter)
1953 {
1954         struct ifnet *ifp = &adapter->arpcom.ac_if;
1955         uint32_t reg_rctl;
1956
1957         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1958
1959         if (ifp->if_flags & IFF_PROMISC) {
1960                 reg_rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1961                 /* Turn this on if you want to see bad packets */
1962                 if (em_debug_sbp)
1963                         reg_rctl |= E1000_RCTL_SBP;
1964                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1965         } else if (ifp->if_flags & IFF_ALLMULTI) {
1966                 reg_rctl |= E1000_RCTL_MPE;
1967                 reg_rctl &= ~E1000_RCTL_UPE;
1968                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1969         }
1970 }
1971
1972 static void
1973 em_disable_promisc(struct adapter *adapter)
1974 {
1975         uint32_t reg_rctl;
1976
1977         reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
1978
1979         reg_rctl &= ~E1000_RCTL_UPE;
1980         reg_rctl &= ~E1000_RCTL_MPE;
1981         reg_rctl &= ~E1000_RCTL_SBP;
1982         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
1983 }
1984
1985 static void
1986 em_set_multi(struct adapter *adapter)
1987 {
1988         struct ifnet *ifp = &adapter->arpcom.ac_if;
1989         struct ifmultiaddr *ifma;
1990         uint32_t reg_rctl = 0;
1991         uint8_t *mta;
1992         int mcnt = 0;
1993
1994         mta = adapter->mta;
1995         bzero(mta, ETH_ADDR_LEN * MAX_NUM_MULTICAST_ADDRESSES);
1996
1997         if (adapter->hw.mac.type == e1000_82542 &&
1998             adapter->hw.revision_id == E1000_REVISION_2) {
1999                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2000                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2001                         e1000_pci_clear_mwi(&adapter->hw);
2002                 reg_rctl |= E1000_RCTL_RST;
2003                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2004                 msec_delay(5);
2005         }
2006
2007         TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
2008                 if (ifma->ifma_addr->sa_family != AF_LINK)
2009                         continue;
2010
2011                 if (mcnt == MAX_NUM_MULTICAST_ADDRESSES)
2012                         break;
2013
2014                 bcopy(LLADDR((struct sockaddr_dl *)ifma->ifma_addr),
2015                     &mta[mcnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
2016                 mcnt++;
2017         }
2018
2019         if (mcnt >= MAX_NUM_MULTICAST_ADDRESSES) {
2020                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2021                 reg_rctl |= E1000_RCTL_MPE;
2022                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2023         } else {
2024                 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
2025         }
2026
2027         if (adapter->hw.mac.type == e1000_82542 &&
2028             adapter->hw.revision_id == E1000_REVISION_2) {
2029                 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2030                 reg_rctl &= ~E1000_RCTL_RST;
2031                 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2032                 msec_delay(5);
2033                 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2034                         e1000_pci_set_mwi(&adapter->hw);
2035         }
2036 }
2037
2038 /*
2039  * This routine checks for link status and updates statistics.
2040  */
2041 static void
2042 em_timer(void *xsc)
2043 {
2044         struct adapter *adapter = xsc;
2045         struct ifnet *ifp = &adapter->arpcom.ac_if;
2046
2047         lwkt_serialize_enter(ifp->if_serializer);
2048
2049         em_update_link_status(adapter);
2050         em_update_stats(adapter);
2051
2052         /* Reset LAA into RAR[0] on 82571 */
2053         if (e1000_get_laa_state_82571(&adapter->hw) == TRUE)
2054                 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2055
2056         if (em_display_debug_stats && (ifp->if_flags & IFF_RUNNING))
2057                 em_print_hw_stats(adapter);
2058
2059         em_smartspeed(adapter);
2060
2061         callout_reset(&adapter->timer, hz, em_timer, adapter);
2062
2063         lwkt_serialize_exit(ifp->if_serializer);
2064 }
2065
2066 static void
2067 em_update_link_status(struct adapter *adapter)
2068 {
2069         struct e1000_hw *hw = &adapter->hw;
2070         struct ifnet *ifp = &adapter->arpcom.ac_if;
2071         device_t dev = adapter->dev;
2072         uint32_t link_check = 0;
2073
2074         /* Get the cached link value or read phy for real */
2075         switch (hw->phy.media_type) {
2076         case e1000_media_type_copper:
2077                 if (hw->mac.get_link_status) {
2078                         /* Do the work to read phy */
2079                         e1000_check_for_link(hw);
2080                         link_check = !hw->mac.get_link_status;
2081                         if (link_check) /* ESB2 fix */
2082                                 e1000_cfg_on_link_up(hw);
2083                 } else {
2084                         link_check = TRUE;
2085                 }
2086                 break;
2087
2088         case e1000_media_type_fiber:
2089                 e1000_check_for_link(hw);
2090                 link_check =
2091                         E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU;
2092                 break;
2093
2094         case e1000_media_type_internal_serdes:
2095                 e1000_check_for_link(hw);
2096                 link_check = adapter->hw.mac.serdes_has_link;
2097                 break;
2098
2099         case e1000_media_type_unknown:
2100         default:
2101                 break;
2102         }
2103
2104         /* Now check for a transition */
2105         if (link_check && adapter->link_active == 0) {
2106                 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2107                     &adapter->link_duplex);
2108
2109                 /*
2110                  * Check if we should enable/disable SPEED_MODE bit on
2111                  * 82571/82572
2112                  */
2113                 if (adapter->link_speed != SPEED_1000 &&
2114                     (hw->mac.type == e1000_82571 ||
2115                      hw->mac.type == e1000_82572)) {
2116                         int tarc0;
2117
2118                         tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2119                         tarc0 &= ~SPEED_MODE_BIT;
2120                         E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2121                 }
2122                 if (bootverbose) {
2123                         device_printf(dev, "Link is up %d Mbps %s\n",
2124                             adapter->link_speed,
2125                             ((adapter->link_duplex == FULL_DUPLEX) ?
2126                             "Full Duplex" : "Half Duplex"));
2127                 }
2128                 adapter->link_active = 1;
2129                 adapter->smartspeed = 0;
2130                 ifp->if_baudrate = adapter->link_speed * 1000000;
2131                 ifp->if_link_state = LINK_STATE_UP;
2132                 if_link_state_change(ifp);
2133         } else if (!link_check && adapter->link_active == 1) {
2134                 ifp->if_baudrate = adapter->link_speed = 0;
2135                 adapter->link_duplex = 0;
2136                 if (bootverbose)
2137                         device_printf(dev, "Link is Down\n");
2138                 adapter->link_active = 0;
2139 #if 0
2140                 /* Link down, disable watchdog */
2141                 if->if_timer = 0;
2142 #endif
2143                 ifp->if_link_state = LINK_STATE_DOWN;
2144                 if_link_state_change(ifp);
2145         }
2146 }
2147
2148 static void
2149 em_stop(struct adapter *adapter)
2150 {
2151         struct ifnet *ifp = &adapter->arpcom.ac_if;
2152         int i;
2153
2154         ASSERT_SERIALIZED(ifp->if_serializer);
2155
2156         em_disable_intr(adapter);
2157
2158         callout_stop(&adapter->timer);
2159         callout_stop(&adapter->tx_fifo_timer);
2160
2161         ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2162         ifp->if_timer = 0;
2163
2164         e1000_reset_hw(&adapter->hw);
2165         if (adapter->hw.mac.type >= e1000_82544)
2166                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2167
2168         for (i = 0; i < adapter->num_tx_desc; i++) {
2169                 struct em_buffer *tx_buffer = &adapter->tx_buffer_area[i];
2170
2171                 if (tx_buffer->m_head != NULL) {
2172                         bus_dmamap_unload(adapter->txtag, tx_buffer->map);
2173                         m_freem(tx_buffer->m_head);
2174                         tx_buffer->m_head = NULL;
2175                 }
2176         }
2177
2178         for (i = 0; i < adapter->num_rx_desc; i++) {
2179                 struct em_buffer *rx_buffer = &adapter->rx_buffer_area[i];
2180
2181                 if (rx_buffer->m_head != NULL) {
2182                         bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
2183                         m_freem(rx_buffer->m_head);
2184                         rx_buffer->m_head = NULL;
2185                 }
2186         }
2187
2188         if (adapter->fmp != NULL)
2189                 m_freem(adapter->fmp);
2190         adapter->fmp = NULL;
2191         adapter->lmp = NULL;
2192
2193         adapter->csum_flags = 0;
2194         adapter->csum_lhlen = 0;
2195         adapter->csum_iphlen = 0;
2196         adapter->csum_thlen = 0;
2197         adapter->csum_mss = 0;
2198         adapter->csum_pktlen = 0;
2199
2200         adapter->tx_dd_head = 0;
2201         adapter->tx_dd_tail = 0;
2202         adapter->tx_nsegs = 0;
2203 }
2204
2205 static int
2206 em_get_hw_info(struct adapter *adapter)
2207 {
2208         device_t dev = adapter->dev;
2209
2210         /* Save off the information about this board */
2211         adapter->hw.vendor_id = pci_get_vendor(dev);
2212         adapter->hw.device_id = pci_get_device(dev);
2213         adapter->hw.revision_id = pci_get_revid(dev);
2214         adapter->hw.subsystem_vendor_id = pci_get_subvendor(dev);
2215         adapter->hw.subsystem_device_id = pci_get_subdevice(dev);
2216
2217         /* Do Shared Code Init and Setup */
2218         if (e1000_set_mac_type(&adapter->hw))
2219                 return ENXIO;
2220         return 0;
2221 }
2222
2223 static int
2224 em_alloc_pci_res(struct adapter *adapter)
2225 {
2226         device_t dev = adapter->dev;
2227         u_int intr_flags;
2228         int val, rid, msi_enable;
2229
2230         /* Enable bus mastering */
2231         pci_enable_busmaster(dev);
2232
2233         adapter->memory_rid = EM_BAR_MEM;
2234         adapter->memory = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
2235                                 &adapter->memory_rid, RF_ACTIVE);
2236         if (adapter->memory == NULL) {
2237                 device_printf(dev, "Unable to allocate bus resource: memory\n");
2238                 return (ENXIO);
2239         }
2240         adapter->osdep.mem_bus_space_tag =
2241             rman_get_bustag(adapter->memory);
2242         adapter->osdep.mem_bus_space_handle =
2243             rman_get_bushandle(adapter->memory);
2244
2245         /* XXX This is quite goofy, it is not actually used */
2246         adapter->hw.hw_addr = (uint8_t *)&adapter->osdep.mem_bus_space_handle;
2247
2248         /* Only older adapters use IO mapping */
2249         if (adapter->hw.mac.type > e1000_82543 &&
2250             adapter->hw.mac.type < e1000_82571) {
2251                 /* Figure our where our IO BAR is ? */
2252                 for (rid = PCIR_BAR(0); rid < PCIR_CARDBUSCIS;) {
2253                         val = pci_read_config(dev, rid, 4);
2254                         if (EM_BAR_TYPE(val) == EM_BAR_TYPE_IO) {
2255                                 adapter->io_rid = rid;
2256                                 break;
2257                         }
2258                         rid += 4;
2259                         /* check for 64bit BAR */
2260                         if (EM_BAR_MEM_TYPE(val) == EM_BAR_MEM_TYPE_64BIT)
2261                                 rid += 4;
2262                 }
2263                 if (rid >= PCIR_CARDBUSCIS) {
2264                         device_printf(dev, "Unable to locate IO BAR\n");
2265                         return (ENXIO);
2266                 }
2267                 adapter->ioport = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
2268                                         &adapter->io_rid, RF_ACTIVE);
2269                 if (adapter->ioport == NULL) {
2270                         device_printf(dev, "Unable to allocate bus resource: "
2271                             "ioport\n");
2272                         return (ENXIO);
2273                 }
2274                 adapter->hw.io_base = 0;
2275                 adapter->osdep.io_bus_space_tag =
2276                     rman_get_bustag(adapter->ioport);
2277                 adapter->osdep.io_bus_space_handle =
2278                     rman_get_bushandle(adapter->ioport);
2279         }
2280
2281         /*
2282          * Don't enable MSI-X on 82574, see:
2283          * 82574 specification update errata #15
2284          *
2285          * Don't enable MSI on PCI/PCI-X chips, see:
2286          * 82540 specification update errata #6
2287          * 82545 specification update errata #4
2288          *
2289          * Don't enable MSI on 82571/82572, see:
2290          * 82571/82572 specification update errata #63
2291          */
2292         msi_enable = em_msi_enable;
2293         if (msi_enable &&
2294             (!pci_is_pcie(dev) ||
2295              adapter->hw.mac.type == e1000_82571 ||
2296              adapter->hw.mac.type == e1000_82572))
2297                 msi_enable = 0;
2298
2299         adapter->intr_type = pci_alloc_1intr(dev, msi_enable,
2300             &adapter->intr_rid, &intr_flags);
2301
2302         if (adapter->intr_type == PCI_INTR_TYPE_LEGACY) {
2303                 int unshared;
2304
2305                 unshared = device_getenv_int(dev, "irq.unshared", 0);
2306                 if (!unshared) {
2307                         adapter->flags |= EM_FLAG_SHARED_INTR;
2308                         if (bootverbose)
2309                                 device_printf(dev, "IRQ shared\n");
2310                 } else {
2311                         intr_flags &= ~RF_SHAREABLE;
2312                         if (bootverbose)
2313                                 device_printf(dev, "IRQ unshared\n");
2314                 }
2315         }
2316
2317         adapter->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
2318             &adapter->intr_rid, intr_flags);
2319         if (adapter->intr_res == NULL) {
2320                 device_printf(dev, "Unable to allocate bus resource: "
2321                     "interrupt\n");
2322                 return (ENXIO);
2323         }
2324
2325         adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2326         adapter->hw.back = &adapter->osdep;
2327         return (0);
2328 }
2329
2330 static void
2331 em_free_pci_res(struct adapter *adapter)
2332 {
2333         device_t dev = adapter->dev;
2334
2335         if (adapter->intr_res != NULL) {
2336                 bus_release_resource(dev, SYS_RES_IRQ,
2337                     adapter->intr_rid, adapter->intr_res);
2338         }
2339
2340         if (adapter->intr_type == PCI_INTR_TYPE_MSI)
2341                 pci_release_msi(dev);
2342
2343         if (adapter->memory != NULL) {
2344                 bus_release_resource(dev, SYS_RES_MEMORY,
2345                     adapter->memory_rid, adapter->memory);
2346         }
2347
2348         if (adapter->flash != NULL) {
2349                 bus_release_resource(dev, SYS_RES_MEMORY,
2350                     adapter->flash_rid, adapter->flash);
2351         }
2352
2353         if (adapter->ioport != NULL) {
2354                 bus_release_resource(dev, SYS_RES_IOPORT,
2355                     adapter->io_rid, adapter->ioport);
2356         }
2357 }
2358
2359 static int
2360 em_reset(struct adapter *adapter)
2361 {
2362         device_t dev = adapter->dev;
2363         uint16_t rx_buffer_size;
2364
2365         /* When hardware is reset, fifo_head is also reset */
2366         adapter->tx_fifo_head = 0;
2367
2368         /* Set up smart power down as default off on newer adapters. */
2369         if (!em_smart_pwr_down &&
2370             (adapter->hw.mac.type == e1000_82571 ||
2371              adapter->hw.mac.type == e1000_82572)) {
2372                 uint16_t phy_tmp = 0;
2373
2374                 /* Speed up time to link by disabling smart power down. */
2375                 e1000_read_phy_reg(&adapter->hw,
2376                     IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
2377                 phy_tmp &= ~IGP02E1000_PM_SPD;
2378                 e1000_write_phy_reg(&adapter->hw,
2379                     IGP02E1000_PHY_POWER_MGMT, phy_tmp);
2380         }
2381
2382         /*
2383          * These parameters control the automatic generation (Tx) and
2384          * response (Rx) to Ethernet PAUSE frames.
2385          * - High water mark should allow for at least two frames to be
2386          *   received after sending an XOFF.
2387          * - Low water mark works best when it is very near the high water mark.
2388          *   This allows the receiver to restart by sending XON when it has
2389          *   drained a bit. Here we use an arbitary value of 1500 which will
2390          *   restart after one full frame is pulled from the buffer. There
2391          *   could be several smaller frames in the buffer and if so they will
2392          *   not trigger the XON until their total number reduces the buffer
2393          *   by 1500.
2394          * - The pause time is fairly large at 1000 x 512ns = 512 usec.
2395          */
2396         rx_buffer_size =
2397                 (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) << 10;
2398
2399         adapter->hw.fc.high_water = rx_buffer_size -
2400                                     roundup2(adapter->max_frame_size, 1024);
2401         adapter->hw.fc.low_water = adapter->hw.fc.high_water - 1500;
2402
2403         if (adapter->hw.mac.type == e1000_80003es2lan)
2404                 adapter->hw.fc.pause_time = 0xFFFF;
2405         else
2406                 adapter->hw.fc.pause_time = EM_FC_PAUSE_TIME;
2407
2408         adapter->hw.fc.send_xon = TRUE;
2409
2410         adapter->hw.fc.requested_mode = e1000_fc_full;
2411
2412         /* Workaround: no TX flow ctrl for PCH */
2413         if (adapter->hw.mac.type == e1000_pchlan)
2414                 adapter->hw.fc.requested_mode = e1000_fc_rx_pause;
2415
2416         /* Override - settings for PCH2LAN, ya its magic :) */
2417         if (adapter->hw.mac.type == e1000_pch2lan) {
2418                 adapter->hw.fc.high_water = 0x5C20;
2419                 adapter->hw.fc.low_water = 0x5048;
2420                 adapter->hw.fc.pause_time = 0x0650;
2421                 adapter->hw.fc.refresh_time = 0x0400;
2422
2423                 /* Jumbos need adjusted PBA */
2424                 if (adapter->arpcom.ac_if.if_mtu > ETHERMTU)
2425                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 12);
2426                 else
2427                         E1000_WRITE_REG(&adapter->hw, E1000_PBA, 26);
2428         }
2429
2430         /* Issue a global reset */
2431         e1000_reset_hw(&adapter->hw);
2432         if (adapter->hw.mac.type >= e1000_82544)
2433                 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2434         em_disable_aspm(adapter);
2435
2436         if (e1000_init_hw(&adapter->hw) < 0) {
2437                 device_printf(dev, "Hardware Initialization Failed\n");
2438                 return (EIO);
2439         }
2440
2441         E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
2442         e1000_get_phy_info(&adapter->hw);
2443         e1000_check_for_link(&adapter->hw);
2444
2445         return (0);
2446 }
2447
2448 static void
2449 em_setup_ifp(struct adapter *adapter)
2450 {
2451         struct ifnet *ifp = &adapter->arpcom.ac_if;
2452
2453         if_initname(ifp, device_get_name(adapter->dev),
2454                     device_get_unit(adapter->dev));
2455         ifp->if_softc = adapter;
2456         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
2457         ifp->if_init =  em_init;
2458         ifp->if_ioctl = em_ioctl;
2459         ifp->if_start = em_start;
2460 #ifdef IFPOLL_ENABLE
2461         ifp->if_npoll = em_npoll;
2462 #endif
2463         ifp->if_watchdog = em_watchdog;
2464         ifq_set_maxlen(&ifp->if_snd, adapter->num_tx_desc - 1);
2465         ifq_set_ready(&ifp->if_snd);
2466
2467         ether_ifattach(ifp, adapter->hw.mac.addr, NULL);
2468
2469         ifp->if_capabilities = IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
2470         if (adapter->hw.mac.type >= e1000_82543)
2471                 ifp->if_capabilities |= IFCAP_HWCSUM;
2472         if (adapter->flags & EM_FLAG_TSO)
2473                 ifp->if_capabilities |= IFCAP_TSO;
2474         ifp->if_capenable = ifp->if_capabilities;
2475
2476         if (ifp->if_capenable & IFCAP_TXCSUM)
2477                 ifp->if_hwassist |= EM_CSUM_FEATURES;
2478         if (ifp->if_capenable & IFCAP_TSO)
2479                 ifp->if_hwassist |= CSUM_TSO;
2480
2481         /*
2482          * Tell the upper layer(s) we support long frames.
2483          */
2484         ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
2485
2486         /*
2487          * Specify the media types supported by this adapter and register
2488          * callbacks to update media and link information
2489          */
2490         ifmedia_init(&adapter->media, IFM_IMASK,
2491                      em_media_change, em_media_status);
2492         if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2493             adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
2494                 u_char fiber_type = IFM_1000_SX; /* default type */
2495
2496                 if (adapter->hw.mac.type == e1000_82545)
2497                         fiber_type = IFM_1000_LX;
2498                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type | IFM_FDX,
2499                             0, NULL);
2500                 ifmedia_add(&adapter->media, IFM_ETHER | fiber_type, 0, NULL);
2501         } else {
2502                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T, 0, NULL);
2503                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_10_T | IFM_FDX,
2504                             0, NULL);
2505                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX,
2506                             0, NULL);
2507                 ifmedia_add(&adapter->media, IFM_ETHER | IFM_100_TX | IFM_FDX,
2508                             0, NULL);
2509                 if (adapter->hw.phy.type != e1000_phy_ife) {
2510                         ifmedia_add(&adapter->media,
2511                                 IFM_ETHER | IFM_1000_T | IFM_FDX, 0, NULL);
2512                         ifmedia_add(&adapter->media,
2513                                 IFM_ETHER | IFM_1000_T, 0, NULL);
2514                 }
2515         }
2516         ifmedia_add(&adapter->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2517         ifmedia_set(&adapter->media, IFM_ETHER | IFM_AUTO);
2518 }
2519
2520
2521 /*
2522  * Workaround for SmartSpeed on 82541 and 82547 controllers
2523  */
2524 static void
2525 em_smartspeed(struct adapter *adapter)
2526 {
2527         uint16_t phy_tmp;
2528
2529         if (adapter->link_active || adapter->hw.phy.type != e1000_phy_igp ||
2530             adapter->hw.mac.autoneg == 0 ||
2531             (adapter->hw.phy.autoneg_advertised & ADVERTISE_1000_FULL) == 0)
2532                 return;
2533
2534         if (adapter->smartspeed == 0) {
2535                 /*
2536                  * If Master/Slave config fault is asserted twice,
2537                  * we assume back-to-back
2538                  */
2539                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2540                 if (!(phy_tmp & SR_1000T_MS_CONFIG_FAULT))
2541                         return;
2542                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_tmp);
2543                 if (phy_tmp & SR_1000T_MS_CONFIG_FAULT) {
2544                         e1000_read_phy_reg(&adapter->hw,
2545                             PHY_1000T_CTRL, &phy_tmp);
2546                         if (phy_tmp & CR_1000T_MS_ENABLE) {
2547                                 phy_tmp &= ~CR_1000T_MS_ENABLE;
2548                                 e1000_write_phy_reg(&adapter->hw,
2549                                     PHY_1000T_CTRL, phy_tmp);
2550                                 adapter->smartspeed++;
2551                                 if (adapter->hw.mac.autoneg &&
2552                                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2553                                     !e1000_read_phy_reg(&adapter->hw,
2554                                      PHY_CONTROL, &phy_tmp)) {
2555                                         phy_tmp |= MII_CR_AUTO_NEG_EN |
2556                                                    MII_CR_RESTART_AUTO_NEG;
2557                                         e1000_write_phy_reg(&adapter->hw,
2558                                             PHY_CONTROL, phy_tmp);
2559                                 }
2560                         }
2561                 }
2562                 return;
2563         } else if (adapter->smartspeed == EM_SMARTSPEED_DOWNSHIFT) {
2564                 /* If still no link, perhaps using 2/3 pair cable */
2565                 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_tmp);
2566                 phy_tmp |= CR_1000T_MS_ENABLE;
2567                 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_tmp);
2568                 if (adapter->hw.mac.autoneg &&
2569                     !e1000_phy_setup_autoneg(&adapter->hw) &&
2570                     !e1000_read_phy_reg(&adapter->hw, PHY_CONTROL, &phy_tmp)) {
2571                         phy_tmp |= MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG;
2572                         e1000_write_phy_reg(&adapter->hw, PHY_CONTROL, phy_tmp);
2573                 }
2574         }
2575
2576         /* Restart process after EM_SMARTSPEED_MAX iterations */
2577         if (adapter->smartspeed++ == EM_SMARTSPEED_MAX)
2578                 adapter->smartspeed = 0;
2579 }
2580
2581 static int
2582 em_dma_malloc(struct adapter *adapter, bus_size_t size,
2583               struct em_dma_alloc *dma)
2584 {
2585         dma->dma_vaddr = bus_dmamem_coherent_any(adapter->parent_dtag,
2586                                 EM_DBA_ALIGN, size, BUS_DMA_WAITOK,
2587                                 &dma->dma_tag, &dma->dma_map,
2588                                 &dma->dma_paddr);
2589         if (dma->dma_vaddr == NULL)
2590                 return ENOMEM;
2591         else
2592                 return 0;
2593 }
2594
2595 static void
2596 em_dma_free(struct adapter *adapter, struct em_dma_alloc *dma)
2597 {
2598         if (dma->dma_tag == NULL)
2599                 return;
2600         bus_dmamap_unload(dma->dma_tag, dma->dma_map);
2601         bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
2602         bus_dma_tag_destroy(dma->dma_tag);
2603 }
2604
2605 static int
2606 em_create_tx_ring(struct adapter *adapter)
2607 {
2608         device_t dev = adapter->dev;
2609         struct em_buffer *tx_buffer;
2610         int error, i;
2611
2612         adapter->tx_buffer_area =
2613                 kmalloc(sizeof(struct em_buffer) * adapter->num_tx_desc,
2614                         M_DEVBUF, M_WAITOK | M_ZERO);
2615
2616         /*
2617          * Create DMA tags for tx buffers
2618          */
2619         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
2620                         1, 0,                   /* alignment, bounds */
2621                         BUS_SPACE_MAXADDR,      /* lowaddr */
2622                         BUS_SPACE_MAXADDR,      /* highaddr */
2623                         NULL, NULL,             /* filter, filterarg */
2624                         EM_TSO_SIZE,            /* maxsize */
2625                         EM_MAX_SCATTER,         /* nsegments */
2626                         PAGE_SIZE,              /* maxsegsize */
2627                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW |
2628                         BUS_DMA_ONEBPAGE,       /* flags */
2629                         &adapter->txtag);
2630         if (error) {
2631                 device_printf(dev, "Unable to allocate TX DMA tag\n");
2632                 kfree(adapter->tx_buffer_area, M_DEVBUF);
2633                 adapter->tx_buffer_area = NULL;
2634                 return error;
2635         }
2636
2637         /*
2638          * Create DMA maps for tx buffers
2639          */
2640         for (i = 0; i < adapter->num_tx_desc; i++) {
2641                 tx_buffer = &adapter->tx_buffer_area[i];
2642
2643                 error = bus_dmamap_create(adapter->txtag,
2644                                           BUS_DMA_WAITOK | BUS_DMA_ONEBPAGE,
2645                                           &tx_buffer->map);
2646                 if (error) {
2647                         device_printf(dev, "Unable to create TX DMA map\n");
2648                         em_destroy_tx_ring(adapter, i);
2649                         return error;
2650                 }
2651         }
2652         return (0);
2653 }
2654
2655 static void
2656 em_init_tx_ring(struct adapter *adapter)
2657 {
2658         /* Clear the old ring contents */
2659         bzero(adapter->tx_desc_base,
2660             (sizeof(struct e1000_tx_desc)) * adapter->num_tx_desc);
2661
2662         /* Reset state */
2663         adapter->next_avail_tx_desc = 0;
2664         adapter->next_tx_to_clean = 0;
2665         adapter->num_tx_desc_avail = adapter->num_tx_desc;
2666 }
2667
2668 static void
2669 em_init_tx_unit(struct adapter *adapter)
2670 {
2671         uint32_t tctl, tarc, tipg = 0;
2672         uint64_t bus_addr;
2673
2674         /* Setup the Base and Length of the Tx Descriptor Ring */
2675         bus_addr = adapter->txdma.dma_paddr;
2676         E1000_WRITE_REG(&adapter->hw, E1000_TDLEN(0),
2677             adapter->num_tx_desc * sizeof(struct e1000_tx_desc));
2678         E1000_WRITE_REG(&adapter->hw, E1000_TDBAH(0),
2679             (uint32_t)(bus_addr >> 32));
2680         E1000_WRITE_REG(&adapter->hw, E1000_TDBAL(0),
2681             (uint32_t)bus_addr);
2682         /* Setup the HW Tx Head and Tail descriptor pointers */
2683         E1000_WRITE_REG(&adapter->hw, E1000_TDT(0), 0);
2684         E1000_WRITE_REG(&adapter->hw, E1000_TDH(0), 0);
2685
2686         /* Set the default values for the Tx Inter Packet Gap timer */
2687         switch (adapter->hw.mac.type) {
2688         case e1000_82542:
2689                 tipg = DEFAULT_82542_TIPG_IPGT;
2690                 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2691                 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2692                 break;
2693
2694         case e1000_80003es2lan:
2695                 tipg = DEFAULT_82543_TIPG_IPGR1;
2696                 tipg |= DEFAULT_80003ES2LAN_TIPG_IPGR2 <<
2697                     E1000_TIPG_IPGR2_SHIFT;
2698                 break;
2699
2700         default:
2701                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
2702                     adapter->hw.phy.media_type ==
2703                     e1000_media_type_internal_serdes)
2704                         tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
2705                 else
2706                         tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
2707                 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
2708                 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
2709                 break;
2710         }
2711
2712         E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
2713
2714         /* NOTE: 0 is not allowed for TIDV */
2715         E1000_WRITE_REG(&adapter->hw, E1000_TIDV, 1);
2716         if(adapter->hw.mac.type >= e1000_82540)
2717                 E1000_WRITE_REG(&adapter->hw, E1000_TADV, 0);
2718
2719         if (adapter->hw.mac.type == e1000_82571 ||
2720             adapter->hw.mac.type == e1000_82572) {
2721                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2722                 tarc |= SPEED_MODE_BIT;
2723                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2724         } else if (adapter->hw.mac.type == e1000_80003es2lan) {
2725                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
2726                 tarc |= 1;
2727                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
2728                 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
2729                 tarc |= 1;
2730                 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
2731         }
2732
2733         /* Program the Transmit Control Register */
2734         tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
2735         tctl &= ~E1000_TCTL_CT;
2736         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
2737                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2738
2739         if (adapter->hw.mac.type >= e1000_82571)
2740                 tctl |= E1000_TCTL_MULR;
2741
2742         /* This write will effectively turn on the transmit unit. */
2743         E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
2744 }
2745
2746 static void
2747 em_destroy_tx_ring(struct adapter *adapter, int ndesc)
2748 {
2749         struct em_buffer *tx_buffer;
2750         int i;
2751
2752         if (adapter->tx_buffer_area == NULL)
2753                 return;
2754
2755         for (i = 0; i < ndesc; i++) {
2756                 tx_buffer = &adapter->tx_buffer_area[i];
2757
2758                 KKASSERT(tx_buffer->m_head == NULL);
2759                 bus_dmamap_destroy(adapter->txtag, tx_buffer->map);
2760         }
2761         bus_dma_tag_destroy(adapter->txtag);
2762
2763         kfree(adapter->tx_buffer_area, M_DEVBUF);
2764         adapter->tx_buffer_area = NULL;
2765 }
2766
2767 /*
2768  * The offload context needs to be set when we transfer the first
2769  * packet of a particular protocol (TCP/UDP).  This routine has been
2770  * enhanced to deal with inserted VLAN headers.
2771  *
2772  * If the new packet's ether header length, ip header length and
2773  * csum offloading type are same as the previous packet, we should
2774  * avoid allocating a new csum context descriptor; mainly to take
2775  * advantage of the pipeline effect of the TX data read request.
2776  *
2777  * This function returns number of TX descrptors allocated for
2778  * csum context.
2779  */
2780 static int
2781 em_txcsum(struct adapter *adapter, struct mbuf *mp,
2782           uint32_t *txd_upper, uint32_t *txd_lower)
2783 {
2784         struct e1000_context_desc *TXD;
2785         int curr_txd, ehdrlen, csum_flags;
2786         uint32_t cmd, hdr_len, ip_hlen;
2787
2788         csum_flags = mp->m_pkthdr.csum_flags & EM_CSUM_FEATURES;
2789         ip_hlen = mp->m_pkthdr.csum_iphlen;
2790         ehdrlen = mp->m_pkthdr.csum_lhlen;
2791
2792         if (adapter->csum_lhlen == ehdrlen &&
2793             adapter->csum_iphlen == ip_hlen &&
2794             adapter->csum_flags == csum_flags) {
2795                 /*
2796                  * Same csum offload context as the previous packets;
2797                  * just return.
2798                  */
2799                 *txd_upper = adapter->csum_txd_upper;
2800                 *txd_lower = adapter->csum_txd_lower;
2801                 return 0;
2802         }
2803
2804         /*
2805          * Setup a new csum offload context.
2806          */
2807
2808         curr_txd = adapter->next_avail_tx_desc;
2809         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
2810
2811         cmd = 0;
2812
2813         /* Setup of IP header checksum. */
2814         if (csum_flags & CSUM_IP) {
2815                 /*
2816                  * Start offset for header checksum calculation.
2817                  * End offset for header checksum calculation.
2818                  * Offset of place to put the checksum.
2819                  */
2820                 TXD->lower_setup.ip_fields.ipcss = ehdrlen;
2821                 TXD->lower_setup.ip_fields.ipcse =
2822                     htole16(ehdrlen + ip_hlen - 1);
2823                 TXD->lower_setup.ip_fields.ipcso =
2824                     ehdrlen + offsetof(struct ip, ip_sum);
2825                 cmd |= E1000_TXD_CMD_IP;
2826                 *txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2827         }
2828         hdr_len = ehdrlen + ip_hlen;
2829
2830         if (csum_flags & CSUM_TCP) {
2831                 /*
2832                  * Start offset for payload checksum calculation.
2833                  * End offset for payload checksum calculation.
2834                  * Offset of place to put the checksum.
2835                  */
2836                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2837                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2838                 TXD->upper_setup.tcp_fields.tucso =
2839                     hdr_len + offsetof(struct tcphdr, th_sum);
2840                 cmd |= E1000_TXD_CMD_TCP;
2841                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2842         } else if (csum_flags & CSUM_UDP) {
2843                 /*
2844                  * Start offset for header checksum calculation.
2845                  * End offset for header checksum calculation.
2846                  * Offset of place to put the checksum.
2847                  */
2848                 TXD->upper_setup.tcp_fields.tucss = hdr_len;
2849                 TXD->upper_setup.tcp_fields.tucse = htole16(0);
2850                 TXD->upper_setup.tcp_fields.tucso =
2851                     hdr_len + offsetof(struct udphdr, uh_sum);
2852                 *txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2853         }
2854
2855         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
2856                      E1000_TXD_DTYP_D;          /* Data descr */
2857
2858         /* Save the information for this csum offloading context */
2859         adapter->csum_lhlen = ehdrlen;
2860         adapter->csum_iphlen = ip_hlen;
2861         adapter->csum_flags = csum_flags;
2862         adapter->csum_txd_upper = *txd_upper;
2863         adapter->csum_txd_lower = *txd_lower;
2864
2865         TXD->tcp_seg_setup.data = htole32(0);
2866         TXD->cmd_and_length =
2867             htole32(E1000_TXD_CMD_IFCS | E1000_TXD_CMD_DEXT | cmd);
2868
2869         if (++curr_txd == adapter->num_tx_desc)
2870                 curr_txd = 0;
2871
2872         KKASSERT(adapter->num_tx_desc_avail > 0);
2873         adapter->num_tx_desc_avail--;
2874
2875         adapter->next_avail_tx_desc = curr_txd;
2876         return 1;
2877 }
2878
2879 static void
2880 em_txeof(struct adapter *adapter)
2881 {
2882         struct ifnet *ifp = &adapter->arpcom.ac_if;
2883         struct em_buffer *tx_buffer;
2884         int first, num_avail;
2885
2886         if (adapter->tx_dd_head == adapter->tx_dd_tail)
2887                 return;
2888
2889         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2890                 return;
2891
2892         num_avail = adapter->num_tx_desc_avail;
2893         first = adapter->next_tx_to_clean;
2894
2895         while (adapter->tx_dd_head != adapter->tx_dd_tail) {
2896                 struct e1000_tx_desc *tx_desc;
2897                 int dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2898
2899                 tx_desc = &adapter->tx_desc_base[dd_idx];
2900                 if (tx_desc->upper.fields.status & E1000_TXD_STAT_DD) {
2901                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2902
2903                         if (++dd_idx == adapter->num_tx_desc)
2904                                 dd_idx = 0;
2905
2906                         while (first != dd_idx) {
2907                                 logif(pkt_txclean);
2908
2909                                 num_avail++;
2910
2911                                 tx_buffer = &adapter->tx_buffer_area[first];
2912                                 if (tx_buffer->m_head) {
2913                                         ifp->if_opackets++;
2914                                         bus_dmamap_unload(adapter->txtag,
2915                                                           tx_buffer->map);
2916                                         m_freem(tx_buffer->m_head);
2917                                         tx_buffer->m_head = NULL;
2918                                 }
2919
2920                                 if (++first == adapter->num_tx_desc)
2921                                         first = 0;
2922                         }
2923                 } else {
2924                         break;
2925                 }
2926         }
2927         adapter->next_tx_to_clean = first;
2928         adapter->num_tx_desc_avail = num_avail;
2929
2930         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2931                 adapter->tx_dd_head = 0;
2932                 adapter->tx_dd_tail = 0;
2933         }
2934
2935         if (!EM_IS_OACTIVE(adapter)) {
2936                 ifp->if_flags &= ~IFF_OACTIVE;
2937
2938                 /* All clean, turn off the timer */
2939                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2940                         ifp->if_timer = 0;
2941         }
2942 }
2943
2944 static void
2945 em_tx_collect(struct adapter *adapter)
2946 {
2947         struct ifnet *ifp = &adapter->arpcom.ac_if;
2948         struct em_buffer *tx_buffer;
2949         int tdh, first, num_avail, dd_idx = -1;
2950
2951         if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
2952                 return;
2953
2954         tdh = E1000_READ_REG(&adapter->hw, E1000_TDH(0));
2955         if (tdh == adapter->next_tx_to_clean)
2956                 return;
2957
2958         if (adapter->tx_dd_head != adapter->tx_dd_tail)
2959                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2960
2961         num_avail = adapter->num_tx_desc_avail;
2962         first = adapter->next_tx_to_clean;
2963
2964         while (first != tdh) {
2965                 logif(pkt_txclean);
2966
2967                 num_avail++;
2968
2969                 tx_buffer = &adapter->tx_buffer_area[first];
2970                 if (tx_buffer->m_head) {
2971                         ifp->if_opackets++;
2972                         bus_dmamap_unload(adapter->txtag,
2973                                           tx_buffer->map);
2974                         m_freem(tx_buffer->m_head);
2975                         tx_buffer->m_head = NULL;
2976                 }
2977
2978                 if (first == dd_idx) {
2979                         EM_INC_TXDD_IDX(adapter->tx_dd_head);
2980                         if (adapter->tx_dd_head == adapter->tx_dd_tail) {
2981                                 adapter->tx_dd_head = 0;
2982                                 adapter->tx_dd_tail = 0;
2983                                 dd_idx = -1;
2984                         } else {
2985                                 dd_idx = adapter->tx_dd[adapter->tx_dd_head];
2986                         }
2987                 }
2988
2989                 if (++first == adapter->num_tx_desc)
2990                         first = 0;
2991         }
2992         adapter->next_tx_to_clean = first;
2993         adapter->num_tx_desc_avail = num_avail;
2994
2995         if (!EM_IS_OACTIVE(adapter)) {
2996                 ifp->if_flags &= ~IFF_OACTIVE;
2997
2998                 /* All clean, turn off the timer */
2999                 if (adapter->num_tx_desc_avail == adapter->num_tx_desc)
3000                         ifp->if_timer = 0;
3001         }
3002 }
3003
3004 /*
3005  * When Link is lost sometimes there is work still in the TX ring
3006  * which will result in a watchdog, rather than allow that do an
3007  * attempted cleanup and then reinit here.  Note that this has been
3008  * seens mostly with fiber adapters.
3009  */
3010 static void
3011 em_tx_purge(struct adapter *adapter)
3012 {
3013         struct ifnet *ifp = &adapter->arpcom.ac_if;
3014
3015         if (!adapter->link_active && ifp->if_timer) {
3016                 em_tx_collect(adapter);
3017                 if (ifp->if_timer) {
3018                         if_printf(ifp, "Link lost, TX pending, reinit\n");
3019                         ifp->if_timer = 0;
3020                         em_init(adapter);
3021                 }
3022         }
3023 }
3024
3025 static int
3026 em_newbuf(struct adapter *adapter, int i, int init)
3027 {
3028         struct mbuf *m;
3029         bus_dma_segment_t seg;
3030         bus_dmamap_t map;
3031         struct em_buffer *rx_buffer;
3032         int error, nseg;
3033
3034         m = m_getcl(init ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
3035         if (m == NULL) {
3036                 adapter->mbuf_cluster_failed++;
3037                 if (init) {
3038                         if_printf(&adapter->arpcom.ac_if,
3039                                   "Unable to allocate RX mbuf\n");
3040                 }
3041                 return (ENOBUFS);
3042         }
3043         m->m_len = m->m_pkthdr.len = MCLBYTES;
3044
3045         if (adapter->max_frame_size <= MCLBYTES - ETHER_ALIGN)
3046                 m_adj(m, ETHER_ALIGN);
3047
3048         error = bus_dmamap_load_mbuf_segment(adapter->rxtag,
3049                         adapter->rx_sparemap, m,
3050                         &seg, 1, &nseg, BUS_DMA_NOWAIT);
3051         if (error) {
3052                 m_freem(m);
3053                 if (init) {
3054                         if_printf(&adapter->arpcom.ac_if,
3055                                   "Unable to load RX mbuf\n");
3056                 }
3057                 return (error);
3058         }
3059
3060         rx_buffer = &adapter->rx_buffer_area[i];
3061         if (rx_buffer->m_head != NULL)
3062                 bus_dmamap_unload(adapter->rxtag, rx_buffer->map);
3063
3064         map = rx_buffer->map;
3065         rx_buffer->map = adapter->rx_sparemap;
3066         adapter->rx_sparemap = map;
3067
3068         rx_buffer->m_head = m;
3069
3070         adapter->rx_desc_base[i].buffer_addr = htole64(seg.ds_addr);
3071         return (0);
3072 }
3073
3074 static int
3075 em_create_rx_ring(struct adapter *adapter)
3076 {
3077         device_t dev = adapter->dev;
3078         struct em_buffer *rx_buffer;
3079         int i, error;
3080
3081         adapter->rx_buffer_area =
3082                 kmalloc(sizeof(struct em_buffer) * adapter->num_rx_desc,
3083                         M_DEVBUF, M_WAITOK | M_ZERO);
3084
3085         /*
3086          * Create DMA tag for rx buffers
3087          */
3088         error = bus_dma_tag_create(adapter->parent_dtag, /* parent */
3089                         1, 0,                   /* alignment, bounds */
3090                         BUS_SPACE_MAXADDR,      /* lowaddr */
3091                         BUS_SPACE_MAXADDR,      /* highaddr */
3092                         NULL, NULL,             /* filter, filterarg */
3093                         MCLBYTES,               /* maxsize */
3094                         1,                      /* nsegments */
3095                         MCLBYTES,               /* maxsegsize */
3096                         BUS_DMA_WAITOK | BUS_DMA_ALLOCNOW, /* flags */
3097                         &adapter->rxtag);
3098         if (error) {
3099                 device_printf(dev, "Unable to allocate RX DMA tag\n");
3100                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3101                 adapter->rx_buffer_area = NULL;
3102                 return error;
3103         }
3104
3105         /*
3106          * Create spare DMA map for rx buffers
3107          */
3108         error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3109                                   &adapter->rx_sparemap);
3110         if (error) {
3111                 device_printf(dev, "Unable to create spare RX DMA map\n");
3112                 bus_dma_tag_destroy(adapter->rxtag);
3113                 kfree(adapter->rx_buffer_area, M_DEVBUF);
3114                 adapter->rx_buffer_area = NULL;
3115                 return error;
3116         }
3117
3118         /*
3119          * Create DMA maps for rx buffers
3120          */
3121         for (i = 0; i < adapter->num_rx_desc; i++) {
3122                 rx_buffer = &adapter->rx_buffer_area[i];
3123
3124                 error = bus_dmamap_create(adapter->rxtag, BUS_DMA_WAITOK,
3125                                           &rx_buffer->map);
3126                 if (error) {
3127                         device_printf(dev, "Unable to create RX DMA map\n");
3128                         em_destroy_rx_ring(adapter, i);
3129                         return error;
3130                 }
3131         }
3132         return (0);
3133 }
3134
3135 static int
3136 em_init_rx_ring(struct adapter *adapter)
3137 {
3138         int i, error;
3139
3140         /* Reset descriptor ring */
3141         bzero(adapter->rx_desc_base,
3142             (sizeof(struct e1000_rx_desc)) * adapter->num_rx_desc);
3143
3144         /* Allocate new ones. */
3145         for (i = 0; i < adapter->num_rx_desc; i++) {
3146                 error = em_newbuf(adapter, i, 1);
3147                 if (error)
3148                         return (error);
3149         }
3150
3151         /* Setup our descriptor pointers */
3152         adapter->next_rx_desc_to_check = 0;
3153
3154         return (0);
3155 }
3156
3157 static void
3158 em_init_rx_unit(struct adapter *adapter)
3159 {
3160         struct ifnet *ifp = &adapter->arpcom.ac_if;
3161         uint64_t bus_addr;
3162         uint32_t rctl;
3163
3164         /*
3165          * Make sure receives are disabled while setting
3166          * up the descriptor ring
3167          */
3168         rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
3169         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3170
3171         if (adapter->hw.mac.type >= e1000_82540) {
3172                 uint32_t itr;
3173
3174                 /*
3175                  * Set the interrupt throttling rate. Value is calculated
3176                  * as ITR = 1 / (INT_THROTTLE_CEIL * 256ns)
3177                  */
3178                 if (adapter->int_throttle_ceil)
3179                         itr = 1000000000 / 256 / adapter->int_throttle_ceil;
3180                 else
3181                         itr = 0;
3182                 em_set_itr(adapter, itr);
3183         }
3184
3185         /* Disable accelerated ackknowledge */
3186         if (adapter->hw.mac.type == e1000_82574) {
3187                 E1000_WRITE_REG(&adapter->hw,
3188                     E1000_RFCTL, E1000_RFCTL_ACK_DIS);
3189         }
3190
3191         /* Receive Checksum Offload for TCP and UDP */
3192         if (ifp->if_capenable & IFCAP_RXCSUM) {
3193                 uint32_t rxcsum;
3194
3195                 rxcsum = E1000_READ_REG(&adapter->hw, E1000_RXCSUM);
3196                 rxcsum |= (E1000_RXCSUM_IPOFL | E1000_RXCSUM_TUOFL);
3197                 E1000_WRITE_REG(&adapter->hw, E1000_RXCSUM, rxcsum);
3198         }
3199
3200         /*
3201          * XXX TEMPORARY WORKAROUND: on some systems with 82573
3202          * long latencies are observed, like Lenovo X60. This
3203          * change eliminates the problem, but since having positive
3204          * values in RDTR is a known source of problems on other
3205          * platforms another solution is being sought.
3206          */
3207         if (em_82573_workaround && adapter->hw.mac.type == e1000_82573) {
3208                 E1000_WRITE_REG(&adapter->hw, E1000_RADV, EM_RADV_82573);
3209                 E1000_WRITE_REG(&adapter->hw, E1000_RDTR, EM_RDTR_82573);
3210         }
3211
3212         /*
3213          * Setup the Base and Length of the Rx Descriptor Ring
3214          */
3215         bus_addr = adapter->rxdma.dma_paddr;
3216         E1000_WRITE_REG(&adapter->hw, E1000_RDLEN(0),
3217             adapter->num_rx_desc * sizeof(struct e1000_rx_desc));
3218         E1000_WRITE_REG(&adapter->hw, E1000_RDBAH(0),
3219             (uint32_t)(bus_addr >> 32));
3220         E1000_WRITE_REG(&adapter->hw, E1000_RDBAL(0),
3221             (uint32_t)bus_addr);
3222
3223         /*
3224          * Setup the HW Rx Head and Tail Descriptor Pointers
3225          */
3226         E1000_WRITE_REG(&adapter->hw, E1000_RDH(0), 0);
3227         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), adapter->num_rx_desc - 1);
3228
3229         /* Set early receive threshold on appropriate hw */
3230         if (((adapter->hw.mac.type == e1000_ich9lan) ||
3231             (adapter->hw.mac.type == e1000_pch2lan) ||
3232             (adapter->hw.mac.type == e1000_ich10lan)) &&
3233             (ifp->if_mtu > ETHERMTU)) {
3234                 uint32_t rxdctl;
3235
3236                 rxdctl = E1000_READ_REG(&adapter->hw, E1000_RXDCTL(0));
3237                 E1000_WRITE_REG(&adapter->hw, E1000_RXDCTL(0), rxdctl | 3);
3238                 E1000_WRITE_REG(&adapter->hw, E1000_ERT, 0x100 | (1 << 13));
3239         }
3240
3241         if (adapter->hw.mac.type == e1000_pch2lan) {
3242                 if (ifp->if_mtu > ETHERMTU)
3243                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, TRUE);
3244                 else
3245                         e1000_lv_jumbo_workaround_ich8lan(&adapter->hw, FALSE);
3246         }
3247
3248         /* Setup the Receive Control Register */
3249         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3250         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
3251                 E1000_RCTL_RDMTS_HALF |
3252                 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3253
3254         /* Make sure VLAN Filters are off */
3255         rctl &= ~E1000_RCTL_VFE;
3256
3257         if (e1000_tbi_sbp_enabled_82543(&adapter->hw))
3258                 rctl |= E1000_RCTL_SBP;
3259         else
3260                 rctl &= ~E1000_RCTL_SBP;
3261
3262         switch (adapter->rx_buffer_len) {
3263         default:
3264         case 2048:
3265                 rctl |= E1000_RCTL_SZ_2048;
3266                 break;
3267
3268         case 4096:
3269                 rctl |= E1000_RCTL_SZ_4096 |
3270                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3271                 break;
3272
3273         case 8192:
3274                 rctl |= E1000_RCTL_SZ_8192 |
3275                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3276                 break;
3277
3278         case 16384:
3279                 rctl |= E1000_RCTL_SZ_16384 |
3280                     E1000_RCTL_BSEX | E1000_RCTL_LPE;
3281                 break;
3282         }
3283
3284         if (ifp->if_mtu > ETHERMTU)
3285                 rctl |= E1000_RCTL_LPE;
3286         else
3287                 rctl &= ~E1000_RCTL_LPE;
3288
3289         /* Enable Receives */
3290         E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
3291 }
3292
3293 static void
3294 em_destroy_rx_ring(struct adapter *adapter, int ndesc)
3295 {
3296         struct em_buffer *rx_buffer;
3297         int i;
3298
3299         if (adapter->rx_buffer_area == NULL)
3300                 return;
3301
3302         for (i = 0; i < ndesc; i++) {
3303                 rx_buffer = &adapter->rx_buffer_area[i];
3304
3305                 KKASSERT(rx_buffer->m_head == NULL);
3306                 bus_dmamap_destroy(adapter->rxtag, rx_buffer->map);
3307         }
3308         bus_dmamap_destroy(adapter->rxtag, adapter->rx_sparemap);
3309         bus_dma_tag_destroy(adapter->rxtag);
3310
3311         kfree(adapter->rx_buffer_area, M_DEVBUF);
3312         adapter->rx_buffer_area = NULL;
3313 }
3314
3315 static void
3316 em_rxeof(struct adapter *adapter, int count)
3317 {
3318         struct ifnet *ifp = &adapter->arpcom.ac_if;
3319         uint8_t status, accept_frame = 0, eop = 0;
3320         uint16_t len, desc_len, prev_len_adj;
3321         struct e1000_rx_desc *current_desc;
3322         struct mbuf *mp;
3323         int i;
3324
3325         i = adapter->next_rx_desc_to_check;
3326         current_desc = &adapter->rx_desc_base[i];
3327
3328         if (!(current_desc->status & E1000_RXD_STAT_DD))
3329                 return;
3330
3331         while ((current_desc->status & E1000_RXD_STAT_DD) && count != 0) {
3332                 struct mbuf *m = NULL;
3333
3334                 logif(pkt_receive);
3335
3336                 mp = adapter->rx_buffer_area[i].m_head;
3337
3338                 /*
3339                  * Can't defer bus_dmamap_sync(9) because TBI_ACCEPT
3340                  * needs to access the last received byte in the mbuf.
3341                  */
3342                 bus_dmamap_sync(adapter->rxtag, adapter->rx_buffer_area[i].map,
3343                                 BUS_DMASYNC_POSTREAD);
3344
3345                 accept_frame = 1;
3346                 prev_len_adj = 0;
3347                 desc_len = le16toh(current_desc->length);
3348                 status = current_desc->status;
3349                 if (status & E1000_RXD_STAT_EOP) {
3350                         count--;
3351                         eop = 1;
3352                         if (desc_len < ETHER_CRC_LEN) {
3353                                 len = 0;
3354                                 prev_len_adj = ETHER_CRC_LEN - desc_len;
3355                         } else {
3356                                 len = desc_len - ETHER_CRC_LEN;
3357                         }
3358                 } else {
3359                         eop = 0;
3360                         len = desc_len;
3361                 }
3362
3363                 if (current_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
3364                         uint8_t last_byte;
3365                         uint32_t pkt_len = desc_len;
3366
3367                         if (adapter->fmp != NULL)
3368                                 pkt_len += adapter->fmp->m_pkthdr.len;
3369
3370                         last_byte = *(mtod(mp, caddr_t) + desc_len - 1);
3371                         if (TBI_ACCEPT(&adapter->hw, status,
3372                             current_desc->errors, pkt_len, last_byte,
3373                             adapter->min_frame_size, adapter->max_frame_size)) {
3374                                 e1000_tbi_adjust_stats_82543(&adapter->hw,
3375                                     &adapter->stats, pkt_len,
3376                                     adapter->hw.mac.addr,
3377                                     adapter->max_frame_size);
3378                                 if (len > 0)
3379                                         len--;
3380                         } else {
3381                                 accept_frame = 0;
3382                         }
3383                 }
3384
3385                 if (accept_frame) {
3386                         if (em_newbuf(adapter, i, 0) != 0) {
3387                                 ifp->if_iqdrops++;
3388                                 goto discard;
3389                         }
3390
3391                         /* Assign correct length to the current fragment */
3392                         mp->m_len = len;
3393
3394                         if (adapter->fmp == NULL) {
3395                                 mp->m_pkthdr.len = len;
3396                                 adapter->fmp = mp; /* Store the first mbuf */
3397                                 adapter->lmp = mp;
3398                         } else {
3399                                 /*
3400                                  * Chain mbuf's together
3401                                  */
3402
3403                                 /*
3404                                  * Adjust length of previous mbuf in chain if
3405                                  * we received less than 4 bytes in the last
3406                                  * descriptor.
3407                                  */
3408                                 if (prev_len_adj > 0) {
3409                                         adapter->lmp->m_len -= prev_len_adj;
3410                                         adapter->fmp->m_pkthdr.len -=
3411                                             prev_len_adj;
3412                                 }
3413                                 adapter->lmp->m_next = mp;
3414                                 adapter->lmp = adapter->lmp->m_next;
3415                                 adapter->fmp->m_pkthdr.len += len;
3416                         }
3417
3418                         if (eop) {
3419                                 adapter->fmp->m_pkthdr.rcvif = ifp;
3420                                 ifp->if_ipackets++;
3421
3422                                 if (ifp->if_capenable & IFCAP_RXCSUM) {
3423                                         em_rxcsum(adapter, current_desc,
3424                                                   adapter->fmp);
3425                                 }
3426
3427                                 if (status & E1000_RXD_STAT_VP) {
3428                                         adapter->fmp->m_pkthdr.ether_vlantag =
3429                                             (le16toh(current_desc->special) &
3430                                             E1000_RXD_SPC_VLAN_MASK);
3431                                         adapter->fmp->m_flags |= M_VLANTAG;
3432                                 }
3433                                 m = adapter->fmp;
3434                                 adapter->fmp = NULL;
3435                                 adapter->lmp = NULL;
3436                         }
3437                 } else {
3438                         ifp->if_ierrors++;
3439 discard:
3440 #ifdef foo
3441                         /* Reuse loaded DMA map and just update mbuf chain */
3442                         mp = adapter->rx_buffer_area[i].m_head;
3443                         mp->m_len = mp->m_pkthdr.len = MCLBYTES;
3444                         mp->m_data = mp->m_ext.ext_buf;
3445                         mp->m_next = NULL;
3446                         if (adapter->max_frame_size <= (MCLBYTES - ETHER_ALIGN))
3447                                 m_adj(mp, ETHER_ALIGN);
3448 #endif
3449                         if (adapter->fmp != NULL) {
3450                                 m_freem(adapter->fmp);
3451                                 adapter->fmp = NULL;
3452                                 adapter->lmp = NULL;
3453                         }
3454                         m = NULL;
3455                 }
3456
3457                 /* Zero out the receive descriptors status. */
3458                 current_desc->status = 0;
3459
3460                 if (m != NULL)
3461                         ifp->if_input(ifp, m);
3462
3463                 /* Advance our pointers to the next descriptor. */
3464                 if (++i == adapter->num_rx_desc)
3465                         i = 0;
3466                 current_desc = &adapter->rx_desc_base[i];
3467         }
3468         adapter->next_rx_desc_to_check = i;
3469
3470         /* Advance the E1000's Receive Queue #0  "Tail Pointer". */
3471         if (--i < 0)
3472                 i = adapter->num_rx_desc - 1;
3473         E1000_WRITE_REG(&adapter->hw, E1000_RDT(0), i);
3474 }
3475
3476 static void
3477 em_rxcsum(struct adapter *adapter, struct e1000_rx_desc *rx_desc,
3478           struct mbuf *mp)
3479 {
3480         /* 82543 or newer only */
3481         if (adapter->hw.mac.type < e1000_82543 ||
3482             /* Ignore Checksum bit is set */
3483             (rx_desc->status & E1000_RXD_STAT_IXSM))
3484                 return;
3485
3486         if ((rx_desc->status & E1000_RXD_STAT_IPCS) &&
3487             !(rx_desc->errors & E1000_RXD_ERR_IPE)) {
3488                 /* IP Checksum Good */
3489                 mp->m_pkthdr.csum_flags |= CSUM_IP_CHECKED | CSUM_IP_VALID;
3490         }
3491
3492         if ((rx_desc->status & E1000_RXD_STAT_TCPCS) &&
3493             !(rx_desc->errors & E1000_RXD_ERR_TCPE)) {
3494                 mp->m_pkthdr.csum_flags |= CSUM_DATA_VALID |
3495                                            CSUM_PSEUDO_HDR |
3496                                            CSUM_FRAG_NOT_CHECKED;
3497                 mp->m_pkthdr.csum_data = htons(0xffff);
3498         }
3499 }
3500
3501 static void
3502 em_enable_intr(struct adapter *adapter)
3503 {
3504         uint32_t ims_mask = IMS_ENABLE_MASK;
3505
3506         lwkt_serialize_handler_enable(adapter->arpcom.ac_if.if_serializer);
3507
3508 #if 0
3509         /* XXX MSIX */
3510         if (adapter->hw.mac.type == e1000_82574) {
3511                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, EM_MSIX_MASK);
3512                 ims_mask |= EM_MSIX_MASK;
3513         }
3514 #endif
3515         E1000_WRITE_REG(&adapter->hw, E1000_IMS, ims_mask);
3516 }
3517
3518 static void
3519 em_disable_intr(struct adapter *adapter)
3520 {
3521         uint32_t clear = 0xffffffff;
3522
3523         /*
3524          * The first version of 82542 had an errata where when link was forced
3525          * it would stay up even up even if the cable was disconnected.
3526          * Sequence errors were used to detect the disconnect and then the
3527          * driver would unforce the link.  This code in the in the ISR.  For
3528          * this to work correctly the Sequence error interrupt had to be
3529          * enabled all the time.
3530          */
3531         if (adapter->hw.mac.type == e1000_82542 &&
3532             adapter->hw.revision_id == E1000_REVISION_2)
3533                 clear &= ~E1000_ICR_RXSEQ;
3534         else if (adapter->hw.mac.type == e1000_82574)
3535                 E1000_WRITE_REG(&adapter->hw, EM_EIAC, 0);
3536
3537         E1000_WRITE_REG(&adapter->hw, E1000_IMC, clear);
3538
3539         adapter->npoll_stcount = 0;
3540
3541         lwkt_serialize_handler_disable(adapter->arpcom.ac_if.if_serializer);
3542 }
3543
3544 /*
3545  * Bit of a misnomer, what this really means is
3546  * to enable OS management of the system... aka
3547  * to disable special hardware management features
3548  */
3549 static void
3550 em_get_mgmt(struct adapter *adapter)
3551 {
3552         /* A shared code workaround */
3553 #define E1000_82542_MANC2H E1000_MANC2H
3554         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3555                 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
3556                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3557
3558                 /* disable hardware interception of ARP */
3559                 manc &= ~(E1000_MANC_ARP_EN);
3560
3561                 /* enable receiving management packets to the host */
3562                 if (adapter->hw.mac.type >= e1000_82571) {
3563                         manc |= E1000_MANC_EN_MNG2HOST;
3564 #define E1000_MNG2HOST_PORT_623 (1 << 5)
3565 #define E1000_MNG2HOST_PORT_664 (1 << 6)
3566                         manc2h |= E1000_MNG2HOST_PORT_623;
3567                         manc2h |= E1000_MNG2HOST_PORT_664;
3568                         E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
3569                 }
3570
3571                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3572         }
3573 }
3574
3575 /*
3576  * Give control back to hardware management
3577  * controller if there is one.
3578  */
3579 static void
3580 em_rel_mgmt(struct adapter *adapter)
3581 {
3582         if (adapter->flags & EM_FLAG_HAS_MGMT) {
3583                 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
3584
3585                 /* re-enable hardware interception of ARP */
3586                 manc |= E1000_MANC_ARP_EN;
3587
3588                 if (adapter->hw.mac.type >= e1000_82571)
3589                         manc &= ~E1000_MANC_EN_MNG2HOST;
3590
3591                 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
3592         }
3593 }
3594
3595 /*
3596  * em_get_hw_control() sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3597  * For ASF and Pass Through versions of f/w this means that
3598  * the driver is loaded.  For AMT version (only with 82573)
3599  * of the f/w this means that the network i/f is open.
3600  */
3601 static void
3602 em_get_hw_control(struct adapter *adapter)
3603 {
3604         /* Let firmware know the driver has taken over */
3605         if (adapter->hw.mac.type == e1000_82573) {
3606                 uint32_t swsm;
3607
3608                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3609                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3610                     swsm | E1000_SWSM_DRV_LOAD);
3611         } else {
3612                 uint32_t ctrl_ext;
3613
3614                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3615                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3616                     ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
3617         }
3618         adapter->flags |= EM_FLAG_HW_CTRL;
3619 }
3620
3621 /*
3622  * em_rel_hw_control() resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
3623  * For ASF and Pass Through versions of f/w this means that the
3624  * driver is no longer loaded.  For AMT version (only with 82573)
3625  * of the f/w this means that the network i/f is closed.
3626  */
3627 static void
3628 em_rel_hw_control(struct adapter *adapter)
3629 {
3630         if ((adapter->flags & EM_FLAG_HW_CTRL) == 0)
3631                 return;
3632         adapter->flags &= ~EM_FLAG_HW_CTRL;
3633
3634         /* Let firmware taken over control of h/w */
3635         if (adapter->hw.mac.type == e1000_82573) {
3636                 uint32_t swsm;
3637
3638                 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
3639                 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
3640                     swsm & ~E1000_SWSM_DRV_LOAD);
3641         } else {
3642                 uint32_t ctrl_ext;
3643
3644                 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
3645                 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
3646                     ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
3647         }
3648 }
3649
3650 static int
3651 em_is_valid_eaddr(const uint8_t *addr)
3652 {
3653         char zero_addr[ETHER_ADDR_LEN] = { 0, 0, 0, 0, 0, 0 };
3654
3655         if ((addr[0] & 1) || !bcmp(addr, zero_addr, ETHER_ADDR_LEN))
3656                 return (FALSE);
3657
3658         return (TRUE);
3659 }
3660
3661 /*
3662  * Enable PCI Wake On Lan capability
3663  */
3664 void
3665 em_enable_wol(device_t dev)
3666 {
3667         uint16_t cap, status;
3668         uint8_t id;
3669
3670         /* First find the capabilities pointer*/
3671         cap = pci_read_config(dev, PCIR_CAP_PTR, 2);
3672
3673         /* Read the PM Capabilities */
3674         id = pci_read_config(dev, cap, 1);
3675         if (id != PCIY_PMG)     /* Something wrong */
3676                 return;
3677
3678         /*
3679          * OK, we have the power capabilities,
3680          * so now get the status register
3681          */
3682         cap += PCIR_POWER_STATUS;
3683         status = pci_read_config(dev, cap, 2);
3684         status |= PCIM_PSTAT_PME | PCIM_PSTAT_PMEENABLE;
3685         pci_write_config(dev, cap, status, 2);
3686 }
3687
3688
3689 /*
3690  * 82544 Coexistence issue workaround.
3691  *    There are 2 issues.
3692  *       1. Transmit Hang issue.
3693  *    To detect this issue, following equation can be used...
3694  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3695  *        If SUM[3:0] is in between 1 to 4, we will have this issue.
3696  *
3697  *       2. DAC issue.
3698  *    To detect this issue, following equation can be used...
3699  *        SIZE[3:0] + ADDR[2:0] = SUM[3:0].
3700  *        If SUM[3:0] is in between 9 to c, we will have this issue.
3701  *
3702  *    WORKAROUND:
3703  *        Make sure we do not have ending address
3704  *        as 1,2,3,4(Hang) or 9,a,b,c (DAC)
3705  */
3706 static uint32_t
3707 em_82544_fill_desc(bus_addr_t address, uint32_t length, PDESC_ARRAY desc_array)
3708 {
3709         uint32_t safe_terminator;
3710
3711         /*
3712          * Since issue is sensitive to length and address.
3713          * Let us first check the address...
3714          */
3715         if (length <= 4) {
3716                 desc_array->descriptor[0].address = address;
3717                 desc_array->descriptor[0].length = length;
3718                 desc_array->elements = 1;
3719                 return (desc_array->elements);
3720         }
3721
3722         safe_terminator =
3723         (uint32_t)((((uint32_t)address & 0x7) + (length & 0xF)) & 0xF);
3724
3725         /* If it does not fall between 0x1 to 0x4 and 0x9 to 0xC then return */
3726         if (safe_terminator == 0 ||
3727             (safe_terminator > 4 && safe_terminator < 9) ||
3728             (safe_terminator > 0xC && safe_terminator <= 0xF)) {
3729                 desc_array->descriptor[0].address = address;
3730                 desc_array->descriptor[0].length = length;
3731                 desc_array->elements = 1;
3732                 return (desc_array->elements);
3733         }
3734
3735         desc_array->descriptor[0].address = address;
3736         desc_array->descriptor[0].length = length - 4;
3737         desc_array->descriptor[1].address = address + (length - 4);
3738         desc_array->descriptor[1].length = 4;
3739         desc_array->elements = 2;
3740         return (desc_array->elements);
3741 }
3742
3743 static void
3744 em_update_stats(struct adapter *adapter)
3745 {
3746         struct ifnet *ifp = &adapter->arpcom.ac_if;
3747
3748         if (adapter->hw.phy.media_type == e1000_media_type_copper ||
3749             (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
3750                 adapter->stats.symerrs +=
3751                         E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
3752                 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
3753         }
3754         adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
3755         adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
3756         adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
3757         adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
3758
3759         adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
3760         adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
3761         adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
3762         adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
3763         adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
3764         adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
3765         adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
3766         adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
3767         adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
3768         adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
3769         adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
3770         adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
3771         adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
3772         adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
3773         adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
3774         adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
3775         adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
3776         adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
3777         adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
3778         adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
3779
3780         /* For the 64-bit byte counters the low dword must be read first. */
3781         /* Both registers clear on the read of the high dword */
3782
3783         adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCH);
3784         adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCH);
3785
3786         adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
3787         adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
3788         adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
3789         adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
3790         adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
3791
3792         adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
3793         adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
3794
3795         adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
3796         adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
3797         adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
3798         adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
3799         adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
3800         adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
3801         adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
3802         adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
3803         adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
3804         adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
3805
3806         if (adapter->hw.mac.type >= e1000_82543) {
3807                 adapter->stats.algnerrc +=
3808                 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
3809                 adapter->stats.rxerrc +=
3810                 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
3811                 adapter->stats.tncrs +=
3812                 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
3813                 adapter->stats.cexterr +=
3814                 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
3815                 adapter->stats.tsctc +=
3816                 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
3817                 adapter->stats.tsctfc +=
3818                 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
3819         }
3820
3821         ifp->if_collisions = adapter->stats.colc;
3822
3823         /* Rx Errors */
3824         ifp->if_ierrors =
3825             adapter->dropped_pkts + adapter->stats.rxerrc +
3826             adapter->stats.crcerrs + adapter->stats.algnerrc +
3827             adapter->stats.ruc + adapter->stats.roc +
3828             adapter->stats.mpc + adapter->stats.cexterr;
3829
3830         /* Tx Errors */
3831         ifp->if_oerrors =
3832             adapter->stats.ecol + adapter->stats.latecol +
3833             adapter->watchdog_events;
3834 }
3835
3836 static void
3837 em_print_debug_info(struct adapter *adapter)
3838 {
3839         device_t dev = adapter->dev;
3840         uint8_t *hw_addr = adapter->hw.hw_addr;
3841
3842         device_printf(dev, "Adapter hardware address = %p \n", hw_addr);
3843         device_printf(dev, "CTRL = 0x%x RCTL = 0x%x \n",
3844             E1000_READ_REG(&adapter->hw, E1000_CTRL),
3845             E1000_READ_REG(&adapter->hw, E1000_RCTL));
3846         device_printf(dev, "Packet buffer = Tx=%dk Rx=%dk \n",
3847             ((E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff0000) >> 16),\
3848             (E1000_READ_REG(&adapter->hw, E1000_PBA) & 0xffff) );
3849         device_printf(dev, "Flow control watermarks high = %d low = %d\n",
3850             adapter->hw.fc.high_water,
3851             adapter->hw.fc.low_water);
3852         device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
3853             E1000_READ_REG(&adapter->hw, E1000_TIDV),
3854             E1000_READ_REG(&adapter->hw, E1000_TADV));
3855         device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
3856             E1000_READ_REG(&adapter->hw, E1000_RDTR),
3857             E1000_READ_REG(&adapter->hw, E1000_RADV));
3858         device_printf(dev, "fifo workaround = %lld, fifo_reset_count = %lld\n",
3859             (long long)adapter->tx_fifo_wrk_cnt,
3860             (long long)adapter->tx_fifo_reset_cnt);
3861         device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
3862             E1000_READ_REG(&adapter->hw, E1000_TDH(0)),
3863             E1000_READ_REG(&adapter->hw, E1000_TDT(0)));
3864         device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
3865             E1000_READ_REG(&adapter->hw, E1000_RDH(0)),
3866             E1000_READ_REG(&adapter->hw, E1000_RDT(0)));
3867         device_printf(dev, "Num Tx descriptors avail = %d\n",
3868             adapter->num_tx_desc_avail);
3869         device_printf(dev, "Tx Descriptors not avail1 = %ld\n",
3870             adapter->no_tx_desc_avail1);
3871         device_printf(dev, "Tx Descriptors not avail2 = %ld\n",
3872             adapter->no_tx_desc_avail2);
3873         device_printf(dev, "Std mbuf failed = %ld\n",
3874             adapter->mbuf_alloc_failed);
3875         device_printf(dev, "Std mbuf cluster failed = %ld\n",
3876             adapter->mbuf_cluster_failed);
3877         device_printf(dev, "Driver dropped packets = %ld\n",
3878             adapter->dropped_pkts);
3879         device_printf(dev, "Driver tx dma failure in encap = %ld\n",
3880             adapter->no_tx_dma_setup);
3881 }
3882
3883 static void
3884 em_print_hw_stats(struct adapter *adapter)
3885 {
3886         device_t dev = adapter->dev;
3887
3888         device_printf(dev, "Excessive collisions = %lld\n",
3889             (long long)adapter->stats.ecol);
3890 #if (DEBUG_HW > 0)  /* Dont output these errors normally */
3891         device_printf(dev, "Symbol errors = %lld\n",
3892             (long long)adapter->stats.symerrs);
3893 #endif
3894         device_printf(dev, "Sequence errors = %lld\n",
3895             (long long)adapter->stats.sec);
3896         device_printf(dev, "Defer count = %lld\n",
3897             (long long)adapter->stats.dc);
3898         device_printf(dev, "Missed Packets = %lld\n",
3899             (long long)adapter->stats.mpc);
3900         device_printf(dev, "Receive No Buffers = %lld\n",
3901             (long long)adapter->stats.rnbc);
3902         /* RLEC is inaccurate on some hardware, calculate our own. */
3903         device_printf(dev, "Receive Length Errors = %lld\n",
3904             ((long long)adapter->stats.roc + (long long)adapter->stats.ruc));
3905         device_printf(dev, "Receive errors = %lld\n",
3906             (long long)adapter->stats.rxerrc);
3907         device_printf(dev, "Crc errors = %lld\n",
3908             (long long)adapter->stats.crcerrs);
3909         device_printf(dev, "Alignment errors = %lld\n",
3910             (long long)adapter->stats.algnerrc);
3911         device_printf(dev, "Collision/Carrier extension errors = %lld\n",
3912             (long long)adapter->stats.cexterr);
3913         device_printf(dev, "RX overruns = %ld\n", adapter->rx_overruns);
3914         device_printf(dev, "watchdog timeouts = %ld\n",
3915             adapter->watchdog_events);
3916         device_printf(dev, "XON Rcvd = %lld\n",
3917             (long long)adapter->stats.xonrxc);
3918         device_printf(dev, "XON Xmtd = %lld\n",
3919             (long long)adapter->stats.xontxc);
3920         device_printf(dev, "XOFF Rcvd = %lld\n",
3921             (long long)adapter->stats.xoffrxc);
3922         device_printf(dev, "XOFF Xmtd = %lld\n",
3923             (long long)adapter->stats.xofftxc);
3924         device_printf(dev, "Good Packets Rcvd = %lld\n",
3925             (long long)adapter->stats.gprc);
3926         device_printf(dev, "Good Packets Xmtd = %lld\n",
3927             (long long)adapter->stats.gptc);
3928 }
3929
3930 static void
3931 em_print_nvm_info(struct adapter *adapter)
3932 {
3933         uint16_t eeprom_data;
3934         int i, j, row = 0;
3935
3936         /* Its a bit crude, but it gets the job done */
3937         kprintf("\nInterface EEPROM Dump:\n");
3938         kprintf("Offset\n0x0000  ");
3939         for (i = 0, j = 0; i < 32; i++, j++) {
3940                 if (j == 8) { /* Make the offset block */
3941                         j = 0; ++row;
3942                         kprintf("\n0x00%x0  ",row);
3943                 }
3944                 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
3945                 kprintf("%04x ", eeprom_data);
3946         }
3947         kprintf("\n");
3948 }
3949
3950 static int
3951 em_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
3952 {
3953         struct adapter *adapter;
3954         struct ifnet *ifp;
3955         int error, result;
3956
3957         result = -1;
3958         error = sysctl_handle_int(oidp, &result, 0, req);
3959         if (error || !req->newptr)
3960                 return (error);
3961
3962         adapter = (struct adapter *)arg1;
3963         ifp = &adapter->arpcom.ac_if;
3964
3965         lwkt_serialize_enter(ifp->if_serializer);
3966
3967         if (result == 1)
3968                 em_print_debug_info(adapter);
3969
3970         /*
3971          * This value will cause a hex dump of the
3972          * first 32 16-bit words of the EEPROM to
3973          * the screen.
3974          */
3975         if (result == 2)
3976                 em_print_nvm_info(adapter);
3977
3978         lwkt_serialize_exit(ifp->if_serializer);
3979
3980         return (error);
3981 }
3982
3983 static int
3984 em_sysctl_stats(SYSCTL_HANDLER_ARGS)
3985 {
3986         int error, result;
3987
3988         result = -1;
3989         error = sysctl_handle_int(oidp, &result, 0, req);
3990         if (error || !req->newptr)
3991                 return (error);
3992
3993         if (result == 1) {
3994                 struct adapter *adapter = (struct adapter *)arg1;
3995                 struct ifnet *ifp = &adapter->arpcom.ac_if;
3996
3997                 lwkt_serialize_enter(ifp->if_serializer);
3998                 em_print_hw_stats(adapter);
3999                 lwkt_serialize_exit(ifp->if_serializer);
4000         }
4001         return (error);
4002 }
4003
4004 static void
4005 em_add_sysctl(struct adapter *adapter)
4006 {
4007         sysctl_ctx_init(&adapter->sysctl_ctx);
4008         adapter->sysctl_tree = SYSCTL_ADD_NODE(&adapter->sysctl_ctx,
4009                                         SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
4010                                         device_get_nameunit(adapter->dev),
4011                                         CTLFLAG_RD, 0, "");
4012         if (adapter->sysctl_tree == NULL) {
4013                 device_printf(adapter->dev, "can't add sysctl node\n");
4014         } else {
4015                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4016                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4017                     OID_AUTO, "debug", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4018                     em_sysctl_debug_info, "I", "Debug Information");
4019
4020                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4021                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4022                     OID_AUTO, "stats", CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4023                     em_sysctl_stats, "I", "Statistics");
4024
4025                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4026                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4027                     OID_AUTO, "rxd", CTLFLAG_RD,
4028                     &adapter->num_rx_desc, 0, NULL);
4029                 SYSCTL_ADD_INT(&adapter->sysctl_ctx,
4030                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4031                     OID_AUTO, "txd", CTLFLAG_RD,
4032                     &adapter->num_tx_desc, 0, NULL);
4033
4034                 if (adapter->hw.mac.type >= e1000_82540) {
4035                         SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4036                             SYSCTL_CHILDREN(adapter->sysctl_tree),
4037                             OID_AUTO, "int_throttle_ceil",
4038                             CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4039                             em_sysctl_int_throttle, "I",
4040                             "interrupt throttling rate");
4041                 }
4042                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4043                     SYSCTL_CHILDREN(adapter->sysctl_tree),
4044                     OID_AUTO, "int_tx_nsegs",
4045                     CTLTYPE_INT|CTLFLAG_RW, adapter, 0,
4046                     em_sysctl_int_tx_nsegs, "I",
4047                     "# segments per TX interrupt");
4048
4049 #ifdef IFPOLL_ENABLE
4050                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4051                     SYSCTL_CHILDREN(adapter->sysctl_tree), OID_AUTO,
4052                     "npoll_stfrac", CTLTYPE_INT | CTLFLAG_RW,
4053                     adapter, 0, em_sysctl_npoll_stfrac, "I",
4054                     "polling status frac");
4055                 SYSCTL_ADD_PROC(&adapter->sysctl_ctx,
4056                     SYSCTL_CHILDREN(adapter->sysctl_tree), OID_AUTO,
4057                     "npoll_cpuid", CTLTYPE_INT | CTLFLAG_RW,
4058                     adapter, 0, em_sysctl_npoll_cpuid, "I", "polling cpuid");
4059 #endif
4060         }
4061 }
4062
4063 static int
4064 em_sysctl_int_throttle(SYSCTL_HANDLER_ARGS)
4065 {
4066         struct adapter *adapter = (void *)arg1;
4067         struct ifnet *ifp = &adapter->arpcom.ac_if;
4068         int error, throttle;
4069
4070         throttle = adapter->int_throttle_ceil;
4071         error = sysctl_handle_int(oidp, &throttle, 0, req);
4072         if (error || req->newptr == NULL)
4073                 return error;
4074         if (throttle < 0 || throttle > 1000000000 / 256)
4075                 return EINVAL;
4076
4077         if (throttle) {
4078                 /*
4079                  * Set the interrupt throttling rate in 256ns increments,
4080                  * recalculate sysctl value assignment to get exact frequency.
4081                  */
4082                 throttle = 1000000000 / 256 / throttle;
4083
4084                 /* Upper 16bits of ITR is reserved and should be zero */
4085                 if (throttle & 0xffff0000)
4086                         return EINVAL;
4087         }
4088
4089         lwkt_serialize_enter(ifp->if_serializer);
4090
4091         if (throttle)
4092                 adapter->int_throttle_ceil = 1000000000 / 256 / throttle;
4093         else
4094                 adapter->int_throttle_ceil = 0;
4095
4096         if (ifp->if_flags & IFF_RUNNING)
4097                 em_set_itr(adapter, throttle);
4098
4099         lwkt_serialize_exit(ifp->if_serializer);
4100
4101         if (bootverbose) {
4102                 if_printf(ifp, "Interrupt moderation set to %d/sec\n",
4103                           adapter->int_throttle_ceil);
4104         }
4105         return 0;
4106 }
4107
4108 static int
4109 em_sysctl_int_tx_nsegs(SYSCTL_HANDLER_ARGS)
4110 {
4111         struct adapter *adapter = (void *)arg1;
4112         struct ifnet *ifp = &adapter->arpcom.ac_if;
4113         int error, segs;
4114
4115         segs = adapter->tx_int_nsegs;
4116         error = sysctl_handle_int(oidp, &segs, 0, req);
4117         if (error || req->newptr == NULL)
4118                 return error;
4119         if (segs <= 0)
4120                 return EINVAL;
4121
4122         lwkt_serialize_enter(ifp->if_serializer);
4123
4124         /*
4125          * Don't allow int_tx_nsegs to become:
4126          * o  Less the oact_tx_desc
4127          * o  Too large that no TX desc will cause TX interrupt to
4128          *    be generated (OACTIVE will never recover)
4129          * o  Too small that will cause tx_dd[] overflow
4130          */
4131         if (segs < adapter->oact_tx_desc ||
4132             segs >= adapter->num_tx_desc - adapter->oact_tx_desc ||
4133             segs < adapter->num_tx_desc / EM_TXDD_SAFE) {
4134                 error = EINVAL;
4135         } else {
4136                 error = 0;
4137                 adapter->tx_int_nsegs = segs;
4138         }
4139
4140         lwkt_serialize_exit(ifp->if_serializer);
4141
4142         return error;
4143 }
4144
4145 static void
4146 em_set_itr(struct adapter *adapter, uint32_t itr)
4147 {
4148         E1000_WRITE_REG(&adapter->hw, E1000_ITR, itr);
4149         if (adapter->hw.mac.type == e1000_82574) {
4150                 int i;
4151
4152                 /*
4153                  * When using MSIX interrupts we need to
4154                  * throttle using the EITR register
4155                  */
4156                 for (i = 0; i < 4; ++i) {
4157                         E1000_WRITE_REG(&adapter->hw,
4158                             E1000_EITR_82574(i), itr);
4159                 }
4160         }
4161 }
4162
4163 static void
4164 em_disable_aspm(struct adapter *adapter)
4165 {
4166         uint16_t link_cap, link_ctrl, disable;
4167         uint8_t pcie_ptr, reg;
4168         device_t dev = adapter->dev;
4169
4170         switch (adapter->hw.mac.type) {
4171         case e1000_82571:
4172         case e1000_82572:
4173         case e1000_82573:
4174                 /*
4175                  * 82573 specification update
4176                  * errata #8 disable L0s
4177                  * errata #41 disable L1
4178                  *
4179                  * 82571/82572 specification update
4180                  # errata #13 disable L1
4181                  * errata #68 disable L0s
4182                  */
4183                 disable = PCIEM_LNKCTL_ASPM_L0S | PCIEM_LNKCTL_ASPM_L1;
4184                 break;
4185
4186         case e1000_82574:
4187         case e1000_82583:
4188                 /*
4189                  * 82574 specification update errata #20
4190                  * 82583 specification update errata #9
4191                  *
4192                  * There is no need to disable L1
4193                  */
4194                 disable = PCIEM_LNKCTL_ASPM_L0S;
4195                 break;
4196
4197         default:
4198                 return;
4199         }
4200
4201         pcie_ptr = pci_get_pciecap_ptr(dev);
4202         if (pcie_ptr == 0)
4203                 return;
4204
4205         link_cap = pci_read_config(dev, pcie_ptr + PCIER_LINKCAP, 2);
4206         if ((link_cap & PCIEM_LNKCAP_ASPM_MASK) == 0)
4207                 return;
4208
4209         if (bootverbose) {
4210                 if_printf(&adapter->arpcom.ac_if,
4211                     "disable ASPM %#02x\n", disable);
4212         }
4213
4214         reg = pcie_ptr + PCIER_LINKCTRL;
4215         link_ctrl = pci_read_config(dev, reg, 2);
4216         link_ctrl &= ~disable;
4217         pci_write_config(dev, reg, link_ctrl, 2);
4218 }
4219
4220 static int
4221 em_tso_pullup(struct adapter *adapter, struct mbuf **mp)
4222 {
4223         int iphlen, hoff, thoff, ex = 0;
4224         struct mbuf *m;
4225         struct ip *ip;
4226
4227         m = *mp;
4228         KASSERT(M_WRITABLE(m), ("TSO mbuf not writable"));
4229
4230         iphlen = m->m_pkthdr.csum_iphlen;
4231         thoff = m->m_pkthdr.csum_thlen;
4232         hoff = m->m_pkthdr.csum_lhlen;
4233
4234         KASSERT(iphlen > 0, ("invalid ip hlen"));
4235         KASSERT(thoff > 0, ("invalid tcp hlen"));
4236         KASSERT(hoff > 0, ("invalid ether hlen"));
4237
4238         if (adapter->flags & EM_FLAG_TSO_PULLEX)
4239                 ex = 4;
4240
4241         if (m->m_len < hoff + iphlen + thoff + ex) {
4242                 m = m_pullup(m, hoff + iphlen + thoff + ex);
4243                 if (m == NULL) {
4244                         *mp = NULL;
4245                         return ENOBUFS;
4246                 }
4247                 *mp = m;
4248         }
4249         ip = mtodoff(m, struct ip *, hoff);
4250         ip->ip_len = 0;
4251
4252         return 0;
4253 }
4254
4255 static int
4256 em_tso_setup(struct adapter *adapter, struct mbuf *mp,
4257     uint32_t *txd_upper, uint32_t *txd_lower)
4258 {
4259         struct e1000_context_desc *TXD;
4260         int hoff, iphlen, thoff, hlen;
4261         int mss, pktlen, curr_txd;
4262
4263         iphlen = mp->m_pkthdr.csum_iphlen;
4264         thoff = mp->m_pkthdr.csum_thlen;
4265         hoff = mp->m_pkthdr.csum_lhlen;
4266         mss = mp->m_pkthdr.tso_segsz;
4267         pktlen = mp->m_pkthdr.len;
4268
4269         if (adapter->csum_flags == CSUM_TSO &&
4270             adapter->csum_iphlen == iphlen &&
4271             adapter->csum_lhlen == hoff &&
4272             adapter->csum_thlen == thoff &&
4273             adapter->csum_mss == mss &&
4274             adapter->csum_pktlen == pktlen) {
4275                 *txd_upper = adapter->csum_txd_upper;
4276                 *txd_lower = adapter->csum_txd_lower;
4277                 return 0;
4278         }
4279         hlen = hoff + iphlen + thoff;
4280
4281         /*
4282          * Setup a new TSO context.
4283          */
4284
4285         curr_txd = adapter->next_avail_tx_desc;
4286         TXD = (struct e1000_context_desc *)&adapter->tx_desc_base[curr_txd];
4287
4288         *txd_lower = E1000_TXD_CMD_DEXT |       /* Extended descr type */
4289                      E1000_TXD_DTYP_D |         /* Data descr type */
4290                      E1000_TXD_CMD_TSE;         /* Do TSE on this packet */
4291
4292         /* IP and/or TCP header checksum calculation and insertion. */
4293         *txd_upper = (E1000_TXD_POPTS_IXSM | E1000_TXD_POPTS_TXSM) << 8;
4294
4295         /*
4296          * Start offset for header checksum calculation.
4297          * End offset for header checksum calculation.
4298          * Offset of place put the checksum.
4299          */
4300         TXD->lower_setup.ip_fields.ipcss = hoff;
4301         TXD->lower_setup.ip_fields.ipcse = htole16(hoff + iphlen - 1);
4302         TXD->lower_setup.ip_fields.ipcso = hoff + offsetof(struct ip, ip_sum);
4303
4304         /*
4305          * Start offset for payload checksum calculation.
4306          * End offset for payload checksum calculation.
4307          * Offset of place to put the checksum.
4308          */
4309         TXD->upper_setup.tcp_fields.tucss = hoff + iphlen;
4310         TXD->upper_setup.tcp_fields.tucse = 0;
4311         TXD->upper_setup.tcp_fields.tucso =
4312             hoff + iphlen + offsetof(struct tcphdr, th_sum);
4313
4314         /*
4315          * Payload size per packet w/o any headers.
4316          * Length of all headers up to payload.
4317          */
4318         TXD->tcp_seg_setup.fields.mss = htole16(mss);
4319         TXD->tcp_seg_setup.fields.hdr_len = hlen;
4320         TXD->cmd_and_length = htole32(E1000_TXD_CMD_IFCS |
4321                                 E1000_TXD_CMD_DEXT |    /* Extended descr */
4322                                 E1000_TXD_CMD_TSE |     /* TSE context */
4323                                 E1000_TXD_CMD_IP |      /* Do IP csum */
4324                                 E1000_TXD_CMD_TCP |     /* Do TCP checksum */
4325                                 (pktlen - hlen));       /* Total len */
4326
4327         /* Save the information for this TSO context */
4328         adapter->csum_flags = CSUM_TSO;
4329         adapter->csum_lhlen = hoff;
4330         adapter->csum_iphlen = iphlen;
4331         adapter->csum_thlen = thoff;
4332         adapter->csum_mss = mss;
4333         adapter->csum_pktlen = pktlen;
4334         adapter->csum_txd_upper = *txd_upper;
4335         adapter->csum_txd_lower = *txd_lower;
4336
4337         if (++curr_txd == adapter->num_tx_desc)
4338                 curr_txd = 0;
4339
4340         KKASSERT(adapter->num_tx_desc_avail > 0);
4341         adapter->num_tx_desc_avail--;
4342
4343         adapter->next_avail_tx_desc = curr_txd;
4344         return 1;
4345 }
4346
4347 #ifdef IFPOLL_ENABLE
4348
4349 static int
4350 em_sysctl_npoll_stfrac(SYSCTL_HANDLER_ARGS)
4351 {
4352         struct adapter *adapter = arg1;
4353         struct ifnet *ifp = &adapter->arpcom.ac_if;
4354         int error = 0, stfrac;
4355
4356         lwkt_serialize_enter(ifp->if_serializer);
4357
4358         stfrac = adapter->npoll_stfrac + 1;
4359         error = sysctl_handle_int(oidp, &stfrac, 0, req);
4360         if (!error && req->newptr != NULL) {
4361                 if (stfrac < 1) {
4362                         error = EINVAL;
4363                 } else {
4364                         adapter->npoll_stfrac = stfrac - 1;
4365                         if (adapter->npoll_stcount > adapter->npoll_stfrac)
4366                                 adapter->npoll_stcount = adapter->npoll_stfrac;
4367                 }
4368         }
4369
4370         lwkt_serialize_exit(ifp->if_serializer);
4371         return error;
4372 }
4373
4374 static int
4375 em_sysctl_npoll_cpuid(SYSCTL_HANDLER_ARGS)
4376 {
4377         struct adapter *adapter = arg1;
4378         struct ifnet *ifp = &adapter->arpcom.ac_if;
4379         int error = 0, cpuid;
4380
4381         lwkt_serialize_enter(ifp->if_serializer);
4382
4383         cpuid = adapter->npoll_cpuid;
4384         error = sysctl_handle_int(oidp, &cpuid, 0, req);
4385         if (!error && req->newptr != NULL) {
4386                 if (cpuid < 0 || cpuid >= ncpus2)
4387                         error = EINVAL;
4388                 else
4389                         adapter->npoll_cpuid = cpuid;
4390         }
4391
4392         lwkt_serialize_exit(ifp->if_serializer);
4393         return error;
4394 }
4395
4396 #endif  /* IFPOLL_ENABLE */