kernel -- x86_64: Do not set reserved bits in CR3.

kernel -- x86_64: Do not set reserved bits in CR3.

The x86-64 platform code was setting PG_V, PG_U, and PG_RW bits in the
CR3 register. While the bits were supposed to cleared, Intel and AMD
hardware were ignoring them. Other x86-64 implementations, in
particular the software emulator in Linux's KVM, do check that these
reserved bits are zero.

Fixes issue running DragonFly x86_64 on KVM hosts without
two-dimensional (nested) paging.

Tested on a variety of real hardware (AMD FX(tm)-8150, c2q 6600, others)
and VM configurations (KVM on Intel/AMD hosts, Xen).

Committing-on-behalf-of: Venkatesh Srinivas <vsrinivas@ops101.org>
Reported-by: aggelos@, c.turner1, others.
Testing-by: aggelos@, swildner@, mneumann@, ftigeot@, profmakx@, Enjolras
Bug: 2561