2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.135 2008/08/02 01:14:43 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
69 #include <sys/reboot.h>
71 #include <sys/msgbuf.h>
72 #include <sys/sysent.h>
73 #include <sys/sysctl.h>
74 #include <sys/vmmeter.h>
76 #include <sys/upcall.h>
77 #include <sys/usched.h>
81 #include <vm/vm_param.h>
83 #include <vm/vm_kern.h>
84 #include <vm/vm_object.h>
85 #include <vm/vm_page.h>
86 #include <vm/vm_map.h>
87 #include <vm/vm_pager.h>
88 #include <vm/vm_extern.h>
90 #include <sys/thread2.h>
98 #include <machine/cpu.h>
99 #include <machine/clock.h>
100 #include <machine/specialreg.h>
101 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
107 #include <machine/perfmon.h>
109 #include <machine/cputypes.h>
112 #include <bus/isa/isa_device.h>
114 #include <machine_base/isa/intr_machdep.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #define PHYSMAP_ENTRIES 10
123 extern void init386(int first);
124 extern void dblfault_handler(void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup(void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
143 int _udatasel, _ucodesel;
146 int64_t tsc_offsets[MAXCPU];
148 int64_t tsc_offsets[1];
151 #if defined(SWTCH_OPTIM_STATS)
152 extern int swtch_optim_stats;
153 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
154 CTLFLAG_RD, &swtch_optim_stats, 0, "");
155 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
156 CTLFLAG_RD, &tlb_flush_count, 0, "");
161 u_long ebda_addr = 0;
164 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
174 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - vmstats.v_wire_count), req);
181 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
185 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
192 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
196 sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
200 /* Unwind the buffer, so that it's linear (possibly starting with
201 * some initial nulls).
203 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
204 msgbufp->msg_size-msgbufp->msg_bufr,req);
205 if(error) return(error);
206 if(msgbufp->msg_bufr>0) {
207 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
208 msgbufp->msg_bufr,req);
213 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
214 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
216 static int msgbuf_clear;
219 sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
222 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
224 if (!error && req->newptr) {
225 /* Clear the buffer and reset write pointer */
226 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
227 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
233 SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
234 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
235 "Clear kernel message buffer");
237 vm_paddr_t Maxmem = 0;
239 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
241 static vm_offset_t buffer_sva, buffer_eva;
242 vm_offset_t clean_sva, clean_eva;
243 static vm_offset_t pager_sva, pager_eva;
244 static struct trapframe proc0_tf;
247 cpu_startup(void *dummy)
251 vm_offset_t firstaddr;
253 if (boothowto & RB_VERBOSE)
257 * Good {morning,afternoon,evening,night}.
259 kprintf("%s", version);
262 panicifcpuunsupported();
266 kprintf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
268 * Display any holes after the first chunk of extended memory.
273 kprintf("Physical memory chunk(s):\n");
274 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
275 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
277 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
278 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
284 * Allocate space for system data structures.
285 * The first available kernel virtual address is in "v".
286 * As pages of kernel virtual memory are allocated, "v" is incremented.
287 * As pages of memory are allocated and cleared,
288 * "firstaddr" is incremented.
289 * An index into the kernel page table corresponding to the
290 * virtual memory address maintained in "v" is kept in "mapaddr".
294 * Make two passes. The first pass calculates how much memory is
295 * needed and allocates it. The second pass assigns virtual
296 * addresses to the various data structures.
300 v = (caddr_t)firstaddr;
302 #define valloc(name, type, num) \
303 (name) = (type *)v; v = (caddr_t)((name)+(num))
304 #define valloclim(name, type, num, lim) \
305 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
308 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
309 * For the first 64MB of ram nominally allocate sufficient buffers to
310 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
311 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
312 * the buffer cache we limit the eventual kva reservation to
315 * factor represents the 1/4 x ram conversion.
318 int factor = 4 * BKVASIZE / 1024;
319 int kbytes = physmem * (PAGE_SIZE / 1024);
323 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
325 nbuf += (kbytes - 65536) * 2 / (factor * 5);
326 if (maxbcache && nbuf > maxbcache / BKVASIZE)
327 nbuf = maxbcache / BKVASIZE;
331 * Do not allow the buffer_map to be more then 1/2 the size of the
334 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
335 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
336 kprintf("Warning: nbufs capped at %d\n", nbuf);
339 nswbuf = max(min(nbuf/4, 256), 16);
341 if (nswbuf < NSWBUF_MIN)
348 valloc(swbuf, struct buf, nswbuf);
349 valloc(buf, struct buf, nbuf);
352 * End of first pass, size has been calculated so allocate memory
354 if (firstaddr == 0) {
355 size = (vm_size_t)(v - firstaddr);
356 firstaddr = kmem_alloc(&kernel_map, round_page(size));
358 panic("startup: no room for tables");
363 * End of second pass, addresses have been assigned
365 if ((vm_size_t)(v - firstaddr) != size)
366 panic("startup: table size inconsistency");
368 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
369 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
370 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
372 buffer_map.system_map = 1;
373 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
374 (nswbuf*MAXPHYS) + pager_map_size);
375 pager_map.system_map = 1;
377 #if defined(USERCONFIG)
379 cninit(); /* the preferred console may have changed */
382 kprintf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
383 ptoa(vmstats.v_free_count) / 1024);
386 * Set up buffers, so they can be used to read disk labels.
389 vm_pager_bufferinit();
393 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
395 mp_start(); /* fire up the APs and APICs */
402 * Send an interrupt to process.
404 * Stack is set up to allow sigcode stored
405 * at top to call routine, followed by kcall
406 * to sigreturn routine below. After sigreturn
407 * resets the signal mask, the stack, and the
408 * frame pointer, it returns to the user
412 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
414 struct lwp *lp = curthread->td_lwp;
415 struct proc *p = lp->lwp_proc;
416 struct trapframe *regs;
417 struct sigacts *psp = p->p_sigacts;
418 struct sigframe sf, *sfp;
421 regs = lp->lwp_md.md_regs;
422 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
424 /* save user context */
425 bzero(&sf, sizeof(struct sigframe));
426 sf.sf_uc.uc_sigmask = *mask;
427 sf.sf_uc.uc_stack = lp->lwp_sigstk;
428 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
429 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
431 /* make the size of the saved context visible to userland */
432 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
434 /* save mailbox pending state for syscall interlock semantics */
435 if (p->p_flag & P_MAILBOX)
436 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
438 /* Allocate and validate space for the signal handler context. */
439 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
440 SIGISMEMBER(psp->ps_sigonstack, sig)) {
441 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
442 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
443 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
445 sfp = (struct sigframe *)regs->tf_esp - 1;
448 /* Translate the signal is appropriate */
449 if (p->p_sysent->sv_sigtbl) {
450 if (sig <= p->p_sysent->sv_sigsize)
451 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
454 /* Build the argument list for the signal handler. */
456 sf.sf_ucontext = (register_t)&sfp->sf_uc;
457 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
458 /* Signal handler installed with SA_SIGINFO. */
459 sf.sf_siginfo = (register_t)&sfp->sf_si;
460 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
462 /* fill siginfo structure */
463 sf.sf_si.si_signo = sig;
464 sf.sf_si.si_code = code;
465 sf.sf_si.si_addr = (void*)regs->tf_err;
468 /* Old FreeBSD-style arguments. */
469 sf.sf_siginfo = code;
470 sf.sf_addr = regs->tf_err;
471 sf.sf_ahu.sf_handler = catcher;
475 * If we're a vm86 process, we want to save the segment registers.
476 * We also change eflags to be our emulated eflags, not the actual
479 if (regs->tf_eflags & PSL_VM) {
480 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
481 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
483 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
484 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
485 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
486 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
488 if (vm86->vm86_has_vme == 0)
489 sf.sf_uc.uc_mcontext.mc_eflags =
490 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
491 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
494 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
495 * syscalls made by the signal handler. This just avoids
496 * wasting time for our lazy fixup of such faults. PSL_NT
497 * does nothing in vm86 mode, but vm86 programs can set it
498 * almost legitimately in probes for old cpu types.
500 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
504 * Save the FPU state and reinit the FP unit
506 npxpush(&sf.sf_uc.uc_mcontext);
509 * Copy the sigframe out to the user's stack.
511 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
513 * Something is wrong with the stack pointer.
514 * ...Kill the process.
519 regs->tf_esp = (int)sfp;
520 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
523 * i386 abi specifies that the direction flag must be cleared
526 regs->tf_eflags &= ~(PSL_T|PSL_D);
528 regs->tf_cs = _ucodesel;
529 regs->tf_ds = _udatasel;
530 regs->tf_es = _udatasel;
533 * Allow the signal handler to inherit %fs in addition to %gs as
534 * the userland program might be using both.
536 * However, if a T_PROTFLT occured the segment registers could be
537 * totally broken. They must be reset in order to be able to
538 * return to userland.
540 if (regs->tf_trapno == T_PROTFLT) {
541 regs->tf_fs = _udatasel;
542 regs->tf_gs = _udatasel;
544 regs->tf_ss = _udatasel;
548 * Sanitize the trapframe for a virtual kernel passing control to a custom
549 * VM context. Remove any items that would otherwise create a privilage
552 * XXX at the moment we allow userland to set the resume flag. Is this a
556 cpu_sanitize_frame(struct trapframe *frame)
558 frame->tf_cs = _ucodesel;
559 frame->tf_ds = _udatasel;
560 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
562 frame->tf_fs = _udatasel;
563 frame->tf_gs = _udatasel;
565 frame->tf_ss = _udatasel;
566 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
567 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
572 cpu_sanitize_tls(struct savetls *tls)
574 struct segment_descriptor *desc;
577 for (i = 0; i < NGTLS; ++i) {
579 if (desc->sd_dpl == 0 && desc->sd_type == 0)
581 if (desc->sd_def32 == 0)
583 if (desc->sd_type != SDT_MEMRWA)
585 if (desc->sd_dpl != SEL_UPL)
587 if (desc->sd_xx != 0 || desc->sd_p != 1)
594 * sigreturn(ucontext_t *sigcntxp)
596 * System call to cleanup state after a signal
597 * has been taken. Reset signal mask and
598 * stack state from context left by sendsig (above).
599 * Return to previous pc and psl as specified by
600 * context left by sendsig. Check carefully to
601 * make sure that the user has not modified the
602 * state to gain improper privileges.
604 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
605 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
608 sys_sigreturn(struct sigreturn_args *uap)
610 struct lwp *lp = curthread->td_lwp;
611 struct proc *p = lp->lwp_proc;
612 struct trapframe *regs;
620 * We have to copy the information into kernel space so userland
621 * can't modify it while we are sniffing it.
623 regs = lp->lwp_md.md_regs;
624 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
628 eflags = ucp->uc_mcontext.mc_eflags;
630 if (eflags & PSL_VM) {
631 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
632 struct vm86_kernel *vm86;
635 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
636 * set up the vm86 area, and we can't enter vm86 mode.
638 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
640 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
641 if (vm86->vm86_inited == 0)
644 /* go back to user mode if both flags are set */
645 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
646 trapsignal(lp, SIGBUS, 0);
648 if (vm86->vm86_has_vme) {
649 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
650 (eflags & VME_USERCHANGE) | PSL_VM;
652 vm86->vm86_eflags = eflags; /* save VIF, VIP */
653 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
654 (eflags & VM_USERCHANGE) | PSL_VM;
656 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
657 tf->tf_eflags = eflags;
658 tf->tf_vm86_ds = tf->tf_ds;
659 tf->tf_vm86_es = tf->tf_es;
660 tf->tf_vm86_fs = tf->tf_fs;
661 tf->tf_vm86_gs = tf->tf_gs;
662 tf->tf_ds = _udatasel;
663 tf->tf_es = _udatasel;
665 tf->tf_fs = _udatasel;
666 tf->tf_gs = _udatasel;
670 * Don't allow users to change privileged or reserved flags.
673 * XXX do allow users to change the privileged flag PSL_RF.
674 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
675 * should sometimes set it there too. tf_eflags is kept in
676 * the signal context during signal handling and there is no
677 * other place to remember it, so the PSL_RF bit may be
678 * corrupted by the signal handler without us knowing.
679 * Corruption of the PSL_RF bit at worst causes one more or
680 * one less debugger trap, so allowing it is fairly harmless.
682 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
683 kprintf("sigreturn: eflags = 0x%x\n", eflags);
688 * Don't allow users to load a valid privileged %cs. Let the
689 * hardware check for invalid selectors, excess privilege in
690 * other selectors, invalid %eip's and invalid %esp's.
692 cs = ucp->uc_mcontext.mc_cs;
693 if (!CS_SECURE(cs)) {
694 kprintf("sigreturn: cs = 0x%x\n", cs);
695 trapsignal(lp, SIGBUS, T_PROTFLT);
698 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
702 * Restore the FPU state from the frame
704 npxpop(&ucp->uc_mcontext);
707 * Merge saved signal mailbox pending flag to maintain interlock
708 * semantics against system calls.
710 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
711 p->p_flag |= P_MAILBOX;
713 if (ucp->uc_mcontext.mc_onstack & 1)
714 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
716 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
718 lp->lwp_sigmask = ucp->uc_sigmask;
719 SIG_CANTMASK(lp->lwp_sigmask);
724 * Stack frame on entry to function. %eax will contain the function vector,
725 * %ecx will contain the function data. flags, ecx, and eax will have
726 * already been pushed on the stack.
737 sendupcall(struct vmupcall *vu, int morepending)
739 struct lwp *lp = curthread->td_lwp;
740 struct trapframe *regs;
741 struct upcall upcall;
742 struct upc_frame upc_frame;
746 * If we are a virtual kernel running an emulated user process
747 * context, switch back to the virtual kernel context before
748 * trying to post the signal.
750 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
751 lp->lwp_md.md_regs->tf_trapno = 0;
752 vkernel_trap(lp, lp->lwp_md.md_regs);
756 * Get the upcall data structure
758 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
759 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
762 kprintf("bad upcall address\n");
767 * If the data structure is already marked pending or has a critical
768 * section count, mark the data structure as pending and return
769 * without doing an upcall. vu_pending is left set.
771 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
772 if (upcall.upc_pending < vu->vu_pending) {
773 upcall.upc_pending = vu->vu_pending;
774 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
775 sizeof(upcall.upc_pending));
781 * We can run this upcall now, clear vu_pending.
783 * Bump our critical section count and set or clear the
784 * user pending flag depending on whether more upcalls are
785 * pending. The user will be responsible for calling
786 * upc_dispatch(-1) to process remaining upcalls.
789 upcall.upc_pending = morepending;
790 crit_count += TDPRI_CRIT;
791 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
792 sizeof(upcall.upc_pending));
793 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
797 * Construct a stack frame and issue the upcall
799 regs = lp->lwp_md.md_regs;
800 upc_frame.eax = regs->tf_eax;
801 upc_frame.ecx = regs->tf_ecx;
802 upc_frame.edx = regs->tf_edx;
803 upc_frame.flags = regs->tf_eflags;
804 upc_frame.oldip = regs->tf_eip;
805 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
806 sizeof(upc_frame)) != 0) {
807 kprintf("bad stack on upcall\n");
809 regs->tf_eax = (register_t)vu->vu_func;
810 regs->tf_ecx = (register_t)vu->vu_data;
811 regs->tf_edx = (register_t)lp->lwp_upcall;
812 regs->tf_eip = (register_t)vu->vu_ctx;
813 regs->tf_esp -= sizeof(upc_frame);
818 * fetchupcall occurs in the context of a system call, which means that
819 * we have to return EJUSTRETURN in order to prevent eax and edx from
820 * being overwritten by the syscall return value.
822 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
823 * and the function pointer in %eax.
826 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
828 struct upc_frame upc_frame;
829 struct lwp *lp = curthread->td_lwp;
830 struct trapframe *regs;
832 struct upcall upcall;
835 regs = lp->lwp_md.md_regs;
837 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
841 * This jumps us to the next ready context.
844 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
847 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
848 crit_count += TDPRI_CRIT;
850 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
851 regs->tf_eax = (register_t)vu->vu_func;
852 regs->tf_ecx = (register_t)vu->vu_data;
853 regs->tf_edx = (register_t)lp->lwp_upcall;
854 regs->tf_eip = (register_t)vu->vu_ctx;
855 regs->tf_esp = (register_t)rsp;
858 * This returns us to the originally interrupted code.
860 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
861 regs->tf_eax = upc_frame.eax;
862 regs->tf_ecx = upc_frame.ecx;
863 regs->tf_edx = upc_frame.edx;
864 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
865 (upc_frame.flags & PSL_USERCHANGE);
866 regs->tf_eip = upc_frame.oldip;
867 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
876 * Machine dependent boot() routine
878 * I haven't seen anything to put here yet
879 * Possibly some stuff might be grafted back here from boot()
887 * Shutdown the CPU as much as possible
893 __asm__ __volatile("hlt");
897 * cpu_idle() represents the idle LWKT. You cannot return from this function
898 * (unless you want to blow things up!). Instead we look for runnable threads
899 * and loop or halt as appropriate. Giant is not held on entry to the thread.
901 * The main loop is entered with a critical section held, we must release
902 * the critical section before doing anything else. lwkt_switch() will
903 * check for pending interrupts due to entering and exiting its own
906 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
907 * to wake a HLTed cpu up. However, there are cases where the idlethread
908 * will be entered with the possibility that no IPI will occur and in such
909 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
911 static int cpu_idle_hlt = 1;
912 static int cpu_idle_hltcnt;
913 static int cpu_idle_spincnt;
914 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
915 &cpu_idle_hlt, 0, "Idle loop HLT enable");
916 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
917 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
918 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
919 &cpu_idle_spincnt, 0, "Idle loop entry spins");
922 cpu_idle_default_hook(void)
925 * We must guarentee that hlt is exactly the instruction
928 __asm __volatile("sti; hlt");
931 /* Other subsystems (e.g., ACPI) can hook this later. */
932 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
937 struct thread *td = curthread;
940 KKASSERT(td->td_pri < TDPRI_CRIT);
943 * See if there are any LWKTs ready to go.
948 * If we are going to halt call splz unconditionally after
949 * CLIing to catch any interrupt races. Note that we are
950 * at SPL0 and interrupts are enabled.
952 if (cpu_idle_hlt && !lwkt_runnable() &&
953 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
954 __asm __volatile("cli");
956 if (!lwkt_runnable())
960 __asm __volatile("pause");
964 td->td_flags &= ~TDF_IDLE_NOHLT;
967 __asm __volatile("sti; pause");
969 __asm __volatile("sti");
977 * This routine is called when the only runnable threads require
978 * the MP lock, and the scheduler couldn't get it. On a real cpu
979 * we let the scheduler spin.
982 cpu_mplock_contested(void)
988 * This routine is called if a spinlock has been held through the
989 * exponential backoff period and is seriously contested. On a real cpu
993 cpu_spinlock_contested(void)
999 * Clear registers on exec
1002 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1004 struct thread *td = curthread;
1005 struct lwp *lp = td->td_lwp;
1006 struct pcb *pcb = td->td_pcb;
1007 struct trapframe *regs = lp->lwp_md.md_regs;
1009 /* was i386_user_cleanup() in NetBSD */
1012 bzero((char *)regs, sizeof(struct trapframe));
1013 regs->tf_eip = entry;
1014 regs->tf_esp = stack;
1015 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1016 regs->tf_ss = _udatasel;
1017 regs->tf_ds = _udatasel;
1018 regs->tf_es = _udatasel;
1019 regs->tf_fs = _udatasel;
1020 regs->tf_gs = _udatasel;
1021 regs->tf_cs = _ucodesel;
1023 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1024 regs->tf_ebx = ps_strings;
1027 * Reset the hardware debug registers if they were in use.
1028 * They won't have any meaning for the newly exec'd process.
1030 if (pcb->pcb_flags & PCB_DBREGS) {
1037 if (pcb == td->td_pcb) {
1039 * Clear the debug registers on the running
1040 * CPU, otherwise they will end up affecting
1041 * the next process we switch to.
1045 pcb->pcb_flags &= ~PCB_DBREGS;
1049 * Initialize the math emulator (if any) for the current process.
1050 * Actually, just clear the bit that says that the emulator has
1051 * been initialized. Initialization is delayed until the process
1052 * traps to the emulator (if it is done at all) mainly because
1053 * emulators don't provide an entry point for initialization.
1055 pcb->pcb_flags &= ~FP_SOFTFP;
1058 * note: do not set CR0_TS here. npxinit() must do it after clearing
1059 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1063 load_cr0(rcr0() | CR0_MP);
1066 /* Initialize the npx (if any) for the current process. */
1067 npxinit(__INITIAL_NPXCW__);
1072 * note: linux emulator needs edx to be 0x0 on entry, which is
1073 * handled in execve simply by setting the 64 bit syscall
1074 * return value to 0.
1084 cr0 |= CR0_NE; /* Done by npxinit() */
1085 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1086 cr0 |= CR0_WP | CR0_AM;
1092 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1095 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1097 if (!error && req->newptr)
1102 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1103 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1105 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1106 CTLFLAG_RW, &disable_rtc_set, 0, "");
1108 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1109 CTLFLAG_RD, &bootinfo, bootinfo, "");
1111 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1112 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1114 extern u_long bootdev; /* not a cdev_t - encoding is different */
1115 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1116 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1119 * Initialize 386 and configure to run kernel
1123 * Initialize segments & interrupt table
1127 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1128 static struct gate_descriptor idt0[NIDT];
1129 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1130 union descriptor ldt[NLDT]; /* local descriptor table */
1132 /* table descriptors - used to load tables by cpu */
1133 struct region_descriptor r_gdt, r_idt;
1135 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1136 extern int has_f00f_bug;
1139 static struct i386tss dblfault_tss;
1140 static char dblfault_stack[PAGE_SIZE];
1142 extern struct user *proc0paddr;
1145 /* software prototypes -- in more palatable form */
1146 struct soft_segment_descriptor gdt_segs[] = {
1147 /* GNULL_SEL 0 Null Descriptor */
1148 { 0x0, /* segment base address */
1150 0, /* segment type */
1151 0, /* segment descriptor priority level */
1152 0, /* segment descriptor present */
1154 0, /* default 32 vs 16 bit size */
1155 0 /* limit granularity (byte/page units)*/ },
1156 /* GCODE_SEL 1 Code Descriptor for kernel */
1157 { 0x0, /* segment base address */
1158 0xfffff, /* length - all address space */
1159 SDT_MEMERA, /* segment type */
1160 0, /* segment descriptor priority level */
1161 1, /* segment descriptor present */
1163 1, /* default 32 vs 16 bit size */
1164 1 /* limit granularity (byte/page units)*/ },
1165 /* GDATA_SEL 2 Data Descriptor for kernel */
1166 { 0x0, /* segment base address */
1167 0xfffff, /* length - all address space */
1168 SDT_MEMRWA, /* segment type */
1169 0, /* segment descriptor priority level */
1170 1, /* segment descriptor present */
1172 1, /* default 32 vs 16 bit size */
1173 1 /* limit granularity (byte/page units)*/ },
1174 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1175 { 0x0, /* segment base address */
1176 0xfffff, /* length - all address space */
1177 SDT_MEMRWA, /* segment type */
1178 0, /* segment descriptor priority level */
1179 1, /* segment descriptor present */
1181 1, /* default 32 vs 16 bit size */
1182 1 /* limit granularity (byte/page units)*/ },
1183 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1185 0x0, /* segment base address */
1186 sizeof(struct i386tss)-1,/* length - all address space */
1187 SDT_SYS386TSS, /* segment type */
1188 0, /* segment descriptor priority level */
1189 1, /* segment descriptor present */
1191 0, /* unused - default 32 vs 16 bit size */
1192 0 /* limit granularity (byte/page units)*/ },
1193 /* GLDT_SEL 5 LDT Descriptor */
1194 { (int) ldt, /* segment base address */
1195 sizeof(ldt)-1, /* length - all address space */
1196 SDT_SYSLDT, /* segment type */
1197 SEL_UPL, /* segment descriptor priority level */
1198 1, /* segment descriptor present */
1200 0, /* unused - default 32 vs 16 bit size */
1201 0 /* limit granularity (byte/page units)*/ },
1202 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1203 { (int) ldt, /* segment base address */
1204 (512 * sizeof(union descriptor)-1), /* length */
1205 SDT_SYSLDT, /* segment type */
1206 0, /* segment descriptor priority level */
1207 1, /* segment descriptor present */
1209 0, /* unused - default 32 vs 16 bit size */
1210 0 /* limit granularity (byte/page units)*/ },
1211 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1212 { 0x0, /* segment base address */
1213 0x0, /* length - all address space */
1214 0, /* segment type */
1215 0, /* segment descriptor priority level */
1216 0, /* segment descriptor present */
1218 0, /* default 32 vs 16 bit size */
1219 0 /* limit granularity (byte/page units)*/ },
1220 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1221 { 0x400, /* segment base address */
1222 0xfffff, /* length */
1223 SDT_MEMRWA, /* segment type */
1224 0, /* segment descriptor priority level */
1225 1, /* segment descriptor present */
1227 1, /* default 32 vs 16 bit size */
1228 1 /* limit granularity (byte/page units)*/ },
1229 /* GPANIC_SEL 9 Panic Tss Descriptor */
1230 { (int) &dblfault_tss, /* segment base address */
1231 sizeof(struct i386tss)-1,/* length - all address space */
1232 SDT_SYS386TSS, /* segment type */
1233 0, /* segment descriptor priority level */
1234 1, /* segment descriptor present */
1236 0, /* unused - default 32 vs 16 bit size */
1237 0 /* limit granularity (byte/page units)*/ },
1238 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1239 { 0, /* segment base address (overwritten) */
1240 0xfffff, /* length */
1241 SDT_MEMERA, /* segment type */
1242 0, /* segment descriptor priority level */
1243 1, /* segment descriptor present */
1245 0, /* default 32 vs 16 bit size */
1246 1 /* limit granularity (byte/page units)*/ },
1247 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1248 { 0, /* segment base address (overwritten) */
1249 0xfffff, /* length */
1250 SDT_MEMERA, /* segment type */
1251 0, /* segment descriptor priority level */
1252 1, /* segment descriptor present */
1254 0, /* default 32 vs 16 bit size */
1255 1 /* limit granularity (byte/page units)*/ },
1256 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1257 { 0, /* segment base address (overwritten) */
1258 0xfffff, /* length */
1259 SDT_MEMRWA, /* segment type */
1260 0, /* segment descriptor priority level */
1261 1, /* segment descriptor present */
1263 1, /* default 32 vs 16 bit size */
1264 1 /* limit granularity (byte/page units)*/ },
1265 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1266 { 0, /* segment base address (overwritten) */
1267 0xfffff, /* length */
1268 SDT_MEMRWA, /* segment type */
1269 0, /* segment descriptor priority level */
1270 1, /* segment descriptor present */
1272 0, /* default 32 vs 16 bit size */
1273 1 /* limit granularity (byte/page units)*/ },
1274 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1275 { 0, /* segment base address (overwritten) */
1276 0xfffff, /* length */
1277 SDT_MEMRWA, /* segment type */
1278 0, /* segment descriptor priority level */
1279 1, /* segment descriptor present */
1281 0, /* default 32 vs 16 bit size */
1282 1 /* limit granularity (byte/page units)*/ },
1283 /* GTLS_START 15 TLS */
1284 { 0x0, /* segment base address */
1286 0, /* segment type */
1287 0, /* segment descriptor priority level */
1288 0, /* segment descriptor present */
1290 0, /* default 32 vs 16 bit size */
1291 0 /* limit granularity (byte/page units)*/ },
1292 /* GTLS_START+1 16 TLS */
1293 { 0x0, /* segment base address */
1295 0, /* segment type */
1296 0, /* segment descriptor priority level */
1297 0, /* segment descriptor present */
1299 0, /* default 32 vs 16 bit size */
1300 0 /* limit granularity (byte/page units)*/ },
1301 /* GTLS_END 17 TLS */
1302 { 0x0, /* segment base address */
1304 0, /* segment type */
1305 0, /* segment descriptor priority level */
1306 0, /* segment descriptor present */
1308 0, /* default 32 vs 16 bit size */
1309 0 /* limit granularity (byte/page units)*/ },
1312 static struct soft_segment_descriptor ldt_segs[] = {
1313 /* Null Descriptor - overwritten by call gate */
1314 { 0x0, /* segment base address */
1315 0x0, /* length - all address space */
1316 0, /* segment type */
1317 0, /* segment descriptor priority level */
1318 0, /* segment descriptor present */
1320 0, /* default 32 vs 16 bit size */
1321 0 /* limit granularity (byte/page units)*/ },
1322 /* Null Descriptor - overwritten by call gate */
1323 { 0x0, /* segment base address */
1324 0x0, /* length - all address space */
1325 0, /* segment type */
1326 0, /* segment descriptor priority level */
1327 0, /* segment descriptor present */
1329 0, /* default 32 vs 16 bit size */
1330 0 /* limit granularity (byte/page units)*/ },
1331 /* Null Descriptor - overwritten by call gate */
1332 { 0x0, /* segment base address */
1333 0x0, /* length - all address space */
1334 0, /* segment type */
1335 0, /* segment descriptor priority level */
1336 0, /* segment descriptor present */
1338 0, /* default 32 vs 16 bit size */
1339 0 /* limit granularity (byte/page units)*/ },
1340 /* Code Descriptor for user */
1341 { 0x0, /* segment base address */
1342 0xfffff, /* length - all address space */
1343 SDT_MEMERA, /* segment type */
1344 SEL_UPL, /* segment descriptor priority level */
1345 1, /* segment descriptor present */
1347 1, /* default 32 vs 16 bit size */
1348 1 /* limit granularity (byte/page units)*/ },
1349 /* Null Descriptor - overwritten by call gate */
1350 { 0x0, /* segment base address */
1351 0x0, /* length - all address space */
1352 0, /* segment type */
1353 0, /* segment descriptor priority level */
1354 0, /* segment descriptor present */
1356 0, /* default 32 vs 16 bit size */
1357 0 /* limit granularity (byte/page units)*/ },
1358 /* Data Descriptor for user */
1359 { 0x0, /* segment base address */
1360 0xfffff, /* length - all address space */
1361 SDT_MEMRWA, /* segment type */
1362 SEL_UPL, /* segment descriptor priority level */
1363 1, /* segment descriptor present */
1365 1, /* default 32 vs 16 bit size */
1366 1 /* limit granularity (byte/page units)*/ },
1370 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1372 struct gate_descriptor *ip;
1375 ip->gd_looffset = (int)func;
1376 ip->gd_selector = selec;
1382 ip->gd_hioffset = ((int)func)>>16 ;
1385 #define IDTVEC(name) __CONCAT(X,name)
1388 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1389 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1390 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1391 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1392 IDTVEC(xmm), IDTVEC(syscall),
1395 IDTVEC(int0x80_syscall);
1397 #ifdef DEBUG_INTERRUPTS
1398 extern inthand_t *Xrsvdary[256];
1402 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1404 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1405 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1406 ssd->ssd_type = sd->sd_type;
1407 ssd->ssd_dpl = sd->sd_dpl;
1408 ssd->ssd_p = sd->sd_p;
1409 ssd->ssd_def32 = sd->sd_def32;
1410 ssd->ssd_gran = sd->sd_gran;
1414 * Populate the (physmap) array with base/bound pairs describing the
1415 * available physical memory in the system, then test this memory and
1416 * build the phys_avail array describing the actually-available memory.
1418 * If we cannot accurately determine the physical memory map, then use
1419 * value from the 0xE801 call, and failing that, the RTC.
1421 * Total memory size may be set by the kernel environment variable
1422 * hw.physmem or the compile-time define MAXMEM.
1425 getmemsize(int first)
1427 int i, physmap_idx, pa_indx;
1429 u_int basemem, extmem;
1430 struct vm86frame vmf;
1431 struct vm86context vmc;
1433 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1441 quad_t dcons_addr, dcons_size;
1443 bzero(&vmf, sizeof(struct vm86frame));
1444 bzero(physmap, sizeof(physmap));
1448 * Some newer BIOSes has broken INT 12H implementation which cause
1449 * kernel panic immediately. In this case, we need to scan SMAP
1450 * with INT 15:E820 first, then determine base memory size.
1453 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1454 if (hasbrokenint12) {
1459 * Perform "base memory" related probes & setup. If we get a crazy
1460 * value give the bios some scribble space just in case.
1462 vm86_intcall(0x12, &vmf);
1463 basemem = vmf.vmf_ax;
1464 if (basemem > 640) {
1465 kprintf("Preposterous BIOS basemem of %uK, "
1466 "truncating to < 640K\n", basemem);
1471 * XXX if biosbasemem is now < 640, there is a `hole'
1472 * between the end of base memory and the start of
1473 * ISA memory. The hole may be empty or it may
1474 * contain BIOS code or data. Map it read/write so
1475 * that the BIOS can write to it. (Memory from 0 to
1476 * the physical end of the kernel is mapped read-only
1477 * to begin with and then parts of it are remapped.
1478 * The parts that aren't remapped form holes that
1479 * remain read-only and are unused by the kernel.
1480 * The base memory area is below the physical end of
1481 * the kernel and right now forms a read-only hole.
1482 * The part of it from PAGE_SIZE to
1483 * (trunc_page(biosbasemem * 1024) - 1) will be
1484 * remapped and used by the kernel later.)
1486 * This code is similar to the code used in
1487 * pmap_mapdev, but since no memory needs to be
1488 * allocated we simply change the mapping.
1490 for (pa = trunc_page(basemem * 1024);
1491 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1492 pte = vtopte(pa + KERNBASE);
1493 *pte = pa | PG_RW | PG_V;
1497 * if basemem != 640, map pages r/w into vm86 page table so
1498 * that the bios can scribble on it.
1501 for (i = basemem / 4; i < 160; i++)
1502 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1506 * map page 1 R/W into the kernel page table so we can use it
1507 * as a buffer. The kernel will unmap this page later.
1509 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1510 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1513 * get memory map with INT 15:E820
1515 #define SMAPSIZ sizeof(*smap)
1516 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1519 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1520 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1525 vmf.vmf_eax = 0xE820;
1526 vmf.vmf_edx = SMAP_SIG;
1527 vmf.vmf_ecx = SMAPSIZ;
1528 i = vm86_datacall(0x15, &vmf, &vmc);
1529 if (i || vmf.vmf_eax != SMAP_SIG)
1531 if (boothowto & RB_VERBOSE)
1532 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1534 *(u_int32_t *)((char *)&smap->base + 4),
1535 (u_int32_t)smap->base,
1536 *(u_int32_t *)((char *)&smap->length + 4),
1537 (u_int32_t)smap->length);
1539 if (smap->type != 0x01)
1542 if (smap->length == 0)
1545 if (smap->base >= 0xffffffff) {
1546 kprintf("%uK of memory above 4GB ignored\n",
1547 (u_int)(smap->length / 1024));
1551 for (i = 0; i <= physmap_idx; i += 2) {
1552 if (smap->base < physmap[i + 1]) {
1553 if (boothowto & RB_VERBOSE)
1555 "Overlapping or non-montonic memory region, ignoring second region\n");
1560 if (smap->base == physmap[physmap_idx + 1]) {
1561 physmap[physmap_idx + 1] += smap->length;
1566 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1568 "Too many segments in the physical address map, giving up\n");
1571 physmap[physmap_idx] = smap->base;
1572 physmap[physmap_idx + 1] = smap->base + smap->length;
1574 ; /* fix GCC3.x warning */
1575 } while (vmf.vmf_ebx != 0);
1578 * Perform "base memory" related probes & setup based on SMAP
1581 for (i = 0; i <= physmap_idx; i += 2) {
1582 if (physmap[i] == 0x00000000) {
1583 basemem = physmap[i + 1] / 1024;
1592 if (basemem > 640) {
1593 kprintf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1598 for (pa = trunc_page(basemem * 1024);
1599 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1600 pte = vtopte(pa + KERNBASE);
1601 *pte = pa | PG_RW | PG_V;
1605 for (i = basemem / 4; i < 160; i++)
1606 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1609 if (physmap[1] != 0)
1613 * If we failed above, try memory map with INT 15:E801
1615 vmf.vmf_ax = 0xE801;
1616 if (vm86_intcall(0x15, &vmf) == 0) {
1617 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1621 vm86_intcall(0x15, &vmf);
1622 extmem = vmf.vmf_ax;
1625 * Prefer the RTC value for extended memory.
1627 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1632 * Special hack for chipsets that still remap the 384k hole when
1633 * there's 16MB of memory - this really confuses people that
1634 * are trying to use bus mastering ISA controllers with the
1635 * "16MB limit"; they only have 16MB, but the remapping puts
1636 * them beyond the limit.
1638 * If extended memory is between 15-16MB (16-17MB phys address range),
1641 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1645 physmap[1] = basemem * 1024;
1647 physmap[physmap_idx] = 0x100000;
1648 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1652 * Now, physmap contains a map of physical memory.
1656 /* make hole for AP bootstrap code YYY */
1657 physmap[1] = mp_bootaddress(physmap[1]);
1659 /* Save EBDA address, if any */
1660 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1665 * Maxmem isn't the "maximum memory", it's one larger than the
1666 * highest page of the physical address space. It should be
1667 * called something like "Maxphyspage". We may adjust this
1668 * based on ``hw.physmem'' and the results of the memory test.
1670 Maxmem = atop(physmap[physmap_idx + 1]);
1673 Maxmem = MAXMEM / 4;
1677 * hw.physmem is a size in bytes; we also allow k, m, and g suffixes
1678 * for the appropriate modifiers. This overrides MAXMEM.
1680 if ((cp = kgetenv("hw.physmem")) != NULL) {
1681 u_int64_t AllowMem, sanity;
1684 sanity = AllowMem = strtouq(cp, &ep, 0);
1685 if ((ep != cp) && (*ep != 0)) {
1698 AllowMem = sanity = 0;
1700 if (AllowMem < sanity)
1704 kprintf("Ignoring invalid memory size of '%s'\n", cp);
1706 Maxmem = atop(AllowMem);
1709 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1710 (boothowto & RB_VERBOSE))
1711 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1714 * If Maxmem has been increased beyond what the system has detected,
1715 * extend the last memory segment to the new limit.
1717 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1718 physmap[physmap_idx + 1] = ptoa(Maxmem);
1720 /* call pmap initialization to make new kernel address space */
1721 pmap_bootstrap(first, 0);
1724 * Size up each available chunk of physical memory.
1726 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1728 phys_avail[pa_indx++] = physmap[0];
1729 phys_avail[pa_indx] = physmap[0];
1733 * Get dcons buffer address
1735 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1736 kgetenv_quad("dcons.size", &dcons_size) == 0)
1740 * physmap is in bytes, so when converting to page boundaries,
1741 * round up the start address and round down the end address.
1743 for (i = 0; i <= physmap_idx; i += 2) {
1747 if (physmap[i + 1] < end)
1748 end = trunc_page(physmap[i + 1]);
1749 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1754 int *ptr = (int *)CADDR1;
1758 * block out kernel memory as not available.
1760 if (pa >= 0x100000 && pa < first)
1764 * block out dcons buffer
1767 && pa >= trunc_page(dcons_addr)
1768 && pa < dcons_addr + dcons_size)
1774 * map page into kernel: valid, read/write,non-cacheable
1776 *pte = pa | PG_V | PG_RW | PG_N;
1781 * Test for alternating 1's and 0's
1783 *(volatile int *)ptr = 0xaaaaaaaa;
1784 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1788 * Test for alternating 0's and 1's
1790 *(volatile int *)ptr = 0x55555555;
1791 if (*(volatile int *)ptr != 0x55555555) {
1797 *(volatile int *)ptr = 0xffffffff;
1798 if (*(volatile int *)ptr != 0xffffffff) {
1804 *(volatile int *)ptr = 0x0;
1805 if (*(volatile int *)ptr != 0x0) {
1809 * Restore original value.
1814 * Adjust array of valid/good pages.
1816 if (page_bad == TRUE) {
1820 * If this good page is a continuation of the
1821 * previous set of good pages, then just increase
1822 * the end pointer. Otherwise start a new chunk.
1823 * Note that "end" points one higher than end,
1824 * making the range >= start and < end.
1825 * If we're also doing a speculative memory
1826 * test and we at or past the end, bump up Maxmem
1827 * so that we keep going. The first bad page
1828 * will terminate the loop.
1830 if (phys_avail[pa_indx] == pa) {
1831 phys_avail[pa_indx] += PAGE_SIZE;
1834 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1835 kprintf("Too many holes in the physical address space, giving up\n");
1839 phys_avail[pa_indx++] = pa; /* start */
1840 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1850 * The last chunk must contain at least one page plus the message
1851 * buffer to avoid complicating other code (message buffer address
1852 * calculation, etc.).
1854 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1855 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1856 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1857 phys_avail[pa_indx--] = 0;
1858 phys_avail[pa_indx--] = 0;
1861 Maxmem = atop(phys_avail[pa_indx]);
1863 /* Trim off space for the message buffer. */
1864 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1866 avail_end = phys_avail[pa_indx];
1878 * 7 Device Not Available (x87)
1880 * 9 Coprocessor Segment overrun (unsupported, reserved)
1882 * 11 Segment not present
1884 * 13 General Protection
1887 * 16 x87 FP Exception pending
1888 * 17 Alignment Check
1890 * 19 SIMD floating point
1892 * 32-255 INTn/external sources
1897 struct gate_descriptor *gdp;
1898 int gsel_tss, metadata_missing, off, x;
1899 struct mdglobaldata *gd;
1902 * Prevent lowering of the ipl if we call tsleep() early.
1904 gd = &CPU_prvspace[0].mdglobaldata;
1905 bzero(gd, sizeof(*gd));
1907 gd->mi.gd_curthread = &thread0;
1908 thread0.td_gd = &gd->mi;
1910 atdevbase = ISA_HOLE_START + KERNBASE;
1912 metadata_missing = 0;
1913 if (bootinfo.bi_modulep) {
1914 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1915 preload_bootstrap_relocate(KERNBASE);
1917 metadata_missing = 1;
1919 if (bootinfo.bi_envp)
1920 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1923 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1924 * and ncpus_fit_mask remain 0.
1929 /* Init basic tunables, hz etc */
1933 * make gdt memory segments, the code segment goes up to end of the
1934 * page with etext in it, the data segment goes to the end of
1938 * XXX text protection is temporarily (?) disabled. The limit was
1939 * i386_btop(round_page(etext)) - 1.
1941 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1942 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1944 gdt_segs[GPRIV_SEL].ssd_limit =
1945 atop(sizeof(struct privatespace) - 1);
1946 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1947 gdt_segs[GPROC0_SEL].ssd_base =
1948 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1950 gd->mi.gd_prvspace = &CPU_prvspace[0];
1953 * Note: on both UP and SMP curthread must be set non-NULL
1954 * early in the boot sequence because the system assumes
1955 * that 'curthread' is never NULL.
1958 for (x = 0; x < NGDT; x++) {
1960 /* avoid overwriting db entries with APM ones */
1961 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1964 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1967 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1968 r_gdt.rd_base = (int) gdt;
1971 mi_gdinit(&gd->mi, 0);
1973 mi_proc0init(&gd->mi, proc0paddr);
1974 safepri = TDPRI_MAX;
1976 /* make ldt memory segments */
1978 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
1979 * should be spelled ...MAX_USER...
1981 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1982 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1983 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1984 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1986 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1988 gd->gd_currentldt = _default_ldt;
1989 /* spinlocks and the BGL */
1993 * Setup the hardware exception table. Most exceptions use
1994 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
1995 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
1996 * an 'interrupt trap gate', which disables interrupts on entry,
1997 * in order to be able to poll the appropriate CRn register to
1998 * determine the fault address.
2000 for (x = 0; x < NIDT; x++) {
2001 #ifdef DEBUG_INTERRUPTS
2002 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2004 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2007 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2008 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2009 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2010 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2011 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2012 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2013 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2014 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2015 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2016 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2017 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2018 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2019 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2020 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2021 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2022 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2023 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2024 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2025 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2026 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2027 setidt(0x80, &IDTVEC(int0x80_syscall),
2028 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2030 r_idt.rd_limit = sizeof(idt0) - 1;
2031 r_idt.rd_base = (int) idt;
2035 * Initialize the console before we print anything out.
2039 if (metadata_missing)
2040 kprintf("WARNING: loader(8) metadata is missing!\n");
2049 if (boothowto & RB_KDB)
2050 Debugger("Boot flags requested debugger");
2053 finishidentcpu(); /* Final stage of CPU initialization */
2054 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2055 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2056 initializecpu(); /* Initialize CPU registers */
2059 * make an initial tss so cpu can get interrupt stack on syscall!
2060 * The 16 bytes is to save room for a VM86 context.
2062 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2063 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2064 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2065 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2066 gd->gd_common_tssd = *gd->gd_tss_gdt;
2067 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2070 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2071 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2072 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2073 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2074 dblfault_tss.tss_cr3 = (int)IdlePTD;
2075 dblfault_tss.tss_eip = (int) dblfault_handler;
2076 dblfault_tss.tss_eflags = PSL_KERNEL;
2077 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2078 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2079 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2080 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2081 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2085 init_param2(physmem);
2087 /* now running on new page tables, configured,and u/iom is accessible */
2089 /* Map the message buffer. */
2090 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2091 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2093 msgbufinit(msgbufp, MSGBUF_SIZE);
2095 /* make a call gate to reenter kernel with */
2096 gdp = &ldt[LSYS5CALLS_SEL].gd;
2098 x = (int) &IDTVEC(syscall);
2099 gdp->gd_looffset = x++;
2100 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2102 gdp->gd_type = SDT_SYS386CGT;
2103 gdp->gd_dpl = SEL_UPL;
2105 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2107 /* XXX does this work? */
2108 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2109 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2111 /* transfer to user mode */
2113 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2114 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2116 /* setup proc 0's pcb */
2117 thread0.td_pcb->pcb_flags = 0;
2118 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2119 thread0.td_pcb->pcb_ext = 0;
2120 lwp0.lwp_md.md_regs = &proc0_tf;
2124 * Initialize machine-dependant portions of the global data structure.
2125 * Note that the global data area and cpu0's idlestack in the private
2126 * data space were allocated in locore.
2128 * Note: the idlethread's cpl is 0
2130 * WARNING! Called from early boot, 'mycpu' may not work yet.
2133 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2136 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2138 lwkt_init_thread(&gd->mi.gd_idlethread,
2139 gd->mi.gd_prvspace->idlestack,
2140 sizeof(gd->mi.gd_prvspace->idlestack),
2141 TDF_MPSAFE, &gd->mi);
2142 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2143 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2144 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2145 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2149 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2151 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2152 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2159 globaldata_find(int cpu)
2161 KKASSERT(cpu >= 0 && cpu < ncpus);
2162 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2165 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2166 static void f00f_hack(void *unused);
2167 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2170 f00f_hack(void *unused)
2172 struct gate_descriptor *new_idt;
2178 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2180 r_idt.rd_limit = sizeof(idt0) - 1;
2182 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2184 panic("kmem_alloc returned 0");
2185 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2186 panic("kmem_alloc returned non-page-aligned memory");
2187 /* Put the first seven entries in the lower page */
2188 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2189 bcopy(idt, new_idt, sizeof(idt0));
2190 r_idt.rd_base = (int)new_idt;
2193 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2194 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2195 panic("vm_map_protect failed");
2198 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2201 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2203 lp->lwp_md.md_regs->tf_eip = addr;
2208 ptrace_single_step(struct lwp *lp)
2210 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2215 fill_regs(struct lwp *lp, struct reg *regs)
2218 struct trapframe *tp;
2220 tp = lp->lwp_md.md_regs;
2221 regs->r_gs = tp->tf_gs;
2222 regs->r_fs = tp->tf_fs;
2223 regs->r_es = tp->tf_es;
2224 regs->r_ds = tp->tf_ds;
2225 regs->r_edi = tp->tf_edi;
2226 regs->r_esi = tp->tf_esi;
2227 regs->r_ebp = tp->tf_ebp;
2228 regs->r_ebx = tp->tf_ebx;
2229 regs->r_edx = tp->tf_edx;
2230 regs->r_ecx = tp->tf_ecx;
2231 regs->r_eax = tp->tf_eax;
2232 regs->r_eip = tp->tf_eip;
2233 regs->r_cs = tp->tf_cs;
2234 regs->r_eflags = tp->tf_eflags;
2235 regs->r_esp = tp->tf_esp;
2236 regs->r_ss = tp->tf_ss;
2237 pcb = lp->lwp_thread->td_pcb;
2242 set_regs(struct lwp *lp, struct reg *regs)
2245 struct trapframe *tp;
2247 tp = lp->lwp_md.md_regs;
2248 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2249 !CS_SECURE(regs->r_cs))
2251 tp->tf_gs = regs->r_gs;
2252 tp->tf_fs = regs->r_fs;
2253 tp->tf_es = regs->r_es;
2254 tp->tf_ds = regs->r_ds;
2255 tp->tf_edi = regs->r_edi;
2256 tp->tf_esi = regs->r_esi;
2257 tp->tf_ebp = regs->r_ebp;
2258 tp->tf_ebx = regs->r_ebx;
2259 tp->tf_edx = regs->r_edx;
2260 tp->tf_ecx = regs->r_ecx;
2261 tp->tf_eax = regs->r_eax;
2262 tp->tf_eip = regs->r_eip;
2263 tp->tf_cs = regs->r_cs;
2264 tp->tf_eflags = regs->r_eflags;
2265 tp->tf_esp = regs->r_esp;
2266 tp->tf_ss = regs->r_ss;
2267 pcb = lp->lwp_thread->td_pcb;
2271 #ifndef CPU_DISABLE_SSE
2273 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2275 struct env87 *penv_87 = &sv_87->sv_env;
2276 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2279 /* FPU control/status */
2280 penv_87->en_cw = penv_xmm->en_cw;
2281 penv_87->en_sw = penv_xmm->en_sw;
2282 penv_87->en_tw = penv_xmm->en_tw;
2283 penv_87->en_fip = penv_xmm->en_fip;
2284 penv_87->en_fcs = penv_xmm->en_fcs;
2285 penv_87->en_opcode = penv_xmm->en_opcode;
2286 penv_87->en_foo = penv_xmm->en_foo;
2287 penv_87->en_fos = penv_xmm->en_fos;
2290 for (i = 0; i < 8; ++i)
2291 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2293 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2297 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2299 struct env87 *penv_87 = &sv_87->sv_env;
2300 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2303 /* FPU control/status */
2304 penv_xmm->en_cw = penv_87->en_cw;
2305 penv_xmm->en_sw = penv_87->en_sw;
2306 penv_xmm->en_tw = penv_87->en_tw;
2307 penv_xmm->en_fip = penv_87->en_fip;
2308 penv_xmm->en_fcs = penv_87->en_fcs;
2309 penv_xmm->en_opcode = penv_87->en_opcode;
2310 penv_xmm->en_foo = penv_87->en_foo;
2311 penv_xmm->en_fos = penv_87->en_fos;
2314 for (i = 0; i < 8; ++i)
2315 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2317 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2319 #endif /* CPU_DISABLE_SSE */
2322 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2324 #ifndef CPU_DISABLE_SSE
2326 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2327 (struct save87 *)fpregs);
2330 #endif /* CPU_DISABLE_SSE */
2331 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2336 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2338 #ifndef CPU_DISABLE_SSE
2340 set_fpregs_xmm((struct save87 *)fpregs,
2341 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2344 #endif /* CPU_DISABLE_SSE */
2345 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2350 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2353 dbregs->dr0 = rdr0();
2354 dbregs->dr1 = rdr1();
2355 dbregs->dr2 = rdr2();
2356 dbregs->dr3 = rdr3();
2357 dbregs->dr4 = rdr4();
2358 dbregs->dr5 = rdr5();
2359 dbregs->dr6 = rdr6();
2360 dbregs->dr7 = rdr7();
2364 pcb = lp->lwp_thread->td_pcb;
2365 dbregs->dr0 = pcb->pcb_dr0;
2366 dbregs->dr1 = pcb->pcb_dr1;
2367 dbregs->dr2 = pcb->pcb_dr2;
2368 dbregs->dr3 = pcb->pcb_dr3;
2371 dbregs->dr6 = pcb->pcb_dr6;
2372 dbregs->dr7 = pcb->pcb_dr7;
2378 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2381 load_dr0(dbregs->dr0);
2382 load_dr1(dbregs->dr1);
2383 load_dr2(dbregs->dr2);
2384 load_dr3(dbregs->dr3);
2385 load_dr4(dbregs->dr4);
2386 load_dr5(dbregs->dr5);
2387 load_dr6(dbregs->dr6);
2388 load_dr7(dbregs->dr7);
2391 struct ucred *ucred;
2393 uint32_t mask1, mask2;
2396 * Don't let an illegal value for dr7 get set. Specifically,
2397 * check for undefined settings. Setting these bit patterns
2398 * result in undefined behaviour and can lead to an unexpected
2401 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2402 i++, mask1 <<= 2, mask2 <<= 2)
2403 if ((dbregs->dr7 & mask1) == mask2)
2406 pcb = lp->lwp_thread->td_pcb;
2407 ucred = lp->lwp_proc->p_ucred;
2410 * Don't let a process set a breakpoint that is not within the
2411 * process's address space. If a process could do this, it
2412 * could halt the system by setting a breakpoint in the kernel
2413 * (if ddb was enabled). Thus, we need to check to make sure
2414 * that no breakpoints are being enabled for addresses outside
2415 * process's address space, unless, perhaps, we were called by
2418 * XXX - what about when the watched area of the user's
2419 * address space is written into from within the kernel
2420 * ... wouldn't that still cause a breakpoint to be generated
2421 * from within kernel mode?
2424 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2425 if (dbregs->dr7 & 0x3) {
2426 /* dr0 is enabled */
2427 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2431 if (dbregs->dr7 & (0x3<<2)) {
2432 /* dr1 is enabled */
2433 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2437 if (dbregs->dr7 & (0x3<<4)) {
2438 /* dr2 is enabled */
2439 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2443 if (dbregs->dr7 & (0x3<<6)) {
2444 /* dr3 is enabled */
2445 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2450 pcb->pcb_dr0 = dbregs->dr0;
2451 pcb->pcb_dr1 = dbregs->dr1;
2452 pcb->pcb_dr2 = dbregs->dr2;
2453 pcb->pcb_dr3 = dbregs->dr3;
2454 pcb->pcb_dr6 = dbregs->dr6;
2455 pcb->pcb_dr7 = dbregs->dr7;
2457 pcb->pcb_flags |= PCB_DBREGS;
2464 * Return > 0 if a hardware breakpoint has been hit, and the
2465 * breakpoint was in user space. Return 0, otherwise.
2468 user_dbreg_trap(void)
2470 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2471 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2472 int nbp; /* number of breakpoints that triggered */
2473 caddr_t addr[4]; /* breakpoint addresses */
2477 if ((dr7 & 0x000000ff) == 0) {
2479 * all GE and LE bits in the dr7 register are zero,
2480 * thus the trap couldn't have been caused by the
2481 * hardware debug registers
2488 bp = dr6 & 0x0000000f;
2492 * None of the breakpoint bits are set meaning this
2493 * trap was not caused by any of the debug registers
2499 * at least one of the breakpoints were hit, check to see
2500 * which ones and if any of them are user space addresses
2504 addr[nbp++] = (caddr_t)rdr0();
2507 addr[nbp++] = (caddr_t)rdr1();
2510 addr[nbp++] = (caddr_t)rdr2();
2513 addr[nbp++] = (caddr_t)rdr3();
2516 for (i=0; i<nbp; i++) {
2518 (caddr_t)VM_MAX_USER_ADDRESS) {
2520 * addr[i] is in user space
2527 * None of the breakpoints are in user space.
2535 Debugger(const char *msg)
2537 kprintf("Debugger(\"%s\") called.\n", msg);
2544 * Provide inb() and outb() as functions. They are normally only
2545 * available as macros calling inlined functions, thus cannot be
2546 * called inside DDB.
2548 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2554 /* silence compiler warnings */
2556 void outb(u_int, u_char);
2563 * We use %%dx and not %1 here because i/o is done at %dx and not at
2564 * %edx, while gcc generates inferior code (movw instead of movl)
2565 * if we tell it to load (u_short) port.
2567 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2572 outb(u_int port, u_char data)
2576 * Use an unnecessary assignment to help gcc's register allocator.
2577 * This make a large difference for gcc-1.40 and a tiny difference
2578 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2579 * best results. gcc-2.6.0 can't handle this.
2582 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2589 #include "opt_cpu.h"
2593 * initialize all the SMP locks
2596 /* critical region when masking or unmasking interupts */
2597 struct spinlock_deprecated imen_spinlock;
2599 /* Make FAST_INTR() routines sequential */
2600 struct spinlock_deprecated fast_intr_spinlock;
2602 /* critical region for old style disable_intr/enable_intr */
2603 struct spinlock_deprecated mpintr_spinlock;
2605 /* critical region around INTR() routines */
2606 struct spinlock_deprecated intr_spinlock;
2608 /* lock region used by kernel profiling */
2609 struct spinlock_deprecated mcount_spinlock;
2611 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2612 struct spinlock_deprecated com_spinlock;
2614 /* locks kernel kprintfs */
2615 struct spinlock_deprecated cons_spinlock;
2617 /* lock regions around the clock hardware */
2618 struct spinlock_deprecated clock_spinlock;
2620 /* lock around the MP rendezvous */
2621 struct spinlock_deprecated smp_rv_spinlock;
2627 * mp_lock = 0; BSP already owns the MP lock
2630 * Get the initial mp_lock with a count of 1 for the BSP.
2631 * This uses a LOGICAL cpu ID, ie BSP == 0.
2634 cpu_get_initial_mplock();
2637 spin_lock_init(&mcount_spinlock);
2638 spin_lock_init(&fast_intr_spinlock);
2639 spin_lock_init(&intr_spinlock);
2640 spin_lock_init(&mpintr_spinlock);
2641 spin_lock_init(&imen_spinlock);
2642 spin_lock_init(&smp_rv_spinlock);
2643 spin_lock_init(&com_spinlock);
2644 spin_lock_init(&clock_spinlock);
2645 spin_lock_init(&cons_spinlock);
2647 /* our token pool needs to work early */
2648 lwkt_token_pool_init();