2 * Copyright (c) 2007-2009
3 * Damien Bergamini <damien.bergamini@free.fr>
5 * Benjamin Close <benjsc@FreeBSD.org>
6 * Copyright (c) 2008 Sam Leffler, Errno Consulting
8 * Permission to use, copy, modify, and distribute this software for any
9 * purpose with or without fee is hereby granted, provided that the above
10 * copyright notice and this permission notice appear in all copies.
12 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
22 * Driver for Intel WiFi Link 4965 and 1000/5000/6000 Series 802.11 network
28 #include <sys/param.h>
29 #include <sys/sockio.h>
30 #include <sys/sysctl.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
38 #include <sys/endian.h>
39 #include <sys/firmware.h>
40 #include <sys/limits.h>
41 #include <sys/module.h>
42 #include <sys/queue.h>
43 #include <sys/taskqueue.h>
44 #include <sys/libkern.h>
47 #include <sys/resource.h>
48 #include <machine/clock.h>
50 #include <bus/pci/pcireg.h>
51 #include <bus/pci/pcivar.h>
55 #include <net/if_arp.h>
56 #include <net/ifq_var.h>
57 #include <net/ethernet.h>
58 #include <net/if_dl.h>
59 #include <net/if_media.h>
60 #include <net/if_types.h>
62 #include <netinet/in.h>
63 #include <netinet/in_systm.h>
64 #include <netinet/in_var.h>
65 #include <netinet/if_ether.h>
66 #include <netinet/ip.h>
68 #include <netproto/802_11/ieee80211_var.h>
69 #include <netproto/802_11/ieee80211_radiotap.h>
70 #include <netproto/802_11/ieee80211_regdomain.h>
71 #include <netproto/802_11/ieee80211_ratectl.h>
73 #include "if_iwnreg.h"
74 #include "if_iwnvar.h"
76 static int iwn_pci_probe(device_t);
77 static int iwn_pci_attach(device_t);
78 static const struct iwn_hal *iwn_hal_attach(struct iwn_softc *);
79 static void iwn_radiotap_attach(struct iwn_softc *);
80 static struct ieee80211vap *iwn_vap_create(struct ieee80211com *,
81 const char name[IFNAMSIZ], int unit, int opmode,
82 int flags, const uint8_t bssid[IEEE80211_ADDR_LEN],
83 const uint8_t mac[IEEE80211_ADDR_LEN]);
84 static void iwn_vap_delete(struct ieee80211vap *);
85 static int iwn_cleanup(device_t);
86 static int iwn_pci_detach(device_t);
87 static int iwn_nic_lock(struct iwn_softc *);
88 static int iwn_eeprom_lock(struct iwn_softc *);
89 static int iwn_init_otprom(struct iwn_softc *);
90 static int iwn_read_prom_data(struct iwn_softc *, uint32_t, void *, int);
91 static void iwn_dma_map_addr(void *, bus_dma_segment_t *, int, int);
92 static int iwn_dma_contig_alloc(struct iwn_softc *, struct iwn_dma_info *,
93 void **, bus_size_t, bus_size_t, int);
94 static void iwn_dma_contig_free(struct iwn_dma_info *);
95 static int iwn_alloc_sched(struct iwn_softc *);
96 static void iwn_free_sched(struct iwn_softc *);
97 static int iwn_alloc_kw(struct iwn_softc *);
98 static void iwn_free_kw(struct iwn_softc *);
99 static int iwn_alloc_ict(struct iwn_softc *);
100 static void iwn_free_ict(struct iwn_softc *);
101 static int iwn_alloc_fwmem(struct iwn_softc *);
102 static void iwn_free_fwmem(struct iwn_softc *);
103 static int iwn_alloc_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
104 static void iwn_reset_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
105 static void iwn_free_rx_ring(struct iwn_softc *, struct iwn_rx_ring *);
106 static int iwn_alloc_tx_ring(struct iwn_softc *, struct iwn_tx_ring *,
108 static void iwn_reset_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
109 static void iwn_free_tx_ring(struct iwn_softc *, struct iwn_tx_ring *);
110 static void iwn5000_ict_reset(struct iwn_softc *);
111 static int iwn_read_eeprom(struct iwn_softc *,
112 uint8_t macaddr[IEEE80211_ADDR_LEN]);
113 static void iwn4965_read_eeprom(struct iwn_softc *);
114 static void iwn4965_print_power_group(struct iwn_softc *, int);
115 static void iwn5000_read_eeprom(struct iwn_softc *);
116 static uint32_t iwn_eeprom_channel_flags(struct iwn_eeprom_chan *);
117 static void iwn_read_eeprom_band(struct iwn_softc *, int);
119 static void iwn_read_eeprom_ht40(struct iwn_softc *, int);
121 static void iwn_read_eeprom_channels(struct iwn_softc *, int,
123 static void iwn_read_eeprom_enhinfo(struct iwn_softc *);
124 static struct ieee80211_node *iwn_node_alloc(struct ieee80211vap *,
125 const uint8_t mac[IEEE80211_ADDR_LEN]);
126 static void iwn_newassoc(struct ieee80211_node *, int);
127 static int iwn_media_change(struct ifnet *);
128 static int iwn_newstate(struct ieee80211vap *, enum ieee80211_state, int);
129 static void iwn_rx_phy(struct iwn_softc *, struct iwn_rx_desc *,
130 struct iwn_rx_data *);
131 static void iwn_timer_callout(void *);
132 static void iwn_calib_reset(struct iwn_softc *);
133 static void iwn_rx_done(struct iwn_softc *, struct iwn_rx_desc *,
134 struct iwn_rx_data *);
136 static void iwn_rx_compressed_ba(struct iwn_softc *, struct iwn_rx_desc *,
137 struct iwn_rx_data *);
139 static void iwn5000_rx_calib_results(struct iwn_softc *,
140 struct iwn_rx_desc *, struct iwn_rx_data *);
141 static void iwn_rx_statistics(struct iwn_softc *, struct iwn_rx_desc *,
142 struct iwn_rx_data *);
143 static void iwn4965_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
144 struct iwn_rx_data *);
145 static void iwn5000_tx_done(struct iwn_softc *, struct iwn_rx_desc *,
146 struct iwn_rx_data *);
147 static void iwn_tx_done(struct iwn_softc *, struct iwn_rx_desc *, int,
149 static void iwn_cmd_done(struct iwn_softc *, struct iwn_rx_desc *);
150 static void iwn_notif_intr(struct iwn_softc *);
151 static void iwn_wakeup_intr(struct iwn_softc *);
152 static void iwn_rftoggle_intr(struct iwn_softc *);
153 static void iwn_fatal_intr(struct iwn_softc *);
154 static void iwn_intr(void *);
155 static void iwn4965_update_sched(struct iwn_softc *, int, int, uint8_t,
157 static void iwn5000_update_sched(struct iwn_softc *, int, int, uint8_t,
160 static void iwn5000_reset_sched(struct iwn_softc *, int, int);
162 static uint8_t iwn_plcp_signal(int);
163 static int iwn_tx_data(struct iwn_softc *, struct mbuf *,
164 struct ieee80211_node *, struct iwn_tx_ring *);
165 static int iwn_raw_xmit(struct ieee80211_node *, struct mbuf *,
166 const struct ieee80211_bpf_params *);
167 static void iwn_start(struct ifnet *);
168 static void iwn_start_locked(struct ifnet *);
169 static void iwn_watchdog(struct iwn_softc *sc);
170 static int iwn_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
171 static int iwn_cmd(struct iwn_softc *, int, const void *, int, int);
172 static int iwn4965_add_node(struct iwn_softc *, struct iwn_node_info *,
174 static int iwn5000_add_node(struct iwn_softc *, struct iwn_node_info *,
176 static int iwn_set_link_quality(struct iwn_softc *, uint8_t, int);
177 static int iwn_add_broadcast_node(struct iwn_softc *, int);
178 static int iwn_wme_update(struct ieee80211com *);
179 static void iwn_update_mcast(struct ifnet *);
180 static void iwn_set_led(struct iwn_softc *, uint8_t, uint8_t, uint8_t);
181 static int iwn_set_critical_temp(struct iwn_softc *);
182 static int iwn_set_timing(struct iwn_softc *, struct ieee80211_node *);
183 static void iwn4965_power_calibration(struct iwn_softc *, int);
184 static int iwn4965_set_txpower(struct iwn_softc *,
185 struct ieee80211_channel *, int);
186 static int iwn5000_set_txpower(struct iwn_softc *,
187 struct ieee80211_channel *, int);
188 static int iwn4965_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
189 static int iwn5000_get_rssi(struct iwn_softc *, struct iwn_rx_stat *);
190 static int iwn_get_noise(const struct iwn_rx_general_stats *);
191 static int iwn4965_get_temperature(struct iwn_softc *);
192 static int iwn5000_get_temperature(struct iwn_softc *);
193 static int iwn_init_sensitivity(struct iwn_softc *);
194 static void iwn_collect_noise(struct iwn_softc *,
195 const struct iwn_rx_general_stats *);
196 static int iwn4965_init_gains(struct iwn_softc *);
197 static int iwn5000_init_gains(struct iwn_softc *);
198 static int iwn4965_set_gains(struct iwn_softc *);
199 static int iwn5000_set_gains(struct iwn_softc *);
200 static void iwn_tune_sensitivity(struct iwn_softc *,
201 const struct iwn_rx_stats *);
202 static int iwn_send_sensitivity(struct iwn_softc *);
203 static int iwn_set_pslevel(struct iwn_softc *, int, int, int);
204 static int iwn_config(struct iwn_softc *);
205 static int iwn_scan(struct iwn_softc *);
206 static int iwn_auth(struct iwn_softc *, struct ieee80211vap *vap);
207 static int iwn_run(struct iwn_softc *, struct ieee80211vap *vap);
209 static int iwn_ampdu_rx_start(struct ieee80211com *,
210 struct ieee80211_node *, uint8_t);
211 static void iwn_ampdu_rx_stop(struct ieee80211com *,
212 struct ieee80211_node *, uint8_t);
213 static int iwn_ampdu_tx_start(struct ieee80211com *,
214 struct ieee80211_node *, uint8_t);
215 static void iwn_ampdu_tx_stop(struct ieee80211com *,
216 struct ieee80211_node *, uint8_t);
217 static void iwn4965_ampdu_tx_start(struct iwn_softc *,
218 struct ieee80211_node *, uint8_t, uint16_t);
219 static void iwn4965_ampdu_tx_stop(struct iwn_softc *, uint8_t, uint16_t);
220 static void iwn5000_ampdu_tx_start(struct iwn_softc *,
221 struct ieee80211_node *, uint8_t, uint16_t);
222 static void iwn5000_ampdu_tx_stop(struct iwn_softc *, uint8_t, uint16_t);
224 static int iwn5000_query_calibration(struct iwn_softc *);
225 static int iwn5000_send_calibration(struct iwn_softc *);
226 static int iwn5000_send_wimax_coex(struct iwn_softc *);
227 static int iwn4965_post_alive(struct iwn_softc *);
228 static int iwn5000_post_alive(struct iwn_softc *);
229 static int iwn4965_load_bootcode(struct iwn_softc *, const uint8_t *,
231 static int iwn4965_load_firmware(struct iwn_softc *);
232 static int iwn5000_load_firmware_section(struct iwn_softc *, uint32_t,
233 const uint8_t *, int);
234 static int iwn5000_load_firmware(struct iwn_softc *);
235 static int iwn_read_firmware(struct iwn_softc *);
236 static int iwn_clock_wait(struct iwn_softc *);
237 static int iwn_apm_init(struct iwn_softc *);
238 static void iwn_apm_stop_master(struct iwn_softc *);
239 static void iwn_apm_stop(struct iwn_softc *);
240 static int iwn4965_nic_config(struct iwn_softc *);
241 static int iwn5000_nic_config(struct iwn_softc *);
242 static int iwn_hw_prepare(struct iwn_softc *);
243 static int iwn_hw_init(struct iwn_softc *);
244 static void iwn_hw_stop(struct iwn_softc *);
245 static void iwn_init_locked(struct iwn_softc *);
246 static void iwn_init(void *);
247 static void iwn_stop_locked(struct iwn_softc *);
248 static void iwn_stop(struct iwn_softc *);
249 static void iwn_scan_start(struct ieee80211com *);
250 static void iwn_scan_end(struct ieee80211com *);
251 static void iwn_set_channel(struct ieee80211com *);
252 static void iwn_scan_curchan(struct ieee80211_scan_state *, unsigned long);
253 static void iwn_scan_mindwell(struct ieee80211_scan_state *);
254 static struct iwn_eeprom_chan *iwn_find_eeprom_channel(struct iwn_softc *,
255 struct ieee80211_channel *);
256 static int iwn_setregdomain(struct ieee80211com *,
257 struct ieee80211_regdomain *, int,
258 struct ieee80211_channel []);
259 static void iwn_hw_reset_task(void *, int);
260 static void iwn_radio_on_task(void *, int);
261 static void iwn_radio_off_task(void *, int);
262 static void iwn_sysctlattach(struct iwn_softc *);
263 static int iwn_pci_shutdown(device_t);
264 static int iwn_pci_suspend(device_t);
265 static int iwn_pci_resume(device_t);
270 IWN_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
271 IWN_DEBUG_RECV = 0x00000002, /* basic recv operation */
272 IWN_DEBUG_STATE = 0x00000004, /* 802.11 state transitions */
273 IWN_DEBUG_TXPOW = 0x00000008, /* tx power processing */
274 IWN_DEBUG_RESET = 0x00000010, /* reset processing */
275 IWN_DEBUG_OPS = 0x00000020, /* iwn_ops processing */
276 IWN_DEBUG_BEACON = 0x00000040, /* beacon handling */
277 IWN_DEBUG_WATCHDOG = 0x00000080, /* watchdog timeout */
278 IWN_DEBUG_INTR = 0x00000100, /* ISR */
279 IWN_DEBUG_CALIBRATE = 0x00000200, /* periodic calibration */
280 IWN_DEBUG_NODE = 0x00000400, /* node management */
281 IWN_DEBUG_LED = 0x00000800, /* led management */
282 IWN_DEBUG_CMD = 0x00001000, /* cmd submission */
283 IWN_DEBUG_FATAL = 0x80000000, /* fatal errors */
284 IWN_DEBUG_ANY = 0xffffffff
287 #define DPRINTF(sc, m, fmt, ...) do { \
288 if (sc->sc_debug & (m)) \
289 kprintf(fmt, __VA_ARGS__); \
292 static const char *iwn_intr_str(uint8_t);
294 #define DPRINTF(sc, m, fmt, ...) do { (void) sc; } while (0)
303 static const struct iwn_ident iwn_ident_table [] = {
304 { 0x8086, 0x4229, "Intel(R) PRO/Wireless 4965BGN" },
305 { 0x8086, 0x422D, "Intel(R) PRO/Wireless 4965BGN" },
306 { 0x8086, 0x4230, "Intel(R) PRO/Wireless 4965BGN" },
307 { 0x8086, 0x4233, "Intel(R) PRO/Wireless 4965BGN" },
308 { 0x8086, 0x4232, "Intel(R) PRO/Wireless 5100" },
309 { 0x8086, 0x4237, "Intel(R) PRO/Wireless 5100" },
310 { 0x8086, 0x423C, "Intel(R) PRO/Wireless 5150" },
311 { 0x8086, 0x423D, "Intel(R) PRO/Wireless 5150" },
312 { 0x8086, 0x4235, "Intel(R) PRO/Wireless 5300" },
313 { 0x8086, 0x4236, "Intel(R) PRO/Wireless 5300" },
314 { 0x8086, 0x423A, "Intel(R) PRO/Wireless 5350" },
315 { 0x8086, 0x423B, "Intel(R) PRO/Wireless 5350" },
316 { 0x8086, 0x0083, "Intel(R) PRO/Wireless 1000" },
317 { 0x8086, 0x0084, "Intel(R) PRO/Wireless 1000" },
318 { 0x8086, 0x008D, "Intel(R) PRO/Wireless 6000" },
319 { 0x8086, 0x008E, "Intel(R) PRO/Wireless 6000" },
320 { 0x8086, 0x4238, "Intel(R) PRO/Wireless 6000" },
321 { 0x8086, 0x4239, "Intel(R) PRO/Wireless 6000" },
322 { 0x8086, 0x422B, "Intel(R) PRO/Wireless 6000" },
323 { 0x8086, 0x422C, "Intel(R) PRO/Wireless 6000" },
324 { 0x8086, 0x0086, "Intel(R) PRO/Wireless 6050" },
325 { 0x8086, 0x0087, "Intel(R) PRO/Wireless 6050" },
329 static const struct iwn_hal iwn4965_hal = {
330 iwn4965_load_firmware,
334 iwn4965_update_sched,
335 iwn4965_get_temperature,
343 iwn4965_ampdu_tx_start,
344 iwn4965_ampdu_tx_stop,
348 IWN4965_ID_BROADCAST,
351 IWN4965_FW_TEXT_MAXSZ,
352 IWN4965_FW_DATA_MAXSZ,
357 static const struct iwn_hal iwn5000_hal = {
358 iwn5000_load_firmware,
362 iwn5000_update_sched,
363 iwn5000_get_temperature,
371 iwn5000_ampdu_tx_start,
372 iwn5000_ampdu_tx_stop,
376 IWN5000_ID_BROADCAST,
379 IWN5000_FW_TEXT_MAXSZ,
380 IWN5000_FW_DATA_MAXSZ,
386 iwn_pci_probe(device_t dev)
388 const struct iwn_ident *ident;
390 /* no wlan serializer needed */
391 for (ident = iwn_ident_table; ident->name != NULL; ident++) {
392 if (pci_get_vendor(dev) == ident->vendor &&
393 pci_get_device(dev) == ident->device) {
394 device_set_desc(dev, ident->name);
402 iwn_pci_attach(device_t dev)
404 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
405 struct ieee80211com *ic;
407 const struct iwn_hal *hal;
409 int i, error, result;
410 uint8_t macaddr[IEEE80211_ADDR_LEN];
412 wlan_serialize_enter();
417 if (bus_dma_tag_create(sc->sc_dmat,
419 BUS_SPACE_MAXADDR_32BIT,
427 device_printf(dev, "cannot allocate DMA tag\n");
434 /* prepare sysctl tree for use in sub modules */
435 sysctl_ctx_init(&sc->sc_sysctl_ctx);
436 sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
437 SYSCTL_STATIC_CHILDREN(_hw),
439 device_get_nameunit(sc->sc_dev),
443 * Get the offset of the PCI Express Capability Structure in PCI
444 * Configuration Space.
446 error = pci_find_extcap(dev, PCIY_EXPRESS, &sc->sc_cap_off);
448 device_printf(dev, "PCIe capability structure not found!\n");
452 /* Clear device-specific "PCI retry timeout" register (41h). */
453 pci_write_config(dev, 0x41, 0, 1);
455 /* Hardware bug workaround. */
456 tmp = pci_read_config(dev, PCIR_COMMAND, 1);
457 if (tmp & PCIM_CMD_INTxDIS) {
458 DPRINTF(sc, IWN_DEBUG_RESET, "%s: PCIe INTx Disable set\n",
460 tmp &= ~PCIM_CMD_INTxDIS;
461 pci_write_config(dev, PCIR_COMMAND, tmp, 1);
464 /* Enable bus-mastering. */
465 pci_enable_busmaster(dev);
467 sc->mem_rid = PCIR_BAR(0);
468 sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->mem_rid,
470 if (sc->mem == NULL ) {
471 device_printf(dev, "could not allocate memory resources\n");
476 sc->sc_st = rman_get_bustag(sc->mem);
477 sc->sc_sh = rman_get_bushandle(sc->mem);
479 if ((result = pci_msi_count(dev)) == 1 &&
480 pci_alloc_msi(dev, &result) == 0)
482 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
483 RF_ACTIVE | RF_SHAREABLE);
484 if (sc->irq == NULL) {
485 device_printf(dev, "could not allocate interrupt resource\n");
490 callout_init(&sc->sc_timer_to);
491 TASK_INIT(&sc->sc_reinit_task, 0, iwn_hw_reset_task, sc );
492 TASK_INIT(&sc->sc_radioon_task, 0, iwn_radio_on_task, sc );
493 TASK_INIT(&sc->sc_radiooff_task, 0, iwn_radio_off_task, sc );
495 /* Attach Hardware Abstraction Layer. */
496 hal = iwn_hal_attach(sc);
498 error = ENXIO; /* XXX: Wrong error code? */
502 error = iwn_hw_prepare(sc);
504 device_printf(dev, "hardware not ready, error %d\n", error);
508 /* Allocate DMA memory for firmware transfers. */
509 error = iwn_alloc_fwmem(sc);
512 "could not allocate memory for firmware, error %d\n",
517 /* Allocate "Keep Warm" page. */
518 error = iwn_alloc_kw(sc);
521 "could not allocate \"Keep Warm\" page, error %d\n", error);
525 /* Allocate ICT table for 5000 Series. */
526 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
527 (error = iwn_alloc_ict(sc)) != 0) {
529 "%s: could not allocate ICT table, error %d\n",
534 /* Allocate TX scheduler "rings". */
535 error = iwn_alloc_sched(sc);
538 "could not allocate TX scheduler rings, error %d\n",
543 /* Allocate TX rings (16 on 4965AGN, 20 on 5000). */
544 for (i = 0; i < hal->ntxqs; i++) {
545 error = iwn_alloc_tx_ring(sc, &sc->txq[i], i);
548 "could not allocate Tx ring %d, error %d\n",
554 /* Allocate RX ring. */
555 error = iwn_alloc_rx_ring(sc, &sc->rxq);
558 "could not allocate Rx ring, error %d\n", error);
562 /* Clear pending interrupts. */
563 IWN_WRITE(sc, IWN_INT, 0xffffffff);
565 /* Count the number of available chains. */
567 ((sc->txchainmask >> 2) & 1) +
568 ((sc->txchainmask >> 1) & 1) +
569 ((sc->txchainmask >> 0) & 1);
571 ((sc->rxchainmask >> 2) & 1) +
572 ((sc->rxchainmask >> 1) & 1) +
573 ((sc->rxchainmask >> 0) & 1);
575 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
577 device_printf(dev, "can not allocate ifnet structure\n");
583 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
584 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
586 /* Set device capabilities. */
588 IEEE80211_C_STA /* station mode supported */
589 | IEEE80211_C_MONITOR /* monitor mode supported */
590 | IEEE80211_C_TXPMGT /* tx power management */
591 | IEEE80211_C_SHSLOT /* short slot time supported */
593 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
594 | IEEE80211_C_BGSCAN /* background scanning */
596 | IEEE80211_C_IBSS /* ibss/adhoc mode */
598 | IEEE80211_C_WME /* WME */
601 /* XXX disable until HT channel setup works */
603 IEEE80211_HTCAP_SMPS_ENA /* SM PS mode enabled */
604 | IEEE80211_HTCAP_CHWIDTH40 /* 40MHz channel width */
605 | IEEE80211_HTCAP_SHORTGI20 /* short GI in 20MHz */
606 | IEEE80211_HTCAP_SHORTGI40 /* short GI in 40MHz */
607 | IEEE80211_HTCAP_RXSTBC_2STREAM/* 1-2 spatial streams */
608 | IEEE80211_HTCAP_MAXAMSDU_3839 /* max A-MSDU length */
609 /* s/w capabilities */
610 | IEEE80211_HTC_HT /* HT operation */
611 | IEEE80211_HTC_AMPDU /* tx A-MPDU */
612 | IEEE80211_HTC_AMSDU /* tx A-MSDU */
615 /* Set HT capabilities. */
617 #if IWN_RBUF_SIZE == 8192
618 IEEE80211_HTCAP_AMSDU7935 |
620 IEEE80211_HTCAP_CBW20_40 |
621 IEEE80211_HTCAP_SGI20 |
622 IEEE80211_HTCAP_SGI40;
623 if (sc->hw_type != IWN_HW_REV_TYPE_4965)
624 ic->ic_htcaps |= IEEE80211_HTCAP_GF;
625 if (sc->hw_type == IWN_HW_REV_TYPE_6050)
626 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DYN;
628 ic->ic_htcaps |= IEEE80211_HTCAP_SMPS_DIS;
631 /* Read MAC address, channels, etc from EEPROM. */
632 error = iwn_read_eeprom(sc, macaddr);
634 device_printf(dev, "could not read EEPROM, error %d\n",
639 device_printf(sc->sc_dev, "MIMO %dT%dR, %.4s, address %6D\n",
640 sc->ntxchains, sc->nrxchains, sc->eeprom_domain,
644 /* Set supported HT rates. */
645 ic->ic_sup_mcs[0] = 0xff;
646 if (sc->nrxchains > 1)
647 ic->ic_sup_mcs[1] = 0xff;
648 if (sc->nrxchains > 2)
649 ic->ic_sup_mcs[2] = 0xff;
652 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
654 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
655 ifp->if_init = iwn_init;
656 ifp->if_ioctl = iwn_ioctl;
657 ifp->if_start = iwn_start;
658 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
659 ifq_set_ready(&ifp->if_snd);
661 ieee80211_ifattach(ic, macaddr);
662 ic->ic_vap_create = iwn_vap_create;
663 ic->ic_vap_delete = iwn_vap_delete;
664 ic->ic_raw_xmit = iwn_raw_xmit;
665 ic->ic_node_alloc = iwn_node_alloc;
666 ic->ic_newassoc = iwn_newassoc;
667 ic->ic_wme.wme_update = iwn_wme_update;
668 ic->ic_update_mcast = iwn_update_mcast;
669 ic->ic_scan_start = iwn_scan_start;
670 ic->ic_scan_end = iwn_scan_end;
671 ic->ic_set_channel = iwn_set_channel;
672 ic->ic_scan_curchan = iwn_scan_curchan;
673 ic->ic_scan_mindwell = iwn_scan_mindwell;
674 ic->ic_setregdomain = iwn_setregdomain;
676 ic->ic_ampdu_rx_start = iwn_ampdu_rx_start;
677 ic->ic_ampdu_rx_stop = iwn_ampdu_rx_stop;
678 ic->ic_ampdu_tx_start = iwn_ampdu_tx_start;
679 ic->ic_ampdu_tx_stop = iwn_ampdu_tx_stop;
682 iwn_radiotap_attach(sc);
683 iwn_sysctlattach(sc);
686 * Hook our interrupt after all initialization is complete.
688 error = bus_setup_intr(dev, sc->irq, INTR_MPSAFE,
689 iwn_intr, sc, &sc->sc_ih,
690 &wlan_global_serializer);
692 device_printf(dev, "could not set up interrupt, error %d\n",
697 ieee80211_announce(ic);
698 wlan_serialize_exit();
703 wlan_serialize_exit();
707 static const struct iwn_hal *
708 iwn_hal_attach(struct iwn_softc *sc)
710 sc->hw_type = (IWN_READ(sc, IWN_HW_REV) >> 4) & 0xf;
712 switch (sc->hw_type) {
713 case IWN_HW_REV_TYPE_4965:
714 sc->sc_hal = &iwn4965_hal;
715 sc->limits = &iwn4965_sensitivity_limits;
716 sc->fwname = "iwn4965fw";
717 sc->txchainmask = IWN_ANT_AB;
718 sc->rxchainmask = IWN_ANT_ABC;
720 case IWN_HW_REV_TYPE_5100:
721 sc->sc_hal = &iwn5000_hal;
722 sc->limits = &iwn5000_sensitivity_limits;
723 sc->fwname = "iwn5000fw";
724 sc->txchainmask = IWN_ANT_B;
725 sc->rxchainmask = IWN_ANT_AB;
727 case IWN_HW_REV_TYPE_5150:
728 sc->sc_hal = &iwn5000_hal;
729 sc->limits = &iwn5150_sensitivity_limits;
730 sc->fwname = "iwn5150fw";
731 sc->txchainmask = IWN_ANT_A;
732 sc->rxchainmask = IWN_ANT_AB;
734 case IWN_HW_REV_TYPE_5300:
735 case IWN_HW_REV_TYPE_5350:
736 sc->sc_hal = &iwn5000_hal;
737 sc->limits = &iwn5000_sensitivity_limits;
738 sc->fwname = "iwn5000fw";
739 sc->txchainmask = IWN_ANT_ABC;
740 sc->rxchainmask = IWN_ANT_ABC;
742 case IWN_HW_REV_TYPE_1000:
743 sc->sc_hal = &iwn5000_hal;
744 sc->limits = &iwn1000_sensitivity_limits;
745 sc->fwname = "iwn1000fw";
746 sc->txchainmask = IWN_ANT_A;
747 sc->rxchainmask = IWN_ANT_AB;
749 case IWN_HW_REV_TYPE_6000:
750 sc->sc_hal = &iwn5000_hal;
751 sc->limits = &iwn6000_sensitivity_limits;
752 sc->fwname = "iwn6000fw";
753 switch (pci_get_device(sc->sc_dev)) {
756 sc->sc_flags |= IWN_FLAG_INTERNAL_PA;
757 sc->txchainmask = IWN_ANT_BC;
758 sc->rxchainmask = IWN_ANT_BC;
761 sc->txchainmask = IWN_ANT_ABC;
762 sc->rxchainmask = IWN_ANT_ABC;
766 case IWN_HW_REV_TYPE_6050:
767 sc->sc_hal = &iwn5000_hal;
768 sc->limits = &iwn6000_sensitivity_limits;
769 sc->fwname = "iwn6000fw";
770 sc->txchainmask = IWN_ANT_AB;
771 sc->rxchainmask = IWN_ANT_AB;
774 device_printf(sc->sc_dev, "adapter type %d not supported\n",
782 * Attach the interface to 802.11 radiotap.
785 iwn_radiotap_attach(struct iwn_softc *sc)
787 struct ifnet *ifp = sc->sc_ifp;
788 struct ieee80211com *ic = ifp->if_l2com;
790 ieee80211_radiotap_attach(ic,
791 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
792 IWN_TX_RADIOTAP_PRESENT,
793 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
794 IWN_RX_RADIOTAP_PRESENT);
797 static struct ieee80211vap *
798 iwn_vap_create(struct ieee80211com *ic,
799 const char name[IFNAMSIZ], int unit, int opmode, int flags,
800 const uint8_t bssid[IEEE80211_ADDR_LEN],
801 const uint8_t mac[IEEE80211_ADDR_LEN])
804 struct ieee80211vap *vap;
806 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */
808 ivp = (struct iwn_vap *) kmalloc(sizeof(struct iwn_vap),
809 M_80211_VAP, M_INTWAIT | M_ZERO);
813 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
814 vap->iv_bmissthreshold = 10; /* override default */
815 /* Override with driver methods. */
816 ivp->iv_newstate = vap->iv_newstate;
817 vap->iv_newstate = iwn_newstate;
819 ieee80211_ratectl_init(vap);
820 /* Complete setup. */
821 ieee80211_vap_attach(vap, iwn_media_change, ieee80211_media_status);
822 ic->ic_opmode = opmode;
827 iwn_vap_delete(struct ieee80211vap *vap)
829 struct iwn_vap *ivp = IWN_VAP(vap);
831 ieee80211_ratectl_deinit(vap);
832 ieee80211_vap_detach(vap);
833 kfree(ivp, M_80211_VAP);
837 iwn_cleanup(device_t dev)
839 struct iwn_softc *sc = device_get_softc(dev);
840 struct ifnet *ifp = sc->sc_ifp;
841 struct ieee80211com *ic;
847 ieee80211_draintask(ic, &sc->sc_reinit_task);
848 ieee80211_draintask(ic, &sc->sc_radioon_task);
849 ieee80211_draintask(ic, &sc->sc_radiooff_task);
852 callout_stop(&sc->sc_timer_to);
853 ieee80211_ifdetach(ic);
856 /* cleanup sysctl nodes */
857 sysctl_ctx_free(&sc->sc_sysctl_ctx);
859 /* Free DMA resources. */
860 iwn_free_rx_ring(sc, &sc->rxq);
861 if (sc->sc_hal != NULL)
862 for (i = 0; i < sc->sc_hal->ntxqs; i++)
863 iwn_free_tx_ring(sc, &sc->txq[i]);
866 if (sc->ict != NULL) {
872 if (sc->irq != NULL) {
873 bus_teardown_intr(dev, sc->irq, sc->sc_ih);
874 bus_release_resource(dev, SYS_RES_IRQ, sc->irq_rid, sc->irq);
875 if (sc->irq_rid == 1)
876 pci_release_msi(dev);
880 if (sc->mem != NULL) {
881 bus_release_resource(dev, SYS_RES_MEMORY, sc->mem_rid, sc->mem);
894 iwn_pci_detach(device_t dev)
896 struct iwn_softc *sc = (struct iwn_softc *)device_get_softc(dev);
898 wlan_serialize_enter();
900 bus_dma_tag_destroy(sc->sc_dmat);
901 wlan_serialize_exit();
907 iwn_nic_lock(struct iwn_softc *sc)
911 /* Request exclusive access to NIC. */
912 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
914 /* Spin until we actually get the lock. */
915 for (ntries = 0; ntries < 1000; ntries++) {
916 if ((IWN_READ(sc, IWN_GP_CNTRL) &
917 (IWN_GP_CNTRL_MAC_ACCESS_ENA | IWN_GP_CNTRL_SLEEP)) ==
918 IWN_GP_CNTRL_MAC_ACCESS_ENA)
926 iwn_nic_unlock(struct iwn_softc *sc)
928 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_MAC_ACCESS_REQ);
931 static __inline uint32_t
932 iwn_prph_read(struct iwn_softc *sc, uint32_t addr)
934 IWN_WRITE(sc, IWN_PRPH_RADDR, IWN_PRPH_DWORD | addr);
935 IWN_BARRIER_READ_WRITE(sc);
936 return IWN_READ(sc, IWN_PRPH_RDATA);
940 iwn_prph_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
942 IWN_WRITE(sc, IWN_PRPH_WADDR, IWN_PRPH_DWORD | addr);
943 IWN_BARRIER_WRITE(sc);
944 IWN_WRITE(sc, IWN_PRPH_WDATA, data);
948 iwn_prph_setbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
950 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
954 iwn_prph_clrbits(struct iwn_softc *sc, uint32_t addr, uint32_t mask)
956 iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
960 iwn_prph_write_region_4(struct iwn_softc *sc, uint32_t addr,
961 const uint32_t *data, int count)
963 for (; count > 0; count--, data++, addr += 4)
964 iwn_prph_write(sc, addr, *data);
967 static __inline uint32_t
968 iwn_mem_read(struct iwn_softc *sc, uint32_t addr)
970 IWN_WRITE(sc, IWN_MEM_RADDR, addr);
971 IWN_BARRIER_READ_WRITE(sc);
972 return IWN_READ(sc, IWN_MEM_RDATA);
976 iwn_mem_write(struct iwn_softc *sc, uint32_t addr, uint32_t data)
978 IWN_WRITE(sc, IWN_MEM_WADDR, addr);
979 IWN_BARRIER_WRITE(sc);
980 IWN_WRITE(sc, IWN_MEM_WDATA, data);
984 iwn_mem_write_2(struct iwn_softc *sc, uint32_t addr, uint16_t data)
988 tmp = iwn_mem_read(sc, addr & ~3);
990 tmp = (tmp & 0x0000ffff) | data << 16;
992 tmp = (tmp & 0xffff0000) | data;
993 iwn_mem_write(sc, addr & ~3, tmp);
997 iwn_mem_read_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t *data,
1000 for (; count > 0; count--, addr += 4)
1001 *data++ = iwn_mem_read(sc, addr);
1004 static __inline void
1005 iwn_mem_set_region_4(struct iwn_softc *sc, uint32_t addr, uint32_t val,
1008 for (; count > 0; count--, addr += 4)
1009 iwn_mem_write(sc, addr, val);
1013 iwn_eeprom_lock(struct iwn_softc *sc)
1017 for (i = 0; i < 100; i++) {
1018 /* Request exclusive access to EEPROM. */
1019 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
1020 IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1022 /* Spin until we actually get the lock. */
1023 for (ntries = 0; ntries < 100; ntries++) {
1024 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
1025 IWN_HW_IF_CONFIG_EEPROM_LOCKED)
1033 static __inline void
1034 iwn_eeprom_unlock(struct iwn_softc *sc)
1036 IWN_CLRBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_EEPROM_LOCKED);
1040 * Initialize access by host to One Time Programmable ROM.
1041 * NB: This kind of ROM can be found on 1000 or 6000 Series only.
1044 iwn_init_otprom(struct iwn_softc *sc)
1046 uint16_t prev, base, next;
1049 /* Wait for clock stabilization before accessing prph. */
1050 error = iwn_clock_wait(sc);
1054 error = iwn_nic_lock(sc);
1057 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1059 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_RESET_REQ);
1062 /* Set auto clock gate disable bit for HW with OTP shadow RAM. */
1063 if (sc->hw_type != IWN_HW_REV_TYPE_1000) {
1064 IWN_SETBITS(sc, IWN_DBG_LINK_PWR_MGMT,
1065 IWN_RESET_LINK_PWR_MGMT_DIS);
1067 IWN_CLRBITS(sc, IWN_EEPROM_GP, IWN_EEPROM_GP_IF_OWNER);
1068 /* Clear ECC status. */
1069 IWN_SETBITS(sc, IWN_OTP_GP,
1070 IWN_OTP_GP_ECC_CORR_STTS | IWN_OTP_GP_ECC_UNCORR_STTS);
1073 * Find the block before last block (contains the EEPROM image)
1074 * for HW without OTP shadow RAM.
1076 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
1077 /* Switch to absolute addressing mode. */
1078 IWN_CLRBITS(sc, IWN_OTP_GP, IWN_OTP_GP_RELATIVE_ACCESS);
1080 for (count = 0; count < IWN1000_OTP_NBLOCKS; count++) {
1081 error = iwn_read_prom_data(sc, base, &next, 2);
1084 if (next == 0) /* End of linked-list. */
1087 base = le16toh(next);
1089 if (count == 0 || count == IWN1000_OTP_NBLOCKS)
1091 /* Skip "next" word. */
1092 sc->prom_base = prev + 1;
1098 iwn_read_prom_data(struct iwn_softc *sc, uint32_t addr, void *data, int count)
1102 uint8_t *out = data;
1104 addr += sc->prom_base;
1105 for (; count > 0; count -= 2, addr++) {
1106 IWN_WRITE(sc, IWN_EEPROM, addr << 2);
1107 for (ntries = 0; ntries < 10; ntries++) {
1108 val = IWN_READ(sc, IWN_EEPROM);
1109 if (val & IWN_EEPROM_READ_VALID)
1114 device_printf(sc->sc_dev,
1115 "timeout reading ROM at 0x%x\n", addr);
1118 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1119 /* OTPROM, check for ECC errors. */
1120 tmp = IWN_READ(sc, IWN_OTP_GP);
1121 if (tmp & IWN_OTP_GP_ECC_UNCORR_STTS) {
1122 device_printf(sc->sc_dev,
1123 "OTPROM ECC error at 0x%x\n", addr);
1126 if (tmp & IWN_OTP_GP_ECC_CORR_STTS) {
1127 /* Correctable ECC error, clear bit. */
1128 IWN_SETBITS(sc, IWN_OTP_GP,
1129 IWN_OTP_GP_ECC_CORR_STTS);
1140 iwn_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
1144 KASSERT(nsegs == 1, ("too many DMA segments, %d should be 1", nsegs));
1145 *(bus_addr_t *)arg = segs[0].ds_addr;
1149 iwn_dma_contig_alloc(struct iwn_softc *sc, struct iwn_dma_info *dma,
1150 void **kvap, bus_size_t size, bus_size_t alignment, int flags)
1157 error = bus_dma_tag_create(sc->sc_dmat, alignment,
1158 0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, size,
1159 1, size, flags, &dma->tag);
1161 device_printf(sc->sc_dev,
1162 "%s: bus_dma_tag_create failed, error %d\n",
1166 error = bus_dmamem_alloc(dma->tag, (void **)&dma->vaddr,
1167 flags | BUS_DMA_ZERO, &dma->map);
1169 device_printf(sc->sc_dev,
1170 "%s: bus_dmamem_alloc failed, error %d\n", __func__, error);
1173 error = bus_dmamap_load(dma->tag, dma->map, dma->vaddr,
1174 size, iwn_dma_map_addr, &dma->paddr, flags);
1176 device_printf(sc->sc_dev,
1177 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
1185 iwn_dma_contig_free(dma);
1190 iwn_dma_contig_free(struct iwn_dma_info *dma)
1192 if (dma->tag != NULL) {
1193 if (dma->map != NULL) {
1194 if (dma->paddr == 0) {
1195 bus_dmamap_sync(dma->tag, dma->map,
1196 BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1197 bus_dmamap_unload(dma->tag, dma->map);
1199 bus_dmamap_destroy(dma->tag, dma->map);
1201 bus_dmamem_free(dma->tag, dma->vaddr, dma->map);
1202 bus_dma_tag_destroy(dma->tag);
1207 iwn_alloc_sched(struct iwn_softc *sc)
1209 /* TX scheduler rings must be aligned on a 1KB boundary. */
1210 return iwn_dma_contig_alloc(sc, &sc->sched_dma,
1211 (void **)&sc->sched, sc->sc_hal->schedsz, 1024, BUS_DMA_NOWAIT);
1215 iwn_free_sched(struct iwn_softc *sc)
1217 iwn_dma_contig_free(&sc->sched_dma);
1221 iwn_alloc_kw(struct iwn_softc *sc)
1223 /* "Keep Warm" page must be aligned on a 4KB boundary. */
1224 return iwn_dma_contig_alloc(sc, &sc->kw_dma, NULL, 4096, 4096,
1229 iwn_free_kw(struct iwn_softc *sc)
1231 iwn_dma_contig_free(&sc->kw_dma);
1235 iwn_alloc_ict(struct iwn_softc *sc)
1237 /* ICT table must be aligned on a 4KB boundary. */
1238 return iwn_dma_contig_alloc(sc, &sc->ict_dma,
1239 (void **)&sc->ict, IWN_ICT_SIZE, 4096, BUS_DMA_NOWAIT);
1243 iwn_free_ict(struct iwn_softc *sc)
1245 iwn_dma_contig_free(&sc->ict_dma);
1249 iwn_alloc_fwmem(struct iwn_softc *sc)
1251 /* Must be aligned on a 16-byte boundary. */
1252 return iwn_dma_contig_alloc(sc, &sc->fw_dma, NULL,
1253 sc->sc_hal->fwsz, 16, BUS_DMA_NOWAIT);
1257 iwn_free_fwmem(struct iwn_softc *sc)
1259 iwn_dma_contig_free(&sc->fw_dma);
1263 iwn_alloc_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1270 /* Allocate RX descriptors (256-byte aligned). */
1271 size = IWN_RX_RING_COUNT * sizeof (uint32_t);
1272 error = iwn_dma_contig_alloc(sc, &ring->desc_dma,
1273 (void **)&ring->desc, size, 256, BUS_DMA_NOWAIT);
1275 device_printf(sc->sc_dev,
1276 "%s: could not allocate Rx ring DMA memory, error %d\n",
1281 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1282 BUS_SPACE_MAXADDR_32BIT,
1283 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, 1,
1284 MCLBYTES, BUS_DMA_NOWAIT, &ring->data_dmat);
1286 device_printf(sc->sc_dev,
1287 "%s: bus_dma_tag_create_failed, error %d\n",
1292 /* Allocate RX status area (16-byte aligned). */
1293 error = iwn_dma_contig_alloc(sc, &ring->stat_dma,
1294 (void **)&ring->stat, sizeof (struct iwn_rx_status),
1295 16, BUS_DMA_NOWAIT);
1297 device_printf(sc->sc_dev,
1298 "%s: could not allocate Rx status DMA memory, error %d\n",
1304 * Allocate and map RX buffers.
1306 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1307 struct iwn_rx_data *data = &ring->data[i];
1310 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1312 device_printf(sc->sc_dev,
1313 "%s: bus_dmamap_create failed, error %d\n",
1318 data->m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
1319 if (data->m == NULL) {
1320 device_printf(sc->sc_dev,
1321 "%s: could not allocate rx mbuf\n", __func__);
1327 error = bus_dmamap_load(ring->data_dmat, data->map,
1328 mtod(data->m, caddr_t), MCLBYTES,
1329 iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
1330 if (error != 0 && error != EFBIG) {
1331 device_printf(sc->sc_dev,
1332 "%s: bus_dmamap_load failed, error %d\n",
1335 error = ENOMEM; /* XXX unique code */
1338 bus_dmamap_sync(ring->data_dmat, data->map,
1339 BUS_DMASYNC_PREWRITE);
1341 /* Set physical address of RX buffer (256-byte aligned). */
1342 ring->desc[i] = htole32(paddr >> 8);
1344 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1345 BUS_DMASYNC_PREWRITE);
1348 iwn_free_rx_ring(sc, ring);
1353 iwn_reset_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1357 if (iwn_nic_lock(sc) == 0) {
1358 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
1359 for (ntries = 0; ntries < 1000; ntries++) {
1360 if (IWN_READ(sc, IWN_FH_RX_STATUS) &
1361 IWN_FH_RX_STATUS_IDLE)
1368 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
1369 "timeout resetting Rx ring");
1373 sc->last_rx_valid = 0;
1377 iwn_free_rx_ring(struct iwn_softc *sc, struct iwn_rx_ring *ring)
1381 iwn_dma_contig_free(&ring->desc_dma);
1382 iwn_dma_contig_free(&ring->stat_dma);
1384 for (i = 0; i < IWN_RX_RING_COUNT; i++) {
1385 struct iwn_rx_data *data = &ring->data[i];
1387 if (data->m != NULL) {
1388 bus_dmamap_sync(ring->data_dmat, data->map,
1389 BUS_DMASYNC_POSTREAD);
1390 bus_dmamap_unload(ring->data_dmat, data->map);
1393 if (data->map != NULL)
1394 bus_dmamap_destroy(ring->data_dmat, data->map);
1399 iwn_alloc_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring, int qid)
1409 /* Allocate TX descriptors (256-byte aligned.) */
1410 size = IWN_TX_RING_COUNT * sizeof(struct iwn_tx_desc);
1411 error = iwn_dma_contig_alloc(sc, &ring->desc_dma,
1412 (void **)&ring->desc, size, 256, BUS_DMA_NOWAIT);
1414 device_printf(sc->sc_dev,
1415 "%s: could not allocate TX ring DMA memory, error %d\n",
1421 * We only use rings 0 through 4 (4 EDCA + cmd) so there is no need
1422 * to allocate commands space for other rings.
1427 size = IWN_TX_RING_COUNT * sizeof(struct iwn_tx_cmd);
1428 error = iwn_dma_contig_alloc(sc, &ring->cmd_dma,
1429 (void **)&ring->cmd, size, 4, BUS_DMA_NOWAIT);
1431 device_printf(sc->sc_dev,
1432 "%s: could not allocate TX cmd DMA memory, error %d\n",
1437 error = bus_dma_tag_create(sc->sc_dmat, 1, 0,
1438 BUS_SPACE_MAXADDR_32BIT,
1439 BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES, IWN_MAX_SCATTER - 1,
1440 MCLBYTES, BUS_DMA_NOWAIT, &ring->data_dmat);
1442 device_printf(sc->sc_dev,
1443 "%s: bus_dma_tag_create_failed, error %d\n",
1448 paddr = ring->cmd_dma.paddr;
1449 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1450 struct iwn_tx_data *data = &ring->data[i];
1452 data->cmd_paddr = paddr;
1453 data->scratch_paddr = paddr + 12;
1454 paddr += sizeof (struct iwn_tx_cmd);
1456 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
1458 device_printf(sc->sc_dev,
1459 "%s: bus_dmamap_create failed, error %d\n",
1463 bus_dmamap_sync(ring->data_dmat, data->map,
1464 BUS_DMASYNC_PREWRITE);
1468 iwn_free_tx_ring(sc, ring);
1473 iwn_reset_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
1477 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1478 struct iwn_tx_data *data = &ring->data[i];
1480 if (data->m != NULL) {
1481 bus_dmamap_unload(ring->data_dmat, data->map);
1486 /* Clear TX descriptors. */
1487 memset(ring->desc, 0, ring->desc_dma.size);
1488 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
1489 BUS_DMASYNC_PREWRITE);
1490 sc->qfullmsk &= ~(1 << ring->qid);
1496 iwn_free_tx_ring(struct iwn_softc *sc, struct iwn_tx_ring *ring)
1500 iwn_dma_contig_free(&ring->desc_dma);
1501 iwn_dma_contig_free(&ring->cmd_dma);
1503 for (i = 0; i < IWN_TX_RING_COUNT; i++) {
1504 struct iwn_tx_data *data = &ring->data[i];
1506 if (data->m != NULL) {
1507 bus_dmamap_sync(ring->data_dmat, data->map,
1508 BUS_DMASYNC_POSTWRITE);
1509 bus_dmamap_unload(ring->data_dmat, data->map);
1512 if (data->map != NULL)
1513 bus_dmamap_destroy(ring->data_dmat, data->map);
1518 iwn5000_ict_reset(struct iwn_softc *sc)
1520 /* Disable interrupts. */
1521 IWN_WRITE(sc, IWN_INT_MASK, 0);
1523 /* Reset ICT table. */
1524 memset(sc->ict, 0, IWN_ICT_SIZE);
1527 /* Set physical address of ICT table (4KB aligned.) */
1528 DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__);
1529 IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE |
1530 IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
1532 /* Enable periodic RX interrupt. */
1533 sc->int_mask |= IWN_INT_RX_PERIODIC;
1534 /* Switch to ICT interrupt mode in driver. */
1535 sc->sc_flags |= IWN_FLAG_USE_ICT;
1537 /* Re-enable interrupts. */
1538 IWN_WRITE(sc, IWN_INT, 0xffffffff);
1539 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
1543 iwn_read_eeprom(struct iwn_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
1545 const struct iwn_hal *hal = sc->sc_hal;
1549 /* Check whether adapter has an EEPROM or an OTPROM. */
1550 if (sc->hw_type >= IWN_HW_REV_TYPE_1000 &&
1551 (IWN_READ(sc, IWN_OTP_GP) & IWN_OTP_GP_DEV_SEL_OTP))
1552 sc->sc_flags |= IWN_FLAG_HAS_OTPROM;
1553 DPRINTF(sc, IWN_DEBUG_RESET, "%s found\n",
1554 (sc->sc_flags & IWN_FLAG_HAS_OTPROM) ? "OTPROM" : "EEPROM");
1556 /* Adapter has to be powered on for EEPROM access to work. */
1557 error = iwn_apm_init(sc);
1559 device_printf(sc->sc_dev,
1560 "%s: could not power ON adapter, error %d\n",
1565 if ((IWN_READ(sc, IWN_EEPROM_GP) & 0x7) == 0) {
1566 device_printf(sc->sc_dev, "%s: bad ROM signature\n", __func__);
1569 error = iwn_eeprom_lock(sc);
1571 device_printf(sc->sc_dev,
1572 "%s: could not lock ROM, error %d\n",
1577 if (sc->sc_flags & IWN_FLAG_HAS_OTPROM) {
1578 error = iwn_init_otprom(sc);
1580 device_printf(sc->sc_dev,
1581 "%s: could not initialize OTPROM, error %d\n",
1587 iwn_read_prom_data(sc, IWN_EEPROM_RFCFG, &val, 2);
1588 sc->rfcfg = le16toh(val);
1589 DPRINTF(sc, IWN_DEBUG_RESET, "radio config=0x%04x\n", sc->rfcfg);
1591 /* Read MAC address. */
1592 iwn_read_prom_data(sc, IWN_EEPROM_MAC, macaddr, 6);
1594 /* Read adapter-specific information from EEPROM. */
1595 hal->read_eeprom(sc);
1597 iwn_apm_stop(sc); /* Power OFF adapter. */
1599 iwn_eeprom_unlock(sc);
1604 iwn4965_read_eeprom(struct iwn_softc *sc)
1610 /* Read regulatory domain (4 ASCII characters.) */
1611 iwn_read_prom_data(sc, IWN4965_EEPROM_DOMAIN, sc->eeprom_domain, 4);
1613 /* Read the list of authorized channels (20MHz ones only.) */
1614 for (i = 0; i < 5; i++) {
1615 addr = iwn4965_regulatory_bands[i];
1616 iwn_read_eeprom_channels(sc, i, addr);
1619 /* Read maximum allowed TX power for 2GHz and 5GHz bands. */
1620 iwn_read_prom_data(sc, IWN4965_EEPROM_MAXPOW, &val, 2);
1621 sc->maxpwr2GHz = val & 0xff;
1622 sc->maxpwr5GHz = val >> 8;
1623 /* Check that EEPROM values are within valid range. */
1624 if (sc->maxpwr5GHz < 20 || sc->maxpwr5GHz > 50)
1625 sc->maxpwr5GHz = 38;
1626 if (sc->maxpwr2GHz < 20 || sc->maxpwr2GHz > 50)
1627 sc->maxpwr2GHz = 38;
1628 DPRINTF(sc, IWN_DEBUG_RESET, "maxpwr 2GHz=%d 5GHz=%d\n",
1629 sc->maxpwr2GHz, sc->maxpwr5GHz);
1631 /* Read samples for each TX power group. */
1632 iwn_read_prom_data(sc, IWN4965_EEPROM_BANDS, sc->bands,
1635 /* Read voltage at which samples were taken. */
1636 iwn_read_prom_data(sc, IWN4965_EEPROM_VOLTAGE, &val, 2);
1637 sc->eeprom_voltage = (int16_t)le16toh(val);
1638 DPRINTF(sc, IWN_DEBUG_RESET, "voltage=%d (in 0.3V)\n",
1639 sc->eeprom_voltage);
1642 /* Print samples. */
1643 if (sc->sc_debug & IWN_DEBUG_ANY) {
1644 for (i = 0; i < IWN_NBANDS; i++)
1645 iwn4965_print_power_group(sc, i);
1652 iwn4965_print_power_group(struct iwn_softc *sc, int i)
1654 struct iwn4965_eeprom_band *band = &sc->bands[i];
1655 struct iwn4965_eeprom_chan_samples *chans = band->chans;
1658 kprintf("===band %d===\n", i);
1659 kprintf("chan lo=%d, chan hi=%d\n", band->lo, band->hi);
1660 kprintf("chan1 num=%d\n", chans[0].num);
1661 for (c = 0; c < 2; c++) {
1662 for (j = 0; j < IWN_NSAMPLES; j++) {
1663 kprintf("chain %d, sample %d: temp=%d gain=%d "
1664 "power=%d pa_det=%d\n", c, j,
1665 chans[0].samples[c][j].temp,
1666 chans[0].samples[c][j].gain,
1667 chans[0].samples[c][j].power,
1668 chans[0].samples[c][j].pa_det);
1671 kprintf("chan2 num=%d\n", chans[1].num);
1672 for (c = 0; c < 2; c++) {
1673 for (j = 0; j < IWN_NSAMPLES; j++) {
1674 kprintf("chain %d, sample %d: temp=%d gain=%d "
1675 "power=%d pa_det=%d\n", c, j,
1676 chans[1].samples[c][j].temp,
1677 chans[1].samples[c][j].gain,
1678 chans[1].samples[c][j].power,
1679 chans[1].samples[c][j].pa_det);
1686 iwn5000_read_eeprom(struct iwn_softc *sc)
1688 struct iwn5000_eeprom_calib_hdr hdr;
1690 uint32_t addr, base;
1694 /* Read regulatory domain (4 ASCII characters.) */
1695 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1696 base = le16toh(val);
1697 iwn_read_prom_data(sc, base + IWN5000_EEPROM_DOMAIN,
1698 sc->eeprom_domain, 4);
1700 /* Read the list of authorized channels (20MHz ones only.) */
1701 for (i = 0; i < 5; i++) {
1702 addr = base + iwn5000_regulatory_bands[i];
1703 iwn_read_eeprom_channels(sc, i, addr);
1706 /* Read enhanced TX power information for 6000 Series. */
1707 if (sc->hw_type >= IWN_HW_REV_TYPE_6000)
1708 iwn_read_eeprom_enhinfo(sc);
1710 iwn_read_prom_data(sc, IWN5000_EEPROM_CAL, &val, 2);
1711 base = le16toh(val);
1712 iwn_read_prom_data(sc, base, &hdr, sizeof hdr);
1713 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
1714 "%s: calib version=%u pa type=%u voltage=%u\n",
1715 __func__, hdr.version, hdr.pa_type, le16toh(hdr.volt));
1716 sc->calib_ver = hdr.version;
1718 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
1719 /* Compute temperature offset. */
1720 iwn_read_prom_data(sc, base + IWN5000_EEPROM_TEMP, &val, 2);
1721 temp = le16toh(val);
1722 iwn_read_prom_data(sc, base + IWN5000_EEPROM_VOLT, &val, 2);
1723 volt = le16toh(val);
1724 sc->temp_off = temp - (volt / -5);
1725 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "temp=%d volt=%d offset=%dK\n",
1726 temp, volt, sc->temp_off);
1728 /* Read crystal calibration. */
1729 iwn_read_prom_data(sc, base + IWN5000_EEPROM_CRYSTAL,
1730 &sc->eeprom_crystal, sizeof (uint32_t));
1731 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "crystal calibration 0x%08x\n",
1732 le32toh(sc->eeprom_crystal));
1737 * Translate EEPROM flags to net80211.
1740 iwn_eeprom_channel_flags(struct iwn_eeprom_chan *channel)
1745 if ((channel->flags & IWN_EEPROM_CHAN_ACTIVE) == 0)
1746 nflags |= IEEE80211_CHAN_PASSIVE;
1747 if ((channel->flags & IWN_EEPROM_CHAN_IBSS) == 0)
1748 nflags |= IEEE80211_CHAN_NOADHOC;
1749 if (channel->flags & IWN_EEPROM_CHAN_RADAR) {
1750 nflags |= IEEE80211_CHAN_DFS;
1751 /* XXX apparently IBSS may still be marked */
1752 nflags |= IEEE80211_CHAN_NOADHOC;
1759 iwn_read_eeprom_band(struct iwn_softc *sc, int n)
1761 struct ifnet *ifp = sc->sc_ifp;
1762 struct ieee80211com *ic = ifp->if_l2com;
1763 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
1764 const struct iwn_chan_band *band = &iwn_bands[n];
1765 struct ieee80211_channel *c;
1766 int i, chan, nflags;
1768 for (i = 0; i < band->nchan; i++) {
1769 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID)) {
1770 DPRINTF(sc, IWN_DEBUG_RESET,
1771 "skip chan %d flags 0x%x maxpwr %d\n",
1772 band->chan[i], channels[i].flags,
1773 channels[i].maxpwr);
1776 chan = band->chan[i];
1777 nflags = iwn_eeprom_channel_flags(&channels[i]);
1779 DPRINTF(sc, IWN_DEBUG_RESET,
1780 "add chan %d flags 0x%x maxpwr %d\n",
1781 chan, channels[i].flags, channels[i].maxpwr);
1783 c = &ic->ic_channels[ic->ic_nchans++];
1785 c->ic_maxregpower = channels[i].maxpwr;
1786 c->ic_maxpower = 2*c->ic_maxregpower;
1788 /* Save maximum allowed TX power for this channel. */
1789 sc->maxpwr[chan] = channels[i].maxpwr;
1791 if (n == 0) { /* 2GHz band */
1792 c->ic_freq = ieee80211_ieee2mhz(chan,
1795 /* G =>'s B is supported */
1796 c->ic_flags = IEEE80211_CHAN_B | nflags;
1798 c = &ic->ic_channels[ic->ic_nchans++];
1800 c->ic_flags = IEEE80211_CHAN_G | nflags;
1801 } else { /* 5GHz band */
1802 c->ic_freq = ieee80211_ieee2mhz(chan,
1804 c->ic_flags = IEEE80211_CHAN_A | nflags;
1805 sc->sc_flags |= IWN_FLAG_HAS_5GHZ;
1808 /* XXX no constraints on using HT20 */
1809 /* add HT20, HT40 added separately */
1810 c = &ic->ic_channels[ic->ic_nchans++];
1812 c->ic_flags |= IEEE80211_CHAN_HT20;
1813 /* XXX NARROW =>'s 1/2 and 1/4 width? */
1820 iwn_read_eeprom_ht40(struct iwn_softc *sc, int n)
1822 struct ifnet *ifp = sc->sc_ifp;
1823 struct ieee80211com *ic = ifp->if_l2com;
1824 struct iwn_eeprom_chan *channels = sc->eeprom_channels[n];
1825 const struct iwn_chan_band *band = &iwn_bands[n];
1826 struct ieee80211_channel *c, *cent, *extc;
1829 for (i = 0; i < band->nchan; i++) {
1830 if (!(channels[i].flags & IWN_EEPROM_CHAN_VALID) ||
1831 !(channels[i].flags & IWN_EEPROM_CHAN_WIDE)) {
1832 DPRINTF(sc, IWN_DEBUG_RESET,
1833 "skip chan %d flags 0x%x maxpwr %d\n",
1834 band->chan[i], channels[i].flags,
1835 channels[i].maxpwr);
1839 * Each entry defines an HT40 channel pair; find the
1840 * center channel, then the extension channel above.
1842 cent = ieee80211_find_channel_byieee(ic, band->chan[i],
1843 band->flags & ~IEEE80211_CHAN_HT);
1844 if (cent == NULL) { /* XXX shouldn't happen */
1845 device_printf(sc->sc_dev,
1846 "%s: no entry for channel %d\n",
1847 __func__, band->chan[i]);
1850 extc = ieee80211_find_channel(ic, cent->ic_freq+20,
1851 band->flags & ~IEEE80211_CHAN_HT);
1853 DPRINTF(sc, IWN_DEBUG_RESET,
1854 "skip chan %d, extension channel not found\n",
1859 DPRINTF(sc, IWN_DEBUG_RESET,
1860 "add ht40 chan %d flags 0x%x maxpwr %d\n",
1861 band->chan[i], channels[i].flags, channels[i].maxpwr);
1863 c = &ic->ic_channels[ic->ic_nchans++];
1865 c->ic_extieee = extc->ic_ieee;
1866 c->ic_flags &= ~IEEE80211_CHAN_HT;
1867 c->ic_flags |= IEEE80211_CHAN_HT40U;
1868 c = &ic->ic_channels[ic->ic_nchans++];
1870 c->ic_extieee = cent->ic_ieee;
1871 c->ic_flags &= ~IEEE80211_CHAN_HT;
1872 c->ic_flags |= IEEE80211_CHAN_HT40D;
1878 iwn_read_eeprom_channels(struct iwn_softc *sc, int n, uint32_t addr)
1880 struct ifnet *ifp = sc->sc_ifp;
1881 struct ieee80211com *ic = ifp->if_l2com;
1883 iwn_read_prom_data(sc, addr, &sc->eeprom_channels[n],
1884 iwn_bands[n].nchan * sizeof (struct iwn_eeprom_chan));
1887 iwn_read_eeprom_band(sc, n);
1890 iwn_read_eeprom_ht40(sc, n);
1892 ieee80211_sort_channels(ic->ic_channels, ic->ic_nchans);
1895 #define nitems(_a) (sizeof((_a)) / sizeof((_a)[0]))
1898 iwn_read_eeprom_enhinfo(struct iwn_softc *sc)
1900 struct iwn_eeprom_enhinfo enhinfo[35];
1905 iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2);
1906 base = le16toh(val);
1907 iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO,
1908 enhinfo, sizeof enhinfo);
1910 memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr);
1911 for (i = 0; i < nitems(enhinfo); i++) {
1912 if (enhinfo[i].chan == 0 || enhinfo[i].reserved != 0)
1913 continue; /* Skip invalid entries. */
1916 if (sc->txchainmask & IWN_ANT_A)
1917 maxpwr = MAX(maxpwr, enhinfo[i].chain[0]);
1918 if (sc->txchainmask & IWN_ANT_B)
1919 maxpwr = MAX(maxpwr, enhinfo[i].chain[1]);
1920 if (sc->txchainmask & IWN_ANT_C)
1921 maxpwr = MAX(maxpwr, enhinfo[i].chain[2]);
1922 if (sc->ntxchains == 2)
1923 maxpwr = MAX(maxpwr, enhinfo[i].mimo2);
1924 else if (sc->ntxchains == 3)
1925 maxpwr = MAX(maxpwr, enhinfo[i].mimo3);
1926 maxpwr /= 2; /* Convert half-dBm to dBm. */
1928 DPRINTF(sc, IWN_DEBUG_RESET, "enhinfo %d, maxpwr=%d\n", i,
1930 sc->enh_maxpwr[i] = maxpwr;
1934 static struct ieee80211_node *
1935 iwn_node_alloc(struct ieee80211vap *vap, const uint8_t mac[IEEE80211_ADDR_LEN])
1937 return kmalloc(sizeof (struct iwn_node), M_80211_NODE,M_INTWAIT | M_ZERO);
1941 iwn_newassoc(struct ieee80211_node *ni, int isnew)
1945 ieee80211_ratectl_node_deinit(ni);
1948 ieee80211_ratectl_node_init(ni);
1952 iwn_media_change(struct ifnet *ifp)
1954 int error = ieee80211_media_change(ifp);
1955 /* NB: only the fixed rate can change and that doesn't need a reset */
1956 return (error == ENETRESET ? 0 : error);
1960 iwn_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
1962 struct iwn_vap *ivp = IWN_VAP(vap);
1963 struct ieee80211com *ic = vap->iv_ic;
1964 struct iwn_softc *sc = ic->ic_ifp->if_softc;
1967 DPRINTF(sc, IWN_DEBUG_STATE, "%s: %s -> %s\n", __func__,
1968 ieee80211_state_name[vap->iv_state],
1969 ieee80211_state_name[nstate]);
1971 callout_stop(&sc->sc_timer_to);
1973 if (nstate == IEEE80211_S_AUTH && vap->iv_state != IEEE80211_S_AUTH) {
1974 /* !AUTH -> AUTH requires adapter config */
1975 /* Reset state to handle reassociations correctly. */
1976 sc->rxon.associd = 0;
1977 sc->rxon.filter &= ~htole32(IWN_FILTER_BSS);
1978 iwn_calib_reset(sc);
1979 error = iwn_auth(sc, vap);
1981 if (nstate == IEEE80211_S_RUN && vap->iv_state != IEEE80211_S_RUN) {
1983 * !RUN -> RUN requires setting the association id
1984 * which is done with a firmware cmd. We also defer
1985 * starting the timers until that work is done.
1987 error = iwn_run(sc, vap);
1989 if (nstate == IEEE80211_S_RUN) {
1991 * RUN -> RUN transition; just restart the timers.
1993 iwn_calib_reset(sc);
1995 return ivp->iv_newstate(vap, nstate, arg);
1999 * Process an RX_PHY firmware notification. This is usually immediately
2000 * followed by an MPDU_RX_DONE notification.
2003 iwn_rx_phy(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2004 struct iwn_rx_data *data)
2006 struct iwn_rx_stat *stat = (struct iwn_rx_stat *)(desc + 1);
2008 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: received PHY stats\n", __func__);
2009 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2011 /* Save RX statistics, they will be used on MPDU_RX_DONE. */
2012 memcpy(&sc->last_rx_stat, stat, sizeof (*stat));
2013 sc->last_rx_valid = 1;
2017 iwn_timer_callout(void *arg)
2019 struct iwn_softc *sc = arg;
2022 wlan_serialize_enter();
2023 if (sc->calib_cnt && --sc->calib_cnt == 0) {
2024 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s\n",
2025 "send statistics request");
2026 (void) iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags,
2028 sc->calib_cnt = 60; /* do calibration every 60s */
2030 iwn_watchdog(sc); /* NB: piggyback tx watchdog */
2031 callout_reset(&sc->sc_timer_to, hz, iwn_timer_callout, sc);
2032 wlan_serialize_exit();
2036 iwn_calib_reset(struct iwn_softc *sc)
2038 callout_reset(&sc->sc_timer_to, hz, iwn_timer_callout, sc);
2039 sc->calib_cnt = 60; /* do calibration every 60s */
2043 * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
2044 * Each MPDU_RX_DONE notification must be preceded by an RX_PHY one.
2047 iwn_rx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2048 struct iwn_rx_data *data)
2050 const struct iwn_hal *hal = sc->sc_hal;
2051 struct ifnet *ifp = sc->sc_ifp;
2052 struct ieee80211com *ic = ifp->if_l2com;
2053 struct iwn_rx_ring *ring = &sc->rxq;
2054 struct ieee80211_frame *wh;
2055 struct ieee80211_node *ni;
2056 struct mbuf *m, *m1;
2057 struct iwn_rx_stat *stat;
2061 int error, len, rssi, nf;
2063 if (desc->type == IWN_MPDU_RX_DONE) {
2064 /* Check for prior RX_PHY notification. */
2065 if (!sc->last_rx_valid) {
2066 DPRINTF(sc, IWN_DEBUG_ANY,
2067 "%s: missing RX_PHY\n", __func__);
2071 sc->last_rx_valid = 0;
2072 stat = &sc->last_rx_stat;
2074 stat = (struct iwn_rx_stat *)(desc + 1);
2076 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2078 if (stat->cfg_phy_len > IWN_STAT_MAXLEN) {
2079 device_printf(sc->sc_dev,
2080 "%s: invalid rx statistic header, len %d\n",
2081 __func__, stat->cfg_phy_len);
2085 if (desc->type == IWN_MPDU_RX_DONE) {
2086 struct iwn_rx_mpdu *mpdu = (struct iwn_rx_mpdu *)(desc + 1);
2087 head = (caddr_t)(mpdu + 1);
2088 len = le16toh(mpdu->len);
2090 head = (caddr_t)(stat + 1) + stat->cfg_phy_len;
2091 len = le16toh(stat->len);
2094 flags = le32toh(*(uint32_t *)(head + len));
2096 /* Discard frames with a bad FCS early. */
2097 if ((flags & IWN_RX_NOERROR) != IWN_RX_NOERROR) {
2098 DPRINTF(sc, IWN_DEBUG_RECV, "%s: rx flags error %x\n",
2103 /* Discard frames that are too short. */
2104 if (len < sizeof (*wh)) {
2105 DPRINTF(sc, IWN_DEBUG_RECV, "%s: frame too short: %d\n",
2111 /* XXX don't need mbuf, just dma buffer */
2112 m1 = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
2114 DPRINTF(sc, IWN_DEBUG_ANY, "%s: no mbuf to restock ring\n",
2119 bus_dmamap_unload(ring->data_dmat, data->map);
2121 error = bus_dmamap_load(ring->data_dmat, data->map,
2122 mtod(m1, caddr_t), MCLBYTES,
2123 iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
2124 if (error != 0 && error != EFBIG) {
2125 device_printf(sc->sc_dev,
2126 "%s: bus_dmamap_load failed, error %d\n", __func__, error);
2134 /* Update RX descriptor. */
2135 ring->desc[ring->cur] = htole32(paddr >> 8);
2136 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
2137 BUS_DMASYNC_PREWRITE);
2139 /* Finalize mbuf. */
2140 m->m_pkthdr.rcvif = ifp;
2142 m->m_pkthdr.len = m->m_len = len;
2144 rssi = hal->get_rssi(sc, stat);
2146 /* Grab a reference to the source node. */
2147 wh = mtod(m, struct ieee80211_frame *);
2148 ni = ieee80211_find_rxnode(ic, (struct ieee80211_frame_min *)wh);
2149 nf = (ni != NULL && ni->ni_vap->iv_state == IEEE80211_S_RUN &&
2150 (ic->ic_flags & IEEE80211_F_SCAN) == 0) ? sc->noise : -95;
2152 if (ieee80211_radiotap_active(ic)) {
2153 struct iwn_rx_radiotap_header *tap = &sc->sc_rxtap;
2155 tap->wr_tsft = htole64(stat->tstamp);
2157 if (stat->flags & htole16(IWN_STAT_FLAG_SHPREAMBLE))
2158 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
2159 switch (stat->rate) {
2161 case 10: tap->wr_rate = 2; break;
2162 case 20: tap->wr_rate = 4; break;
2163 case 55: tap->wr_rate = 11; break;
2164 case 110: tap->wr_rate = 22; break;
2166 case 0xd: tap->wr_rate = 12; break;
2167 case 0xf: tap->wr_rate = 18; break;
2168 case 0x5: tap->wr_rate = 24; break;
2169 case 0x7: tap->wr_rate = 36; break;
2170 case 0x9: tap->wr_rate = 48; break;
2171 case 0xb: tap->wr_rate = 72; break;
2172 case 0x1: tap->wr_rate = 96; break;
2173 case 0x3: tap->wr_rate = 108; break;
2174 /* Unknown rate: should not happen. */
2175 default: tap->wr_rate = 0;
2177 tap->wr_dbm_antsignal = rssi;
2178 tap->wr_dbm_antnoise = nf;
2181 /* Send the frame to the 802.11 layer. */
2183 (void) ieee80211_input(ni, m, rssi - nf, nf);
2184 /* Node is no longer needed. */
2185 ieee80211_free_node(ni);
2187 (void) ieee80211_input_all(ic, m, rssi - nf, nf);
2192 /* Process an incoming Compressed BlockAck. */
2194 iwn_rx_compressed_ba(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2195 struct iwn_rx_data *data)
2197 struct iwn_compressed_ba *ba = (struct iwn_compressed_ba *)(desc + 1);
2198 struct iwn_tx_ring *txq;
2200 txq = &sc->txq[letoh16(ba->qid)];
2206 * Process a CALIBRATION_RESULT notification sent by the initialization
2207 * firmware on response to a CMD_CALIB_CONFIG command (5000 only.)
2210 iwn5000_rx_calib_results(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2211 struct iwn_rx_data *data)
2213 struct iwn_phy_calib *calib = (struct iwn_phy_calib *)(desc + 1);
2216 /* Runtime firmware should not send such a notification. */
2217 if (sc->sc_flags & IWN_FLAG_CALIB_DONE)
2220 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2221 len = (le32toh(desc->len) & 0x3fff) - 4;
2223 switch (calib->code) {
2224 case IWN5000_PHY_CALIB_DC:
2225 if (sc->hw_type == IWN_HW_REV_TYPE_5150 ||
2226 sc->hw_type == IWN_HW_REV_TYPE_6050)
2229 case IWN5000_PHY_CALIB_LO:
2232 case IWN5000_PHY_CALIB_TX_IQ:
2235 case IWN5000_PHY_CALIB_TX_IQ_PERIODIC:
2236 if (sc->hw_type < IWN_HW_REV_TYPE_6000 &&
2237 sc->hw_type != IWN_HW_REV_TYPE_5150)
2240 case IWN5000_PHY_CALIB_BASE_BAND:
2244 if (idx == -1) /* Ignore other results. */
2247 /* Save calibration result. */
2248 if (sc->calibcmd[idx].buf != NULL)
2249 kfree(sc->calibcmd[idx].buf, M_DEVBUF);
2250 sc->calibcmd[idx].buf = kmalloc(len, M_DEVBUF, M_INTWAIT);
2251 if (sc->calibcmd[idx].buf == NULL) {
2252 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2253 "not enough memory for calibration result %d\n",
2257 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
2258 "saving calibration result code=%d len=%d\n", calib->code, len);
2259 sc->calibcmd[idx].len = len;
2260 memcpy(sc->calibcmd[idx].buf, calib, len);
2264 * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification.
2265 * The latter is sent by the firmware after each received beacon.
2268 iwn_rx_statistics(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2269 struct iwn_rx_data *data)
2271 const struct iwn_hal *hal = sc->sc_hal;
2272 struct ifnet *ifp = sc->sc_ifp;
2273 struct ieee80211com *ic = ifp->if_l2com;
2274 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2275 struct iwn_calib_state *calib = &sc->calib;
2276 struct iwn_stats *stats = (struct iwn_stats *)(desc + 1);
2279 /* Beacon stats are meaningful only when associated and not scanning. */
2280 if (vap->iv_state != IEEE80211_S_RUN ||
2281 (ic->ic_flags & IEEE80211_F_SCAN))
2284 bus_dmamap_sync(sc->rxq.data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2285 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: cmd %d\n", __func__, desc->type);
2286 iwn_calib_reset(sc); /* Reset TX power calibration timeout. */
2288 /* Test if temperature has changed. */
2289 if (stats->general.temp != sc->rawtemp) {
2290 /* Convert "raw" temperature to degC. */
2291 sc->rawtemp = stats->general.temp;
2292 temp = hal->get_temperature(sc);
2293 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d\n",
2296 /* Update TX power if need be (4965AGN only.) */
2297 if (sc->hw_type == IWN_HW_REV_TYPE_4965)
2298 iwn4965_power_calibration(sc, temp);
2301 if (desc->type != IWN_BEACON_STATISTICS)
2302 return; /* Reply to a statistics request. */
2304 sc->noise = iwn_get_noise(&stats->rx.general);
2305 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: noise %d\n", __func__, sc->noise);
2307 /* Test that RSSI and noise are present in stats report. */
2308 if (le32toh(stats->rx.general.flags) != 1) {
2309 DPRINTF(sc, IWN_DEBUG_ANY, "%s\n",
2310 "received statistics without RSSI");
2314 if (calib->state == IWN_CALIB_STATE_ASSOC)
2315 iwn_collect_noise(sc, &stats->rx.general);
2316 else if (calib->state == IWN_CALIB_STATE_RUN)
2317 iwn_tune_sensitivity(sc, &stats->rx);
2321 * Process a TX_DONE firmware notification. Unfortunately, the 4965AGN
2322 * and 5000 adapters have different incompatible TX status formats.
2325 iwn4965_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2326 struct iwn_rx_data *data)
2328 struct iwn4965_tx_stat *stat = (struct iwn4965_tx_stat *)(desc + 1);
2329 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2331 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
2332 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
2333 __func__, desc->qid, desc->idx, stat->ackfailcnt,
2334 stat->btkillcnt, stat->rate, le16toh(stat->duration),
2335 le32toh(stat->status));
2337 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2338 iwn_tx_done(sc, desc, stat->ackfailcnt, le32toh(stat->status) & 0xff);
2342 iwn5000_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc,
2343 struct iwn_rx_data *data)
2345 struct iwn5000_tx_stat *stat = (struct iwn5000_tx_stat *)(desc + 1);
2346 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2348 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: "
2349 "qid %d idx %d retries %d nkill %d rate %x duration %d status %x\n",
2350 __func__, desc->qid, desc->idx, stat->ackfailcnt,
2351 stat->btkillcnt, stat->rate, le16toh(stat->duration),
2352 le32toh(stat->status));
2355 /* Reset TX scheduler slot. */
2356 iwn5000_reset_sched(sc, desc->qid & 0xf, desc->idx);
2359 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTREAD);
2360 iwn_tx_done(sc, desc, stat->ackfailcnt, le16toh(stat->status) & 0xff);
2364 * Adapter-independent backend for TX_DONE firmware notifications.
2367 iwn_tx_done(struct iwn_softc *sc, struct iwn_rx_desc *desc, int ackfailcnt,
2370 struct ifnet *ifp = sc->sc_ifp;
2371 struct iwn_tx_ring *ring = &sc->txq[desc->qid & 0xf];
2372 struct iwn_tx_data *data = &ring->data[desc->idx];
2374 struct ieee80211_node *ni;
2375 struct ieee80211vap *vap;
2377 KASSERT(data->ni != NULL, ("no node"));
2379 /* Unmap and free mbuf. */
2380 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_POSTWRITE);
2381 bus_dmamap_unload(ring->data_dmat, data->map);
2382 m = data->m, data->m = NULL;
2383 ni = data->ni, data->ni = NULL;
2386 if (m->m_flags & M_TXCB) {
2388 * Channels marked for "radar" require traffic to be received
2389 * to unlock before we can transmit. Until traffic is seen
2390 * any attempt to transmit is returned immediately with status
2391 * set to IWN_TX_FAIL_TX_LOCKED. Unfortunately this can easily
2392 * happen on first authenticate after scanning. To workaround
2393 * this we ignore a failure of this sort in AUTH state so the
2394 * 802.11 layer will fall back to using a timeout to wait for
2395 * the AUTH reply. This allows the firmware time to see
2396 * traffic so a subsequent retry of AUTH succeeds. It's
2397 * unclear why the firmware does not maintain state for
2398 * channels recently visited as this would allow immediate
2399 * use of the channel after a scan (where we see traffic).
2401 if (status == IWN_TX_FAIL_TX_LOCKED &&
2402 ni->ni_vap->iv_state == IEEE80211_S_AUTH)
2403 ieee80211_process_callback(ni, m, 0);
2405 ieee80211_process_callback(ni, m,
2406 (status & IWN_TX_FAIL) != 0);
2410 * Update rate control statistics for the node.
2412 if (status & 0x80) {
2414 ieee80211_ratectl_tx_complete(vap, ni,
2415 IEEE80211_RATECTL_TX_FAILURE, &ackfailcnt, NULL);
2417 ieee80211_ratectl_tx_complete(vap, ni,
2418 IEEE80211_RATECTL_TX_SUCCESS, &ackfailcnt, NULL);
2421 ieee80211_free_node(ni);
2423 sc->sc_tx_timer = 0;
2424 if (--ring->queued < IWN_TX_RING_LOMARK) {
2425 sc->qfullmsk &= ~(1 << ring->qid);
2426 if (sc->qfullmsk == 0 &&
2427 (ifp->if_flags & IFF_OACTIVE)) {
2428 ifp->if_flags &= ~IFF_OACTIVE;
2429 iwn_start_locked(ifp);
2435 * Process a "command done" firmware notification. This is where we wakeup
2436 * processes waiting for a synchronous command completion.
2439 iwn_cmd_done(struct iwn_softc *sc, struct iwn_rx_desc *desc)
2441 struct iwn_tx_ring *ring = &sc->txq[4];
2442 struct iwn_tx_data *data;
2444 if ((desc->qid & 0xf) != 4)
2445 return; /* Not a command ack. */
2447 data = &ring->data[desc->idx];
2449 /* If the command was mapped in an mbuf, free it. */
2450 if (data->m != NULL) {
2451 bus_dmamap_unload(ring->data_dmat, data->map);
2455 wakeup(&ring->desc[desc->idx]);
2459 * Process an INT_FH_RX or INT_SW_RX interrupt.
2462 iwn_notif_intr(struct iwn_softc *sc)
2464 struct ifnet *ifp = sc->sc_ifp;
2465 struct ieee80211com *ic = ifp->if_l2com;
2466 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2469 bus_dmamap_sync(sc->rxq.stat_dma.tag, sc->rxq.stat_dma.map,
2470 BUS_DMASYNC_POSTREAD);
2472 hw = le16toh(sc->rxq.stat->closed_count) & 0xfff;
2473 while (sc->rxq.cur != hw) {
2474 struct iwn_rx_data *data = &sc->rxq.data[sc->rxq.cur];
2475 struct iwn_rx_desc *desc;
2477 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2478 BUS_DMASYNC_POSTREAD);
2479 desc = mtod(data->m, struct iwn_rx_desc *);
2481 DPRINTF(sc, IWN_DEBUG_RECV,
2482 "%s: qid %x idx %d flags %x type %d(%s) len %d\n",
2483 __func__, desc->qid & 0xf, desc->idx, desc->flags,
2484 desc->type, iwn_intr_str(desc->type),
2485 le16toh(desc->len));
2487 if (!(desc->qid & 0x80)) /* Reply to a command. */
2488 iwn_cmd_done(sc, desc);
2490 switch (desc->type) {
2492 iwn_rx_phy(sc, desc, data);
2495 case IWN_RX_DONE: /* 4965AGN only. */
2496 case IWN_MPDU_RX_DONE:
2497 /* An 802.11 frame has been received. */
2498 iwn_rx_done(sc, desc, data);
2502 case IWN_RX_COMPRESSED_BA:
2503 /* A Compressed BlockAck has been received. */
2504 iwn_rx_compressed_ba(sc, desc, data);
2509 /* An 802.11 frame has been transmitted. */
2510 sc->sc_hal->tx_done(sc, desc, data);
2513 case IWN_RX_STATISTICS:
2514 case IWN_BEACON_STATISTICS:
2515 iwn_rx_statistics(sc, desc, data);
2518 case IWN_BEACON_MISSED:
2520 struct iwn_beacon_missed *miss =
2521 (struct iwn_beacon_missed *)(desc + 1);
2524 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2525 BUS_DMASYNC_POSTREAD);
2526 misses = le32toh(miss->consecutive);
2528 /* XXX not sure why we're notified w/ zero */
2531 DPRINTF(sc, IWN_DEBUG_STATE,
2532 "%s: beacons missed %d/%d\n", __func__,
2533 misses, le32toh(miss->total));
2536 * If more than 5 consecutive beacons are missed,
2537 * reinitialize the sensitivity state machine.
2539 if (vap->iv_state == IEEE80211_S_RUN && misses > 5)
2540 (void) iwn_init_sensitivity(sc);
2541 if (misses >= vap->iv_bmissthreshold)
2542 ieee80211_beacon_miss(ic);
2547 struct iwn_ucode_info *uc =
2548 (struct iwn_ucode_info *)(desc + 1);
2550 /* The microcontroller is ready. */
2551 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2552 BUS_DMASYNC_POSTREAD);
2553 DPRINTF(sc, IWN_DEBUG_RESET,
2554 "microcode alive notification version=%d.%d "
2555 "subtype=%x alive=%x\n", uc->major, uc->minor,
2556 uc->subtype, le32toh(uc->valid));
2558 if (le32toh(uc->valid) != 1) {
2559 device_printf(sc->sc_dev,
2560 "microcontroller initialization failed");
2563 if (uc->subtype == IWN_UCODE_INIT) {
2564 /* Save microcontroller report. */
2565 memcpy(&sc->ucode_info, uc, sizeof (*uc));
2567 /* Save the address of the error log in SRAM. */
2568 sc->errptr = le32toh(uc->errptr);
2571 case IWN_STATE_CHANGED:
2573 uint32_t *status = (uint32_t *)(desc + 1);
2576 * State change allows hardware switch change to be
2577 * noted. However, we handle this in iwn_intr as we
2578 * get both the enable/disble intr.
2580 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2581 BUS_DMASYNC_POSTREAD);
2582 DPRINTF(sc, IWN_DEBUG_INTR, "state changed to %x\n",
2586 case IWN_START_SCAN:
2588 struct iwn_start_scan *scan =
2589 (struct iwn_start_scan *)(desc + 1);
2591 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2592 BUS_DMASYNC_POSTREAD);
2593 DPRINTF(sc, IWN_DEBUG_ANY,
2594 "%s: scanning channel %d status %x\n",
2595 __func__, scan->chan, le32toh(scan->status));
2600 struct iwn_stop_scan *scan =
2601 (struct iwn_stop_scan *)(desc + 1);
2603 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
2604 BUS_DMASYNC_POSTREAD);
2605 DPRINTF(sc, IWN_DEBUG_STATE,
2606 "scan finished nchan=%d status=%d chan=%d\n",
2607 scan->nchan, scan->status, scan->chan);
2609 ieee80211_scan_next(vap);
2612 case IWN5000_CALIBRATION_RESULT:
2613 iwn5000_rx_calib_results(sc, desc, data);
2616 case IWN5000_CALIBRATION_DONE:
2617 sc->sc_flags |= IWN_FLAG_CALIB_DONE;
2622 sc->rxq.cur = (sc->rxq.cur + 1) % IWN_RX_RING_COUNT;
2625 /* Tell the firmware what we have processed. */
2626 hw = (hw == 0) ? IWN_RX_RING_COUNT - 1 : hw - 1;
2627 IWN_WRITE(sc, IWN_FH_RX_WPTR, hw & ~7);
2631 * Process an INT_WAKEUP interrupt raised when the microcontroller wakes up
2632 * from power-down sleep mode.
2635 iwn_wakeup_intr(struct iwn_softc *sc)
2639 DPRINTF(sc, IWN_DEBUG_RESET, "%s: ucode wakeup from power-down sleep\n",
2642 /* Wakeup RX and TX rings. */
2643 IWN_WRITE(sc, IWN_FH_RX_WPTR, sc->rxq.cur & ~7);
2644 for (qid = 0; qid < sc->sc_hal->ntxqs; qid++) {
2645 struct iwn_tx_ring *ring = &sc->txq[qid];
2646 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | ring->cur);
2651 iwn_rftoggle_intr(struct iwn_softc *sc)
2653 struct ifnet *ifp = sc->sc_ifp;
2654 struct ieee80211com *ic = ifp->if_l2com;
2655 uint32_t tmp = IWN_READ(sc, IWN_GP_CNTRL);
2657 device_printf(sc->sc_dev, "RF switch: radio %s\n",
2658 (tmp & IWN_GP_CNTRL_RFKILL) ? "enabled" : "disabled");
2659 if (tmp & IWN_GP_CNTRL_RFKILL)
2660 ieee80211_runtask(ic, &sc->sc_radioon_task);
2662 ieee80211_runtask(ic, &sc->sc_radiooff_task);
2666 * Dump the error log of the firmware when a firmware panic occurs. Although
2667 * we can't debug the firmware because it is neither open source nor free, it
2668 * can help us to identify certain classes of problems.
2671 iwn_fatal_intr(struct iwn_softc *sc)
2673 const struct iwn_hal *hal = sc->sc_hal;
2674 struct iwn_fw_dump dump;
2677 /* Force a complete recalibration on next init. */
2678 sc->sc_flags &= ~IWN_FLAG_CALIB_DONE;
2680 /* Check that the error log address is valid. */
2681 if (sc->errptr < IWN_FW_DATA_BASE ||
2682 sc->errptr + sizeof (dump) >
2683 IWN_FW_DATA_BASE + hal->fw_data_maxsz) {
2684 kprintf("%s: bad firmware error log address 0x%08x\n",
2685 __func__, sc->errptr);
2688 if (iwn_nic_lock(sc) != 0) {
2689 kprintf("%s: could not read firmware error log\n",
2693 /* Read firmware error log from SRAM. */
2694 iwn_mem_read_region_4(sc, sc->errptr, (uint32_t *)&dump,
2695 sizeof (dump) / sizeof (uint32_t));
2698 if (dump.valid == 0) {
2699 kprintf("%s: firmware error log is empty\n",
2703 kprintf("firmware error log:\n");
2704 kprintf(" error type = \"%s\" (0x%08X)\n",
2705 (dump.id < nitems(iwn_fw_errmsg)) ?
2706 iwn_fw_errmsg[dump.id] : "UNKNOWN",
2708 kprintf(" program counter = 0x%08X\n", dump.pc);
2709 kprintf(" source line = 0x%08X\n", dump.src_line);
2710 kprintf(" error data = 0x%08X%08X\n",
2711 dump.error_data[0], dump.error_data[1]);
2712 kprintf(" branch link = 0x%08X%08X\n",
2713 dump.branch_link[0], dump.branch_link[1]);
2714 kprintf(" interrupt link = 0x%08X%08X\n",
2715 dump.interrupt_link[0], dump.interrupt_link[1]);
2716 kprintf(" time = %u\n", dump.time[0]);
2718 /* Dump driver status (TX and RX rings) while we're here. */
2719 kprintf("driver status:\n");
2720 for (i = 0; i < hal->ntxqs; i++) {
2721 struct iwn_tx_ring *ring = &sc->txq[i];
2722 kprintf(" tx ring %2d: qid=%-2d cur=%-3d queued=%-3d\n",
2723 i, ring->qid, ring->cur, ring->queued);
2725 kprintf(" rx ring: cur=%d\n", sc->rxq.cur);
2731 struct iwn_softc *sc = arg;
2732 struct ifnet *ifp = sc->sc_ifp;
2733 uint32_t r1, r2, tmp;
2735 /* Disable interrupts. */
2736 IWN_WRITE(sc, IWN_INT_MASK, 0);
2738 /* Read interrupts from ICT (fast) or from registers (slow). */
2739 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
2741 while (sc->ict[sc->ict_cur] != 0) {
2742 tmp |= sc->ict[sc->ict_cur];
2743 sc->ict[sc->ict_cur] = 0; /* Acknowledge. */
2744 sc->ict_cur = (sc->ict_cur + 1) % IWN_ICT_COUNT;
2747 if (tmp == 0xffffffff) /* Shouldn't happen. */
2749 else if (tmp & 0xc0000) /* Workaround a HW bug. */
2751 r1 = (tmp & 0xff00) << 16 | (tmp & 0xff);
2752 r2 = 0; /* Unused. */
2754 r1 = IWN_READ(sc, IWN_INT);
2755 if (r1 == 0xffffffff || (r1 & 0xfffffff0) == 0xa5a5a5a0)
2756 return; /* Hardware gone! */
2757 r2 = IWN_READ(sc, IWN_FH_INT);
2760 DPRINTF(sc, IWN_DEBUG_INTR, "interrupt reg1=%x reg2=%x\n", r1, r2);
2762 if (r1 == 0 && r2 == 0)
2763 goto done; /* Interrupt not for us. */
2765 /* Acknowledge interrupts. */
2766 IWN_WRITE(sc, IWN_INT, r1);
2767 if (!(sc->sc_flags & IWN_FLAG_USE_ICT))
2768 IWN_WRITE(sc, IWN_FH_INT, r2);
2770 if (r1 & IWN_INT_RF_TOGGLED) {
2771 iwn_rftoggle_intr(sc);
2774 if (r1 & IWN_INT_CT_REACHED) {
2775 device_printf(sc->sc_dev, "%s: critical temperature reached!\n",
2778 if (r1 & (IWN_INT_SW_ERR | IWN_INT_HW_ERR)) {
2780 ifp->if_flags &= ~IFF_UP;
2781 iwn_stop_locked(sc);
2784 if ((r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX | IWN_INT_RX_PERIODIC)) ||
2785 (r2 & IWN_FH_INT_RX)) {
2786 if (sc->sc_flags & IWN_FLAG_USE_ICT) {
2787 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX))
2788 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_RX);
2789 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
2790 IWN_INT_PERIODIC_DIS);
2792 if (r1 & (IWN_INT_FH_RX | IWN_INT_SW_RX)) {
2793 IWN_WRITE_1(sc, IWN_INT_PERIODIC,
2794 IWN_INT_PERIODIC_ENA);
2800 if ((r1 & IWN_INT_FH_TX) || (r2 & IWN_FH_INT_TX)) {
2801 if (sc->sc_flags & IWN_FLAG_USE_ICT)
2802 IWN_WRITE(sc, IWN_FH_INT, IWN_FH_INT_TX);
2803 wakeup(sc); /* FH DMA transfer completed. */
2806 if (r1 & IWN_INT_ALIVE)
2807 wakeup(sc); /* Firmware is alive. */
2809 if (r1 & IWN_INT_WAKEUP)
2810 iwn_wakeup_intr(sc);
2813 /* Re-enable interrupts. */
2814 if (ifp->if_flags & IFF_UP)
2815 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
2819 * Update TX scheduler ring when transmitting an 802.11 frame (4965AGN and
2820 * 5000 adapters use a slightly different format.)
2823 iwn4965_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
2826 uint16_t *w = &sc->sched[qid * IWN4965_SCHED_COUNT + idx];
2828 *w = htole16(len + 8);
2829 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2830 BUS_DMASYNC_PREWRITE);
2831 if (idx < IWN_SCHED_WINSZ) {
2832 *(w + IWN_TX_RING_COUNT) = *w;
2833 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2834 BUS_DMASYNC_PREWRITE);
2839 iwn5000_update_sched(struct iwn_softc *sc, int qid, int idx, uint8_t id,
2842 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
2844 *w = htole16(id << 12 | (len + 8));
2846 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2847 BUS_DMASYNC_PREWRITE);
2848 if (idx < IWN_SCHED_WINSZ) {
2849 *(w + IWN_TX_RING_COUNT) = *w;
2850 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2851 BUS_DMASYNC_PREWRITE);
2857 iwn5000_reset_sched(struct iwn_softc *sc, int qid, int idx)
2859 uint16_t *w = &sc->sched[qid * IWN5000_SCHED_COUNT + idx];
2861 *w = (*w & htole16(0xf000)) | htole16(1);
2862 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2863 BUS_DMASYNC_PREWRITE);
2864 if (idx < IWN_SCHED_WINSZ) {
2865 *(w + IWN_TX_RING_COUNT) = *w;
2866 bus_dmamap_sync(sc->sched_dma.tag, sc->sched_dma.map,
2867 BUS_DMASYNC_PREWRITE);
2873 iwn_plcp_signal(int rate) {
2876 for (i = 0; i < IWN_RIDX_MAX + 1; i++) {
2877 if (rate == iwn_rates[i].rate)
2885 iwn_tx_data(struct iwn_softc *sc, struct mbuf *m, struct ieee80211_node *ni,
2886 struct iwn_tx_ring *ring)
2888 const struct iwn_hal *hal = sc->sc_hal;
2889 const struct ieee80211_txparam *tp;
2890 const struct iwn_rate *rinfo;
2891 struct ieee80211vap *vap = ni->ni_vap;
2892 struct ieee80211com *ic = ni->ni_ic;
2893 struct iwn_node *wn = (void *)ni;
2894 struct iwn_tx_desc *desc;
2895 struct iwn_tx_data *data;
2896 struct iwn_tx_cmd *cmd;
2897 struct iwn_cmd_data *tx;
2898 struct ieee80211_frame *wh;
2899 struct ieee80211_key *k = NULL;
2901 bus_dma_segment_t segs[IWN_MAX_SCATTER];
2904 int totlen, error, pad, nsegs = 0, i, rate;
2905 uint8_t ridx, type, txant;
2907 wh = mtod(m, struct ieee80211_frame *);
2908 hdrlen = ieee80211_anyhdrsize(wh);
2909 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2911 desc = &ring->desc[ring->cur];
2912 data = &ring->data[ring->cur];
2914 /* Choose a TX rate index. */
2915 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
2916 if (type == IEEE80211_FC0_TYPE_MGT)
2917 rate = tp->mgmtrate;
2918 else if (IEEE80211_IS_MULTICAST(wh->i_addr1))
2919 rate = tp->mcastrate;
2920 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE)
2921 rate = tp->ucastrate;
2923 /* XXX pass pktlen */
2924 ieee80211_ratectl_rate(ni, NULL, 0);
2926 rate = ni->ni_txrate;
2928 ridx = iwn_plcp_signal(rate);
2929 rinfo = &iwn_rates[ridx];
2931 /* Encrypt the frame if need be. */
2932 if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
2933 k = ieee80211_crypto_encap(ni, m);
2938 /* Packet header may have moved, reset our local pointer. */
2939 wh = mtod(m, struct ieee80211_frame *);
2941 totlen = m->m_pkthdr.len;
2943 if (ieee80211_radiotap_active_vap(vap)) {
2944 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
2947 tap->wt_rate = rinfo->rate;
2949 tap->wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2951 ieee80211_radiotap_tx(vap, m);
2954 /* Prepare TX firmware command. */
2955 cmd = &ring->cmd[ring->cur];
2956 cmd->code = IWN_CMD_TX_DATA;
2958 cmd->qid = ring->qid;
2959 cmd->idx = ring->cur;
2961 tx = (struct iwn_cmd_data *)cmd->data;
2962 /* NB: No need to clear tx, all fields are reinitialized here. */
2963 tx->scratch = 0; /* clear "scratch" area */
2966 if (!IEEE80211_IS_MULTICAST(wh->i_addr1))
2967 flags |= IWN_TX_NEED_ACK;
2969 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
2970 (IEEE80211_FC0_TYPE_CTL | IEEE80211_FC0_SUBTYPE_BAR))
2971 flags |= IWN_TX_IMM_BA; /* Cannot happen yet. */
2973 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG)
2974 flags |= IWN_TX_MORE_FRAG; /* Cannot happen yet. */
2976 /* Check if frame must be protected using RTS/CTS or CTS-to-self. */
2977 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2978 /* NB: Group frames are sent using CCK in 802.11b/g. */
2979 if (totlen + IEEE80211_CRC_LEN > vap->iv_rtsthreshold) {
2980 flags |= IWN_TX_NEED_RTS;
2981 } else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
2982 ridx >= IWN_RIDX_OFDM6) {
2983 if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
2984 flags |= IWN_TX_NEED_CTS;
2985 else if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
2986 flags |= IWN_TX_NEED_RTS;
2988 if (flags & (IWN_TX_NEED_RTS | IWN_TX_NEED_CTS)) {
2989 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
2990 /* 5000 autoselects RTS/CTS or CTS-to-self. */
2991 flags &= ~(IWN_TX_NEED_RTS | IWN_TX_NEED_CTS);
2992 flags |= IWN_TX_NEED_PROTECTION;
2994 flags |= IWN_TX_FULL_TXOP;
2998 if (IEEE80211_IS_MULTICAST(wh->i_addr1) ||
2999 type != IEEE80211_FC0_TYPE_DATA)
3000 tx->id = hal->broadcast_id;
3004 if (type == IEEE80211_FC0_TYPE_MGT) {
3005 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3007 /* Tell HW to set timestamp in probe responses. */
3008 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
3009 flags |= IWN_TX_INSERT_TSTAMP;
3011 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
3012 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
3013 tx->timeout = htole16(3);
3015 tx->timeout = htole16(2);
3017 tx->timeout = htole16(0);
3020 /* First segment length must be a multiple of 4. */
3021 flags |= IWN_TX_NEED_PADDING;
3022 pad = 4 - (hdrlen & 3);
3026 tx->len = htole16(totlen);
3028 tx->rts_ntries = 60;
3029 tx->data_ntries = 15;
3030 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3031 tx->plcp = rinfo->plcp;
3032 tx->rflags = rinfo->flags;
3033 if (tx->id == hal->broadcast_id) {
3034 /* Group or management frame. */
3036 /* XXX Alternate between antenna A and B? */
3037 txant = IWN_LSB(sc->txchainmask);
3038 tx->rflags |= IWN_RFLAG_ANT(txant);
3040 tx->linkq = IWN_RIDX_OFDM54 - ridx;
3041 flags |= IWN_TX_LINKQ; /* enable MRR */
3044 /* Set physical address of "scratch area". */
3045 tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr));
3046 tx->hiaddr = IWN_HIADDR(data->scratch_paddr);
3048 /* Copy 802.11 header in TX command. */
3049 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
3051 /* Trim 802.11 header. */
3054 tx->flags = htole32(flags);
3057 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
3058 m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3059 if (error == EFBIG) {
3060 /* too many fragments, linearize */
3061 mnew = m_defrag(m, MB_DONTWAIT);
3063 device_printf(sc->sc_dev,
3064 "%s: could not defrag mbuf\n", __func__);
3069 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
3070 data->map, m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3073 device_printf(sc->sc_dev,
3074 "%s: bus_dmamap_load_mbuf_segment failed, error %d\n",
3084 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
3085 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
3087 /* Fill TX descriptor. */
3088 desc->nsegs = 1 + nsegs;
3089 /* First DMA segment is used by the TX command. */
3090 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3091 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
3092 (4 + sizeof (*tx) + hdrlen + pad) << 4);
3093 /* Other DMA segments are for data payload. */
3094 for (i = 1; i <= nsegs; i++) {
3095 desc->segs[i].addr = htole32(IWN_LOADDR(segs[i - 1].ds_addr));
3096 desc->segs[i].len = htole16(IWN_HIADDR(segs[i - 1].ds_addr) |
3097 segs[i - 1].ds_len << 4);
3100 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
3101 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3102 BUS_DMASYNC_PREWRITE);
3103 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3104 BUS_DMASYNC_PREWRITE);
3107 /* Update TX scheduler. */
3108 hal->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
3112 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3113 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3115 /* Mark TX ring as full if we reach a certain threshold. */
3116 if (++ring->queued > IWN_TX_RING_HIMARK)
3117 sc->qfullmsk |= 1 << ring->qid;
3123 iwn_tx_data_raw(struct iwn_softc *sc, struct mbuf *m,
3124 struct ieee80211_node *ni, struct iwn_tx_ring *ring,
3125 const struct ieee80211_bpf_params *params)
3127 const struct iwn_hal *hal = sc->sc_hal;
3128 const struct iwn_rate *rinfo;
3129 struct ifnet *ifp = sc->sc_ifp;
3130 struct ieee80211vap *vap = ni->ni_vap;
3131 struct ieee80211com *ic = ifp->if_l2com;
3132 struct iwn_tx_cmd *cmd;
3133 struct iwn_cmd_data *tx;
3134 struct ieee80211_frame *wh;
3135 struct iwn_tx_desc *desc;
3136 struct iwn_tx_data *data;
3139 bus_dma_segment_t segs[IWN_MAX_SCATTER];
3142 int totlen, error, pad, nsegs = 0, i, rate;
3143 uint8_t ridx, type, txant;
3145 wh = mtod(m, struct ieee80211_frame *);
3146 hdrlen = ieee80211_anyhdrsize(wh);
3147 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
3149 desc = &ring->desc[ring->cur];
3150 data = &ring->data[ring->cur];
3152 /* Choose a TX rate index. */
3153 rate = params->ibp_rate0;
3154 if (!ieee80211_isratevalid(ic->ic_rt, rate)) {
3155 /* XXX fall back to mcast/mgmt rate? */
3159 ridx = iwn_plcp_signal(rate);
3160 rinfo = &iwn_rates[ridx];
3162 totlen = m->m_pkthdr.len;
3164 /* Prepare TX firmware command. */
3165 cmd = &ring->cmd[ring->cur];
3166 cmd->code = IWN_CMD_TX_DATA;
3168 cmd->qid = ring->qid;
3169 cmd->idx = ring->cur;
3171 tx = (struct iwn_cmd_data *)cmd->data;
3172 /* NB: No need to clear tx, all fields are reinitialized here. */
3173 tx->scratch = 0; /* clear "scratch" area */
3176 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0)
3177 flags |= IWN_TX_NEED_ACK;
3178 if (params->ibp_flags & IEEE80211_BPF_RTS) {
3179 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
3180 /* 5000 autoselects RTS/CTS or CTS-to-self. */
3181 flags &= ~IWN_TX_NEED_RTS;
3182 flags |= IWN_TX_NEED_PROTECTION;
3184 flags |= IWN_TX_NEED_RTS | IWN_TX_FULL_TXOP;
3186 if (params->ibp_flags & IEEE80211_BPF_CTS) {
3187 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
3188 /* 5000 autoselects RTS/CTS or CTS-to-self. */
3189 flags &= ~IWN_TX_NEED_CTS;
3190 flags |= IWN_TX_NEED_PROTECTION;
3192 flags |= IWN_TX_NEED_CTS | IWN_TX_FULL_TXOP;
3194 if (type == IEEE80211_FC0_TYPE_MGT) {
3195 uint8_t subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3197 if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
3198 flags |= IWN_TX_INSERT_TSTAMP;
3200 if (subtype == IEEE80211_FC0_SUBTYPE_ASSOC_REQ ||
3201 subtype == IEEE80211_FC0_SUBTYPE_REASSOC_REQ)
3202 tx->timeout = htole16(3);
3204 tx->timeout = htole16(2);
3206 tx->timeout = htole16(0);
3209 /* First segment length must be a multiple of 4. */
3210 flags |= IWN_TX_NEED_PADDING;
3211 pad = 4 - (hdrlen & 3);
3215 if (ieee80211_radiotap_active_vap(vap)) {
3216 struct iwn_tx_radiotap_header *tap = &sc->sc_txtap;
3219 tap->wt_rate = rate;
3221 ieee80211_radiotap_tx(vap, m);
3224 tx->len = htole16(totlen);
3226 tx->id = hal->broadcast_id;
3227 tx->rts_ntries = params->ibp_try1;
3228 tx->data_ntries = params->ibp_try0;
3229 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
3230 tx->plcp = rinfo->plcp;
3231 tx->rflags = rinfo->flags;
3232 /* Group or management frame. */
3234 txant = IWN_LSB(sc->txchainmask);
3235 tx->rflags |= IWN_RFLAG_ANT(txant);
3236 /* Set physical address of "scratch area". */
3237 paddr = ring->cmd_dma.paddr + ring->cur * sizeof (struct iwn_tx_cmd);
3238 tx->loaddr = htole32(IWN_LOADDR(paddr));
3239 tx->hiaddr = IWN_HIADDR(paddr);
3241 /* Copy 802.11 header in TX command. */
3242 memcpy((uint8_t *)(tx + 1), wh, hdrlen);
3244 /* Trim 802.11 header. */
3247 tx->flags = htole32(flags);
3250 error = bus_dmamap_load_mbuf_segment(ring->data_dmat, data->map,
3251 m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3252 if (error == EFBIG) {
3253 /* Too many fragments, linearize. */
3254 mnew = m_defrag(m, MB_DONTWAIT);
3256 device_printf(sc->sc_dev,
3257 "%s: could not defrag mbuf\n", __func__);
3262 error = bus_dmamap_load_mbuf_segment(ring->data_dmat,
3263 data->map, m, segs, IWN_MAX_SCATTER - 1, &nsegs, BUS_DMA_NOWAIT);
3266 device_printf(sc->sc_dev,
3267 "%s: bus_dmamap_load_mbuf_segment failed, error %d\n",
3277 DPRINTF(sc, IWN_DEBUG_XMIT, "%s: qid %d idx %d len %d nsegs %d\n",
3278 __func__, ring->qid, ring->cur, m->m_pkthdr.len, nsegs);
3280 /* Fill TX descriptor. */
3281 desc->nsegs = 1 + nsegs;
3282 /* First DMA segment is used by the TX command. */
3283 desc->segs[0].addr = htole32(IWN_LOADDR(data->cmd_paddr));
3284 desc->segs[0].len = htole16(IWN_HIADDR(data->cmd_paddr) |
3285 (4 + sizeof (*tx) + hdrlen + pad) << 4);
3286 /* Other DMA segments are for data payload. */
3287 for (i = 1; i <= nsegs; i++) {
3288 desc->segs[i].addr = htole32(IWN_LOADDR(segs[i - 1].ds_addr));
3289 desc->segs[i].len = htole16(IWN_HIADDR(segs[i - 1].ds_addr) |
3290 segs[i - 1].ds_len << 4);
3293 bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
3294 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3295 BUS_DMASYNC_PREWRITE);
3296 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3297 BUS_DMASYNC_PREWRITE);
3300 /* Update TX scheduler. */
3301 hal->update_sched(sc, ring->qid, ring->cur, tx->id, totlen);
3305 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3306 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3308 /* Mark TX ring as full if we reach a certain threshold. */
3309 if (++ring->queued > IWN_TX_RING_HIMARK)
3310 sc->qfullmsk |= 1 << ring->qid;
3316 iwn_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
3317 const struct ieee80211_bpf_params *params)
3319 struct ieee80211com *ic = ni->ni_ic;
3320 struct ifnet *ifp = ic->ic_ifp;
3321 struct iwn_softc *sc = ifp->if_softc;
3322 struct iwn_tx_ring *txq;
3325 if ((ifp->if_flags & IFF_RUNNING) == 0) {
3326 ieee80211_free_node(ni);
3332 txq = &sc->txq[M_WME_GETAC(m)];
3334 txq = &sc->txq[params->ibp_pri & 3];
3336 if (params == NULL) {
3338 * Legacy path; interpret frame contents to decide
3339 * precisely how to send the frame.
3341 error = iwn_tx_data(sc, m, ni, txq);
3344 * Caller supplied explicit parameters to use in
3345 * sending the frame.
3347 error = iwn_tx_data_raw(sc, m, ni, txq, params);
3350 /* NB: m is reclaimed on tx failure */
3351 ieee80211_free_node(ni);
3358 iwn_start(struct ifnet *ifp)
3360 struct iwn_softc *sc;
3364 iwn_start_locked(ifp);
3368 iwn_start_locked(struct ifnet *ifp)
3370 struct iwn_softc *sc = ifp->if_softc;
3371 struct ieee80211_node *ni;
3372 struct iwn_tx_ring *txq;
3377 if (sc->qfullmsk != 0) {
3378 ifp->if_flags |= IFF_OACTIVE;
3381 m = ifq_dequeue(&ifp->if_snd, NULL);
3384 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
3385 pri = M_WME_GETAC(m);
3386 txq = &sc->txq[pri];
3387 if (iwn_tx_data(sc, m, ni, txq) != 0) {
3389 ieee80211_free_node(ni);
3392 sc->sc_tx_timer = 5;
3397 iwn_watchdog(struct iwn_softc *sc)
3399 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
3400 struct ifnet *ifp = sc->sc_ifp;
3401 struct ieee80211com *ic = ifp->if_l2com;
3403 if_printf(ifp, "device timeout\n");
3404 ieee80211_runtask(ic, &sc->sc_reinit_task);
3409 iwn_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *ucred)
3411 struct iwn_softc *sc = ifp->if_softc;
3412 struct ieee80211com *ic = ifp->if_l2com;
3413 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3414 struct ifreq *ifr = (struct ifreq *) data;
3415 int error = 0, startall = 0, stop = 0;
3419 if (ifp->if_flags & IFF_UP) {
3420 if (!(ifp->if_flags & IFF_RUNNING)) {
3421 iwn_init_locked(sc);
3422 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)
3428 if (ifp->if_flags & IFF_RUNNING)
3429 iwn_stop_locked(sc);
3432 ieee80211_start_all(ic);
3433 else if (vap != NULL && stop)
3434 ieee80211_stop(vap);
3437 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
3440 error = ether_ioctl(ifp, cmd, data);
3450 * Send a command to the firmware.
3453 iwn_cmd(struct iwn_softc *sc, int code, const void *buf, int size, int async)
3455 struct iwn_tx_ring *ring = &sc->txq[4];
3456 struct iwn_tx_desc *desc;
3457 struct iwn_tx_data *data;
3458 struct iwn_tx_cmd *cmd;
3463 desc = &ring->desc[ring->cur];
3464 data = &ring->data[ring->cur];
3467 if (size > sizeof cmd->data) {
3468 /* Command is too large to fit in a descriptor. */
3469 if (totlen > MCLBYTES)
3471 m = m_getcl(MB_DONTWAIT, MT_DATA, M_PKTHDR);
3474 cmd = mtod(m, struct iwn_tx_cmd *);
3475 error = bus_dmamap_load(ring->data_dmat, data->map, cmd,
3476 totlen, iwn_dma_map_addr, &paddr, BUS_DMA_NOWAIT);
3483 cmd = &ring->cmd[ring->cur];
3484 paddr = data->cmd_paddr;
3489 cmd->qid = ring->qid;
3490 cmd->idx = ring->cur;
3491 memcpy(cmd->data, buf, size);
3494 desc->segs[0].addr = htole32(IWN_LOADDR(paddr));
3495 desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
3497 DPRINTF(sc, IWN_DEBUG_CMD, "%s: %s (0x%x) flags %d qid %d idx %d\n",
3498 __func__, iwn_intr_str(cmd->code), cmd->code,
3499 cmd->flags, cmd->qid, cmd->idx);
3501 if (size > sizeof cmd->data) {
3502 bus_dmamap_sync(ring->data_dmat, data->map,
3503 BUS_DMASYNC_PREWRITE);
3505 bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map,
3506 BUS_DMASYNC_PREWRITE);
3508 bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,
3509 BUS_DMASYNC_PREWRITE);
3512 /* Update TX scheduler. */
3513 sc->sc_hal->update_sched(sc, ring->qid, ring->cur, 0, 0);
3516 /* Kick command ring. */
3517 ring->cur = (ring->cur + 1) % IWN_TX_RING_COUNT;
3518 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, ring->qid << 8 | ring->cur);
3523 error = zsleep(desc, &wlan_global_serializer, 0, "iwncmd", hz);
3528 iwn4965_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
3530 struct iwn4965_node_info hnode;
3534 * We use the node structure for 5000 Series internally (it is
3535 * a superset of the one for 4965AGN). We thus copy the common
3536 * fields before sending the command.
3538 src = (caddr_t)node;
3539 dst = (caddr_t)&hnode;
3540 memcpy(dst, src, 48);
3541 /* Skip TSC, RX MIC and TX MIC fields from ``src''. */
3542 memcpy(dst + 48, src + 72, 20);
3543 return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async);
3547 iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
3549 /* Direct mapping. */
3550 return iwn_cmd(sc, IWN_CMD_ADD_NODE, node, sizeof (*node), async);
3554 static const uint8_t iwn_ridx_to_plcp[] = {
3555 10, 20, 55, 110, /* CCK */
3556 0xd, 0xf, 0x5, 0x7, 0x9, 0xb, 0x1, 0x3, 0x3 /* OFDM R1-R4 */
3558 static const uint8_t iwn_siso_mcs_to_plcp[] = {
3559 0, 0, 0, 0, /* CCK */
3560 0, 0, 1, 2, 3, 4, 5, 6, 7 /* HT */
3562 static const uint8_t iwn_mimo_mcs_to_plcp[] = {
3563 0, 0, 0, 0, /* CCK */
3564 8, 8, 9, 10, 11, 12, 13, 14, 15 /* HT */
3567 static const uint8_t iwn_prev_ridx[] = {
3568 /* NB: allow fallback from CCK11 to OFDM9 and from OFDM6 to CCK5 */
3569 0, 0, 1, 5, /* CCK */
3570 2, 4, 3, 6, 7, 8, 9, 10, 10 /* OFDM */
3574 * Configure hardware link parameters for the specified
3575 * node operating on the specified channel.
3578 iwn_set_link_quality(struct iwn_softc *sc, uint8_t id, int async)
3580 struct ifnet *ifp = sc->sc_ifp;
3581 struct ieee80211com *ic = ifp->if_l2com;
3582 struct iwn_cmd_link_quality linkq;
3583 const struct iwn_rate *rinfo;
3585 uint8_t txant, ridx;
3587 /* Use the first valid TX antenna. */
3588 txant = IWN_LSB(sc->txchainmask);
3590 memset(&linkq, 0, sizeof linkq);
3592 linkq.antmsk_1stream = txant;
3593 linkq.antmsk_2stream = IWN_ANT_AB;
3594 linkq.ampdu_max = 31;
3595 linkq.ampdu_threshold = 3;
3596 linkq.ampdu_limit = htole16(4000); /* 4ms */
3599 if (IEEE80211_IS_CHAN_HT(c))
3603 if (id == IWN_ID_BSS)
3604 ridx = IWN_RIDX_OFDM54;
3605 else if (IEEE80211_IS_CHAN_A(ic->ic_curchan))
3606 ridx = IWN_RIDX_OFDM6;
3608 ridx = IWN_RIDX_CCK1;
3610 for (i = 0; i < IWN_MAX_TX_RETRIES; i++) {
3611 rinfo = &iwn_rates[ridx];
3613 if (IEEE80211_IS_CHAN_HT40(c)) {
3614 linkq.retry[i].plcp = iwn_mimo_mcs_to_plcp[ridx]
3616 linkq.retry[i].rflags = IWN_RFLAG_HT
3619 } else if (IEEE80211_IS_CHAN_HT(c)) {
3620 linkq.retry[i].plcp = iwn_siso_mcs_to_plcp[ridx]
3622 linkq.retry[i].rflags = IWN_RFLAG_HT;
3627 linkq.retry[i].plcp = rinfo->plcp;
3628 linkq.retry[i].rflags = rinfo->flags;
3630 linkq.retry[i].rflags |= IWN_RFLAG_ANT(txant);
3631 ridx = iwn_prev_ridx[ridx];
3634 if (sc->sc_debug & IWN_DEBUG_STATE) {
3635 kprintf("%s: set link quality for node %d, mimo %d ssmask %d\n",
3636 __func__, id, linkq.mimo, linkq.antmsk_1stream);
3637 kprintf("%s:", __func__);
3638 for (i = 0; i < IWN_MAX_TX_RETRIES; i++)
3639 kprintf(" %d:%x", linkq.retry[i].plcp,
3640 linkq.retry[i].rflags);
3644 return iwn_cmd(sc, IWN_CMD_LINK_QUALITY, &linkq, sizeof linkq, async);
3648 * Broadcast node is used to send group-addressed and management frames.
3651 iwn_add_broadcast_node(struct iwn_softc *sc, int async)
3653 const struct iwn_hal *hal = sc->sc_hal;
3654 struct ifnet *ifp = sc->sc_ifp;
3655 struct iwn_node_info node;
3658 memset(&node, 0, sizeof node);
3659 IEEE80211_ADDR_COPY(node.macaddr, ifp->if_broadcastaddr);
3660 node.id = hal->broadcast_id;
3661 DPRINTF(sc, IWN_DEBUG_RESET, "%s: adding broadcast node\n", __func__);
3662 error = hal->add_node(sc, &node, async);
3666 error = iwn_set_link_quality(sc, hal->broadcast_id, async);
3671 iwn_wme_update(struct ieee80211com *ic)
3673 #define IWN_EXP2(x) ((1 << (x)) - 1) /* CWmin = 2^ECWmin - 1 */
3674 #define IWN_TXOP_TO_US(v) (v<<5)
3675 struct iwn_softc *sc = ic->ic_ifp->if_softc;
3676 struct iwn_edca_params cmd;
3679 memset(&cmd, 0, sizeof cmd);
3680 cmd.flags = htole32(IWN_EDCA_UPDATE);
3681 for (i = 0; i < WME_NUM_AC; i++) {
3682 const struct wmeParams *wmep =
3683 &ic->ic_wme.wme_chanParams.cap_wmeParams[i];
3684 cmd.ac[i].aifsn = wmep->wmep_aifsn;
3685 cmd.ac[i].cwmin = htole16(IWN_EXP2(wmep->wmep_logcwmin));
3686 cmd.ac[i].cwmax = htole16(IWN_EXP2(wmep->wmep_logcwmax));
3687 cmd.ac[i].txoplimit =
3688 htole16(IWN_TXOP_TO_US(wmep->wmep_txopLimit));
3690 (void) iwn_cmd(sc, IWN_CMD_EDCA_PARAMS, &cmd, sizeof cmd, 1 /*async*/);
3692 #undef IWN_TXOP_TO_US
3697 iwn_update_mcast(struct ifnet *ifp)
3703 iwn_set_led(struct iwn_softc *sc, uint8_t which, uint8_t off, uint8_t on)
3705 struct iwn_cmd_led led;
3707 /* Clear microcode LED ownership. */
3708 IWN_CLRBITS(sc, IWN_LED, IWN_LED_BSM_CTRL);
3711 led.unit = htole32(10000); /* on/off in unit of 100ms */
3714 (void)iwn_cmd(sc, IWN_CMD_SET_LED, &led, sizeof led, 1);
3718 * Set the critical temperature at which the firmware will stop the radio
3722 iwn_set_critical_temp(struct iwn_softc *sc)
3724 struct iwn_critical_temp crit;
3727 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CTEMP_STOP_RF);
3729 if (sc->hw_type == IWN_HW_REV_TYPE_5150)
3730 temp = (IWN_CTOK(110) - sc->temp_off) * -5;
3731 else if (sc->hw_type == IWN_HW_REV_TYPE_4965)
3732 temp = IWN_CTOK(110);
3735 memset(&crit, 0, sizeof crit);
3736 crit.tempR = htole32(temp);
3737 DPRINTF(sc, IWN_DEBUG_RESET, "setting critical temp to %d\n",
3739 return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0);
3743 iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni)
3745 struct iwn_cmd_timing cmd;
3748 memset(&cmd, 0, sizeof cmd);
3749 memcpy(&cmd.tstamp, ni->ni_tstamp.data, sizeof (uint64_t));
3750 cmd.bintval = htole16(ni->ni_intval);
3751 cmd.lintval = htole16(10);
3753 /* Compute remaining time until next beacon. */
3754 val = (uint64_t)ni->ni_intval * 1024; /* msecs -> usecs */
3755 mod = le64toh(cmd.tstamp) % val;
3756 cmd.binitval = htole32((uint32_t)(val - mod));
3758 DPRINTF(sc, IWN_DEBUG_RESET, "timing bintval=%u tstamp=%ju, init=%u\n",
3759 ni->ni_intval, le64toh(cmd.tstamp), (uint32_t)(val - mod));
3761 return iwn_cmd(sc, IWN_CMD_TIMING, &cmd, sizeof cmd, 1);
3765 iwn4965_power_calibration(struct iwn_softc *sc, int temp)
3767 struct ifnet *ifp = sc->sc_ifp;
3768 struct ieee80211com *ic = ifp->if_l2com;
3770 /* Adjust TX power if need be (delta >= 3 degC.) */
3771 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: temperature %d->%d\n",
3772 __func__, sc->temp, temp);
3773 if (abs(temp - sc->temp) >= 3) {
3774 /* Record temperature of last calibration. */
3776 (void)iwn4965_set_txpower(sc, ic->ic_bsschan, 1);
3781 * Set TX power for current channel (each rate has its own power settings).
3782 * This function takes into account the regulatory information from EEPROM,
3783 * the current temperature and the current voltage.
3786 iwn4965_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
3789 /* Fixed-point arithmetic division using a n-bit fractional part. */
3790 #define fdivround(a, b, n) \
3791 ((((1 << n) * (a)) / (b) + (1 << n) / 2) / (1 << n))
3792 /* Linear interpolation. */
3793 #define interpolate(x, x1, y1, x2, y2, n) \
3794 ((y1) + fdivround(((int)(x) - (x1)) * ((y2) - (y1)), (x2) - (x1), n))
3796 static const int tdiv[IWN_NATTEN_GROUPS] = { 9, 8, 8, 8, 6 };
3797 struct ifnet *ifp = sc->sc_ifp;
3798 struct ieee80211com *ic = ifp->if_l2com;
3799 struct iwn_ucode_info *uc = &sc->ucode_info;
3800 struct iwn4965_cmd_txpower cmd;
3801 struct iwn4965_eeprom_chan_samples *chans;
3802 int32_t vdiff, tdiff;
3803 int i, c, grp, maxpwr;
3804 const uint8_t *rf_gain, *dsp_gain;
3807 /* Retrieve channel number. */
3808 chan = ieee80211_chan2ieee(ic, ch);
3809 DPRINTF(sc, IWN_DEBUG_RESET, "setting TX power for channel %d\n",
3812 memset(&cmd, 0, sizeof cmd);
3813 cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1;
3816 if (IEEE80211_IS_CHAN_5GHZ(ch)) {
3817 maxpwr = sc->maxpwr5GHz;
3818 rf_gain = iwn4965_rf_gain_5ghz;
3819 dsp_gain = iwn4965_dsp_gain_5ghz;
3821 maxpwr = sc->maxpwr2GHz;
3822 rf_gain = iwn4965_rf_gain_2ghz;
3823 dsp_gain = iwn4965_dsp_gain_2ghz;
3826 /* Compute voltage compensation. */
3827 vdiff = ((int32_t)le32toh(uc->volt) - sc->eeprom_voltage) / 7;
3832 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3833 "%s: voltage compensation=%d (UCODE=%d, EEPROM=%d)\n",
3834 __func__, vdiff, le32toh(uc->volt), sc->eeprom_voltage);
3836 /* Get channel attenuation group. */
3837 if (chan <= 20) /* 1-20 */
3839 else if (chan <= 43) /* 34-43 */
3841 else if (chan <= 70) /* 44-70 */
3843 else if (chan <= 124) /* 71-124 */
3847 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3848 "%s: chan %d, attenuation group=%d\n", __func__, chan, grp);
3850 /* Get channel sub-band. */
3851 for (i = 0; i < IWN_NBANDS; i++)
3852 if (sc->bands[i].lo != 0 &&
3853 sc->bands[i].lo <= chan && chan <= sc->bands[i].hi)
3855 if (i == IWN_NBANDS) /* Can't happen in real-life. */
3857 chans = sc->bands[i].chans;
3858 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3859 "%s: chan %d sub-band=%d\n", __func__, chan, i);
3861 for (c = 0; c < 2; c++) {
3862 uint8_t power, gain, temp;
3863 int maxchpwr, pwr, ridx, idx;
3865 power = interpolate(chan,
3866 chans[0].num, chans[0].samples[c][1].power,
3867 chans[1].num, chans[1].samples[c][1].power, 1);
3868 gain = interpolate(chan,
3869 chans[0].num, chans[0].samples[c][1].gain,
3870 chans[1].num, chans[1].samples[c][1].gain, 1);
3871 temp = interpolate(chan,
3872 chans[0].num, chans[0].samples[c][1].temp,
3873 chans[1].num, chans[1].samples[c][1].temp, 1);
3874 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3875 "%s: Tx chain %d: power=%d gain=%d temp=%d\n",
3876 __func__, c, power, gain, temp);
3878 /* Compute temperature compensation. */
3879 tdiff = ((sc->temp - temp) * 2) / tdiv[grp];
3880 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3881 "%s: temperature compensation=%d (current=%d, EEPROM=%d)\n",
3882 __func__, tdiff, sc->temp, temp);
3884 for (ridx = 0; ridx <= IWN_RIDX_MAX; ridx++) {
3885 /* Convert dBm to half-dBm. */
3886 maxchpwr = sc->maxpwr[chan] * 2;
3888 maxchpwr -= 6; /* MIMO 2T: -3dB */
3892 /* Adjust TX power based on rate. */
3893 if ((ridx % 8) == 5)
3894 pwr -= 15; /* OFDM48: -7.5dB */
3895 else if ((ridx % 8) == 6)
3896 pwr -= 17; /* OFDM54: -8.5dB */
3897 else if ((ridx % 8) == 7)
3898 pwr -= 20; /* OFDM60: -10dB */
3900 pwr -= 10; /* Others: -5dB */
3902 /* Do not exceed channel max TX power. */
3906 idx = gain - (pwr - power) - tdiff - vdiff;
3907 if ((ridx / 8) & 1) /* MIMO */
3908 idx += (int32_t)le32toh(uc->atten[grp][c]);
3911 idx += 9; /* 5GHz */
3912 if (ridx == IWN_RIDX_MAX)
3915 /* Make sure idx stays in a valid range. */
3918 else if (idx > IWN4965_MAX_PWR_INDEX)
3919 idx = IWN4965_MAX_PWR_INDEX;
3921 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3922 "%s: Tx chain %d, rate idx %d: power=%d\n",
3923 __func__, c, ridx, idx);
3924 cmd.power[ridx].rf_gain[c] = rf_gain[idx];
3925 cmd.power[ridx].dsp_gain[c] = dsp_gain[idx];
3929 DPRINTF(sc, IWN_DEBUG_CALIBRATE | IWN_DEBUG_TXPOW,
3930 "%s: set tx power for chan %d\n", __func__, chan);
3931 return iwn_cmd(sc, IWN_CMD_TXPOWER, &cmd, sizeof cmd, async);
3938 iwn5000_set_txpower(struct iwn_softc *sc, struct ieee80211_channel *ch,
3941 struct iwn5000_cmd_txpower cmd;
3944 * TX power calibration is handled automatically by the firmware
3947 memset(&cmd, 0, sizeof cmd);
3948 cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */
3949 cmd.flags = IWN5000_TXPOWER_NO_CLOSED;
3950 cmd.srv_limit = IWN5000_TXPOWER_AUTO;
3951 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: setting TX power\n", __func__);
3952 return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async);
3956 * Retrieve the maximum RSSI (in dBm) among receivers.
3959 iwn4965_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
3961 struct iwn4965_rx_phystat *phy = (void *)stat->phybuf;
3965 mask = (le16toh(phy->antenna) >> 4) & IWN_ANT_ABC;
3966 agc = (le16toh(phy->agc) >> 7) & 0x7f;
3970 if (mask & IWN_ANT_A) /* Ant A */
3971 rssi = max(rssi, phy->rssi[0]);
3972 if (mask & IWN_ATH_B) /* Ant B */
3973 rssi = max(rssi, phy->rssi[2]);
3974 if (mask & IWN_ANT_C) /* Ant C */
3975 rssi = max(rssi, phy->rssi[4]);
3977 rssi = max(rssi, phy->rssi[0]);
3978 rssi = max(rssi, phy->rssi[2]);
3979 rssi = max(rssi, phy->rssi[4]);
3982 DPRINTF(sc, IWN_DEBUG_RECV, "%s: agc %d mask 0x%x rssi %d %d %d "
3983 "result %d\n", __func__, agc, mask,
3984 phy->rssi[0], phy->rssi[2], phy->rssi[4],
3985 rssi - agc - IWN_RSSI_TO_DBM);
3986 return rssi - agc - IWN_RSSI_TO_DBM;
3990 iwn5000_get_rssi(struct iwn_softc *sc, struct iwn_rx_stat *stat)
3992 struct iwn5000_rx_phystat *phy = (void *)stat->phybuf;
3996 agc = (le32toh(phy->agc) >> 9) & 0x7f;
3998 rssi = MAX(le16toh(phy->rssi[0]) & 0xff,
3999 le16toh(phy->rssi[1]) & 0xff);
4000 rssi = MAX(le16toh(phy->rssi[2]) & 0xff, rssi);
4002 DPRINTF(sc, IWN_DEBUG_RECV, "%s: agc %d rssi %d %d %d "
4003 "result %d\n", __func__, agc,
4004 phy->rssi[0], phy->rssi[1], phy->rssi[2],
4005 rssi - agc - IWN_RSSI_TO_DBM);
4006 return rssi - agc - IWN_RSSI_TO_DBM;
4010 * Retrieve the average noise (in dBm) among receivers.
4013 iwn_get_noise(const struct iwn_rx_general_stats *stats)
4015 int i, total, nbant, noise;
4018 for (i = 0; i < 3; i++) {
4019 if ((noise = le32toh(stats->noise[i]) & 0xff) == 0)
4024 /* There should be at least one antenna but check anyway. */
4025 return (nbant == 0) ? -127 : (total / nbant) - 107;
4029 * Compute temperature (in degC) from last received statistics.
4032 iwn4965_get_temperature(struct iwn_softc *sc)
4034 struct iwn_ucode_info *uc = &sc->ucode_info;
4035 int32_t r1, r2, r3, r4, temp;
4037 r1 = le32toh(uc->temp[0].chan20MHz);
4038 r2 = le32toh(uc->temp[1].chan20MHz);
4039 r3 = le32toh(uc->temp[2].chan20MHz);
4040 r4 = le32toh(sc->rawtemp);
4042 if (r1 == r3) /* Prevents division by 0 (should not happen.) */
4045 /* Sign-extend 23-bit R4 value to 32-bit. */
4046 r4 = (r4 << 8) >> 8;
4047 /* Compute temperature in Kelvin. */
4048 temp = (259 * (r4 - r2)) / (r3 - r1);
4049 temp = (temp * 97) / 100 + 8;
4051 DPRINTF(sc, IWN_DEBUG_ANY, "temperature %dK/%dC\n", temp,
4053 return IWN_KTOC(temp);
4057 iwn5000_get_temperature(struct iwn_softc *sc)
4062 * Temperature is not used by the driver for 5000 Series because
4063 * TX power calibration is handled by firmware. We export it to
4064 * users through the sensor framework though.
4066 temp = le32toh(sc->rawtemp);
4067 if (sc->hw_type == IWN_HW_REV_TYPE_5150) {
4068 temp = (temp / -5) + sc->temp_off;
4069 temp = IWN_KTOC(temp);
4075 * Initialize sensitivity calibration state machine.
4078 iwn_init_sensitivity(struct iwn_softc *sc)
4080 const struct iwn_hal *hal = sc->sc_hal;
4081 struct iwn_calib_state *calib = &sc->calib;
4085 /* Reset calibration state machine. */
4086 memset(calib, 0, sizeof (*calib));
4087 calib->state = IWN_CALIB_STATE_INIT;
4088 calib->cck_state = IWN_CCK_STATE_HIFA;
4089 /* Set initial correlation values. */
4090 calib->ofdm_x1 = sc->limits->min_ofdm_x1;
4091 calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
4092 calib->ofdm_x4 = sc->limits->min_ofdm_x4;
4093 calib->ofdm_mrc_x4 = sc->limits->min_ofdm_mrc_x4;
4094 calib->cck_x4 = 125;
4095 calib->cck_mrc_x4 = sc->limits->min_cck_mrc_x4;
4096 calib->energy_cck = sc->limits->energy_cck;
4098 /* Write initial sensitivity. */
4099 error = iwn_send_sensitivity(sc);
4103 /* Write initial gains. */
4104 error = hal->init_gains(sc);
4108 /* Request statistics at each beacon interval. */
4110 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: calibrate phy\n", __func__);
4111 return iwn_cmd(sc, IWN_CMD_GET_STATISTICS, &flags, sizeof flags, 1);
4115 * Collect noise and RSSI statistics for the first 20 beacons received
4116 * after association and use them to determine connected antennas and
4117 * to set differential gains.
4120 iwn_collect_noise(struct iwn_softc *sc,
4121 const struct iwn_rx_general_stats *stats)
4123 const struct iwn_hal *hal = sc->sc_hal;
4124 struct iwn_calib_state *calib = &sc->calib;
4128 /* Accumulate RSSI and noise for all 3 antennas. */
4129 for (i = 0; i < 3; i++) {
4130 calib->rssi[i] += le32toh(stats->rssi[i]) & 0xff;
4131 calib->noise[i] += le32toh(stats->noise[i]) & 0xff;
4133 /* NB: We update differential gains only once after 20 beacons. */
4134 if (++calib->nbeacons < 20)
4137 /* Determine highest average RSSI. */
4138 val = MAX(calib->rssi[0], calib->rssi[1]);
4139 val = MAX(calib->rssi[2], val);
4141 /* Determine which antennas are connected. */
4142 sc->chainmask = sc->rxchainmask;
4143 for (i = 0; i < 3; i++)
4144 if (val - calib->rssi[i] > 15 * 20)
4145 sc->chainmask &= ~(1 << i);
4147 /* If none of the TX antennas are connected, keep at least one. */
4148 if ((sc->chainmask & sc->txchainmask) == 0)
4149 sc->chainmask |= IWN_LSB(sc->txchainmask);
4151 (void)hal->set_gains(sc);
4152 calib->state = IWN_CALIB_STATE_RUN;
4155 /* XXX Disable RX chains with no antennas connected. */
4156 sc->rxon.rxchain = htole16(IWN_RXCHAIN_SEL(sc->chainmask));
4157 (void)iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4162 /* Enable power-saving mode if requested by user. */
4163 if (sc->sc_ic.ic_flags & IEEE80211_F_PMGTON)
4164 (void)iwn_set_pslevel(sc, 0, 3, 1);
4169 iwn4965_init_gains(struct iwn_softc *sc)
4171 struct iwn_phy_calib_gain cmd;
4173 memset(&cmd, 0, sizeof cmd);
4174 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
4175 /* Differential gains initially set to 0 for all 3 antennas. */
4176 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4177 "%s: setting initial differential gains\n", __func__);
4178 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4182 iwn5000_init_gains(struct iwn_softc *sc)
4184 struct iwn_phy_calib cmd;
4186 memset(&cmd, 0, sizeof cmd);
4187 cmd.code = IWN5000_PHY_CALIB_RESET_NOISE_GAIN;
4190 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4191 "%s: setting initial differential gains\n", __func__);
4192 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4196 iwn4965_set_gains(struct iwn_softc *sc)
4198 struct iwn_calib_state *calib = &sc->calib;
4199 struct iwn_phy_calib_gain cmd;
4200 int i, delta, noise;
4202 /* Get minimal noise among connected antennas. */
4203 noise = INT_MAX; /* NB: There's at least one antenna. */
4204 for (i = 0; i < 3; i++)
4205 if (sc->chainmask & (1 << i))
4206 noise = MIN(calib->noise[i], noise);
4208 memset(&cmd, 0, sizeof cmd);
4209 cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN;
4210 /* Set differential gains for connected antennas. */
4211 for (i = 0; i < 3; i++) {
4212 if (sc->chainmask & (1 << i)) {
4213 /* Compute attenuation (in unit of 1.5dB). */
4214 delta = (noise - (int32_t)calib->noise[i]) / 30;
4215 /* NB: delta <= 0 */
4216 /* Limit to [-4.5dB,0]. */
4217 cmd.gain[i] = MIN(abs(delta), 3);
4219 cmd.gain[i] |= 1 << 2; /* sign bit */
4222 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4223 "setting differential gains Ant A/B/C: %x/%x/%x (%x)\n",
4224 cmd.gain[0], cmd.gain[1], cmd.gain[2], sc->chainmask);
4225 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4229 iwn5000_set_gains(struct iwn_softc *sc)
4231 struct iwn_calib_state *calib = &sc->calib;
4232 struct iwn_phy_calib_gain cmd;
4233 int i, ant, delta, div;
4235 /* We collected 20 beacons and !=6050 need a 1.5 factor. */
4236 div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30;
4238 memset(&cmd, 0, sizeof cmd);
4239 cmd.code = IWN5000_PHY_CALIB_NOISE_GAIN;
4242 /* Get first available RX antenna as referential. */
4243 ant = IWN_LSB(sc->rxchainmask);
4244 /* Set differential gains for other antennas. */
4245 for (i = ant + 1; i < 3; i++) {
4246 if (sc->chainmask & (1 << i)) {
4247 /* The delta is relative to antenna "ant". */
4248 delta = ((int32_t)calib->noise[ant] -
4249 (int32_t)calib->noise[i]) / div;
4250 /* Limit to [-4.5dB,+4.5dB]. */
4251 cmd.gain[i - 1] = MIN(abs(delta), 3);
4253 cmd.gain[i - 1] |= 1 << 2; /* sign bit */
4256 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4257 "setting differential gains Ant B/C: %x/%x (%x)\n",
4258 cmd.gain[0], cmd.gain[1], sc->chainmask);
4259 return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1);
4263 * Tune RF RX sensitivity based on the number of false alarms detected
4264 * during the last beacon period.
4267 iwn_tune_sensitivity(struct iwn_softc *sc, const struct iwn_rx_stats *stats)
4269 #define inc(val, inc, max) \
4270 if ((val) < (max)) { \
4271 if ((val) < (max) - (inc)) \
4277 #define dec(val, dec, min) \
4278 if ((val) > (min)) { \
4279 if ((val) > (min) + (dec)) \
4286 const struct iwn_sensitivity_limits *limits = sc->limits;
4287 struct iwn_calib_state *calib = &sc->calib;
4288 uint32_t val, rxena, fa;
4289 uint32_t energy[3], energy_min;
4290 uint8_t noise[3], noise_ref;
4291 int i, needs_update = 0;
4293 /* Check that we've been enabled long enough. */
4294 rxena = le32toh(stats->general.load);
4298 /* Compute number of false alarms since last call for OFDM. */
4299 fa = le32toh(stats->ofdm.bad_plcp) - calib->bad_plcp_ofdm;
4300 fa += le32toh(stats->ofdm.fa) - calib->fa_ofdm;
4301 fa *= 200 * 1024; /* 200TU */
4303 /* Save counters values for next call. */
4304 calib->bad_plcp_ofdm = le32toh(stats->ofdm.bad_plcp);
4305 calib->fa_ofdm = le32toh(stats->ofdm.fa);
4307 if (fa > 50 * rxena) {
4308 /* High false alarm count, decrease sensitivity. */
4309 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4310 "%s: OFDM high false alarm count: %u\n", __func__, fa);
4311 inc(calib->ofdm_x1, 1, limits->max_ofdm_x1);
4312 inc(calib->ofdm_mrc_x1, 1, limits->max_ofdm_mrc_x1);
4313 inc(calib->ofdm_x4, 1, limits->max_ofdm_x4);
4314 inc(calib->ofdm_mrc_x4, 1, limits->max_ofdm_mrc_x4);
4316 } else if (fa < 5 * rxena) {
4317 /* Low false alarm count, increase sensitivity. */
4318 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4319 "%s: OFDM low false alarm count: %u\n", __func__, fa);
4320 dec(calib->ofdm_x1, 1, limits->min_ofdm_x1);
4321 dec(calib->ofdm_mrc_x1, 1, limits->min_ofdm_mrc_x1);
4322 dec(calib->ofdm_x4, 1, limits->min_ofdm_x4);
4323 dec(calib->ofdm_mrc_x4, 1, limits->min_ofdm_mrc_x4);
4326 /* Compute maximum noise among 3 receivers. */
4327 for (i = 0; i < 3; i++)
4328 noise[i] = (le32toh(stats->general.noise[i]) >> 8) & 0xff;
4329 val = MAX(noise[0], noise[1]);
4330 val = MAX(noise[2], val);
4331 /* Insert it into our samples table. */
4332 calib->noise_samples[calib->cur_noise_sample] = val;
4333 calib->cur_noise_sample = (calib->cur_noise_sample + 1) % 20;
4335 /* Compute maximum noise among last 20 samples. */
4336 noise_ref = calib->noise_samples[0];
4337 for (i = 1; i < 20; i++)
4338 noise_ref = MAX(noise_ref, calib->noise_samples[i]);
4340 /* Compute maximum energy among 3 receivers. */
4341 for (i = 0; i < 3; i++)
4342 energy[i] = le32toh(stats->general.energy[i]);
4343 val = MIN(energy[0], energy[1]);
4344 val = MIN(energy[2], val);
4345 /* Insert it into our samples table. */
4346 calib->energy_samples[calib->cur_energy_sample] = val;
4347 calib->cur_energy_sample = (calib->cur_energy_sample + 1) % 10;
4349 /* Compute minimum energy among last 10 samples. */
4350 energy_min = calib->energy_samples[0];
4351 for (i = 1; i < 10; i++)
4352 energy_min = MAX(energy_min, calib->energy_samples[i]);
4355 /* Compute number of false alarms since last call for CCK. */
4356 fa = le32toh(stats->cck.bad_plcp) - calib->bad_plcp_cck;
4357 fa += le32toh(stats->cck.fa) - calib->fa_cck;
4358 fa *= 200 * 1024; /* 200TU */
4360 /* Save counters values for next call. */
4361 calib->bad_plcp_cck = le32toh(stats->cck.bad_plcp);
4362 calib->fa_cck = le32toh(stats->cck.fa);
4364 if (fa > 50 * rxena) {
4365 /* High false alarm count, decrease sensitivity. */
4366 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4367 "%s: CCK high false alarm count: %u\n", __func__, fa);
4368 calib->cck_state = IWN_CCK_STATE_HIFA;
4371 if (calib->cck_x4 > 160) {
4372 calib->noise_ref = noise_ref;
4373 if (calib->energy_cck > 2)
4374 dec(calib->energy_cck, 2, energy_min);
4376 if (calib->cck_x4 < 160) {
4377 calib->cck_x4 = 161;
4380 inc(calib->cck_x4, 3, limits->max_cck_x4);
4382 inc(calib->cck_mrc_x4, 3, limits->max_cck_mrc_x4);
4384 } else if (fa < 5 * rxena) {
4385 /* Low false alarm count, increase sensitivity. */
4386 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4387 "%s: CCK low false alarm count: %u\n", __func__, fa);
4388 calib->cck_state = IWN_CCK_STATE_LOFA;
4391 if (calib->cck_state != IWN_CCK_STATE_INIT &&
4392 (((int32_t)calib->noise_ref - (int32_t)noise_ref) > 2 ||
4393 calib->low_fa > 100)) {
4394 inc(calib->energy_cck, 2, limits->min_energy_cck);
4395 dec(calib->cck_x4, 3, limits->min_cck_x4);
4396 dec(calib->cck_mrc_x4, 3, limits->min_cck_mrc_x4);
4399 /* Not worth to increase or decrease sensitivity. */
4400 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4401 "%s: CCK normal false alarm count: %u\n", __func__, fa);
4403 calib->noise_ref = noise_ref;
4405 if (calib->cck_state == IWN_CCK_STATE_HIFA) {
4406 /* Previous interval had many false alarms. */
4407 dec(calib->energy_cck, 8, energy_min);
4409 calib->cck_state = IWN_CCK_STATE_INIT;
4413 (void)iwn_send_sensitivity(sc);
4419 iwn_send_sensitivity(struct iwn_softc *sc)
4421 struct iwn_calib_state *calib = &sc->calib;
4422 struct iwn_sensitivity_cmd cmd;
4424 memset(&cmd, 0, sizeof cmd);
4425 cmd.which = IWN_SENSITIVITY_WORKTBL;
4426 /* OFDM modulation. */
4427 cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1);
4428 cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
4429 cmd.corr_ofdm_x4 = htole16(calib->ofdm_x4);
4430 cmd.corr_ofdm_mrc_x4 = htole16(calib->ofdm_mrc_x4);
4431 cmd.energy_ofdm = htole16(sc->limits->energy_ofdm);
4432 cmd.energy_ofdm_th = htole16(62);
4433 /* CCK modulation. */
4434 cmd.corr_cck_x4 = htole16(calib->cck_x4);
4435 cmd.corr_cck_mrc_x4 = htole16(calib->cck_mrc_x4);
4436 cmd.energy_cck = htole16(calib->energy_cck);
4437 /* Barker modulation: use default values. */
4438 cmd.corr_barker = htole16(190);
4439 cmd.corr_barker_mrc = htole16(390);
4441 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
4442 "%s: set sensitivity %d/%d/%d/%d/%d/%d/%d\n", __func__,
4443 calib->ofdm_x1, calib->ofdm_mrc_x1, calib->ofdm_x4,
4444 calib->ofdm_mrc_x4, calib->cck_x4,
4445 calib->cck_mrc_x4, calib->energy_cck);
4446 return iwn_cmd(sc, IWN_CMD_SET_SENSITIVITY, &cmd, sizeof cmd, 1);
4450 * Set STA mode power saving level (between 0 and 5).
4451 * Level 0 is CAM (Continuously Aware Mode), 5 is for maximum power saving.
4454 iwn_set_pslevel(struct iwn_softc *sc, int dtim, int level, int async)
4456 const struct iwn_pmgt *pmgt;
4457 struct iwn_pmgt_cmd cmd;
4458 uint32_t max, skip_dtim;
4462 /* Select which PS parameters to use. */
4464 pmgt = &iwn_pmgt[0][level];
4465 else if (dtim <= 10)
4466 pmgt = &iwn_pmgt[1][level];
4468 pmgt = &iwn_pmgt[2][level];
4470 memset(&cmd, 0, sizeof cmd);
4471 if (level != 0) /* not CAM */
4472 cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP);
4474 cmd.flags |= htole16(IWN_PS_FAST_PD);
4475 /* Retrieve PCIe Active State Power Management (ASPM). */
4476 tmp = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
4477 if (!(tmp & 0x1)) /* L0s Entry disabled. */
4478 cmd.flags |= htole16(IWN_PS_PCI_PMGT);
4479 cmd.rxtimeout = htole32(pmgt->rxtimeout * 1024);
4480 cmd.txtimeout = htole32(pmgt->txtimeout * 1024);
4486 skip_dtim = pmgt->skip_dtim;
4487 if (skip_dtim != 0) {
4488 cmd.flags |= htole16(IWN_PS_SLEEP_OVER_DTIM);
4489 max = pmgt->intval[4];
4490 if (max == (uint32_t)-1)
4491 max = dtim * (skip_dtim + 1);
4492 else if (max > dtim)
4493 max = (max / dtim) * dtim;
4496 for (i = 0; i < 5; i++)
4497 cmd.intval[i] = htole32(MIN(max, pmgt->intval[i]));
4499 DPRINTF(sc, IWN_DEBUG_RESET, "setting power saving level to %d\n",
4501 return iwn_cmd(sc, IWN_CMD_SET_POWER_MODE, &cmd, sizeof cmd, async);
4505 iwn_config(struct iwn_softc *sc)
4507 const struct iwn_hal *hal = sc->sc_hal;
4508 struct ifnet *ifp = sc->sc_ifp;
4509 struct ieee80211com *ic = ifp->if_l2com;
4510 struct iwn_bluetooth bluetooth;
4515 /* Configure valid TX chains for 5000 Series. */
4516 if (sc->hw_type != IWN_HW_REV_TYPE_4965) {
4517 txmask = htole32(sc->txchainmask);
4518 DPRINTF(sc, IWN_DEBUG_RESET,
4519 "%s: configuring valid TX chains 0x%x\n", __func__, txmask);
4520 error = iwn_cmd(sc, IWN5000_CMD_TX_ANT_CONFIG, &txmask,
4523 device_printf(sc->sc_dev,
4524 "%s: could not configure valid TX chains, "
4525 "error %d\n", __func__, error);
4530 /* Configure bluetooth coexistence. */
4531 memset(&bluetooth, 0, sizeof bluetooth);
4532 bluetooth.flags = IWN_BT_COEX_CHAN_ANN | IWN_BT_COEX_BT_PRIO;
4533 bluetooth.lead_time = IWN_BT_LEAD_TIME_DEF;
4534 bluetooth.max_kill = IWN_BT_MAX_KILL_DEF;
4535 DPRINTF(sc, IWN_DEBUG_RESET, "%s: config bluetooth coexistence\n",
4537 error = iwn_cmd(sc, IWN_CMD_BT_COEX, &bluetooth, sizeof bluetooth, 0);
4539 device_printf(sc->sc_dev,
4540 "%s: could not configure bluetooth coexistence, error %d\n",
4545 /* Set mode, channel, RX filter and enable RX. */
4546 memset(&sc->rxon, 0, sizeof (struct iwn_rxon));
4547 IEEE80211_ADDR_COPY(sc->rxon.myaddr, IF_LLADDR(ifp));
4548 IEEE80211_ADDR_COPY(sc->rxon.wlap, IF_LLADDR(ifp));
4549 sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
4550 sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4551 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_curchan))
4552 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4553 switch (ic->ic_opmode) {
4554 case IEEE80211_M_STA:
4555 sc->rxon.mode = IWN_MODE_STA;
4556 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST);
4558 case IEEE80211_M_MONITOR:
4559 sc->rxon.mode = IWN_MODE_MONITOR;
4560 sc->rxon.filter = htole32(IWN_FILTER_MULTICAST |
4561 IWN_FILTER_CTL | IWN_FILTER_PROMISC);
4564 /* Should not get there. */
4567 sc->rxon.cck_mask = 0x0f; /* not yet negotiated */
4568 sc->rxon.ofdm_mask = 0xff; /* not yet negotiated */
4569 sc->rxon.ht_single_mask = 0xff;
4570 sc->rxon.ht_dual_mask = 0xff;
4571 sc->rxon.ht_triple_mask = 0xff;
4573 IWN_RXCHAIN_VALID(sc->rxchainmask) |
4574 IWN_RXCHAIN_MIMO_COUNT(2) |
4575 IWN_RXCHAIN_IDLE_COUNT(2);
4576 sc->rxon.rxchain = htole16(rxchain);
4577 DPRINTF(sc, IWN_DEBUG_RESET, "%s: setting configuration\n", __func__);
4578 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 0);
4580 device_printf(sc->sc_dev,
4581 "%s: RXON command failed\n", __func__);
4585 error = iwn_add_broadcast_node(sc, 0);
4587 device_printf(sc->sc_dev,
4588 "%s: could not add broadcast node\n", __func__);
4592 /* Configuration has changed, set TX power accordingly. */
4593 error = hal->set_txpower(sc, ic->ic_curchan, 0);
4595 device_printf(sc->sc_dev,
4596 "%s: could not set TX power\n", __func__);
4600 error = iwn_set_critical_temp(sc);
4602 device_printf(sc->sc_dev,
4603 "%s: ccould not set critical temperature\n", __func__);
4607 /* Set power saving level to CAM during initialization. */
4608 error = iwn_set_pslevel(sc, 0, 0, 0);
4610 device_printf(sc->sc_dev,
4611 "%s: could not set power saving level\n", __func__);
4618 iwn_scan(struct iwn_softc *sc)
4620 struct ifnet *ifp = sc->sc_ifp;
4621 struct ieee80211com *ic = ifp->if_l2com;
4622 struct ieee80211_scan_state *ss = ic->ic_scan; /*XXX*/
4623 struct iwn_scan_hdr *hdr;
4624 struct iwn_cmd_data *tx;
4625 struct iwn_scan_essid *essid;
4626 struct iwn_scan_chan *chan;
4627 struct ieee80211_frame *wh;
4628 struct ieee80211_rateset *rs;
4629 struct ieee80211_channel *c;
4630 int buflen, error, nrates;
4632 uint8_t *buf, *frm, txant;
4634 buf = kmalloc(IWN_SCAN_MAXSZ, M_DEVBUF, M_INTWAIT | M_ZERO);
4636 device_printf(sc->sc_dev,
4637 "%s: could not allocate buffer for scan command\n",
4641 hdr = (struct iwn_scan_hdr *)buf;
4644 * Move to the next channel if no frames are received within 10ms
4645 * after sending the probe request.
4647 hdr->quiet_time = htole16(10); /* timeout in milliseconds */
4648 hdr->quiet_threshold = htole16(1); /* min # of packets */
4650 /* Select antennas for scanning. */
4652 IWN_RXCHAIN_VALID(sc->rxchainmask) |
4653 IWN_RXCHAIN_FORCE_MIMO_SEL(sc->rxchainmask) |
4654 IWN_RXCHAIN_DRIVER_FORCE;
4655 if (IEEE80211_IS_CHAN_A(ic->ic_curchan) &&
4656 sc->hw_type == IWN_HW_REV_TYPE_4965) {
4657 /* Ant A must be avoided in 5GHz because of an HW bug. */
4658 rxchain |= IWN_RXCHAIN_FORCE_SEL(IWN_ANT_BC);
4659 } else /* Use all available RX antennas. */
4660 rxchain |= IWN_RXCHAIN_FORCE_SEL(sc->rxchainmask);
4661 hdr->rxchain = htole16(rxchain);
4662 hdr->filter = htole32(IWN_FILTER_MULTICAST | IWN_FILTER_BEACON);
4664 tx = (struct iwn_cmd_data *)(hdr + 1);
4665 tx->flags = htole32(IWN_TX_AUTO_SEQ);
4666 tx->id = sc->sc_hal->broadcast_id;
4667 tx->lifetime = htole32(IWN_LIFETIME_INFINITE);
4669 if (IEEE80211_IS_CHAN_A(ic->ic_curchan)) {
4670 /* Send probe requests at 6Mbps. */
4671 tx->plcp = iwn_rates[IWN_RIDX_OFDM6].plcp;
4672 rs = &ic->ic_sup_rates[IEEE80211_MODE_11A];
4674 hdr->flags = htole32(IWN_RXON_24GHZ | IWN_RXON_AUTO);
4675 /* Send probe requests at 1Mbps. */
4676 tx->plcp = iwn_rates[IWN_RIDX_CCK1].plcp;
4677 tx->rflags = IWN_RFLAG_CCK;
4678 rs = &ic->ic_sup_rates[IEEE80211_MODE_11G];
4680 /* Use the first valid TX antenna. */
4681 txant = IWN_LSB(sc->txchainmask);
4682 tx->rflags |= IWN_RFLAG_ANT(txant);
4684 essid = (struct iwn_scan_essid *)(tx + 1);
4685 if (ss->ss_ssid[0].len != 0) {
4686 essid[0].id = IEEE80211_ELEMID_SSID;
4687 essid[0].len = ss->ss_ssid[0].len;
4688 memcpy(essid[0].data, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
4692 * Build a probe request frame. Most of the following code is a
4693 * copy & paste of what is done in net80211.
4695 wh = (struct ieee80211_frame *)(essid + 20);
4696 wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
4697 IEEE80211_FC0_SUBTYPE_PROBE_REQ;
4698 wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
4699 IEEE80211_ADDR_COPY(wh->i_addr1, ifp->if_broadcastaddr);
4700 IEEE80211_ADDR_COPY(wh->i_addr2, IF_LLADDR(ifp));
4701 IEEE80211_ADDR_COPY(wh->i_addr3, ifp->if_broadcastaddr);
4702 *(uint16_t *)&wh->i_dur[0] = 0; /* filled by HW */
4703 *(uint16_t *)&wh->i_seq[0] = 0; /* filled by HW */
4705 frm = (uint8_t *)(wh + 1);
4708 *frm++ = IEEE80211_ELEMID_SSID;
4709 *frm++ = ss->ss_ssid[0].len;
4710 memcpy(frm, ss->ss_ssid[0].ssid, ss->ss_ssid[0].len);
4711 frm += ss->ss_ssid[0].len;
4713 /* Add supported rates IE. */
4714 *frm++ = IEEE80211_ELEMID_RATES;
4715 nrates = rs->rs_nrates;
4716 if (nrates > IEEE80211_RATE_SIZE)
4717 nrates = IEEE80211_RATE_SIZE;
4719 memcpy(frm, rs->rs_rates, nrates);
4722 /* Add supported xrates IE. */
4723 if (rs->rs_nrates > IEEE80211_RATE_SIZE) {
4724 nrates = rs->rs_nrates - IEEE80211_RATE_SIZE;
4725 *frm++ = IEEE80211_ELEMID_XRATES;
4726 *frm++ = (uint8_t)nrates;
4727 memcpy(frm, rs->rs_rates + IEEE80211_RATE_SIZE, nrates);
4731 /* Set length of probe request. */
4732 tx->len = htole16(frm - (uint8_t *)wh);
4735 chan = (struct iwn_scan_chan *)frm;
4736 chan->chan = htole16(ieee80211_chan2ieee(ic, c));
4738 if (ss->ss_nssid > 0)
4739 chan->flags |= htole32(IWN_CHAN_NPBREQS(1));
4740 chan->dsp_gain = 0x6e;
4741 if (IEEE80211_IS_CHAN_5GHZ(c) &&
4742 !(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
4743 chan->rf_gain = 0x3b;
4744 chan->active = htole16(24);
4745 chan->passive = htole16(110);
4746 chan->flags |= htole32(IWN_CHAN_ACTIVE);
4747 } else if (IEEE80211_IS_CHAN_5GHZ(c)) {
4748 chan->rf_gain = 0x3b;
4749 chan->active = htole16(24);
4750 if (sc->rxon.associd)
4751 chan->passive = htole16(78);
4753 chan->passive = htole16(110);
4754 hdr->crc_threshold = 0xffff;
4755 } else if (!(c->ic_flags & IEEE80211_CHAN_PASSIVE)) {
4756 chan->rf_gain = 0x28;
4757 chan->active = htole16(36);
4758 chan->passive = htole16(120);
4759 chan->flags |= htole32(IWN_CHAN_ACTIVE);
4761 chan->rf_gain = 0x28;
4762 chan->active = htole16(36);
4763 if (sc->rxon.associd)
4764 chan->passive = htole16(88);
4766 chan->passive = htole16(120);
4767 hdr->crc_threshold = 0xffff;
4770 DPRINTF(sc, IWN_DEBUG_STATE,
4771 "%s: chan %u flags 0x%x rf_gain 0x%x "
4772 "dsp_gain 0x%x active 0x%x passive 0x%x\n", __func__,
4773 chan->chan, chan->flags, chan->rf_gain, chan->dsp_gain,
4774 chan->active, chan->passive);
4778 buflen = (uint8_t *)chan - buf;
4779 hdr->len = htole16(buflen);
4781 DPRINTF(sc, IWN_DEBUG_STATE, "sending scan command nchan=%d\n",
4783 error = iwn_cmd(sc, IWN_CMD_SCAN, buf, buflen, 1);
4784 kfree(buf, M_DEVBUF);
4789 iwn_auth(struct iwn_softc *sc, struct ieee80211vap *vap)
4791 const struct iwn_hal *hal = sc->sc_hal;
4792 struct ifnet *ifp = sc->sc_ifp;
4793 struct ieee80211com *ic = ifp->if_l2com;
4794 struct ieee80211_node *ni = vap->iv_bss;
4797 sc->calib.state = IWN_CALIB_STATE_INIT;
4799 /* Update adapter configuration. */
4800 IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->ni_bssid);
4801 sc->rxon.chan = htole16(ieee80211_chan2ieee(ic, ni->ni_chan));
4802 sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4803 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
4804 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4805 if (ic->ic_flags & IEEE80211_F_SHSLOT)
4806 sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
4807 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
4808 sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
4809 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
4810 sc->rxon.cck_mask = 0;
4811 sc->rxon.ofdm_mask = 0x15;
4812 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
4813 sc->rxon.cck_mask = 0x03;
4814 sc->rxon.ofdm_mask = 0;
4816 /* XXX assume 802.11b/g */
4817 sc->rxon.cck_mask = 0x0f;
4818 sc->rxon.ofdm_mask = 0x15;
4820 DPRINTF(sc, IWN_DEBUG_STATE,
4821 "%s: config chan %d mode %d flags 0x%x cck 0x%x ofdm 0x%x "
4822 "ht_single 0x%x ht_dual 0x%x rxchain 0x%x "
4823 "myaddr %6D wlap %6D bssid %6D associd %d filter 0x%x\n",
4825 le16toh(sc->rxon.chan), sc->rxon.mode, le32toh(sc->rxon.flags),
4826 sc->rxon.cck_mask, sc->rxon.ofdm_mask,
4827 sc->rxon.ht_single_mask, sc->rxon.ht_dual_mask,
4828 le16toh(sc->rxon.rxchain),
4829 sc->rxon.myaddr, ":", sc->rxon.wlap, ":", sc->rxon.bssid, ":",
4830 le16toh(sc->rxon.associd), le32toh(sc->rxon.filter));
4831 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4833 device_printf(sc->sc_dev,
4834 "%s: RXON command failed, error %d\n", __func__, error);
4838 /* Configuration has changed, set TX power accordingly. */
4839 error = hal->set_txpower(sc, ni->ni_chan, 1);
4841 device_printf(sc->sc_dev,
4842 "%s: could not set Tx power, error %d\n", __func__, error);
4846 * Reconfiguring RXON clears the firmware nodes table so we must
4847 * add the broadcast node again.
4849 error = iwn_add_broadcast_node(sc, 1);
4851 device_printf(sc->sc_dev,
4852 "%s: could not add broadcast node, error %d\n",
4860 * Configure the adapter for associated state.
4863 iwn_run(struct iwn_softc *sc, struct ieee80211vap *vap)
4865 #define MS(v,x) (((v) & x) >> x##_S)
4866 const struct iwn_hal *hal = sc->sc_hal;
4867 struct ifnet *ifp = sc->sc_ifp;
4868 struct ieee80211com *ic = ifp->if_l2com;
4869 struct ieee80211_node *ni = vap->iv_bss;
4870 struct iwn_node_info node;
4873 sc->calib.state = IWN_CALIB_STATE_INIT;
4875 if (ic->ic_opmode == IEEE80211_M_MONITOR) {
4876 /* Link LED blinks while monitoring. */
4877 iwn_set_led(sc, IWN_LED_LINK, 5, 5);
4880 error = iwn_set_timing(sc, ni);
4882 device_printf(sc->sc_dev,
4883 "%s: could not set timing, error %d\n", __func__, error);
4887 /* Update adapter configuration. */
4888 IEEE80211_ADDR_COPY(sc->rxon.bssid, ni->ni_bssid);
4889 sc->rxon.chan = htole16(ieee80211_chan2ieee(ic, ni->ni_chan));
4890 sc->rxon.associd = htole16(IEEE80211_AID(ni->ni_associd));
4891 /* Short preamble and slot time are negotiated when associating. */
4892 sc->rxon.flags &= ~htole32(IWN_RXON_SHPREAMBLE | IWN_RXON_SHSLOT);
4893 sc->rxon.flags |= htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF);
4894 if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
4895 sc->rxon.flags |= htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4897 sc->rxon.flags &= ~htole32(IWN_RXON_AUTO | IWN_RXON_24GHZ);
4898 if (ic->ic_flags & IEEE80211_F_SHSLOT)
4899 sc->rxon.flags |= htole32(IWN_RXON_SHSLOT);
4900 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
4901 sc->rxon.flags |= htole32(IWN_RXON_SHPREAMBLE);
4902 if (IEEE80211_IS_CHAN_A(ni->ni_chan)) {
4903 sc->rxon.cck_mask = 0;
4904 sc->rxon.ofdm_mask = 0x15;
4905 } else if (IEEE80211_IS_CHAN_B(ni->ni_chan)) {
4906 sc->rxon.cck_mask = 0x03;
4907 sc->rxon.ofdm_mask = 0;
4909 /* XXX assume 802.11b/g */
4910 sc->rxon.cck_mask = 0x0f;
4911 sc->rxon.ofdm_mask = 0x15;
4914 if (IEEE80211_IS_CHAN_HT(ni->ni_chan)) {
4915 sc->rxon.flags &= ~htole32(IWN_RXON_HT);
4916 if (IEEE80211_IS_CHAN_HT40U(ni->ni_chan))
4917 sc->rxon.flags |= htole32(IWN_RXON_HT40U);
4918 else if (IEEE80211_IS_CHAN_HT40D(ni->ni_chan))
4919 sc->rxon.flags |= htole32(IWN_RXON_HT40D);
4921 sc->rxon.flags |= htole32(IWN_RXON_HT20);
4922 sc->rxon.rxchain = htole16(
4923 IWN_RXCHAIN_VALID(3)
4924 | IWN_RXCHAIN_MIMO_COUNT(3)
4925 | IWN_RXCHAIN_IDLE_COUNT(1)
4926 | IWN_RXCHAIN_MIMO_FORCE);
4928 maxrxampdu = MS(ni->ni_htparam, IEEE80211_HTCAP_MAXRXAMPDU);
4929 ampdudensity = MS(ni->ni_htparam, IEEE80211_HTCAP_MPDUDENSITY);
4931 maxrxampdu = ampdudensity = 0;
4933 sc->rxon.filter |= htole32(IWN_FILTER_BSS);
4935 DPRINTF(sc, IWN_DEBUG_STATE,
4936 "%s: config chan %d mode %d flags 0x%x cck 0x%x ofdm 0x%x "
4937 "ht_single 0x%x ht_dual 0x%x rxchain 0x%x "
4938 "myaddr %6D wlap %6D bssid %6D associd %d filter 0x%x\n",
4940 le16toh(sc->rxon.chan), sc->rxon.mode, le32toh(sc->rxon.flags),
4941 sc->rxon.cck_mask, sc->rxon.ofdm_mask,
4942 sc->rxon.ht_single_mask, sc->rxon.ht_dual_mask,
4943 le16toh(sc->rxon.rxchain),
4944 sc->rxon.myaddr, ":", sc->rxon.wlap, ":", sc->rxon.bssid, ":",
4945 le16toh(sc->rxon.associd), le32toh(sc->rxon.filter));
4946 error = iwn_cmd(sc, IWN_CMD_RXON, &sc->rxon, hal->rxonsz, 1);
4948 device_printf(sc->sc_dev,
4949 "%s: could not update configuration, error %d\n",
4954 /* Configuration has changed, set TX power accordingly. */
4955 error = hal->set_txpower(sc, ni->ni_chan, 1);
4957 device_printf(sc->sc_dev,
4958 "%s: could not set Tx power, error %d\n", __func__, error);
4963 memset(&node, 0, sizeof node);
4964 IEEE80211_ADDR_COPY(node.macaddr, ni->ni_macaddr);
4965 node.id = IWN_ID_BSS;
4967 node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) |
4968 IWN_AMDPU_DENSITY(5)); /* 2us */
4970 DPRINTF(sc, IWN_DEBUG_STATE, "%s: add BSS node, id %d htflags 0x%x\n",
4971 __func__, node.id, le32toh(node.htflags));
4972 error = hal->add_node(sc, &node, 1);
4974 device_printf(sc->sc_dev, "could not add BSS node\n");
4977 DPRINTF(sc, IWN_DEBUG_STATE, "setting link quality for node %d\n",
4979 error = iwn_set_link_quality(sc, node.id, 1);
4981 device_printf(sc->sc_dev,
4982 "%s: could not setup MRR for node %d, error %d\n",
4983 __func__, node.id, error);
4987 error = iwn_init_sensitivity(sc);
4989 device_printf(sc->sc_dev,
4990 "%s: could not set sensitivity, error %d\n",
4995 /* Start periodic calibration timer. */
4996 sc->calib.state = IWN_CALIB_STATE_ASSOC;
4997 iwn_calib_reset(sc);
4999 /* Link LED always on while associated. */
5000 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
5008 * This function is called by upper layer when an ADDBA request is received
5009 * from another STA and before the ADDBA response is sent.
5012 iwn_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
5015 struct ieee80211_rx_ba *ba = &ni->ni_rx_ba[tid];
5016 struct iwn_softc *sc = ic->ic_softc;
5017 struct iwn_node *wn = (void *)ni;
5018 struct iwn_node_info node;
5020 memset(&node, 0, sizeof node);
5022 node.control = IWN_NODE_UPDATE;
5023 node.flags = IWN_FLAG_SET_ADDBA;
5024 node.addba_tid = tid;
5025 node.addba_ssn = htole16(ba->ba_winstart);
5026 DPRINTF(sc, IWN_DEBUG_RECV, "ADDBA RA=%d TID=%d SSN=%d\n",
5027 wn->id, tid, ba->ba_winstart));
5028 return sc->sc_hal->add_node(sc, &node, 1);
5032 * This function is called by upper layer on teardown of an HT-immediate
5033 * Block Ack agreement (eg. uppon receipt of a DELBA frame.)
5036 iwn_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
5039 struct iwn_softc *sc = ic->ic_softc;
5040 struct iwn_node *wn = (void *)ni;
5041 struct iwn_node_info node;
5043 memset(&node, 0, sizeof node);
5045 node.control = IWN_NODE_UPDATE;
5046 node.flags = IWN_FLAG_SET_DELBA;
5047 node.delba_tid = tid;
5048 DPRINTF(sc, IWN_DEBUG_RECV, "DELBA RA=%d TID=%d\n", wn->id, tid);
5049 (void)sc->sc_hal->add_node(sc, &node, 1);
5053 * This function is called by upper layer when an ADDBA response is received
5057 iwn_ampdu_tx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
5060 struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[tid];
5061 struct iwn_softc *sc = ic->ic_softc;
5062 const struct iwn_hal *hal = sc->sc_hal;
5063 struct iwn_node *wn = (void *)ni;
5064 struct iwn_node_info node;
5067 /* Enable TX for the specified RA/TID. */
5068 wn->disable_tid &= ~(1 << tid);
5069 memset(&node, 0, sizeof node);
5071 node.control = IWN_NODE_UPDATE;
5072 node.flags = IWN_FLAG_SET_DISABLE_TID;
5073 node.disable_tid = htole16(wn->disable_tid);
5074 error = hal->add_node(sc, &node, 1);
5078 if ((error = iwn_nic_lock(sc)) != 0)
5080 hal->ampdu_tx_start(sc, ni, tid, ba->ba_winstart);
5086 iwn_ampdu_tx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
5089 struct ieee80211_tx_ba *ba = &ni->ni_tx_ba[tid];
5090 struct iwn_softc *sc = ic->ic_softc;
5093 error = iwn_nic_lock(sc);
5096 sc->sc_hal->ampdu_tx_stop(sc, tid, ba->ba_winstart);
5101 iwn4965_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
5102 uint8_t tid, uint16_t ssn)
5104 struct iwn_node *wn = (void *)ni;
5107 /* Stop TX scheduler while we're changing its configuration. */
5108 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5109 IWN4965_TXQ_STATUS_CHGACT);
5111 /* Assign RA/TID translation to the queue. */
5112 iwn_mem_write_2(sc, sc->sched_base + IWN4965_SCHED_TRANS_TBL(qid),
5115 /* Enable chain-building mode for the queue. */
5116 iwn_prph_setbits(sc, IWN4965_SCHED_QCHAIN_SEL, 1 << qid);
5118 /* Set starting sequence number from the ADDBA request. */
5119 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5120 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
5122 /* Set scheduler window size. */
5123 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid),
5125 /* Set scheduler frame limit. */
5126 iwn_mem_write(sc, sc->sched_base + IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5127 IWN_SCHED_LIMIT << 16);
5129 /* Enable interrupts for the queue. */
5130 iwn_prph_setbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
5132 /* Mark the queue as active. */
5133 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5134 IWN4965_TXQ_STATUS_ACTIVE | IWN4965_TXQ_STATUS_AGGR_ENA |
5135 iwn_tid2fifo[tid] << 1);
5139 iwn4965_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)
5143 /* Stop TX scheduler while we're changing its configuration. */
5144 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5145 IWN4965_TXQ_STATUS_CHGACT);
5147 /* Set starting sequence number from the ADDBA request. */
5148 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5149 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
5151 /* Disable interrupts for the queue. */
5152 iwn_prph_clrbits(sc, IWN4965_SCHED_INTR_MASK, 1 << qid);
5154 /* Mark the queue as inactive. */
5155 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5156 IWN4965_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid] << 1);
5160 iwn5000_ampdu_tx_start(struct iwn_softc *sc, struct ieee80211_node *ni,
5161 uint8_t tid, uint16_t ssn)
5163 struct iwn_node *wn = (void *)ni;
5166 /* Stop TX scheduler while we're changing its configuration. */
5167 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5168 IWN5000_TXQ_STATUS_CHGACT);
5170 /* Assign RA/TID translation to the queue. */
5171 iwn_mem_write_2(sc, sc->sched_base + IWN5000_SCHED_TRANS_TBL(qid),
5174 /* Enable chain-building mode for the queue. */
5175 iwn_prph_setbits(sc, IWN5000_SCHED_QCHAIN_SEL, 1 << qid);
5177 /* Enable aggregation for the queue. */
5178 iwn_prph_setbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
5180 /* Set starting sequence number from the ADDBA request. */
5181 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5182 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
5184 /* Set scheduler window size and frame limit. */
5185 iwn_mem_write(sc, sc->sched_base + IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5186 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
5188 /* Enable interrupts for the queue. */
5189 iwn_prph_setbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
5191 /* Mark the queue as active. */
5192 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5193 IWN5000_TXQ_STATUS_ACTIVE | iwn_tid2fifo[tid]);
5197 iwn5000_ampdu_tx_stop(struct iwn_softc *sc, uint8_t tid, uint16_t ssn)
5201 /* Stop TX scheduler while we're changing its configuration. */
5202 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5203 IWN5000_TXQ_STATUS_CHGACT);
5205 /* Disable aggregation for the queue. */
5206 iwn_prph_clrbits(sc, IWN5000_SCHED_AGGR_SEL, 1 << qid);
5208 /* Set starting sequence number from the ADDBA request. */
5209 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | (ssn & 0xff));
5210 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
5212 /* Disable interrupts for the queue. */
5213 iwn_prph_clrbits(sc, IWN5000_SCHED_INTR_MASK, 1 << qid);
5215 /* Mark the queue as inactive. */
5216 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5217 IWN5000_TXQ_STATUS_INACTIVE | iwn_tid2fifo[tid]);
5222 * Query calibration tables from the initialization firmware. We do this
5223 * only once at first boot. Called from a process context.
5226 iwn5000_query_calibration(struct iwn_softc *sc)
5228 struct iwn5000_calib_config cmd;
5231 memset(&cmd, 0, sizeof cmd);
5232 cmd.ucode.once.enable = 0xffffffff;
5233 cmd.ucode.once.start = 0xffffffff;
5234 cmd.ucode.once.send = 0xffffffff;
5235 cmd.ucode.flags = 0xffffffff;
5236 DPRINTF(sc, IWN_DEBUG_CALIBRATE, "%s: sending calibration query\n",
5238 error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
5242 /* Wait at most two seconds for calibration to complete. */
5243 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
5244 error = zsleep(sc, &wlan_global_serializer,
5245 0, "iwninit", 2 * hz);
5251 * Send calibration results to the runtime firmware. These results were
5252 * obtained on first boot from the initialization firmware.
5255 iwn5000_send_calibration(struct iwn_softc *sc)
5259 for (idx = 0; idx < 5; idx++) {
5260 if (sc->calibcmd[idx].buf == NULL)
5261 continue; /* No results available. */
5262 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5263 "send calibration result idx=%d len=%d\n",
5264 idx, sc->calibcmd[idx].len);
5265 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, sc->calibcmd[idx].buf,
5266 sc->calibcmd[idx].len, 0);
5268 device_printf(sc->sc_dev,
5269 "%s: could not send calibration result, error %d\n",
5278 iwn5000_send_wimax_coex(struct iwn_softc *sc)
5280 struct iwn5000_wimax_coex wimax;
5283 if (sc->hw_type == IWN_HW_REV_TYPE_6050) {
5284 /* Enable WiMAX coexistence for combo adapters. */
5286 IWN_WIMAX_COEX_ASSOC_WA_UNMASK |
5287 IWN_WIMAX_COEX_UNASSOC_WA_UNMASK |
5288 IWN_WIMAX_COEX_STA_TABLE_VALID |
5289 IWN_WIMAX_COEX_ENABLE;
5290 memcpy(wimax.events, iwn6050_wimax_events,
5291 sizeof iwn6050_wimax_events);
5295 /* Disable WiMAX coexistence. */
5297 memset(wimax.events, 0, sizeof wimax.events);
5299 DPRINTF(sc, IWN_DEBUG_RESET, "%s: Configuring WiMAX coexistence\n",
5301 return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0);
5305 * This function is called after the runtime firmware notifies us of its
5306 * readiness (called in a process context.)
5309 iwn4965_post_alive(struct iwn_softc *sc)
5313 if ((error = iwn_nic_lock(sc)) != 0)
5316 /* Clear TX scheduler state in SRAM. */
5317 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
5318 iwn_mem_set_region_4(sc, sc->sched_base + IWN4965_SCHED_CTX_OFF, 0,
5319 IWN4965_SCHED_CTX_LEN / sizeof (uint32_t));
5321 /* Set physical address of TX scheduler rings (1KB aligned.) */
5322 iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
5324 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
5326 /* Disable chain mode for all our 16 queues. */
5327 iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
5329 for (qid = 0; qid < IWN4965_NTXQUEUES; qid++) {
5330 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
5331 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
5333 /* Set scheduler window size. */
5334 iwn_mem_write(sc, sc->sched_base +
5335 IWN4965_SCHED_QUEUE_OFFSET(qid), IWN_SCHED_WINSZ);
5336 /* Set scheduler frame limit. */
5337 iwn_mem_write(sc, sc->sched_base +
5338 IWN4965_SCHED_QUEUE_OFFSET(qid) + 4,
5339 IWN_SCHED_LIMIT << 16);
5342 /* Enable interrupts for all our 16 queues. */
5343 iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
5344 /* Identify TX FIFO rings (0-7). */
5345 iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
5347 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
5348 for (qid = 0; qid < 7; qid++) {
5349 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 4, 5, 6 };
5350 iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
5351 IWN4965_TXQ_STATUS_ACTIVE | qid2fifo[qid] << 1);
5358 * This function is called after the initialization or runtime firmware
5359 * notifies us of its readiness (called in a process context.)
5362 iwn5000_post_alive(struct iwn_softc *sc)
5366 /* Switch to using ICT interrupt mode. */
5367 iwn5000_ict_reset(sc);
5369 error = iwn_nic_lock(sc);
5373 /* Clear TX scheduler state in SRAM. */
5374 sc->sched_base = iwn_prph_read(sc, IWN_SCHED_SRAM_ADDR);
5375 iwn_mem_set_region_4(sc, sc->sched_base + IWN5000_SCHED_CTX_OFF, 0,
5376 IWN5000_SCHED_CTX_LEN / sizeof (uint32_t));
5378 /* Set physical address of TX scheduler rings (1KB aligned.) */
5379 iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
5381 IWN_SETBITS(sc, IWN_FH_TX_CHICKEN, IWN_FH_TX_CHICKEN_SCHED_RETRY);
5383 /* Enable chain mode for all queues, except command queue. */
5384 iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
5385 iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
5387 for (qid = 0; qid < IWN5000_NTXQUEUES; qid++) {
5388 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
5389 IWN_WRITE(sc, IWN_HBUS_TARG_WRPTR, qid << 8 | 0);
5391 iwn_mem_write(sc, sc->sched_base +
5392 IWN5000_SCHED_QUEUE_OFFSET(qid), 0);
5393 /* Set scheduler window size and frame limit. */
5394 iwn_mem_write(sc, sc->sched_base +
5395 IWN5000_SCHED_QUEUE_OFFSET(qid) + 4,
5396 IWN_SCHED_LIMIT << 16 | IWN_SCHED_WINSZ);
5399 /* Enable interrupts for all our 20 queues. */
5400 iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
5401 /* Identify TX FIFO rings (0-7). */
5402 iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
5404 /* Mark TX rings (4 EDCA + cmd + 2 HCCA) as active. */
5405 for (qid = 0; qid < 7; qid++) {
5406 static uint8_t qid2fifo[] = { 3, 2, 1, 0, 7, 5, 6 };
5407 iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
5408 IWN5000_TXQ_STATUS_ACTIVE | qid2fifo[qid]);
5412 /* Configure WiMAX coexistence for combo adapters. */
5413 error = iwn5000_send_wimax_coex(sc);
5415 device_printf(sc->sc_dev,
5416 "%s: could not configure WiMAX coexistence, error %d\n",
5420 if (sc->hw_type != IWN_HW_REV_TYPE_5150) {
5421 struct iwn5000_phy_calib_crystal cmd;
5423 /* Perform crystal calibration. */
5424 memset(&cmd, 0, sizeof cmd);
5425 cmd.code = IWN5000_PHY_CALIB_CRYSTAL;
5428 cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff;
5429 cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
5430 DPRINTF(sc, IWN_DEBUG_CALIBRATE,
5431 "sending crystal calibration %d, %d\n",
5432 cmd.cap_pin[0], cmd.cap_pin[1]);
5433 error = iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 0);
5435 device_printf(sc->sc_dev,
5436 "%s: crystal calibration failed, error %d\n",
5441 if (!(sc->sc_flags & IWN_FLAG_CALIB_DONE)) {
5442 /* Query calibration from the initialization firmware. */
5443 error = iwn5000_query_calibration(sc);
5445 device_printf(sc->sc_dev,
5446 "%s: could not query calibration, error %d\n",
5451 * We have the calibration results now, reboot with the
5452 * runtime firmware (call ourselves recursively!)
5455 error = iwn_hw_init(sc);
5457 /* Send calibration results to runtime firmware. */
5458 error = iwn5000_send_calibration(sc);
5464 * The firmware boot code is small and is intended to be copied directly into
5465 * the NIC internal memory (no DMA transfer.)
5468 iwn4965_load_bootcode(struct iwn_softc *sc, const uint8_t *ucode, int size)
5472 size /= sizeof (uint32_t);
5474 error = iwn_nic_lock(sc);
5478 /* Copy microcode image into NIC memory. */
5479 iwn_prph_write_region_4(sc, IWN_BSM_SRAM_BASE,
5480 (const uint32_t *)ucode, size);
5482 iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
5483 iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
5484 iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
5486 /* Start boot load now. */
5487 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
5489 /* Wait for transfer to complete. */
5490 for (ntries = 0; ntries < 1000; ntries++) {
5491 if (!(iwn_prph_read(sc, IWN_BSM_WR_CTRL) &
5492 IWN_BSM_WR_CTRL_START))
5496 if (ntries == 1000) {
5497 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
5503 /* Enable boot after power up. */
5504 iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
5511 iwn4965_load_firmware(struct iwn_softc *sc)
5513 struct iwn_fw_info *fw = &sc->fw;
5514 struct iwn_dma_info *dma = &sc->fw_dma;
5517 /* Copy initialization sections into pre-allocated DMA-safe memory. */
5518 memcpy(dma->vaddr, fw->init.data, fw->init.datasz);
5519 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5520 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
5521 fw->init.text, fw->init.textsz);
5522 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5524 /* Tell adapter where to find initialization sections. */
5525 error = iwn_nic_lock(sc);
5528 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
5529 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
5530 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
5531 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
5532 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
5535 /* Load firmware boot code. */
5536 error = iwn4965_load_bootcode(sc, fw->boot.text, fw->boot.textsz);
5538 device_printf(sc->sc_dev, "%s: could not load boot firmware\n",
5542 /* Now press "execute". */
5543 IWN_WRITE(sc, IWN_RESET, 0);
5545 /* Wait at most one second for first alive notification. */
5546 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
5548 device_printf(sc->sc_dev,
5549 "%s: timeout waiting for adapter to initialize, error %d\n",
5554 /* Retrieve current temperature for initial TX power calibration. */
5555 sc->rawtemp = sc->ucode_info.temp[3].chan20MHz;
5556 sc->temp = iwn4965_get_temperature(sc);
5558 /* Copy runtime sections into pre-allocated DMA-safe memory. */
5559 memcpy(dma->vaddr, fw->main.data, fw->main.datasz);
5560 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5561 memcpy(dma->vaddr + IWN4965_FW_DATA_MAXSZ,
5562 fw->main.text, fw->main.textsz);
5563 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5565 /* Tell adapter where to find runtime sections. */
5566 error = iwn_nic_lock(sc);
5570 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
5571 iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
5572 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
5573 (dma->paddr + IWN4965_FW_DATA_MAXSZ) >> 4);
5574 iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
5575 IWN_FW_UPDATED | fw->main.textsz);
5582 iwn5000_load_firmware_section(struct iwn_softc *sc, uint32_t dst,
5583 const uint8_t *section, int size)
5585 struct iwn_dma_info *dma = &sc->fw_dma;
5588 /* Copy firmware section into pre-allocated DMA-safe memory. */
5589 memcpy(dma->vaddr, section, size);
5590 bus_dmamap_sync(sc->fw_dma.tag, dma->map, BUS_DMASYNC_PREWRITE);
5592 error = iwn_nic_lock(sc);
5596 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
5597 IWN_FH_TX_CONFIG_DMA_PAUSE);
5599 IWN_WRITE(sc, IWN_FH_SRAM_ADDR(IWN_SRVC_DMACHNL), dst);
5600 IWN_WRITE(sc, IWN_FH_TFBD_CTRL0(IWN_SRVC_DMACHNL),
5601 IWN_LOADDR(dma->paddr));
5602 IWN_WRITE(sc, IWN_FH_TFBD_CTRL1(IWN_SRVC_DMACHNL),
5603 IWN_HIADDR(dma->paddr) << 28 | size);
5604 IWN_WRITE(sc, IWN_FH_TXBUF_STATUS(IWN_SRVC_DMACHNL),
5605 IWN_FH_TXBUF_STATUS_TBNUM(1) |
5606 IWN_FH_TXBUF_STATUS_TBIDX(1) |
5607 IWN_FH_TXBUF_STATUS_TFBD_VALID);
5609 /* Kick Flow Handler to start DMA transfer. */
5610 IWN_WRITE(sc, IWN_FH_TX_CONFIG(IWN_SRVC_DMACHNL),
5611 IWN_FH_TX_CONFIG_DMA_ENA | IWN_FH_TX_CONFIG_CIRQ_HOST_ENDTFD);
5616 * Wait at most five seconds for FH DMA transfer to complete.
5618 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
5623 iwn5000_load_firmware(struct iwn_softc *sc)
5625 struct iwn_fw_part *fw;
5628 /* Load the initialization firmware on first boot only. */
5629 fw = (sc->sc_flags & IWN_FLAG_CALIB_DONE) ?
5630 &sc->fw.main : &sc->fw.init;
5632 error = iwn5000_load_firmware_section(sc, IWN_FW_TEXT_BASE,
5633 fw->text, fw->textsz);
5635 device_printf(sc->sc_dev,
5636 "%s: could not load firmware %s section, error %d\n",
5637 __func__, ".text", error);
5640 error = iwn5000_load_firmware_section(sc, IWN_FW_DATA_BASE,
5641 fw->data, fw->datasz);
5643 device_printf(sc->sc_dev,
5644 "%s: could not load firmware %s section, error %d\n",
5645 __func__, ".data", error);
5649 /* Now press "execute". */
5650 IWN_WRITE(sc, IWN_RESET, 0);
5655 iwn_read_firmware(struct iwn_softc *sc)
5657 const struct iwn_hal *hal = sc->sc_hal;
5658 struct iwn_fw_info *fw = &sc->fw;
5659 const uint32_t *ptr;
5664 * Read firmware image from filesystem. The firmware can block
5665 * in a taskq and deadlock against our serializer so unlock
5668 wlan_assert_serialized();
5669 wlan_serialize_exit();
5670 sc->fw_fp = firmware_get(sc->fwname);
5671 wlan_serialize_enter();
5672 if (sc->fw_fp == NULL) {
5673 device_printf(sc->sc_dev,
5674 "%s: could not load firmare image \"%s\"\n", __func__,
5679 size = sc->fw_fp->datasize;
5681 device_printf(sc->sc_dev,
5682 "%s: truncated firmware header: %zu bytes\n",
5687 /* Process firmware header. */
5688 ptr = (const uint32_t *)sc->fw_fp->data;
5689 rev = le32toh(*ptr++);
5690 /* Check firmware API version. */
5691 if (IWN_FW_API(rev) <= 1) {
5692 device_printf(sc->sc_dev,
5693 "%s: bad firmware, need API version >=2\n", __func__);
5696 if (IWN_FW_API(rev) >= 3) {
5697 /* Skip build number (version 2 header). */
5701 fw->main.textsz = le32toh(*ptr++);
5702 fw->main.datasz = le32toh(*ptr++);
5703 fw->init.textsz = le32toh(*ptr++);
5704 fw->init.datasz = le32toh(*ptr++);
5705 fw->boot.textsz = le32toh(*ptr++);
5708 /* Sanity-check firmware header. */
5709 if (fw->main.textsz > hal->fw_text_maxsz ||
5710 fw->main.datasz > hal->fw_data_maxsz ||
5711 fw->init.textsz > hal->fw_text_maxsz ||
5712 fw->init.datasz > hal->fw_data_maxsz ||
5713 fw->boot.textsz > IWN_FW_BOOT_TEXT_MAXSZ ||
5714 (fw->boot.textsz & 3) != 0) {
5715 device_printf(sc->sc_dev, "%s: invalid firmware header\n",
5720 /* Check that all firmware sections fit. */
5721 if (fw->main.textsz + fw->main.datasz + fw->init.textsz +
5722 fw->init.datasz + fw->boot.textsz > size) {
5723 device_printf(sc->sc_dev,
5724 "%s: firmware file too short: %zu bytes\n",
5729 /* Get pointers to firmware sections. */
5730 fw->main.text = (const uint8_t *)ptr;
5731 fw->main.data = fw->main.text + fw->main.textsz;
5732 fw->init.text = fw->main.data + fw->main.datasz;
5733 fw->init.data = fw->init.text + fw->init.textsz;
5734 fw->boot.text = fw->init.data + fw->init.datasz;
5740 iwn_clock_wait(struct iwn_softc *sc)
5744 /* Set "initialization complete" bit. */
5745 IWN_SETBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
5747 /* Wait for clock stabilization. */
5748 for (ntries = 0; ntries < 2500; ntries++) {
5749 if (IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_MAC_CLOCK_READY)
5753 device_printf(sc->sc_dev,
5754 "%s: timeout waiting for clock stabilization\n", __func__);
5759 iwn_apm_init(struct iwn_softc *sc)
5764 /* Disable L0s exit timer (NMI bug workaround.) */
5765 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_DIS_L0S_TIMER);
5766 /* Don't wait for ICH L0s (ICH bug workaround.) */
5767 IWN_SETBITS(sc, IWN_GIO_CHICKEN, IWN_GIO_CHICKEN_L1A_NO_L0S_RX);
5769 /* Set FH wait threshold to max (HW bug under stress workaround.) */
5770 IWN_SETBITS(sc, IWN_DBG_HPET_MEM, 0xffff0000);
5772 /* Enable HAP INTA to move adapter from L1a to L0s. */
5773 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_HAP_WAKE_L1A);
5775 /* Retrieve PCIe Active State Power Management (ASPM). */
5776 tmp = pci_read_config(sc->sc_dev, sc->sc_cap_off + 0x10, 1);
5777 /* Workaround for HW instability in PCIe L0->L0s->L1 transition. */
5778 if (tmp & 0x02) /* L1 Entry enabled. */
5779 IWN_SETBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
5781 IWN_CLRBITS(sc, IWN_GIO, IWN_GIO_L0S_ENA);
5783 if (sc->hw_type != IWN_HW_REV_TYPE_4965 &&
5784 sc->hw_type != IWN_HW_REV_TYPE_6000 &&
5785 sc->hw_type != IWN_HW_REV_TYPE_6050)
5786 IWN_SETBITS(sc, IWN_ANA_PLL, IWN_ANA_PLL_INIT);
5788 /* Wait for clock stabilization before accessing prph. */
5789 error = iwn_clock_wait(sc);
5793 error = iwn_nic_lock(sc);
5797 if (sc->hw_type == IWN_HW_REV_TYPE_4965) {
5798 /* Enable DMA and BSM (Bootstrap State Machine.) */
5799 iwn_prph_write(sc, IWN_APMG_CLK_EN,
5800 IWN_APMG_CLK_CTRL_DMA_CLK_RQT |
5801 IWN_APMG_CLK_CTRL_BSM_CLK_RQT);
5804 iwn_prph_write(sc, IWN_APMG_CLK_EN,
5805 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
5809 /* Disable L1-Active. */
5810 iwn_prph_setbits(sc, IWN_APMG_PCI_STT, IWN_APMG_PCI_STT_L1A_DIS);
5817 iwn_apm_stop_master(struct iwn_softc *sc)
5821 /* Stop busmaster DMA activity. */
5822 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_STOP_MASTER);
5823 for (ntries = 0; ntries < 100; ntries++) {
5824 if (IWN_READ(sc, IWN_RESET) & IWN_RESET_MASTER_DISABLED)
5828 device_printf(sc->sc_dev, "%s: timeout waiting for master\n",
5833 iwn_apm_stop(struct iwn_softc *sc)
5835 iwn_apm_stop_master(sc);
5837 /* Reset the entire device. */
5838 IWN_SETBITS(sc, IWN_RESET, IWN_RESET_SW);
5840 /* Clear "initialization complete" bit. */
5841 IWN_CLRBITS(sc, IWN_GP_CNTRL, IWN_GP_CNTRL_INIT_DONE);
5845 iwn4965_nic_config(struct iwn_softc *sc)
5847 if (IWN_RFCFG_TYPE(sc->rfcfg) == 1) {
5849 * I don't believe this to be correct but this is what the
5850 * vendor driver is doing. Probably the bits should not be
5851 * shifted in IWN_RFCFG_*.
5853 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5854 IWN_RFCFG_TYPE(sc->rfcfg) |
5855 IWN_RFCFG_STEP(sc->rfcfg) |
5856 IWN_RFCFG_DASH(sc->rfcfg));
5858 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5859 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
5864 iwn5000_nic_config(struct iwn_softc *sc)
5869 if (IWN_RFCFG_TYPE(sc->rfcfg) < 3) {
5870 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5871 IWN_RFCFG_TYPE(sc->rfcfg) |
5872 IWN_RFCFG_STEP(sc->rfcfg) |
5873 IWN_RFCFG_DASH(sc->rfcfg));
5875 IWN_SETBITS(sc, IWN_HW_IF_CONFIG,
5876 IWN_HW_IF_CONFIG_RADIO_SI | IWN_HW_IF_CONFIG_MAC_SI);
5878 error = iwn_nic_lock(sc);
5881 iwn_prph_setbits(sc, IWN_APMG_PS, IWN_APMG_PS_EARLY_PWROFF_DIS);
5883 if (sc->hw_type == IWN_HW_REV_TYPE_1000) {
5885 * Select first Switching Voltage Regulator (1.32V) to
5886 * solve a stability issue related to noisy DC2DC line
5887 * in the silicon of 1000 Series.
5889 tmp = iwn_prph_read(sc, IWN_APMG_DIGITAL_SVR);
5890 tmp &= ~IWN_APMG_DIGITAL_SVR_VOLTAGE_MASK;
5891 tmp |= IWN_APMG_DIGITAL_SVR_VOLTAGE_1_32;
5892 iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
5896 if (sc->sc_flags & IWN_FLAG_INTERNAL_PA) {
5897 /* Use internal power amplifier only. */
5898 IWN_WRITE(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_RADIO_2X2_IPA);
5900 if (sc->hw_type == IWN_HW_REV_TYPE_6050 && sc->calib_ver >= 6) {
5901 /* Indicate that ROM calibration version is >=6. */
5902 IWN_SETBITS(sc, IWN_GP_DRIVER, IWN_GP_DRIVER_CALIB_VER6);
5908 * Take NIC ownership over Intel Active Management Technology (AMT).
5911 iwn_hw_prepare(struct iwn_softc *sc)
5915 /* Check if hardware is ready. */
5916 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
5917 for (ntries = 0; ntries < 5; ntries++) {
5918 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
5919 IWN_HW_IF_CONFIG_NIC_READY)
5924 /* Hardware not ready, force into ready state. */
5925 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_PREPARE);
5926 for (ntries = 0; ntries < 15000; ntries++) {
5927 if (!(IWN_READ(sc, IWN_HW_IF_CONFIG) &
5928 IWN_HW_IF_CONFIG_PREPARE_DONE))
5932 if (ntries == 15000)
5935 /* Hardware should be ready now. */
5936 IWN_SETBITS(sc, IWN_HW_IF_CONFIG, IWN_HW_IF_CONFIG_NIC_READY);
5937 for (ntries = 0; ntries < 5; ntries++) {
5938 if (IWN_READ(sc, IWN_HW_IF_CONFIG) &
5939 IWN_HW_IF_CONFIG_NIC_READY)
5947 iwn_hw_init(struct iwn_softc *sc)
5949 const struct iwn_hal *hal = sc->sc_hal;
5950 int error, chnl, qid;
5952 /* Clear pending interrupts. */
5953 IWN_WRITE(sc, IWN_INT, 0xffffffff);
5955 error = iwn_apm_init(sc);
5957 device_printf(sc->sc_dev,
5958 "%s: could not power ON adapter, error %d\n",
5963 /* Select VMAIN power source. */
5964 error = iwn_nic_lock(sc);
5967 iwn_prph_clrbits(sc, IWN_APMG_PS, IWN_APMG_PS_PWR_SRC_MASK);
5970 /* Perform adapter-specific initialization. */
5971 error = hal->nic_config(sc);
5975 /* Initialize RX ring. */
5976 error = iwn_nic_lock(sc);
5979 IWN_WRITE(sc, IWN_FH_RX_CONFIG, 0);
5980 IWN_WRITE(sc, IWN_FH_RX_WPTR, 0);
5981 /* Set physical address of RX ring (256-byte aligned.) */
5982 IWN_WRITE(sc, IWN_FH_RX_BASE, sc->rxq.desc_dma.paddr >> 8);
5983 /* Set physical address of RX status (16-byte aligned.) */
5984 IWN_WRITE(sc, IWN_FH_STATUS_WPTR, sc->rxq.stat_dma.paddr >> 4);
5986 IWN_WRITE(sc, IWN_FH_RX_CONFIG,
5987 IWN_FH_RX_CONFIG_ENA |
5988 IWN_FH_RX_CONFIG_IGN_RXF_EMPTY | /* HW bug workaround */
5989 IWN_FH_RX_CONFIG_IRQ_DST_HOST |
5990 IWN_FH_RX_CONFIG_SINGLE_FRAME |
5991 IWN_FH_RX_CONFIG_RB_TIMEOUT(0) |
5992 IWN_FH_RX_CONFIG_NRBD(IWN_RX_RING_COUNT_LOG));
5994 IWN_WRITE(sc, IWN_FH_RX_WPTR, (IWN_RX_RING_COUNT - 1) & ~7);
5996 error = iwn_nic_lock(sc);
6000 /* Initialize TX scheduler. */
6001 iwn_prph_write(sc, hal->sched_txfact_addr, 0);
6003 /* Set physical address of "keep warm" page (16-byte aligned.) */
6004 IWN_WRITE(sc, IWN_FH_KW_ADDR, sc->kw_dma.paddr >> 4);
6006 /* Initialize TX rings. */
6007 for (qid = 0; qid < hal->ntxqs; qid++) {
6008 struct iwn_tx_ring *txq = &sc->txq[qid];
6010 /* Set physical address of TX ring (256-byte aligned.) */
6011 IWN_WRITE(sc, IWN_FH_CBBC_QUEUE(qid),
6012 txq->desc_dma.paddr >> 8);
6016 /* Enable DMA channels. */
6017 for (chnl = 0; chnl < hal->ndmachnls; chnl++) {
6018 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl),
6019 IWN_FH_TX_CONFIG_DMA_ENA |
6020 IWN_FH_TX_CONFIG_DMA_CREDIT_ENA);
6023 /* Clear "radio off" and "commands blocked" bits. */
6024 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6025 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_CMD_BLOCKED);
6027 /* Clear pending interrupts. */
6028 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6029 /* Enable interrupt coalescing. */
6030 IWN_WRITE(sc, IWN_INT_COALESCING, 512 / 8);
6031 /* Enable interrupts. */
6032 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6034 /* _Really_ make sure "radio off" bit is cleared! */
6035 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6036 IWN_WRITE(sc, IWN_UCODE_GP1_CLR, IWN_UCODE_GP1_RFKILL);
6038 error = hal->load_firmware(sc);
6040 device_printf(sc->sc_dev,
6041 "%s: could not load firmware, error %d\n",
6045 /* Wait at most one second for firmware alive notification. */
6046 error = zsleep(sc, &wlan_global_serializer, 0, "iwninit", hz);
6048 device_printf(sc->sc_dev,
6049 "%s: timeout waiting for adapter to initialize, error %d\n",
6053 /* Do post-firmware initialization. */
6054 return hal->post_alive(sc);
6058 iwn_hw_stop(struct iwn_softc *sc)
6060 const struct iwn_hal *hal = sc->sc_hal;
6062 int chnl, qid, ntries;
6064 IWN_WRITE(sc, IWN_RESET, IWN_RESET_NEVO);
6066 /* Disable interrupts. */
6067 IWN_WRITE(sc, IWN_INT_MASK, 0);
6068 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6069 IWN_WRITE(sc, IWN_FH_INT, 0xffffffff);
6070 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
6072 /* Make sure we no longer hold the NIC lock. */
6075 /* Stop TX scheduler. */
6076 iwn_prph_write(sc, hal->sched_txfact_addr, 0);
6078 /* Stop all DMA channels. */
6079 if (iwn_nic_lock(sc) == 0) {
6080 for (chnl = 0; chnl < hal->ndmachnls; chnl++) {
6081 IWN_WRITE(sc, IWN_FH_TX_CONFIG(chnl), 0);
6082 for (ntries = 0; ntries < 200; ntries++) {
6083 tmp = IWN_READ(sc, IWN_FH_TX_STATUS);
6084 if ((tmp & IWN_FH_TX_STATUS_IDLE(chnl)) ==
6085 IWN_FH_TX_STATUS_IDLE(chnl))
6094 iwn_reset_rx_ring(sc, &sc->rxq);
6096 /* Reset all TX rings. */
6097 for (qid = 0; qid < hal->ntxqs; qid++)
6098 iwn_reset_tx_ring(sc, &sc->txq[qid]);
6100 if (iwn_nic_lock(sc) == 0) {
6101 iwn_prph_write(sc, IWN_APMG_CLK_DIS,
6102 IWN_APMG_CLK_CTRL_DMA_CLK_RQT);
6107 /* Power OFF adapter. */
6112 iwn_init_locked(struct iwn_softc *sc)
6114 struct ifnet *ifp = sc->sc_ifp;
6117 error = iwn_hw_prepare(sc);
6119 device_printf(sc->sc_dev, "%s: hardware not ready, eror %d\n",
6124 /* Initialize interrupt mask to default value. */
6125 sc->int_mask = IWN_INT_MASK_DEF;
6126 sc->sc_flags &= ~IWN_FLAG_USE_ICT;
6128 /* Check that the radio is not disabled by hardware switch. */
6129 if (!(IWN_READ(sc, IWN_GP_CNTRL) & IWN_GP_CNTRL_RFKILL)) {
6130 device_printf(sc->sc_dev,
6131 "radio is disabled by hardware switch\n");
6133 /* Enable interrupts to get RF toggle notifications. */
6134 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6135 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6139 /* Read firmware images from the filesystem. */
6140 error = iwn_read_firmware(sc);
6142 device_printf(sc->sc_dev,
6143 "%s: could not read firmware, error %d\n",
6148 /* Initialize hardware and upload firmware. */
6149 error = iwn_hw_init(sc);
6150 firmware_put(sc->fw_fp, FIRMWARE_UNLOAD);
6153 device_printf(sc->sc_dev,
6154 "%s: could not initialize hardware, error %d\n",
6159 /* Configure adapter now that it is ready. */
6160 error = iwn_config(sc);
6162 device_printf(sc->sc_dev,
6163 "%s: could not configure device, error %d\n",
6168 ifp->if_flags &= ~IFF_OACTIVE;
6169 ifp->if_flags |= IFF_RUNNING;
6174 iwn_stop_locked(sc);
6180 struct iwn_softc *sc = arg;
6181 struct ifnet *ifp = sc->sc_ifp;
6182 struct ieee80211com *ic = ifp->if_l2com;
6184 iwn_init_locked(sc);
6186 if (ifp->if_flags & IFF_RUNNING)
6187 ieee80211_start_all(ic);
6191 iwn_stop_locked(struct iwn_softc *sc)
6193 struct ifnet *ifp = sc->sc_ifp;
6195 sc->sc_tx_timer = 0;
6196 callout_stop(&sc->sc_timer_to);
6197 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
6199 /* Power OFF hardware. */
6204 iwn_stop(struct iwn_softc *sc)
6206 iwn_stop_locked(sc);
6210 * Callback from net80211 to start a scan.
6213 iwn_scan_start(struct ieee80211com *ic)
6215 struct ifnet *ifp = ic->ic_ifp;
6216 struct iwn_softc *sc = ifp->if_softc;
6218 /* make the link LED blink while we're scanning */
6219 iwn_set_led(sc, IWN_LED_LINK, 20, 2);
6223 * Callback from net80211 to terminate a scan.
6226 iwn_scan_end(struct ieee80211com *ic)
6228 struct ifnet *ifp = ic->ic_ifp;
6229 struct iwn_softc *sc = ifp->if_softc;
6230 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6232 if (vap->iv_state == IEEE80211_S_RUN) {
6233 /* Set link LED to ON status if we are associated */
6234 iwn_set_led(sc, IWN_LED_LINK, 0, 1);
6239 * Callback from net80211 to force a channel change.
6242 iwn_set_channel(struct ieee80211com *ic)
6244 const struct ieee80211_channel *c = ic->ic_curchan;
6245 struct ifnet *ifp = ic->ic_ifp;
6246 struct iwn_softc *sc = ifp->if_softc;
6248 sc->sc_rxtap.wr_chan_freq = htole16(c->ic_freq);
6249 sc->sc_rxtap.wr_chan_flags = htole16(c->ic_flags);
6250 sc->sc_txtap.wt_chan_freq = htole16(c->ic_freq);
6251 sc->sc_txtap.wt_chan_flags = htole16(c->ic_flags);
6255 * Callback from net80211 to start scanning of the current channel.
6258 iwn_scan_curchan(struct ieee80211_scan_state *ss, unsigned long maxdwell)
6260 struct ieee80211vap *vap = ss->ss_vap;
6261 struct iwn_softc *sc = vap->iv_ic->ic_ifp->if_softc;
6264 error = iwn_scan(sc);
6266 ieee80211_cancel_scan(vap);
6270 * Callback from net80211 to handle the minimum dwell time being met.
6271 * The intent is to terminate the scan but we just let the firmware
6272 * notify us when it's finished as we have no safe way to abort it.
6275 iwn_scan_mindwell(struct ieee80211_scan_state *ss)
6277 /* NB: don't try to abort scan; wait for firmware to finish */
6280 static struct iwn_eeprom_chan *
6281 iwn_find_eeprom_channel(struct iwn_softc *sc, struct ieee80211_channel *c)
6285 for (j = 0; j < 7; j++) {
6286 for (i = 0; i < iwn_bands[j].nchan; i++) {
6287 if (iwn_bands[j].chan[i] == c->ic_ieee)
6288 return &sc->eeprom_channels[j][i];
6296 * Enforce flags read from EEPROM.
6299 iwn_setregdomain(struct ieee80211com *ic, struct ieee80211_regdomain *rd,
6300 int nchan, struct ieee80211_channel chans[])
6302 struct iwn_softc *sc = ic->ic_ifp->if_softc;
6305 for (i = 0; i < nchan; i++) {
6306 struct ieee80211_channel *c = &chans[i];
6307 struct iwn_eeprom_chan *channel;
6309 channel = iwn_find_eeprom_channel(sc, c);
6310 if (channel == NULL) {
6311 if_printf(ic->ic_ifp,
6312 "%s: invalid channel %u freq %u/0x%x\n",
6313 __func__, c->ic_ieee, c->ic_freq, c->ic_flags);
6316 c->ic_flags |= iwn_eeprom_channel_flags(channel);
6323 iwn_hw_reset_task(void *arg0, int pending)
6325 struct iwn_softc *sc = arg0;
6327 struct ieee80211com *ic;
6329 wlan_serialize_enter();
6334 ieee80211_notify_radio(ic, 1);
6335 wlan_serialize_exit();
6339 iwn_radio_on_task(void *arg0, int pending)
6341 struct iwn_softc *sc = arg0;
6343 struct ieee80211com *ic;
6344 struct ieee80211vap *vap;
6346 wlan_serialize_enter();
6349 vap = TAILQ_FIRST(&ic->ic_vaps);
6352 ieee80211_init(vap);
6354 wlan_serialize_exit();
6358 iwn_radio_off_task(void *arg0, int pending)
6360 struct iwn_softc *sc = arg0;
6362 struct ieee80211com *ic;
6363 struct ieee80211vap *vap;
6365 wlan_serialize_enter();
6368 vap = TAILQ_FIRST(&ic->ic_vaps);
6371 ieee80211_stop(vap);
6373 /* Enable interrupts to get RF toggle notification. */
6374 IWN_WRITE(sc, IWN_INT, 0xffffffff);
6375 IWN_WRITE(sc, IWN_INT_MASK, sc->int_mask);
6376 wlan_serialize_exit();
6380 iwn_sysctlattach(struct iwn_softc *sc)
6382 struct sysctl_ctx_list *ctx;
6383 struct sysctl_oid *tree;
6385 ctx = &sc->sc_sysctl_ctx;
6386 tree = sc->sc_sysctl_tree;
6388 device_printf(sc->sc_dev, "can't add sysctl node\n");
6394 SYSCTL_ADD_INT(ctx, SYSCTL_CHILDREN(tree), OID_AUTO,
6395 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "control debugging printfs");
6400 iwn_pci_shutdown(device_t dev)
6402 struct iwn_softc *sc = device_get_softc(dev);
6404 wlan_serialize_enter();
6406 wlan_serialize_exit();
6412 iwn_pci_suspend(device_t dev)
6414 struct iwn_softc *sc = device_get_softc(dev);
6415 struct ifnet *ifp = sc->sc_ifp;
6416 struct ieee80211com *ic = ifp->if_l2com;
6417 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
6419 wlan_serialize_enter();
6422 ieee80211_stop(vap);
6423 wlan_serialize_exit();
6429 iwn_pci_resume(device_t dev)
6431 struct iwn_softc *sc = device_get_softc(dev);
6433 struct ieee80211com *ic;
6434 struct ieee80211vap *vap;
6436 wlan_serialize_enter();
6439 vap = TAILQ_FIRST(&ic->ic_vaps);
6440 /* Clear device-specific "PCI retry timeout" register (41h). */
6441 pci_write_config(dev, 0x41, 0, 1);
6443 if (ifp->if_flags & IFF_UP) {
6446 ieee80211_init(vap);
6447 if (ifp->if_flags & IFF_RUNNING)
6450 wlan_serialize_exit();
6457 iwn_intr_str(uint8_t cmd)
6461 case IWN_UC_READY: return "UC_READY";
6462 case IWN_ADD_NODE_DONE: return "ADD_NODE_DONE";
6463 case IWN_TX_DONE: return "TX_DONE";
6464 case IWN_START_SCAN: return "START_SCAN";
6465 case IWN_STOP_SCAN: return "STOP_SCAN";
6466 case IWN_RX_STATISTICS: return "RX_STATS";
6467 case IWN_BEACON_STATISTICS: return "BEACON_STATS";
6468 case IWN_STATE_CHANGED: return "STATE_CHANGED";
6469 case IWN_BEACON_MISSED: return "BEACON_MISSED";
6470 case IWN_RX_PHY: return "RX_PHY";
6471 case IWN_MPDU_RX_DONE: return "MPDU_RX_DONE";
6472 case IWN_RX_DONE: return "RX_DONE";
6474 /* Command Notifications */
6475 case IWN_CMD_RXON: return "IWN_CMD_RXON";
6476 case IWN_CMD_RXON_ASSOC: return "IWN_CMD_RXON_ASSOC";
6477 case IWN_CMD_EDCA_PARAMS: return "IWN_CMD_EDCA_PARAMS";
6478 case IWN_CMD_TIMING: return "IWN_CMD_TIMING";
6479 case IWN_CMD_LINK_QUALITY: return "IWN_CMD_LINK_QUALITY";
6480 case IWN_CMD_SET_LED: return "IWN_CMD_SET_LED";
6481 case IWN5000_CMD_WIMAX_COEX: return "IWN5000_CMD_WIMAX_COEX";
6482 case IWN5000_CMD_CALIB_CONFIG: return "IWN5000_CMD_CALIB_CONFIG";
6483 case IWN5000_CMD_CALIB_RESULT: return "IWN5000_CMD_CALIB_RESULT";
6484 case IWN5000_CMD_CALIB_COMPLETE: return "IWN5000_CMD_CALIB_COMPLETE";
6485 case IWN_CMD_SET_POWER_MODE: return "IWN_CMD_SET_POWER_MODE";
6486 case IWN_CMD_SCAN: return "IWN_CMD_SCAN";
6487 case IWN_CMD_SCAN_RESULTS: return "IWN_CMD_SCAN_RESULTS";
6488 case IWN_CMD_TXPOWER: return "IWN_CMD_TXPOWER";
6489 case IWN_CMD_TXPOWER_DBM: return "IWN_CMD_TXPOWER_DBM";
6490 case IWN5000_CMD_TX_ANT_CONFIG: return "IWN5000_CMD_TX_ANT_CONFIG";
6491 case IWN_CMD_BT_COEX: return "IWN_CMD_BT_COEX";
6492 case IWN_CMD_SET_CRITICAL_TEMP: return "IWN_CMD_SET_CRITICAL_TEMP";
6493 case IWN_CMD_SET_SENSITIVITY: return "IWN_CMD_SET_SENSITIVITY";
6494 case IWN_CMD_PHY_CALIB: return "IWN_CMD_PHY_CALIB";
6496 return "UNKNOWN INTR NOTIF/CMD";
6498 #endif /* IWN_DEBUG */
6500 static device_method_t iwn_methods[] = {
6501 /* Device interface */
6502 DEVMETHOD(device_probe, iwn_pci_probe),
6503 DEVMETHOD(device_attach, iwn_pci_attach),
6504 DEVMETHOD(device_detach, iwn_pci_detach),
6505 DEVMETHOD(device_shutdown, iwn_pci_shutdown),
6506 DEVMETHOD(device_suspend, iwn_pci_suspend),
6507 DEVMETHOD(device_resume, iwn_pci_resume),
6511 static driver_t iwn_driver = {
6514 sizeof (struct iwn_softc)
6516 static devclass_t iwn_devclass;
6518 DRIVER_MODULE(iwn, pci, iwn_driver, iwn_devclass, 0, 0);
6519 MODULE_DEPEND(iwn, pci, 1, 1, 1);
6520 MODULE_DEPEND(iwn, firmware, 1, 1, 1);
6521 MODULE_DEPEND(iwn, wlan, 1, 1, 1);
6522 MODULE_DEPEND(iwn, wlan_amrr, 1, 1, 1);