1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* $FreeBSD: src/contrib/gcc/config/i386/i386.h,v 1.5 1999/10/16 08:10:36 obrien Exp $ */
38 /* $DragonFly: src/contrib/gcc/config/i386/Attic/i386.h,v 1.2 2003/06/17 04:24:02 dillon Exp $ */
40 /* Names to predefine in the preprocessor for this target machine. */
44 /* Stubs for half-pic support if not OSF/1 reference platform. */
47 #define HALF_PIC_P() 0
48 #define HALF_PIC_NUMBER_PTRS 0
49 #define HALF_PIC_NUMBER_REFS 0
50 #define HALF_PIC_ENCODE(DECL)
51 #define HALF_PIC_DECLARE(NAME)
52 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
53 #define HALF_PIC_ADDRESS_P(X) 0
54 #define HALF_PIC_PTR(X) X
55 #define HALF_PIC_FINISH(STREAM)
58 /* Define the specific costs for a given cpu */
60 struct processor_costs {
61 int add; /* cost of an add instruction */
62 int lea; /* cost of a lea instruction */
63 int shift_var; /* variable shift costs */
64 int shift_const; /* constant shift costs */
65 int mult_init; /* cost of starting a multiply */
66 int mult_bit; /* cost of multiply per each bit set */
67 int divide; /* cost of a divide/mod */
70 extern struct processor_costs *ix86_cost;
72 /* Run-time compilation parameters selecting different hardware subsets. */
74 extern int target_flags;
76 /* Macros used in the machine description to test the flags. */
78 /* configure can arrange to make this 2, to force a 486. */
79 #ifndef TARGET_CPU_DEFAULT
80 #define TARGET_CPU_DEFAULT 0
83 /* Masks for the -m switches */
84 #define MASK_80387 000000000001 /* Hardware floating point */
85 #define MASK_NOTUSED1 000000000002 /* bit not currently used */
86 #define MASK_NOTUSED2 000000000004 /* bit not currently used */
87 #define MASK_RTD 000000000010 /* Use ret that pops args */
88 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
89 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
90 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
91 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
92 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
93 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
94 /* Temporary codegen switches */
95 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
96 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
97 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
98 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
99 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
100 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
101 #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
103 /* Use the floating point instructions */
104 #define TARGET_80387 (target_flags & MASK_80387)
106 /* Compile using ret insn that pops args.
107 This will not work unless you use prototypes at least
108 for all functions that can take varying numbers of args. */
109 #define TARGET_RTD (target_flags & MASK_RTD)
111 /* Align doubles to a two word boundary. This breaks compatibility with
112 the published ABI's for structures containing doubles, but produces
113 faster code on the pentium. */
114 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
116 /* Put uninitialized locals into bss, not data.
117 Meaningful only on svr3. */
118 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
120 /* Use IEEE floating point comparisons. These handle correctly the cases
121 where the result of a comparison is unordered. Normally SIGFPE is
122 generated in such cases, in which case this isn't needed. */
123 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
125 /* Functions that return a floating point value may return that value
126 in the 387 FPU or in 386 integer registers. If set, this flag causes
127 the 387 to be used, which is compatible with most calling conventions. */
128 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
130 /* Disable generation of FP sin, cos and sqrt operations for 387.
131 This is because FreeBSD lacks these in the math-emulator-code */
132 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
134 /* Don't create frame pointers for leaf functions */
135 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
137 /* Temporary switches for tuning code generation */
139 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
140 and division by constants, but sometimes cause reload problems. */
141 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
142 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
144 /* Emit/Don't emit prologue as rtl */
145 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
147 /* Debug GO_IF_LEGITIMATE_ADDRESS */
148 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
150 /* Debug FUNCTION_ARG macros */
151 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
153 /* Hack macros for tuning code generation */
154 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
155 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
157 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
158 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
159 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
160 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
161 #define TARGET_K6 (ix86_cpu == PROCESSOR_K6)
163 #define CPUMASK (1 << ix86_cpu)
164 extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;
165 extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
166 extern const int x86_unroll_strlen, x86_use_q_reg, x86_use_any_reg;
167 extern const int x86_double_with_add;
169 #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
170 #define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
171 #define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & CPUMASK)
172 #define TARGET_USE_BIT_TEST (x86_use_bit_test & CPUMASK)
173 #define TARGET_UNROLL_STRLEN (x86_unroll_strlen & CPUMASK)
174 #define TARGET_USE_Q_REG (x86_use_q_reg & CPUMASK)
175 #define TARGET_USE_ANY_REG (x86_use_any_reg & CPUMASK)
176 #define TARGET_CMOVE (x86_cmove & (1 << ix86_arch))
177 #define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & CPUMASK)
178 #define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & CPUMASK)
180 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
182 #define TARGET_SWITCHES \
183 { { "80387", MASK_80387, "Use hardware fp" }, \
184 { "no-80387", -MASK_80387, "Do not use hardware fp" },\
185 { "hard-float", MASK_80387, "Use hardware fp" }, \
186 { "soft-float", -MASK_80387, "Do not use hardware fp" },\
187 { "no-soft-float", MASK_80387, "Use hardware fp" }, \
188 { "386", 0, "Same as -mcpu=i386" }, \
189 { "486", 0, "Same as -mcpu=i486" }, \
190 { "pentium", 0, "Same as -mcpu=pentium" }, \
191 { "pentiumpro", 0, "Same as -mcpu=pentiumpro" }, \
192 { "rtd", MASK_RTD, "Alternate calling convention" },\
193 { "no-rtd", -MASK_RTD, "Use normal calling convention" },\
194 { "align-double", MASK_ALIGN_DOUBLE, "Align some doubles on dword boundary" },\
195 { "no-align-double", -MASK_ALIGN_DOUBLE, "Align doubles on word boundary" }, \
196 { "svr3-shlib", MASK_SVR3_SHLIB, "Uninitialized locals in .bss" }, \
197 { "no-svr3-shlib", -MASK_SVR3_SHLIB, "Uninitialized locals in .data" }, \
198 { "ieee-fp", MASK_IEEE_FP, "Use IEEE math for fp comparisons" }, \
199 { "no-ieee-fp", -MASK_IEEE_FP, "Do not use IEEE math for fp comparisons" }, \
200 { "fp-ret-in-387", MASK_FLOAT_RETURNS, "Return values of functions in FPU registers" }, \
201 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS , "Do not return values of functions in FPU registers"}, \
202 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387, "Do not generate sin, cos, sqrt for 387" }, \
203 { "fancy-math-387", -MASK_NO_FANCY_MATH_387, "Generate sin, cos, sqrt for FPU"}, \
204 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER, "Omit the frame pointer in leaf functions" }, \
205 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER, "" }, \
206 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY, "multiplies of 32 bits constrained to 32 bits" }, \
207 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY, "multiplies of 32 bits are 64 bits" }, \
208 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE, "Schedule function prologues" }, \
209 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE, "" }, \
210 { "debug-addr", MASK_DEBUG_ADDR, 0 /* intentionally undoc */ }, \
211 { "no-debug-addr", -MASK_DEBUG_ADDR, 0 /* intentionally undoc */ }, \
212 { "move", -MASK_NO_MOVE, "Generate mem-mem moves" }, \
213 { "no-move", MASK_NO_MOVE, "Don't generate mem-mem moves" }, \
214 { "debug-arg", MASK_DEBUG_ARG, 0 /* intentionally undoc */ }, \
215 { "no-debug-arg", -MASK_DEBUG_ARG, 0 /* intentionally undoc */ }, \
216 { "stack-arg-probe", MASK_STACK_PROBE, "Enable stack probing" }, \
217 { "no-stack-arg-probe", -MASK_STACK_PROBE, "" }, \
218 { "windows", 0, 0 /* intentionally undoc */ }, \
219 { "dll", 0, 0 /* intentionally undoc */ }, \
221 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT, 0 }}
223 /* Which processor to schedule for. The cpu attribute defines a list that
224 mirrors this list, so changes to i386.md must be made at the same time. */
227 {PROCESSOR_I386, /* 80386 */
228 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
230 PROCESSOR_PENTIUMPRO,
233 #define PROCESSOR_I386_STRING "i386"
234 #define PROCESSOR_I486_STRING "i486"
235 #define PROCESSOR_I586_STRING "i586"
236 #define PROCESSOR_PENTIUM_STRING "pentium"
237 #define PROCESSOR_I686_STRING "i686"
238 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
239 #define PROCESSOR_K6_STRING "k6"
241 extern enum processor_type ix86_cpu;
243 extern int ix86_arch;
245 /* Define the default processor. This is overridden by other tm.h files. */
246 #define PROCESSOR_DEFAULT (enum processor_type) TARGET_CPU_DEFAULT
247 #define PROCESSOR_DEFAULT_STRING \
248 (PROCESSOR_DEFAULT == PROCESSOR_I486 ? PROCESSOR_I486_STRING \
249 : PROCESSOR_DEFAULT == PROCESSOR_PENTIUM ? PROCESSOR_PENTIUM_STRING \
250 : PROCESSOR_DEFAULT == PROCESSOR_PENTIUMPRO ? PROCESSOR_PENTIUMPRO_STRING \
251 : PROCESSOR_DEFAULT == PROCESSOR_K6 ? PROCESSOR_K6_STRING \
252 : PROCESSOR_I386_STRING)
254 /* This macro is similar to `TARGET_SWITCHES' but defines names of
255 command options that have values. Its definition is an
256 initializer with a subgrouping for each command option.
258 Each subgrouping contains a string constant, that defines the
259 fixed part of the option name, and the address of a variable. The
260 variable, type `char *', is set to the variable part of the given
261 option if the fixed part matches. The actual option name is made
262 by appending `-m' to the specified name. */
263 #define TARGET_OPTIONS \
264 { { "cpu=", &ix86_cpu_string, "Schedule code for given CPU"}, \
265 { "arch=", &ix86_arch_string, "Generate code for given CPU"}, \
266 { "reg-alloc=", &i386_reg_alloc_order, "Control allocation order of integer registers" }, \
267 { "regparm=", &i386_regparm_string, "Number of registers used to pass integer arguments" }, \
268 { "align-loops=", &i386_align_loops_string, "Loop code aligned to this power of 2" }, \
269 { "align-jumps=", &i386_align_jumps_string, "Jump targets are aligned to this power of 2" }, \
270 { "align-functions=", &i386_align_funcs_string, "Function starts are aligned to this power of 2" }, \
271 { "preferred-stack-boundary=", &i386_preferred_stack_boundary_string, "Attempt to keep stack aligned to this power of 2" }, \
272 { "branch-cost=", &i386_branch_cost_string, "Branches are this expensive (1-5, arbitrary units)" }, \
276 /* Sometimes certain combinations of command options do not make
277 sense on a particular target machine. You can define a macro
278 `OVERRIDE_OPTIONS' to take account of this. This macro, if
279 defined, is executed once just after all the command options have
282 Don't use this macro to turn on various extra optimizations for
283 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
285 #define OVERRIDE_OPTIONS override_options ()
287 /* These are meant to be redefined in the host dependent files */
288 #define SUBTARGET_SWITCHES
289 #define SUBTARGET_OPTIONS
291 /* Define this to change the optimizations performed by default. */
292 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
294 /* Specs for the compiler proper */
297 #define CC1_CPU_SPEC "\
299 %{m386:-mcpu=i386 -march=i386} \
300 %{m486:-mcpu=i486 -march=i486} \
301 %{mpentium:-mcpu=pentium} \
302 %{mpentiumpro:-mcpu=pentiumpro}}"
305 #define CPP_486_SPEC "%{!ansi:-Di486} -D__i486 -D__i486__"
306 #define CPP_586_SPEC "%{!ansi:-Di586 -Dpentium} \
307 -D__i586 -D__i586__ -D__pentium -D__pentium__"
308 #define CPP_K6_SPEC "%{!ansi:-Di586 -Dk6} \
309 -D__i586 -D__i586__ -D__k6 -D__k6__"
310 #define CPP_686_SPEC "%{!ansi:-Di686 -Dpentiumpro} \
311 -D__i686 -D__i686__ -D__pentiumpro -D__pentiumpro__"
313 #ifndef CPP_CPU_DEFAULT_SPEC
314 #if TARGET_CPU_DEFAULT == 1
315 #define CPP_CPU_DEFAULT_SPEC "%(cpp_486)"
317 #if TARGET_CPU_DEFAULT == 2
318 #define CPP_CPU_DEFAULT_SPEC "%(cpp_586)"
320 #if TARGET_CPU_DEFAULT == 3
321 #define CPP_CPU_DEFAULT_SPEC "%(cpp_686)"
323 #if TARGET_CPU_DEFAULT == 4
324 #define CPP_CPU_DEFAULT_SPEC "%(cpp_k6)"
326 #ifndef CPP_CPU_DEFAULT_SPEC
327 #define CPP_CPU_DEFAULT_SPEC ""
329 #endif /* CPP_CPU_DEFAULT_SPEC */
332 #define CPP_CPU_SPEC "\
333 -Acpu(i386) -Amachine(i386) \
334 %{!ansi:-Di386} -D__i386 -D__i386__ \
335 %{mcpu=i486:%(cpp_486)} %{m486:%(cpp_486)} \
336 %{mpentium:%(cpp_586)} %{mcpu=pentium:%(cpp_586)} \
337 %{mpentiumpro:%(cpp_686)} %{mcpu=pentiumpro:%(cpp_686)} \
338 %{mcpu=k6:%(cpp_k6)} \
339 %{!mcpu*:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}"
343 #define CC1_SPEC "%(cc1_spec) "
346 /* This macro defines names of additional specifications to put in the
347 specs that can be used in various specifications like CC1_SPEC. Its
348 definition is an initializer with a subgrouping for each command option.
350 Each subgrouping contains a string constant, that defines the
351 specification name, and a string constant that used by the GNU CC driver
354 Do not define this macro if it does not need to do anything. */
356 #ifndef SUBTARGET_EXTRA_SPECS
357 #define SUBTARGET_EXTRA_SPECS
360 #define EXTRA_SPECS \
361 { "cpp_486", CPP_486_SPEC}, \
362 { "cpp_586", CPP_586_SPEC}, \
363 { "cpp_k6", CPP_K6_SPEC}, \
364 { "cpp_686", CPP_686_SPEC}, \
365 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
366 { "cpp_cpu", CPP_CPU_SPEC }, \
367 { "cc1_cpu", CC1_CPU_SPEC }, \
368 SUBTARGET_EXTRA_SPECS
370 /* target machine storage layout */
372 /* Define for XFmode extended real floating point support.
373 This will automatically cause REAL_ARITHMETIC to be defined. */
374 #define LONG_DOUBLE_TYPE_SIZE 96
376 /* Define if you don't want extended real, but do want to use the
377 software floating point emulator for REAL_ARITHMETIC and
378 decimal <-> binary conversion. */
379 /* #define REAL_ARITHMETIC */
381 /* Define this if most significant byte of a word is the lowest numbered. */
382 /* That is true on the 80386. */
384 #define BITS_BIG_ENDIAN 0
386 /* Define this if most significant byte of a word is the lowest numbered. */
387 /* That is not true on the 80386. */
388 #define BYTES_BIG_ENDIAN 0
390 /* Define this if most significant word of a multiword number is the lowest
392 /* Not true for 80386 */
393 #define WORDS_BIG_ENDIAN 0
395 /* number of bits in an addressable storage unit */
396 #define BITS_PER_UNIT 8
398 /* Width in bits of a "word", which is the contents of a machine register.
399 Note that this is not necessarily the width of data type `int';
400 if using 16-bit ints on a 80386, this would still be 32.
401 But on a machine with 16-bit registers, this would be 16. */
402 #define BITS_PER_WORD 32
404 /* Width of a word, in units (bytes). */
405 #define UNITS_PER_WORD 4
407 /* Width in bits of a pointer.
408 See also the macro `Pmode' defined below. */
409 #define POINTER_SIZE 32
411 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
412 #define PARM_BOUNDARY 32
414 /* Boundary (in *bits*) on which the stack pointer must be aligned. */
415 #define STACK_BOUNDARY 32
417 /* Boundary (in *bits*) on which the stack pointer preferrs to be
418 aligned; the compiler cannot rely on having this alignment. */
419 #define PREFERRED_STACK_BOUNDARY i386_preferred_stack_boundary
421 /* Allocation boundary (in *bits*) for the code of a function.
422 For i486, we get better performance by aligning to a cache
423 line (i.e. 16 byte) boundary. */
424 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
426 /* Alignment of field after `int : 0' in a structure. */
428 #define EMPTY_FIELD_BOUNDARY 32
430 /* Minimum size in bits of the largest boundary to which any
431 and all fundamental data types supported by the hardware
432 might need to be aligned. No data type wants to be aligned
433 rounder than this. The i386 supports 64-bit floating point
434 quantities, but these can be aligned on any 32-bit boundary.
435 The published ABIs say that doubles should be aligned on word
436 boundaries, but the Pentium gets better performance with them
437 aligned on 64 bit boundaries. */
438 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
440 /* If defined, a C expression to compute the alignment given to a
441 constant that is being placed in memory. CONSTANT is the constant
442 and ALIGN is the alignment that the object would ordinarily have.
443 The value of this macro is used instead of that alignment to align
446 If this macro is not defined, then ALIGN is used.
448 The typical use of this macro is to increase alignment for string
449 constants to be word aligned so that `strcpy' calls that copy
450 constants can be done inline. */
452 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
453 (TREE_CODE (EXP) == REAL_CST \
454 ? ((TYPE_MODE (TREE_TYPE (EXP)) == DFmode && (ALIGN) < 64) \
456 : (TYPE_MODE (TREE_TYPE (EXP)) == XFmode && (ALIGN) < 128) \
459 : TREE_CODE (EXP) == STRING_CST \
460 ? ((TREE_STRING_LENGTH (EXP) >= 31 && (ALIGN) < 256) \
465 /* If defined, a C expression to compute the alignment for a static
466 variable. TYPE is the data type, and ALIGN is the alignment that
467 the object would ordinarily have. The value of this macro is used
468 instead of that alignment to align the object.
470 If this macro is not defined, then ALIGN is used.
472 One use of this macro is to increase alignment of medium-size
473 data to make it all fit in fewer cache lines. Another is to
474 cause character arrays to be word-aligned so that `strcpy' calls
475 that copy constants to character arrays can be done inline. */
477 #define DATA_ALIGNMENT(TYPE, ALIGN) \
478 ((AGGREGATE_TYPE_P (TYPE) \
479 && TYPE_SIZE (TYPE) \
480 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
481 && (TREE_INT_CST_LOW (TYPE_SIZE (TYPE)) >= 256 \
482 || TREE_INT_CST_HIGH (TYPE_SIZE (TYPE))) && (ALIGN) < 256) \
484 : TREE_CODE (TYPE) == ARRAY_TYPE \
485 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
487 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
490 : TREE_CODE (TYPE) == COMPLEX_TYPE \
491 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
493 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
496 : ((TREE_CODE (TYPE) == RECORD_TYPE \
497 || TREE_CODE (TYPE) == UNION_TYPE \
498 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
499 && TYPE_FIELDS (TYPE)) \
500 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
502 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
505 : TREE_CODE (TYPE) == REAL_TYPE \
506 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
508 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
513 /* If defined, a C expression to compute the alignment for a local
514 variable. TYPE is the data type, and ALIGN is the alignment that
515 the object would ordinarily have. The value of this macro is used
516 instead of that alignment to align the object.
518 If this macro is not defined, then ALIGN is used.
520 One use of this macro is to increase alignment of medium-size
521 data to make it all fit in fewer cache lines. */
523 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
524 (TREE_CODE (TYPE) == ARRAY_TYPE \
525 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
527 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
530 : TREE_CODE (TYPE) == COMPLEX_TYPE \
531 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
533 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
536 : ((TREE_CODE (TYPE) == RECORD_TYPE \
537 || TREE_CODE (TYPE) == UNION_TYPE \
538 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
539 && TYPE_FIELDS (TYPE)) \
540 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
542 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
545 : TREE_CODE (TYPE) == REAL_TYPE \
546 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
548 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
553 /* Set this non-zero if move instructions will actually fail to work
554 when given unaligned data. */
555 #define STRICT_ALIGNMENT 0
557 /* If bit field type is int, don't let it cross an int,
558 and give entire struct the alignment of an int. */
559 /* Required on the 386 since it doesn't have bitfield insns. */
560 #define PCC_BITFIELD_TYPE_MATTERS 1
562 /* Maximum power of 2 that code can be aligned to. */
563 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
565 /* Align loop starts for optimal branching. */
566 #define LOOP_ALIGN(LABEL) (i386_align_loops)
567 #define LOOP_ALIGN_MAX_SKIP (i386_align_loops_string ? 0 : 7)
569 /* This is how to align an instruction for optimal branching.
570 On i486 we'll get better performance by aligning on a
571 cache line (i.e. 16 byte) boundary. */
572 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (i386_align_jumps)
573 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (i386_align_jumps_string ? 0 : 7)
576 /* Standard register usage. */
578 /* This processor has special stack-like registers. See reg-stack.c
582 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
584 /* Number of actual hardware registers.
585 The hardware registers are assigned numbers for the compiler
586 from 0 to just below FIRST_PSEUDO_REGISTER.
587 All registers that the compiler knows about must be given numbers,
588 even those that are not normally considered general registers.
590 In the 80386 we give the 8 general purpose registers the numbers 0-7.
591 We number the floating point registers 8-15.
592 Note that registers 0-7 can be accessed as a short or int,
593 while only 0-3 may be used with byte `mov' instructions.
595 Reg 16 does not correspond to any hardware register, but instead
596 appears in the RTL as an argument pointer prior to reload, and is
597 eliminated during reloading in favor of either the stack or frame
600 #define FIRST_PSEUDO_REGISTER 17
602 /* 1 for registers that have pervasive standard uses
603 and are not available for the register allocator.
604 On the 80386, the stack pointer is such, as is the arg pointer. */
605 #define FIXED_REGISTERS \
606 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
607 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
609 /* 1 for registers not available across function calls.
610 These must include the FIXED_REGISTERS and also any
611 registers that can be used without being saved.
612 The latter must include the registers where values are returned
613 and the register where structure-value addresses are passed.
614 Aside from that, you can include as many other registers as you like. */
616 #define CALL_USED_REGISTERS \
617 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
618 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
620 /* Order in which to allocate registers. Each register must be
621 listed once, even those in FIXED_REGISTERS. List frame pointer
622 late and fixed registers last. Note that, in general, we prefer
623 registers listed in CALL_USED_REGISTERS, keeping the others
624 available for storage of persistent values.
626 Three different versions of REG_ALLOC_ORDER have been tried:
628 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
629 but slower code on simple functions returning values in eax.
631 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
632 perl 4.036 due to not being able to create a DImode register (to hold a 2
635 If the order is eax, edx, ecx, ... it produces better code for simple
636 functions, and a slightly slower compiler. Users complained about the code
637 generated by allocating edx first, so restore the 'natural' order of things. */
639 #define REG_ALLOC_ORDER \
640 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
641 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
643 /* A C statement (sans semicolon) to choose the order in which to
644 allocate hard registers for pseudo-registers local to a basic
647 Store the desired register order in the array `reg_alloc_order'.
648 Element 0 should be the register to allocate first; element 1, the
649 next register; and so on.
651 The macro body should not assume anything about the contents of
652 `reg_alloc_order' before execution of the macro.
654 On most machines, it is not necessary to define this macro. */
656 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
658 /* Macro to conditionally modify fixed_regs/call_used_regs. */
659 #define CONDITIONAL_REGISTER_USAGE \
663 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
664 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
666 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
670 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
671 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
672 if (TEST_HARD_REG_BIT (x, i)) \
673 fixed_regs[i] = call_used_regs[i] = 1; \
677 /* Return number of consecutive hard regs needed starting at reg REGNO
678 to hold something of mode MODE.
679 This is ordinarily the length in words of a value of mode MODE
680 but can be less for certain modes in special long registers.
682 Actually there are no two word move instructions for consecutive
683 registers. And only registers 0-3 may have mov byte instructions
687 #define HARD_REGNO_NREGS(REGNO, MODE) \
688 (FP_REGNO_P (REGNO) ? 1 \
689 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
691 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
692 On the 80386, the first 4 cpu registers can hold any mode
693 while the floating point registers may hold only floating point.
694 Make it clear that the fp regs could not hold a 16-byte float. */
696 /* The casts to int placate a compiler on a microvax,
697 for cross-compiler testing. */
699 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
701 : FP_REGNO_P (REGNO) \
702 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
703 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
704 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
705 : (int) (MODE) != (int) QImode ? 1 \
706 : (reload_in_progress | reload_completed) == 1)
708 /* Value is 1 if it is a good idea to tie two pseudo registers
709 when one has mode MODE1 and one has mode MODE2.
710 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
711 for any hard reg, then this must be 0 for correct output. */
713 #define MODES_TIEABLE_P(MODE1, MODE2) \
714 ((MODE1) == (MODE2) \
715 || ((MODE1) == SImode && (MODE2) == HImode) \
716 || ((MODE1) == HImode && (MODE2) == SImode))
718 /* Specify the registers used for certain standard purposes.
719 The values of these macros are register numbers. */
721 /* on the 386 the pc register is %eip, and is not usable as a general
722 register. The ordinary mov instructions won't work */
723 /* #define PC_REGNUM */
725 /* Register to use for pushing function arguments. */
726 #define STACK_POINTER_REGNUM 7
728 /* Base register for access to local variables of the function. */
729 #define FRAME_POINTER_REGNUM 6
731 /* First floating point reg */
732 #define FIRST_FLOAT_REG 8
734 /* First & last stack-like regs */
735 #define FIRST_STACK_REG FIRST_FLOAT_REG
736 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
738 /* Value should be nonzero if functions must have frame pointers.
739 Zero means the frame pointer need not be set up (and parms
740 may be accessed via the stack pointer) in functions that seem suitable.
741 This is computed in `reload', in reload1.c. */
742 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
744 /* Base register for access to arguments of the function. */
745 #define ARG_POINTER_REGNUM 16
747 /* Register in which static-chain is passed to a function. */
748 #define STATIC_CHAIN_REGNUM 2
750 /* Register to hold the addressing base for position independent
751 code access to data items. */
752 #define PIC_OFFSET_TABLE_REGNUM 3
754 /* Register in which address to store a structure value
755 arrives in the function. On the 386, the prologue
756 copies this from the stack to register %eax. */
757 #define STRUCT_VALUE_INCOMING 0
759 /* Place in which caller passes the structure value address.
760 0 means push the value on the stack like an argument. */
761 #define STRUCT_VALUE 0
763 /* A C expression which can inhibit the returning of certain function
764 values in registers, based on the type of value. A nonzero value
765 says to return the function value in memory, just as large
766 structures are always returned. Here TYPE will be a C expression
767 of type `tree', representing the data type of the value.
769 Note that values of mode `BLKmode' must be explicitly handled by
770 this macro. Also, the option `-fpcc-struct-return' takes effect
771 regardless of this macro. On most systems, it is possible to
772 leave the macro undefined; this causes a default definition to be
773 used, whose value is the constant 1 for `BLKmode' values, and 0
776 Do not use this macro to indicate that structures and unions
777 should always be returned in memory. You should instead use
778 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
780 #define RETURN_IN_MEMORY(TYPE) \
781 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
784 /* Define the classes of registers for register constraints in the
785 machine description. Also define ranges of constants.
787 One of the classes must always be named ALL_REGS and include all hard regs.
788 If there is more than one class, another class must be named NO_REGS
789 and contain no registers.
791 The name GENERAL_REGS must be the name of a class (or an alias for
792 another name such as ALL_REGS). This is the class of registers
793 that is allowed by "g" or "r" in a register constraint.
794 Also, registers outside this class are allocated only when
795 instructions express preferences for them.
797 The classes must be numbered in nondecreasing order; that is,
798 a larger-numbered class must never be contained completely
799 in a smaller-numbered class.
801 For any two classes, it is very desirable that there be another
802 class that represents their union.
804 It might seem that class BREG is unnecessary, since no useful 386
805 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
806 and the "b" register constraint is useful in asms for syscalls. */
811 AREG, DREG, CREG, BREG,
812 AD_REGS, /* %eax/%edx for DImode */
813 Q_REGS, /* %eax %ebx %ecx %edx */
815 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
816 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
817 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
819 ALL_REGS, LIM_REG_CLASSES
822 #define N_REG_CLASSES (int) LIM_REG_CLASSES
824 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
826 /* Give names of register classes as strings for dump file. */
828 #define REG_CLASS_NAMES \
830 "AREG", "DREG", "CREG", "BREG", \
836 "FP_TOP_REG", "FP_SECOND_REG", \
840 /* Define which registers fit in which classes.
841 This is an initializer for a vector of HARD_REG_SET
842 of length N_REG_CLASSES. */
844 #define REG_CLASS_CONTENTS \
846 {0x1}, {0x2}, {0x4}, {0x8}, /* AREG, DREG, CREG, BREG */ \
847 {0x3}, /* AD_REGS */ \
848 {0xf}, /* Q_REGS */ \
849 {0x10}, {0x20}, /* SIREG, DIREG */ \
850 {0x7f}, /* INDEX_REGS */ \
851 {0x100ff}, /* GENERAL_REGS */ \
852 {0x0100}, {0x0200}, /* FP_TOP_REG, FP_SECOND_REG */ \
853 {0xff00}, /* FLOAT_REGS */ \
856 /* The same information, inverted:
857 Return the class number of the smallest class containing
858 reg number REGNO. This could be a conditional expression
859 or could index an array. */
861 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
863 /* When defined, the compiler allows registers explicitly used in the
864 rtl to be used as spill registers but prevents the compiler from
865 extending the lifetime of these registers. */
867 #define SMALL_REGISTER_CLASSES 1
869 #define QI_REG_P(X) \
870 (REG_P (X) && REGNO (X) < 4)
871 #define NON_QI_REG_P(X) \
872 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
874 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
875 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
877 #define STACK_REG_P(xop) (REG_P (xop) && \
878 REGNO (xop) >= FIRST_STACK_REG && \
879 REGNO (xop) <= LAST_STACK_REG)
881 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
883 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
885 /* 1 if register REGNO can magically overlap other regs.
886 Note that nonzero values work only in very special circumstances. */
888 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
890 /* The class value for index registers, and the one for base regs. */
892 #define INDEX_REG_CLASS INDEX_REGS
893 #define BASE_REG_CLASS GENERAL_REGS
895 /* Get reg_class from a letter such as appears in the machine description. */
897 #define REG_CLASS_FROM_LETTER(C) \
898 ((C) == 'r' ? GENERAL_REGS : \
899 (C) == 'q' ? Q_REGS : \
900 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
903 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
906 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
909 (C) == 'a' ? AREG : \
910 (C) == 'b' ? BREG : \
911 (C) == 'c' ? CREG : \
912 (C) == 'd' ? DREG : \
913 (C) == 'A' ? AD_REGS : \
914 (C) == 'D' ? DIREG : \
915 (C) == 'S' ? SIREG : NO_REGS)
917 /* The letters I, J, K, L and M in a register constraint string
918 can be used to stand for particular ranges of immediate operands.
919 This macro defines what the ranges are.
920 C is the letter, and VALUE is a constant value.
921 Return 1 if VALUE is in the range specified by C.
923 I is for non-DImode shifts.
924 J is for DImode shifts.
925 K and L are for an `andsi' optimization.
926 M is for shifts that can be executed by the "lea" opcode.
929 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
930 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
931 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
932 (C) == 'K' ? (VALUE) == 0xff : \
933 (C) == 'L' ? (VALUE) == 0xffff : \
934 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
935 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
936 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
939 /* Similar, but for floating constants, and defining letters G and H.
940 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
941 TARGET_387 isn't set, because the stack register converter may need to
942 load 0.0 into the function value register. */
944 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
945 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
947 /* Place additional restrictions on the register class to use when it
948 is necessary to be able to hold a value of mode MODE in a reload
949 register for which class CLASS would ordinarily be used. */
951 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
952 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
955 /* Given an rtx X being reloaded into a reg required to be
956 in class CLASS, return the class of reg to actually use.
957 In general this is just CLASS; but on some machines
958 in some cases it is preferable to use a more restrictive class.
959 On the 80386 series, we prevent floating constants from being
960 reloaded into floating registers (since no move-insn can do that)
961 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
963 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
964 QImode must go into class Q_REGS.
965 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
966 movdf to do mem-to-mem moves through integer regs. */
968 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
969 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode \
970 ? (standard_80387_constant_p (X) \
971 ? reg_class_subset_p (CLASS, FLOAT_REGS) ? CLASS : FLOAT_REGS \
973 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
974 : ((CLASS) == ALL_REGS \
975 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
978 /* If we are copying between general and FP registers, we need a memory
981 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
982 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
983 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
985 /* Return the maximum number of consecutive registers
986 needed to represent mode MODE in a register of class CLASS. */
987 /* On the 80386, this is the size of MODE in words,
988 except in the FP regs, where a single reg is always enough. */
989 #define CLASS_MAX_NREGS(CLASS, MODE) \
990 (FLOAT_CLASS_P (CLASS) ? 1 : \
991 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
993 /* A C expression whose value is nonzero if pseudos that have been
994 assigned to registers of class CLASS would likely be spilled
995 because registers of CLASS are needed for spill registers.
997 The default value of this macro returns 1 if CLASS has exactly one
998 register and zero otherwise. On most machines, this default
999 should be used. Only define this macro to some other expression
1000 if pseudo allocated by `local-alloc.c' end up in memory because
1001 their hard registers were needed for spill registers. If this
1002 macro returns nonzero for those classes, those pseudos will only
1003 be allocated by `global.c', which knows how to reallocate the
1004 pseudo to another register. If there would not be another
1005 register available for reallocation, you should not change the
1006 definition of this macro since the only effect of such a
1007 definition would be to slow down register allocation. */
1009 #define CLASS_LIKELY_SPILLED_P(CLASS) \
1010 (((CLASS) == AREG) \
1011 || ((CLASS) == DREG) \
1012 || ((CLASS) == CREG) \
1013 || ((CLASS) == BREG) \
1014 || ((CLASS) == AD_REGS) \
1015 || ((CLASS) == SIREG) \
1016 || ((CLASS) == DIREG))
1019 /* Stack layout; function entry, exit and calling. */
1021 /* Define this if pushing a word on the stack
1022 makes the stack pointer a smaller address. */
1023 #define STACK_GROWS_DOWNWARD
1025 /* Define this if the nominal address of the stack frame
1026 is at the high-address end of the local variables;
1027 that is, each additional local variable allocated
1028 goes at a more negative offset in the frame. */
1029 #define FRAME_GROWS_DOWNWARD
1031 /* Offset within stack frame to start allocating local variables at.
1032 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1033 first local allocated. Otherwise, it is the offset to the BEGINNING
1034 of the first local allocated. */
1035 #define STARTING_FRAME_OFFSET 0
1037 /* If we generate an insn to push BYTES bytes,
1038 this says how many the stack pointer really advances by.
1039 On 386 pushw decrements by exactly 2 no matter what the position was.
1040 On the 386 there is no pushb; we use pushw instead, and this
1041 has the effect of rounding up to 2. */
1043 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
1045 /* Offset of first parameter from the argument pointer register value. */
1046 #define FIRST_PARM_OFFSET(FNDECL) 0
1048 /* Value is the number of bytes of arguments automatically
1049 popped when returning from a subroutine call.
1050 FUNDECL is the declaration node of the function (as a tree),
1051 FUNTYPE is the data type of the function (as a tree),
1052 or for a library call it is an identifier node for the subroutine name.
1053 SIZE is the number of bytes of arguments passed on the stack.
1055 On the 80386, the RTD insn may be used to pop them if the number
1056 of args is fixed, but if the number is variable then the caller
1057 must pop them all. RTD can't be used for library calls now
1058 because the library is compiled with the Unix compiler.
1059 Use of RTD is a selectable option, since it is incompatible with
1060 standard Unix calling sequences. If the option is not selected,
1061 the caller must always pop the args.
1063 The attribute stdcall is equivalent to RTD on a per module basis. */
1065 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
1066 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
1068 /* Define how to find the value returned by a function.
1069 VALTYPE is the data type of the value (as a tree).
1070 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1071 otherwise, FUNC is 0. */
1072 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1073 gen_rtx_REG (TYPE_MODE (VALTYPE), \
1074 VALUE_REGNO (TYPE_MODE (VALTYPE)))
1076 /* Define how to find the value returned by a library function
1077 assuming the value has mode MODE. */
1079 #define LIBCALL_VALUE(MODE) \
1080 gen_rtx_REG (MODE, VALUE_REGNO (MODE))
1082 /* Define the size of the result block used for communication between
1083 untyped_call and untyped_return. The block contains a DImode value
1084 followed by the block used by fnsave and frstor. */
1086 #define APPLY_RESULT_SIZE (8+108)
1088 /* 1 if N is a possible register number for function argument passing. */
1089 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
1091 /* Define a data type for recording info about an argument list
1092 during the scan of that argument list. This data type should
1093 hold all necessary information about the function itself
1094 and about the args processed so far, enough to enable macros
1095 such as FUNCTION_ARG to determine where the next arg should go. */
1097 typedef struct i386_args {
1098 int words; /* # words passed so far */
1099 int nregs; /* # registers available for passing */
1100 int regno; /* next available register number */
1103 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1104 for a call to a function whose data type is FNTYPE.
1105 For a library call, FNTYPE is 0. */
1107 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
1108 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
1110 /* Update the data in CUM to advance over an argument
1111 of mode MODE and data type TYPE.
1112 (TYPE is null for libcalls where that information may not be available.) */
1114 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1115 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
1117 /* Define where to put the arguments to a function.
1118 Value is zero to push the argument on the stack,
1119 or a hard register in which to store the argument.
1121 MODE is the argument's machine mode.
1122 TYPE is the data type of the argument (as a tree).
1123 This is null for libcalls where that information may
1125 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1126 the preceding args and about the function being called.
1127 NAMED is nonzero if this argument is a named parameter
1128 (otherwise it is an extra parameter matching an ellipsis). */
1130 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1131 (function_arg (&CUM, MODE, TYPE, NAMED))
1133 /* For an arg passed partly in registers and partly in memory,
1134 this is the number of registers used.
1135 For args passed entirely in registers or entirely in memory, zero. */
1137 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1138 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
1140 /* This macro is invoked just before the start of a function.
1141 It is used here to output code for -fpic that will load the
1142 return address into %ebx. */
1144 #undef ASM_OUTPUT_FUNCTION_PREFIX
1145 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
1146 asm_output_function_prefix (FILE, FNNAME)
1148 /* This macro generates the assembly code for function entry.
1149 FILE is a stdio stream to output the code to.
1150 SIZE is an int: how many units of temporary storage to allocate.
1151 Refer to the array `regs_ever_live' to determine which registers
1152 to save; `regs_ever_live[I]' is nonzero if register number I
1153 is ever used in the function. This macro is responsible for
1154 knowing which registers should not be saved even if used. */
1156 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1157 function_prologue (FILE, SIZE)
1159 /* Output assembler code to FILE to increment profiler label # LABELNO
1160 for profiling a function entry. */
1162 #define FUNCTION_PROFILER(FILE, LABELNO) \
1166 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
1167 LPREFIX, (LABELNO)); \
1168 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
1172 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1173 fprintf (FILE, "\tcall _mcount\n"); \
1178 /* There are three profiling modes for basic blocks available.
1179 The modes are selected at compile time by using the options
1180 -a or -ax of the gnu compiler.
1181 The variable `profile_block_flag' will be set according to the
1184 profile_block_flag == 0, no option used:
1188 profile_block_flag == 1, -a option used.
1190 Count frequency of execution of every basic block.
1192 profile_block_flag == 2, -ax option used.
1194 Generate code to allow several different profiling modes at run time.
1195 Available modes are:
1196 Produce a trace of all basic blocks.
1197 Count frequency of jump instructions executed.
1198 In every mode it is possible to start profiling upon entering
1199 certain functions and to disable profiling of some other functions.
1201 The result of basic-block profiling will be written to a file `bb.out'.
1202 If the -ax option is used parameters for the profiling will be read
1207 /* The following macro shall output assembler code to FILE
1208 to initialize basic-block profiling.
1210 If profile_block_flag == 2
1212 Output code to call the subroutine `__bb_init_trace_func'
1213 and pass two parameters to it. The first parameter is
1214 the address of a block allocated in the object module.
1215 The second parameter is the number of the first basic block
1218 The name of the block is a local symbol made with this statement:
1220 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1222 Of course, since you are writing the definition of
1223 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1224 can take a short cut in the definition of this macro and use the
1225 name that you know will result.
1227 The number of the first basic block of the function is
1228 passed to the macro in BLOCK_OR_LABEL.
1230 If described in a virtual assembler language the code to be
1234 parameter2 <- BLOCK_OR_LABEL
1235 call __bb_init_trace_func
1237 else if profile_block_flag != 0
1239 Output code to call the subroutine `__bb_init_func'
1240 and pass one single parameter to it, which is the same
1241 as the first parameter to `__bb_init_trace_func'.
1243 The first word of this parameter is a flag which will be nonzero if
1244 the object module has already been initialized. So test this word
1245 first, and do not call `__bb_init_func' if the flag is nonzero.
1246 Note: When profile_block_flag == 2 the test need not be done
1247 but `__bb_init_trace_func' *must* be called.
1249 BLOCK_OR_LABEL may be used to generate a label number as a
1250 branch destination in case `__bb_init_func' will not be called.
1252 If described in a virtual assembler language the code to be
1263 #undef FUNCTION_BLOCK_PROFILER
1264 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1267 static int num_func = 0; \
1269 char block_table[80], false_label[80]; \
1271 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1273 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1274 xops[5] = stack_pointer_rtx; \
1275 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1277 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1279 switch (profile_block_flag) \
1284 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1285 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_trace_func")); \
1286 xops[6] = GEN_INT (8); \
1288 output_asm_insn (AS1(push%L2,%2), xops); \
1290 output_asm_insn (AS1(push%L1,%1), xops); \
1293 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1294 output_asm_insn (AS1 (push%L7,%7), xops); \
1297 output_asm_insn (AS1(call,%P3), xops); \
1298 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1304 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1306 xops[0] = const0_rtx; \
1307 xops[2] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \
1308 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_func")); \
1309 xops[4] = gen_rtx_MEM (Pmode, xops[1]); \
1310 xops[6] = GEN_INT (4); \
1312 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1314 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1315 output_asm_insn (AS1(jne,%2), xops); \
1318 output_asm_insn (AS1(push%L1,%1), xops); \
1321 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1322 output_asm_insn (AS1 (push%L7,%7), xops); \
1325 output_asm_insn (AS1(call,%P3), xops); \
1326 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1327 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1336 /* The following macro shall output assembler code to FILE
1337 to increment a counter associated with basic block number BLOCKNO.
1339 If profile_block_flag == 2
1341 Output code to initialize the global structure `__bb' and
1342 call the function `__bb_trace_func' which will increment the
1345 `__bb' consists of two words. In the first word the number
1346 of the basic block has to be stored. In the second word
1347 the address of a block allocated in the object module
1350 The basic block number is given by BLOCKNO.
1352 The address of the block is given by the label created with
1354 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1356 by FUNCTION_BLOCK_PROFILER.
1358 Of course, since you are writing the definition of
1359 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1360 can take a short cut in the definition of this macro and use the
1361 name that you know will result.
1363 If described in a virtual assembler language the code to be
1366 move BLOCKNO -> (__bb)
1367 move LPBX0 -> (__bb+4)
1368 call __bb_trace_func
1370 Note that function `__bb_trace_func' must not change the
1371 machine state, especially the flag register. To grant
1372 this, you must output code to save and restore registers
1373 either in this macro or in the macros MACHINE_STATE_SAVE
1374 and MACHINE_STATE_RESTORE. The last two macros will be
1375 used in the function `__bb_trace_func', so you must make
1376 sure that the function prologue does not change any
1377 register prior to saving it with MACHINE_STATE_SAVE.
1379 else if profile_block_flag != 0
1381 Output code to increment the counter directly.
1382 Basic blocks are numbered separately from zero within each
1383 compiled object module. The count associated with block number
1384 BLOCKNO is at index BLOCKNO in an array of words; the name of
1385 this array is a local symbol made with this statement:
1387 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1389 Of course, since you are writing the definition of
1390 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1391 can take a short cut in the definition of this macro and use the
1392 name that you know will result.
1394 If described in a virtual assembler language the code to be
1397 inc (LPBX2+4*BLOCKNO)
1401 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1404 rtx xops[8], cnt_rtx; \
1406 char *block_table = counts; \
1408 switch (profile_block_flag) \
1413 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1415 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1416 xops[2] = GEN_INT ((BLOCKNO)); \
1417 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_func")); \
1418 xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \
1419 xops[5] = plus_constant (xops[4], 4); \
1420 xops[0] = gen_rtx_MEM (SImode, xops[4]); \
1421 xops[6] = gen_rtx_MEM (SImode, xops[5]); \
1423 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1425 fprintf(FILE, "\tpushf\n"); \
1426 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1429 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1430 output_asm_insn (AS1(push%L7,%7), xops); \
1431 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1432 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1433 output_asm_insn (AS1(pop%L7,%7), xops); \
1436 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1437 output_asm_insn (AS1(call,%P3), xops); \
1438 fprintf(FILE, "\tpopf\n"); \
1444 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1445 cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \
1446 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1449 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1452 cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \
1454 xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \
1455 output_asm_insn (AS1(inc%L0,%0), xops); \
1463 /* The following macro shall output assembler code to FILE
1464 to indicate a return from function during basic-block profiling.
1466 If profiling_block_flag == 2:
1468 Output assembler code to call function `__bb_trace_ret'.
1470 Note that function `__bb_trace_ret' must not change the
1471 machine state, especially the flag register. To grant
1472 this, you must output code to save and restore registers
1473 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1474 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1475 used in the function `__bb_trace_ret', so you must make
1476 sure that the function prologue does not change any
1477 register prior to saving it with MACHINE_STATE_SAVE_RET.
1479 else if profiling_block_flag != 0:
1481 The macro will not be used, so it need not distinguish
1485 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1490 xops[0] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \
1492 output_asm_insn (AS1(call,%P0), xops); \
1497 /* The function `__bb_trace_func' is called in every basic block
1498 and is not allowed to change the machine state. Saving (restoring)
1499 the state can either be done in the BLOCK_PROFILER macro,
1500 before calling function (rsp. after returning from function)
1501 `__bb_trace_func', or it can be done inside the function by
1502 defining the macros:
1504 MACHINE_STATE_SAVE(ID)
1505 MACHINE_STATE_RESTORE(ID)
1507 In the latter case care must be taken, that the prologue code
1508 of function `__bb_trace_func' does not already change the
1509 state prior to saving it with MACHINE_STATE_SAVE.
1511 The parameter `ID' is a string identifying a unique macro use.
1513 On the i386 the initialization code at the begin of
1514 function `__bb_trace_func' contains a `sub' instruction
1515 therefore we handle save and restore of the flag register
1516 in the BLOCK_PROFILER macro. */
1518 #define MACHINE_STATE_SAVE(ID) \
1519 asm (" pushl %eax"); \
1520 asm (" pushl %ecx"); \
1521 asm (" pushl %edx"); \
1522 asm (" pushl %esi");
1524 #define MACHINE_STATE_RESTORE(ID) \
1525 asm (" popl %esi"); \
1526 asm (" popl %edx"); \
1527 asm (" popl %ecx"); \
1530 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1531 the stack pointer does not matter. The value is tested only in
1532 functions that have frame pointers.
1533 No definition is equivalent to always zero. */
1534 /* Note on the 386 it might be more efficient not to define this since
1535 we have to restore it ourselves from the frame pointer, in order to
1538 #define EXIT_IGNORE_STACK 1
1540 /* This macro generates the assembly code for function exit,
1541 on machines that need it. If FUNCTION_EPILOGUE is not defined
1542 then individual return instructions are generated for each
1543 return statement. Args are same as for FUNCTION_PROLOGUE.
1545 The function epilogue should not depend on the current stack pointer!
1546 It should use the frame pointer only. This is mandatory because
1547 of alloca; we also take advantage of it to omit stack adjustments
1550 If the last non-note insn in the function is a BARRIER, then there
1551 is no need to emit a function prologue, because control does not fall
1552 off the end. This happens if the function ends in an "exit" call, or
1553 if a `return' insn is emitted directly into the function. */
1556 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1558 rtx last = get_last_insn (); \
1559 if (last && GET_CODE (last) == NOTE) \
1560 last = prev_nonnote_insn (last); \
1561 /* if (! last || GET_CODE (last) != BARRIER) \
1562 function_epilogue (FILE, SIZE);*/ \
1566 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1567 function_epilogue (FILE, SIZE)
1569 /* Output assembler code for a block containing the constant parts
1570 of a trampoline, leaving space for the variable parts. */
1572 /* On the 386, the trampoline contains two instructions:
1575 The trampoline is generated entirely at runtime. The operand of JMP
1576 is the address of FUNCTION relative to the instruction following the
1577 JMP (which is 5 bytes long). */
1579 /* Length in units of the trampoline for entering a nested function. */
1581 #define TRAMPOLINE_SIZE 10
1583 /* Emit RTL insns to initialize the variable parts of a trampoline.
1584 FNADDR is an RTX for the address of the function's pure code.
1585 CXT is an RTX for the static chain value for the function. */
1587 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1589 /* Compute offset from the end of the jmp to the target function. */ \
1590 rtx disp = expand_binop (SImode, sub_optab, FNADDR, \
1591 plus_constant (TRAMP, 10), \
1592 NULL_RTX, 1, OPTAB_DIRECT); \
1593 emit_move_insn (gen_rtx_MEM (QImode, TRAMP), GEN_INT (0xb9)); \
1594 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
1595 emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 5)), GEN_INT (0xe9));\
1596 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), disp); \
1599 /* Definitions for register eliminations.
1601 This is an array of structures. Each structure initializes one pair
1602 of eliminable registers. The "from" register number is given first,
1603 followed by "to". Eliminations of the same "from" register are listed
1604 in order of preference.
1606 We have two registers that can be eliminated on the i386. First, the
1607 frame pointer register can often be eliminated in favor of the stack
1608 pointer register. Secondly, the argument pointer register can always be
1609 eliminated; it is replaced with either the stack or frame pointer. */
1611 #define ELIMINABLE_REGS \
1612 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1613 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1614 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1616 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1617 Frame pointer elimination is automatically handled.
1619 For the i386, if frame pointer elimination is being done, we would like to
1620 convert ap into sp, not fp.
1622 All other eliminations are valid. */
1624 #define CAN_ELIMINATE(FROM, TO) \
1625 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1626 ? ! frame_pointer_needed \
1629 /* Define the offset between two registers, one to be eliminated, and the other
1630 its replacement, at the start of a routine. */
1632 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1634 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1635 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1640 int preferred_alignment = PREFERRED_STACK_BOUNDARY / BITS_PER_UNIT; \
1641 HOST_WIDE_INT tsize = ix86_compute_frame_size (get_frame_size (), \
1644 (OFFSET) = (tsize + nregs * UNITS_PER_WORD); \
1647 if (frame_pointer_needed) \
1648 offset += UNITS_PER_WORD; \
1650 if ((FROM) == ARG_POINTER_REGNUM) \
1651 (OFFSET) += offset; \
1653 (OFFSET) -= ((offset + preferred_alignment - 1) \
1654 & -preferred_alignment) - offset; \
1658 /* Addressing modes, and classification of registers for them. */
1660 /* #define HAVE_POST_INCREMENT 0 */
1661 /* #define HAVE_POST_DECREMENT 0 */
1663 /* #define HAVE_PRE_DECREMENT 0 */
1664 /* #define HAVE_PRE_INCREMENT 0 */
1666 /* Macros to check register numbers against specific register classes. */
1668 /* These assume that REGNO is a hard or pseudo reg number.
1669 They give nonzero only if REGNO is a hard reg of the suitable class
1670 or a pseudo reg currently allocated to a suitable hard reg.
1671 Since they use reg_renumber, they are safe only once reg_renumber
1672 has been allocated, which happens in local-alloc.c. */
1674 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1675 ((REGNO) < STACK_POINTER_REGNUM \
1676 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1678 #define REGNO_OK_FOR_BASE_P(REGNO) \
1679 ((REGNO) <= STACK_POINTER_REGNUM \
1680 || (REGNO) == ARG_POINTER_REGNUM \
1681 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1683 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1684 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1686 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1687 and check its validity for a certain class.
1688 We have two alternate definitions for each of them.
1689 The usual definition accepts all pseudo regs; the other rejects
1690 them unless they have been allocated suitable hard regs.
1691 The symbol REG_OK_STRICT causes the latter definition to be used.
1693 Most source files want to accept pseudo regs in the hope that
1694 they will get allocated to the class that the insn wants them to be in.
1695 Source files for reload pass need to be strict.
1696 After reload, it makes no difference, since pseudo regs have
1697 been eliminated by then. */
1700 /* Non strict versions, pseudos are ok */
1701 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1702 (REGNO (X) < STACK_POINTER_REGNUM \
1703 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1705 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1706 (REGNO (X) <= STACK_POINTER_REGNUM \
1707 || REGNO (X) == ARG_POINTER_REGNUM \
1708 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1710 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1711 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1713 /* Strict versions, hard registers only */
1714 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1715 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1716 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1717 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1719 #ifndef REG_OK_STRICT
1720 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1721 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1722 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1725 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1726 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1727 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1730 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1731 that is a valid memory address for an instruction.
1732 The MODE argument is the machine mode for the MEM expression
1733 that wants to use this address.
1735 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1736 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1738 See legitimize_pic_address in i386.c for details as to what
1739 constitutes a legitimate address when -fpic is used. */
1741 #define MAX_REGS_PER_ADDRESS 2
1743 #define CONSTANT_ADDRESS_P(X) \
1744 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1745 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1747 /* Nonzero if the constant value X is a legitimate general operand.
1748 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1750 #define LEGITIMATE_CONSTANT_P(X) \
1751 (GET_CODE (X) == CONST_DOUBLE ? standard_80387_constant_p (X) : 1)
1753 #ifdef REG_OK_STRICT
1754 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1756 if (legitimate_address_p (MODE, X, 1)) \
1761 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1763 if (legitimate_address_p (MODE, X, 0)) \
1769 /* Try machine-dependent ways of modifying an illegitimate address
1770 to be legitimate. If we find one, return the new, valid address.
1771 This macro is used in only one place: `memory_address' in explow.c.
1773 OLDX is the address as it was before break_out_memory_refs was called.
1774 In some cases it is useful to look at this to decide what needs to be done.
1776 MODE and WIN are passed so that this macro can use
1777 GO_IF_LEGITIMATE_ADDRESS.
1779 It is always safe for this macro to do nothing. It exists to recognize
1780 opportunities to optimize the output.
1782 For the 80386, we handle X+REG by loading X into a register R and
1783 using R+REG. R will go in a general reg and indexing will be used.
1784 However, if REG is a broken-out memory address or multiplication,
1785 nothing needs to be done because REG can certainly go in a general reg.
1787 When -fpic is used, special handling is needed for symbolic references.
1788 See comments by legitimize_pic_address in i386.c for details. */
1790 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1792 (X) = legitimize_address (X, OLDX, MODE); \
1793 if (memory_address_p (MODE, X)) \
1797 #define REWRITE_ADDRESS(x) rewrite_address(x)
1799 /* Nonzero if the constant value X is a legitimate general operand
1800 when generating PIC code. It is given that flag_pic is on and
1801 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1803 #define LEGITIMATE_PIC_OPERAND_P(X) \
1804 (! SYMBOLIC_CONST (X) || legitimate_pic_address_disp_p (X))
1806 #define SYMBOLIC_CONST(X) \
1807 (GET_CODE (X) == SYMBOL_REF \
1808 || GET_CODE (X) == LABEL_REF \
1809 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1811 /* Go to LABEL if ADDR (a legitimate address expression)
1812 has an effect that depends on the machine mode it is used for.
1813 On the 80386, only postdecrement and postincrement address depend thus
1814 (the amount of decrement or increment being the length of the operand). */
1815 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1816 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1818 /* Define this macro if references to a symbol must be treated
1819 differently depending on something about the variable or
1820 function named by the symbol (such as what section it is in).
1822 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1823 so that we may access it directly in the GOT. */
1825 #define ENCODE_SECTION_INFO(DECL) \
1830 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1831 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1833 if (TARGET_DEBUG_ADDR \
1834 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1836 fprintf (stderr, "Encode %s, public = %d\n", \
1837 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1838 TREE_PUBLIC (DECL)); \
1841 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1842 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1843 || ! TREE_PUBLIC (DECL)); \
1848 /* Initialize data used by insn expanders. This is called from
1849 init_emit, once for each function, before code is generated.
1850 For 386, clear stack slot assignments remembered from previous
1853 #define INIT_EXPANDERS clear_386_stack_locals ()
1855 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1856 codes once the function is being compiled into assembly code, but
1857 not before. (It is not done before, because in the case of
1858 compiling an inline function, it would lead to multiple PIC
1859 prologues being included in functions which used inline functions
1860 and were compiled to assembly language.) */
1862 #define FINALIZE_PIC \
1865 extern int current_function_uses_pic_offset_table; \
1867 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1872 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1873 with arguments ARGS is a valid machine specific attribute for DECL.
1874 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1876 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1877 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1879 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1880 with arguments ARGS is a valid machine specific attribute for TYPE.
1881 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1883 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1884 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1886 /* If defined, a C expression whose value is zero if the attributes on
1887 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1888 two if they are nearly compatible (which causes a warning to be
1891 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1892 (i386_comp_type_attributes (TYPE1, TYPE2))
1894 /* If defined, a C statement that assigns default attributes to newly
1897 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1899 /* Max number of args passed in registers. If this is more than 3, we will
1900 have problems with ebx (register #4), since it is a caller save register and
1901 is also used as the pic register in ELF. So for now, don't allow more than
1902 3 registers to be passed in registers. */
1904 #define REGPARM_MAX 3
1907 /* Specify the machine mode that this machine uses
1908 for the index in the tablejump instruction. */
1909 #define CASE_VECTOR_MODE Pmode
1911 /* Define as C expression which evaluates to nonzero if the tablejump
1912 instruction expects the table to contain offsets from the address of the
1914 Do not define this if the table should contain absolute addresses. */
1915 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1917 /* Specify the tree operation to be used to convert reals to integers.
1918 This should be changed to take advantage of fist --wfs ??
1920 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1922 /* This is the kind of divide that is easiest to do in the general case. */
1923 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1925 /* Define this as 1 if `char' should by default be signed; else as 0. */
1926 #define DEFAULT_SIGNED_CHAR 1
1928 /* Max number of bytes we can move from memory to memory
1929 in one reasonably fast instruction. */
1932 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1933 move-instruction pairs, we will do a movstr or libcall instead.
1934 Increasing the value will always make code faster, but eventually
1935 incurs high cost in increased code size.
1937 If you don't define this, a reasonable default is used.
1939 Make this large on i386, since the block move is very inefficient with small
1940 blocks, and the hard register needs of the block move require much reload
1943 #define MOVE_RATIO 5
1945 /* Define if shifts truncate the shift count
1946 which implies one can omit a sign-extension or zero-extension
1947 of a shift count. */
1948 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1950 /* #define SHIFT_COUNT_TRUNCATED */
1952 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1953 is done just by pretending it is already truncated. */
1954 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1956 /* We assume that the store-condition-codes instructions store 0 for false
1957 and some other value for true. This is the value stored for true. */
1959 #define STORE_FLAG_VALUE 1
1961 /* When a prototype says `char' or `short', really pass an `int'.
1962 (The 386 can't easily push less than an int.) */
1964 #define PROMOTE_PROTOTYPES
1966 /* Specify the machine mode that pointers have.
1967 After generation of rtl, the compiler makes no further distinction
1968 between pointers and any other objects of this machine mode. */
1969 #define Pmode SImode
1971 /* A function address in a call instruction
1972 is a byte address (for indexing purposes)
1973 so give the MEM rtx a byte's mode. */
1974 #define FUNCTION_MODE QImode
1976 /* A part of a C `switch' statement that describes the relative costs
1977 of constant RTL expressions. It must contain `case' labels for
1978 expression codes `const_int', `const', `symbol_ref', `label_ref'
1979 and `const_double'. Each case must ultimately reach a `return'
1980 statement to return the relative cost of the use of that kind of
1981 constant value in an expression. The cost may depend on the
1982 precise value of the constant, which is available for examination
1983 in X, and the rtx code of the expression in which it is contained,
1984 found in OUTER_CODE.
1986 CODE is the expression code--redundant, since it can be obtained
1987 with `GET_CODE (X)'. */
1989 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1991 return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \
1995 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1997 case CONST_DOUBLE: \
2000 if (GET_MODE (RTX) == VOIDmode) \
2003 code = standard_80387_constant_p (RTX); \
2004 return code == 1 ? 0 : \
2009 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
2010 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
2012 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2013 This can be used, for example, to indicate how costly a multiply
2014 instruction is. In writing this macro, you can use the construct
2015 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
2016 instructions. OUTER_CODE is the code of the expression in which X
2019 This macro is optional; do not define it if the default cost
2020 assumptions are adequate for the target machine. */
2022 #define RTX_COSTS(X,CODE,OUTER_CODE) \
2024 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
2025 && GET_MODE (XEXP (X, 0)) == SImode) \
2027 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
2030 return COSTS_N_INSNS (ix86_cost->add) \
2031 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2033 if (value == 2 || value == 3) \
2034 return COSTS_N_INSNS (ix86_cost->lea) \
2035 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2037 /* fall through */ \
2043 if (GET_MODE (XEXP (X, 0)) == DImode) \
2045 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2047 if (INTVAL (XEXP (X, 1)) > 32) \
2048 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
2049 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
2051 return ((GET_CODE (XEXP (X, 1)) == AND \
2052 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
2053 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
2054 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
2056 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
2057 ? ix86_cost->shift_const \
2058 : ix86_cost->shift_var) \
2059 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2062 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2064 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
2068 return COSTS_N_INSNS (ix86_cost->add) \
2069 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2070 if (value == 4 || value == 8) \
2071 return COSTS_N_INSNS (ix86_cost->lea) \
2072 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2074 while (value != 0) \
2081 return COSTS_N_INSNS (ix86_cost->shift_const) \
2082 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2084 return COSTS_N_INSNS (ix86_cost->mult_init \
2085 + nbits * ix86_cost->mult_bit) \
2086 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2089 else /* This is arbitrary */ \
2090 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
2091 + 7 * ix86_cost->mult_bit); \
2097 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
2100 if (GET_CODE (XEXP (X, 0)) == REG \
2101 && GET_MODE (XEXP (X, 0)) == SImode \
2102 && GET_CODE (XEXP (X, 1)) == PLUS) \
2103 return COSTS_N_INSNS (ix86_cost->lea); \
2105 /* fall through */ \
2110 if (GET_MODE (X) == DImode) \
2111 return COSTS_N_INSNS (ix86_cost->add) * 2 \
2112 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
2113 << (GET_MODE (XEXP (X, 0)) != DImode)) \
2114 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
2115 << (GET_MODE (XEXP (X, 1)) != DImode)); \
2118 if (GET_MODE (X) == DImode) \
2119 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
2120 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
2123 /* An expression giving the cost of an addressing mode that contains
2124 ADDRESS. If not defined, the cost is computed from the ADDRESS
2125 expression and the `CONST_COSTS' values.
2127 For most CISC machines, the default cost is a good approximation
2128 of the true cost of the addressing mode. However, on RISC
2129 machines, all instructions normally have the same length and
2130 execution time. Hence all addresses will have equal costs.
2132 In cases where more than one form of an address is known, the form
2133 with the lowest cost will be used. If multiple forms have the
2134 same, lowest, cost, the one that is the most complex will be used.
2136 For example, suppose an address that is equal to the sum of a
2137 register and a constant is used twice in the same basic block.
2138 When this macro is not defined, the address will be computed in a
2139 register and memory references will be indirect through that
2140 register. On machines where the cost of the addressing mode
2141 containing the sum is no higher than that of a simple indirect
2142 reference, this will produce an additional instruction and
2143 possibly require an additional register. Proper specification of
2144 this macro eliminates this overhead for such machines.
2146 Similar use of this macro is made in strength reduction of loops.
2148 ADDRESS need not be valid as an address. In such a case, the cost
2149 is not relevant and can be any value; invalid addresses need not be
2150 assigned a different cost.
2152 On machines where an address involving more than one register is as
2153 cheap as an address computation involving only one register,
2154 defining `ADDRESS_COST' to reflect this can cause two registers to
2155 be live over a region of code where only one would have been if
2156 `ADDRESS_COST' were not defined in that manner. This effect should
2157 be considered in the definition of this macro. Equivalent costs
2158 should probably only be given to addresses with different numbers
2159 of registers on machines with lots of registers.
2161 This macro will normally either not be defined or be defined as a
2164 For i386, it is better to use a complex address than let gcc copy
2165 the address into a reg and make a new pseudo. But not if the address
2166 requires to two regs - that would mean more pseudos with longer
2169 #define ADDRESS_COST(RTX) \
2170 ((CONSTANT_P (RTX) \
2171 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
2172 && REG_P (XEXP (RTX, 0)))) ? 0 \
2176 /* A C expression for the cost of moving data of mode M between a
2177 register and memory. A value of 2 is the default; this cost is
2178 relative to those in `REGISTER_MOVE_COST'.
2180 If moving between registers and memory is more expensive than
2181 between two registers, you should define this macro to express the
2184 On the i386, copying between floating-point and fixed-point
2185 registers is expensive. */
2187 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2188 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2189 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2193 /* A C expression for the cost of moving data of mode M between a
2194 register and memory. A value of 2 is the default; this cost is
2195 relative to those in `REGISTER_MOVE_COST'.
2197 If moving between registers and memory is more expensive than
2198 between two registers, you should define this macro to express the
2201 /* #define MEMORY_MOVE_COST(M,C,I) 2 */
2203 /* A C expression for the cost of a branch instruction. A value of 1
2204 is the default; other values are interpreted relative to that. */
2206 #define BRANCH_COST i386_branch_cost
2208 /* Define this macro as a C expression which is nonzero if accessing
2209 less than a word of memory (i.e. a `char' or a `short') is no
2210 faster than accessing a word of memory, i.e., if such access
2211 require more than one instruction or if there is no difference in
2212 cost between byte and (aligned) word loads.
2214 When this macro is not defined, the compiler will access a field by
2215 finding the smallest containing object; when it is defined, a
2216 fullword load will be used if alignment permits. Unless bytes
2217 accesses are faster than word accesses, using word accesses is
2218 preferable since it may eliminate subsequent memory access if
2219 subsequent accesses occur to other fields in the same word of the
2220 structure, but to different bytes. */
2222 #define SLOW_BYTE_ACCESS 0
2224 /* Nonzero if access to memory by shorts is slow and undesirable. */
2225 #define SLOW_SHORT_ACCESS 0
2227 /* Define this macro if zero-extension (of a `char' or `short' to an
2228 `int') can be done faster if the destination is a register that is
2231 If you define this macro, you must have instruction patterns that
2232 recognize RTL structures like this:
2234 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2236 and likewise for `HImode'. */
2238 /* #define SLOW_ZERO_EXTEND */
2240 /* Define this macro to be the value 1 if unaligned accesses have a
2241 cost many times greater than aligned accesses, for example if they
2242 are emulated in a trap handler.
2244 When this macro is non-zero, the compiler will act as if
2245 `STRICT_ALIGNMENT' were non-zero when generating code for block
2246 moves. This can cause significantly more instructions to be
2247 produced. Therefore, do not set this macro non-zero if unaligned
2248 accesses only add a cycle or two to the time for a memory access.
2250 If the value of this macro is always zero, it need not be defined. */
2252 /* #define SLOW_UNALIGNED_ACCESS 0 */
2254 /* Define this macro to inhibit strength reduction of memory
2255 addresses. (On some machines, such strength reduction seems to do
2256 harm rather than good.) */
2258 /* #define DONT_REDUCE_ADDR */
2260 /* Define this macro if it is as good or better to call a constant
2261 function address than to call an address kept in a register.
2263 Desirable on the 386 because a CALL with a constant address is
2264 faster than one with a register address. */
2266 #define NO_FUNCTION_CSE
2268 /* Define this macro if it is as good or better for a function to call
2269 itself with an explicit address than to call an address kept in a
2272 #define NO_RECURSIVE_FUNCTION_CSE
2274 /* A C statement (sans semicolon) to update the integer variable COST
2275 based on the relationship between INSN that is dependent on
2276 DEP_INSN through the dependence LINK. The default is to make no
2277 adjustment to COST. This can be used for example to specify to
2278 the scheduler that an output- or anti-dependence does not incur
2279 the same cost as a data-dependence. */
2281 #define ADJUST_COST(insn,link,dep_insn,cost) \
2282 (cost) = x86_adjust_cost(insn, link, dep_insn, cost)
2284 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2286 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2287 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2288 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2289 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2290 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2291 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2292 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2293 == NOTE_INSN_LOOP_END)) \
2299 #define ISSUE_RATE ((int)ix86_cpu > (int)PROCESSOR_I486 ? 2 : 1)
2302 /* Add any extra modes needed to represent the condition code.
2304 For the i386, we need separate modes when floating-point equality
2305 comparisons are being done. */
2307 #define EXTRA_CC_MODES CCFPEQmode
2309 /* Define the names for the modes specified above. */
2310 #define EXTRA_CC_NAMES "CCFPEQ"
2312 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2313 return the mode to be used for the comparison.
2315 For floating-point equality comparisons, CCFPEQmode should be used.
2316 VOIDmode should be used in all other cases. */
2318 #define SELECT_CC_MODE(OP,X,Y) \
2319 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2320 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2322 /* Define the information needed to generate branch and scc insns. This is
2323 stored from the compare operation. Note that we can't use "rtx" here
2324 since it hasn't been defined! */
2326 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
2328 /* Tell final.c how to eliminate redundant test instructions. */
2330 /* Here we define machine-dependent flags and fields in cc_status
2331 (see `conditions.h'). */
2333 /* Set if the cc value was actually from the 80387 and
2334 we are testing eax directly (i.e. no sahf) */
2335 #define CC_TEST_AX 020000
2337 /* Set if the cc value is actually in the 80387, so a floating point
2338 conditional branch must be output. */
2339 #define CC_IN_80387 04000
2341 /* Set if the CC value was stored in a nonstandard way, so that
2342 the state of equality is indicated by zero in the carry bit. */
2343 #define CC_Z_IN_NOT_C 010000
2345 /* Set if the CC value was actually from the 80387 and loaded directly
2346 into the eflags instead of via eax/sahf. */
2347 #define CC_FCOMI 040000
2349 /* Store in cc_status the expressions
2350 that the condition codes will describe
2351 after execution of an instruction whose pattern is EXP.
2352 Do not alter them if the instruction would not alter the cc's. */
2354 #define NOTICE_UPDATE_CC(EXP, INSN) \
2355 notice_update_cc((EXP))
2357 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2358 FLOAT following a floating point comparison.
2359 Use NO_OV following an arithmetic insn that set the cc's
2360 before a test insn that was deleted.
2361 NO_OV may be zero, meaning final should reinsert the test insn
2362 because the jump cannot be handled properly without it. */
2364 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2366 if (cc_prev_status.flags & CC_IN_80387) \
2368 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2373 /* Control the assembler format that we output, to the extent
2374 this does not vary between assemblers. */
2376 /* How to refer to registers in assembler output.
2377 This sequence is indexed by compiler's hard-register-number (see above). */
2379 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2380 For non floating point regs, the following are the HImode names.
2382 For float regs, the stack top is sometimes referred to as "%st(0)"
2383 instead of just "%st". PRINT_REG handles this with the "y" code. */
2385 #define HI_REGISTER_NAMES \
2386 {"ax","dx","cx","bx","si","di","bp","sp", \
2387 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2389 #define REGISTER_NAMES HI_REGISTER_NAMES
2391 /* Table of additional register names to use in user input. */
2393 #define ADDITIONAL_REGISTER_NAMES \
2394 { { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
2395 { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
2396 { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \
2397 { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } }
2399 /* Note we are omitting these since currently I don't know how
2400 to get gcc to use these, since they want the same but different
2401 number as al, and ax.
2404 /* note the last four are not really qi_registers, but
2405 the md will have to never output movb into one of them
2406 only a movw . There is no movb into the last four regs */
2408 #define QI_REGISTER_NAMES \
2409 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2411 /* These parallel the array above, and can be used to access bits 8:15
2412 of regs 0 through 3. */
2414 #define QI_HIGH_REGISTER_NAMES \
2415 {"ah", "dh", "ch", "bh", }
2417 /* How to renumber registers for dbx and gdb. */
2419 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2420 #define DBX_REGISTER_NUMBER(n) \
2431 /* Before the prologue, RA is at 0(%esp). */
2432 #define INCOMING_RETURN_ADDR_RTX \
2433 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
2435 /* After the prologue, RA is at -4(AP) in the current frame. */
2436 #define RETURN_ADDR_RTX(COUNT, FRAME) \
2438 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\
2439 : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
2441 /* PC is dbx register 8; let's use that column for RA. */
2442 #define DWARF_FRAME_RETURN_COLUMN 8
2444 /* Before the prologue, the top of the frame is at 4(%esp). */
2445 #define INCOMING_FRAME_SP_OFFSET 4
2447 /* This is how to output the definition of a user-level label named NAME,
2448 such as the label on a static function or variable NAME. */
2450 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2451 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2453 /* This is how to output an assembler line defining a `double' constant. */
2455 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2457 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2458 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2461 /* This is how to output a `long double' extended real constant. */
2463 #undef ASM_OUTPUT_LONG_DOUBLE
2464 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2466 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2467 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2470 /* This is how to output an assembler line defining a `float' constant. */
2472 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2474 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2475 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2478 /* Store in OUTPUT a string (made with alloca) containing
2479 an assembler-name for a local static variable named NAME.
2480 LABELNO is an integer which is different for each call. */
2482 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2483 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2484 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2488 /* This is how to output an assembler line defining an `int' constant. */
2490 #define ASM_OUTPUT_INT(FILE,VALUE) \
2491 ( fprintf (FILE, "%s ", ASM_LONG), \
2492 output_addr_const (FILE,(VALUE)), \
2495 /* Likewise for `char' and `short' constants. */
2496 /* is this supposed to do align too?? */
2498 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2499 ( fprintf (FILE, "%s ", ASM_SHORT), \
2500 output_addr_const (FILE,(VALUE)), \
2504 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2505 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2506 output_addr_const (FILE,(VALUE)), \
2507 fputs (",", FILE), \
2508 output_addr_const (FILE,(VALUE)), \
2509 fputs (" >> 8\n",FILE))
2513 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2514 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2515 output_addr_const (FILE, (VALUE)), \
2518 /* This is how to output an assembler line for a numeric constant byte. */
2520 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2521 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2523 /* This is how to output an insn to push a register on the stack.
2524 It need not be very fast code. */
2526 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2527 fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO])
2529 /* This is how to output an insn to pop a register from the stack.
2530 It need not be very fast code. */
2532 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2533 fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO])
2535 /* This is how to output an element of a case-vector that is absolute.
2538 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2539 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2541 /* This is how to output an element of a case-vector that is relative.
2542 We don't use these on the 386 yet, because the ATT assembler can't do
2543 forward reference the differences.
2546 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2547 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2549 /* Define the parentheses used to group arithmetic operations
2550 in assembler code. */
2552 #define ASM_OPEN_PAREN ""
2553 #define ASM_CLOSE_PAREN ""
2555 /* Define results of standard character escape sequences. */
2556 #define TARGET_BELL 007
2557 #define TARGET_BS 010
2558 #define TARGET_TAB 011
2559 #define TARGET_NEWLINE 012
2560 #define TARGET_VT 013
2561 #define TARGET_FF 014
2562 #define TARGET_CR 015
2564 /* Print operand X (an rtx) in assembler syntax to file FILE.
2565 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2566 The CODE z takes the size of operand from the following digit, and
2567 outputs b,w,or l respectively.
2569 On the 80386, we use several such letters:
2570 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2571 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2572 R -- print the prefix for register names.
2573 z -- print the opcode suffix for the size of the current operand.
2574 * -- print a star (in certain assembler syntax)
2575 P -- if PIC, print an @PLT suffix.
2576 X -- don't print any sort of PIC '@' suffix for a symbol.
2577 J -- print jump insn for arithmetic_comparison_operator.
2578 s -- ??? something to do with double shifts. not actually used, afaik.
2579 C -- print a conditional move suffix corresponding to the op code.
2580 c -- likewise, but reverse the condition.
2581 F,f -- likewise, but for floating-point. */
2583 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2584 ((CODE) == '*' || (CODE) == '_')
2586 /* Print the name of a register based on its machine mode and number.
2587 If CODE is 'w', pretend the mode is HImode.
2588 If CODE is 'b', pretend the mode is QImode.
2589 If CODE is 'k', pretend the mode is SImode.
2590 If CODE is 'h', pretend the reg is the `high' byte register.
2591 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2593 extern char *hi_reg_name[];
2594 extern char *qi_reg_name[];
2595 extern char *qi_high_reg_name[];
2597 #define PRINT_REG(X, CODE, FILE) \
2598 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2600 fprintf (FILE, "%s", RP); \
2601 switch ((CODE == 'w' ? 2 \
2606 : GET_MODE_SIZE (GET_MODE (X)))) \
2609 if (STACK_TOP_P (X)) \
2611 fputs ("st(0)", FILE); \
2617 if (! FP_REG_P (X)) fputs ("e", FILE); \
2619 fputs (hi_reg_name[REGNO (X)], FILE); \
2622 fputs (qi_reg_name[REGNO (X)], FILE); \
2625 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2630 #define PRINT_OPERAND(FILE, X, CODE) \
2631 print_operand (FILE, X, CODE)
2633 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2634 print_operand_address (FILE, ADDR)
2636 /* Print the name of a register for based on its machine mode and number.
2637 This macro is used to print debugging output.
2638 This macro is different from PRINT_REG in that it may be used in
2639 programs that are not linked with aux-output.o. */
2641 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2642 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2643 static char *qi_name[] = QI_REGISTER_NAMES; \
2644 fprintf (FILE, "%d %s", REGNO (X), RP); \
2645 if (REGNO (X) == ARG_POINTER_REGNUM) \
2646 { fputs ("argp", FILE); break; } \
2647 if (STACK_TOP_P (X)) \
2648 { fputs ("st(0)", FILE); break; } \
2650 { fputs (hi_name[REGNO(X)], FILE); break; } \
2651 switch (GET_MODE_SIZE (GET_MODE (X))) \
2654 fputs ("e", FILE); \
2656 fputs (hi_name[REGNO (X)], FILE); \
2659 fputs (qi_name[REGNO (X)], FILE); \
2664 /* Output the prefix for an immediate operand, or for an offset operand. */
2665 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2666 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2668 /* Routines in libgcc that return floats must return them in an fp reg,
2669 just as other functions do which return such values.
2670 These macros make that happen. */
2672 #define FLOAT_VALUE_TYPE float
2673 #define INTIFY(FLOATVAL) FLOATVAL
2675 /* Nonzero if INSN magically clobbers register REGNO. */
2677 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2678 (FP_REGNO_P (REGNO) \
2679 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2682 /* a letter which is not needed by the normal asm syntax, which
2683 we can use for operand syntax in the extended asm */
2685 #define ASM_OPERAND_LETTER '#'
2686 #define RET return ""
2687 #define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx))
2689 /* Helper macros to expand a binary/unary operator if needed */
2690 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2692 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2696 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2698 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2703 /* Functions in i386.c */
2704 extern void override_options ();
2705 extern void order_regs_for_local_alloc ();
2706 extern char *output_strlen_unroll ();
2707 extern struct rtx_def *i386_sext16_if_const ();
2708 extern int i386_aligned_p ();
2709 extern int i386_cc_probably_useless_p ();
2710 extern int i386_valid_decl_attribute_p ();
2711 extern int i386_valid_type_attribute_p ();
2712 extern int i386_return_pops_args ();
2713 extern int i386_comp_type_attributes ();
2714 extern void init_cumulative_args ();
2715 extern void function_arg_advance ();
2716 extern struct rtx_def *function_arg ();
2717 extern int function_arg_partial_nregs ();
2718 extern char *output_strlen_unroll ();
2719 extern char *singlemove_string ();
2720 extern char *output_move_double ();
2721 extern char *output_move_pushmem ();
2722 extern int standard_80387_constant_p ();
2723 extern char *output_move_const_single ();
2724 extern int symbolic_operand ();
2725 extern int call_insn_operand ();
2726 extern int expander_call_insn_operand ();
2727 extern int symbolic_reference_mentioned_p ();
2728 extern int ix86_expand_binary_operator ();
2729 extern int ix86_binary_operator_ok ();
2730 extern int ix86_expand_unary_operator ();
2731 extern int ix86_unary_operator_ok ();
2732 extern void emit_pic_move ();
2733 extern void function_prologue ();
2734 extern int simple_386_epilogue ();
2735 extern void function_epilogue ();
2736 extern int legitimate_address_p ();
2737 extern struct rtx_def *legitimize_pic_address ();
2738 extern struct rtx_def *legitimize_address ();
2739 extern void print_operand ();
2740 extern void print_operand_address ();
2741 extern void notice_update_cc ();
2742 extern void split_di ();
2743 extern int binary_387_op ();
2744 extern int shift_op ();
2745 extern int VOIDmode_compare_op ();
2746 extern char *output_387_binary_op ();
2747 extern char *output_fix_trunc ();
2748 extern void output_float_extend ();
2749 extern char *output_float_compare ();
2750 extern char *output_fp_cc0_set ();
2751 extern void save_386_machine_status ();
2752 extern void restore_386_machine_status ();
2753 extern void clear_386_stack_locals ();
2754 extern struct rtx_def *assign_386_stack_local ();
2755 extern int is_mul ();
2756 extern int is_div ();
2757 extern int last_to_set_cc ();
2758 extern int doesnt_set_condition_code ();
2759 extern int sets_condition_code ();
2760 extern int str_immediate_operand ();
2761 extern int is_fp_insn ();
2762 extern int is_fp_dest ();
2763 extern int is_fp_store ();
2764 extern int agi_dependent ();
2765 extern int reg_mentioned_in_mem ();
2766 extern char *output_int_conditional_move ();
2767 extern char *output_fp_conditional_move ();
2768 extern int ix86_can_use_return_insn_p ();
2769 extern int small_shift_operand ();
2770 extern char *output_ashl ();
2771 extern int memory_address_info ();
2774 extern struct rtx_def *copy_all_rtx ();
2775 extern void rewrite_address ();
2778 /* Variables in i386.c */
2779 extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2780 extern char *ix86_arch_string; /* for -march=<xxx> */
2781 extern char *i386_reg_alloc_order; /* register allocation order */
2782 extern char *i386_regparm_string; /* # registers to use to pass args */
2783 extern char *i386_align_loops_string; /* power of two alignment for loops */
2784 extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2785 extern char *i386_align_funcs_string; /* power of two alignment for functions */
2786 extern char *i386_preferred_stack_boundary_string;/* power of two alignment for stack boundary */
2787 extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
2788 extern int i386_regparm; /* i386_regparm_string as a number */
2789 extern int i386_align_loops; /* power of two alignment for loops */
2790 extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2791 extern int i386_align_funcs; /* power of two alignment for functions */
2792 extern int i386_preferred_stack_boundary; /* preferred stack boundary alignment in bits */
2793 extern int i386_branch_cost; /* values 1-5: see jump.c */
2794 extern char *hi_reg_name[]; /* names for 16 bit regs */
2795 extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2796 extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2797 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2798 extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2799 extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2801 /* External variables used */
2802 extern int optimize; /* optimization level */
2803 extern int obey_regdecls; /* TRUE if stupid register allocation */
2805 /* External functions used */
2806 extern struct rtx_def *force_operand ();
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