2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_compat.h"
46 #include "opt_directio.h"
49 #include "opt_maxmem.h"
50 #include "opt_msgbuf.h"
51 #include "opt_perfmon.h"
53 #include "opt_userconfig.h"
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sysproto.h>
58 #include <sys/signalvar.h>
59 #include <sys/kernel.h>
60 #include <sys/linker.h>
61 #include <sys/malloc.h>
65 #include <sys/reboot.h>
67 #include <sys/msgbuf.h>
68 #include <sys/sysent.h>
69 #include <sys/sysctl.h>
70 #include <sys/vmmeter.h>
72 #include <sys/upcall.h>
73 #include <sys/usched.h>
77 #include <vm/vm_param.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_map.h>
83 #include <vm/vm_pager.h>
84 #include <vm/vm_extern.h>
86 #include <sys/thread2.h>
87 #include <sys/mplock2.h>
88 #include <sys/mutex2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
100 #include <machine/md_var.h>
101 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
102 #include <machine/globaldata.h> /* CPU_prvspace */
103 #include <machine/smp.h>
105 #include <machine/perfmon.h>
107 #include <machine/cputypes.h>
108 #include <machine/intr_machdep.h>
111 #include <bus/isa/isa_device.h>
113 #include <machine_base/isa/isa_intr.h>
114 #include <bus/isa/rtc.h>
115 #include <machine/vm86.h>
116 #include <sys/random.h>
117 #include <sys/ptrace.h>
118 #include <machine/sigframe.h>
120 #include <sys/machintr.h>
121 #include <machine_base/icu/icu_abi.h>
122 #include <machine_base/icu/elcr_var.h>
123 #include <machine_base/apic/lapic.h>
124 #include <machine_base/apic/ioapic.h>
125 #include <machine_base/apic/ioapic_abi.h>
126 #include <machine/mptable.h>
128 #define PHYSMAP_ENTRIES 10
130 extern void init386(int first);
131 extern void dblfault_handler(void);
133 extern void printcpuinfo(void); /* XXX header file */
134 extern void finishidentcpu(void);
135 extern void panicifcpuunsupported(void);
136 extern void initializecpu(void);
138 static void cpu_startup(void *);
139 static void pic_finish(void *);
140 static void cpu_finish(void *);
141 #ifndef CPU_DISABLE_SSE
142 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
143 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
144 #endif /* CPU_DISABLE_SSE */
146 extern void ffs_rawread_setup(void);
147 #endif /* DIRECTIO */
148 static void init_locks(void);
150 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
151 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
152 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
154 int _udatasel, _ucodesel;
157 int64_t tsc_offsets[MAXCPU];
159 int64_t tsc_offsets[1];
162 #if defined(SWTCH_OPTIM_STATS)
163 extern int swtch_optim_stats;
164 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
165 CTLFLAG_RD, &swtch_optim_stats, 0, "");
166 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
167 CTLFLAG_RD, &tlb_flush_count, 0, "");
172 u_long ebda_addr = 0;
174 int imcr_present = 0;
176 int naps = 0; /* # of Applications processors */
177 struct mtx dt_lock; /* lock for GDT and LDT */
182 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
184 u_long pmem = ctob(physmem);
186 int error = sysctl_handle_long(oidp, &pmem, 0, req);
190 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
191 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
194 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
196 int error = sysctl_handle_int(oidp, 0,
197 ctob(physmem - vmstats.v_wire_count), req);
201 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
202 0, 0, sysctl_hw_usermem, "IU", "");
205 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
207 int error = sysctl_handle_int(oidp, 0,
208 i386_btop(avail_end - avail_start), req);
212 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
213 0, 0, sysctl_hw_availpages, "I", "");
218 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
219 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
222 static vm_offset_t buffer_sva, buffer_eva;
223 vm_offset_t clean_sva, clean_eva;
224 static vm_offset_t pager_sva, pager_eva;
225 static struct trapframe proc0_tf;
228 cpu_startup(void *dummy)
232 vm_offset_t firstaddr;
235 * Good {morning,afternoon,evening,night}.
237 kprintf("%s", version);
240 panicifcpuunsupported();
244 kprintf("real memory = %ju (%ju MB)\n",
246 (intmax_t)Realmem / 1024 / 1024);
248 * Display any holes after the first chunk of extended memory.
253 kprintf("Physical memory chunk(s):\n");
254 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
255 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
257 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
258 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
264 * Allocate space for system data structures.
265 * The first available kernel virtual address is in "v".
266 * As pages of kernel virtual memory are allocated, "v" is incremented.
267 * As pages of memory are allocated and cleared,
268 * "firstaddr" is incremented.
269 * An index into the kernel page table corresponding to the
270 * virtual memory address maintained in "v" is kept in "mapaddr".
274 * Make two passes. The first pass calculates how much memory is
275 * needed and allocates it. The second pass assigns virtual
276 * addresses to the various data structures.
280 v = (caddr_t)firstaddr;
282 #define valloc(name, type, num) \
283 (name) = (type *)v; v = (caddr_t)((name)+(num))
284 #define valloclim(name, type, num, lim) \
285 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
288 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
289 * For the first 64MB of ram nominally allocate sufficient buffers to
290 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
291 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
292 * the buffer cache we limit the eventual kva reservation to
295 * factor represents the 1/4 x ram conversion.
298 int factor = 4 * BKVASIZE / 1024;
299 int kbytes = physmem * (PAGE_SIZE / 1024);
303 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
305 nbuf += (kbytes - 65536) * 2 / (factor * 5);
306 if (maxbcache && nbuf > maxbcache / BKVASIZE)
307 nbuf = maxbcache / BKVASIZE;
311 * Do not allow the buffer_map to be more then 1/2 the size of the
314 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
315 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
316 kprintf("Warning: nbufs capped at %d\n", nbuf);
319 /* limit to 128 on i386 */
320 nswbuf = max(min(nbuf/4, 128), 16);
322 if (nswbuf < NSWBUF_MIN)
329 valloc(swbuf, struct buf, nswbuf);
330 valloc(buf, struct buf, nbuf);
333 * End of first pass, size has been calculated so allocate memory
335 if (firstaddr == 0) {
336 size = (vm_size_t)(v - firstaddr);
337 firstaddr = kmem_alloc(&kernel_map, round_page(size));
339 panic("startup: no room for tables");
344 * End of second pass, addresses have been assigned
346 if ((vm_size_t)(v - firstaddr) != size)
347 panic("startup: table size inconsistency");
349 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
350 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
351 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
353 buffer_map.system_map = 1;
354 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
355 (nswbuf*MAXPHYS) + pager_map_size);
356 pager_map.system_map = 1;
358 #if defined(USERCONFIG)
360 cninit(); /* the preferred console may have changed */
363 kprintf("avail memory = %ju (%ju MB)\n",
364 (intmax_t)ptoa(vmstats.v_free_count),
365 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
368 * Set up buffers, so they can be used to read disk labels.
371 vm_pager_bufferinit();
375 cpu_finish(void *dummy __unused)
381 pic_finish(void *dummy __unused)
383 /* Log ELCR information */
386 /* Log MPTABLE information */
387 mptable_pci_int_dump();
390 MachIntrABI.finalize();
394 * Send an interrupt to process.
396 * Stack is set up to allow sigcode stored
397 * at top to call routine, followed by kcall
398 * to sigreturn routine below. After sigreturn
399 * resets the signal mask, the stack, and the
400 * frame pointer, it returns to the user
404 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
406 struct lwp *lp = curthread->td_lwp;
407 struct proc *p = lp->lwp_proc;
408 struct trapframe *regs;
409 struct sigacts *psp = p->p_sigacts;
410 struct sigframe sf, *sfp;
413 regs = lp->lwp_md.md_regs;
414 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
416 /* save user context */
417 bzero(&sf, sizeof(struct sigframe));
418 sf.sf_uc.uc_sigmask = *mask;
419 sf.sf_uc.uc_stack = lp->lwp_sigstk;
420 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
421 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
423 /* make the size of the saved context visible to userland */
424 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
426 /* save mailbox pending state for syscall interlock semantics */
427 if (p->p_flag & P_MAILBOX)
428 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
430 /* Allocate and validate space for the signal handler context. */
431 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
432 SIGISMEMBER(psp->ps_sigonstack, sig)) {
433 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
434 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
435 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
437 sfp = (struct sigframe *)regs->tf_esp - 1;
440 /* Translate the signal is appropriate */
441 if (p->p_sysent->sv_sigtbl) {
442 if (sig <= p->p_sysent->sv_sigsize)
443 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
446 /* Build the argument list for the signal handler. */
448 sf.sf_ucontext = (register_t)&sfp->sf_uc;
449 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
450 /* Signal handler installed with SA_SIGINFO. */
451 sf.sf_siginfo = (register_t)&sfp->sf_si;
452 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
454 /* fill siginfo structure */
455 sf.sf_si.si_signo = sig;
456 sf.sf_si.si_code = code;
457 sf.sf_si.si_addr = (void*)regs->tf_err;
460 /* Old FreeBSD-style arguments. */
461 sf.sf_siginfo = code;
462 sf.sf_addr = regs->tf_err;
463 sf.sf_ahu.sf_handler = catcher;
467 * If we're a vm86 process, we want to save the segment registers.
468 * We also change eflags to be our emulated eflags, not the actual
471 if (regs->tf_eflags & PSL_VM) {
472 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
473 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
475 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
476 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
477 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
478 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
480 if (vm86->vm86_has_vme == 0)
481 sf.sf_uc.uc_mcontext.mc_eflags =
482 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
483 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
486 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
487 * syscalls made by the signal handler. This just avoids
488 * wasting time for our lazy fixup of such faults. PSL_NT
489 * does nothing in vm86 mode, but vm86 programs can set it
490 * almost legitimately in probes for old cpu types.
492 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
496 * Save the FPU state and reinit the FP unit
498 npxpush(&sf.sf_uc.uc_mcontext);
501 * Copy the sigframe out to the user's stack.
503 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
505 * Something is wrong with the stack pointer.
506 * ...Kill the process.
511 regs->tf_esp = (int)sfp;
512 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
515 * i386 abi specifies that the direction flag must be cleared
518 regs->tf_eflags &= ~(PSL_T|PSL_D);
520 regs->tf_cs = _ucodesel;
521 regs->tf_ds = _udatasel;
522 regs->tf_es = _udatasel;
525 * Allow the signal handler to inherit %fs in addition to %gs as
526 * the userland program might be using both.
528 * However, if a T_PROTFLT occured the segment registers could be
529 * totally broken. They must be reset in order to be able to
530 * return to userland.
532 if (regs->tf_trapno == T_PROTFLT) {
533 regs->tf_fs = _udatasel;
534 regs->tf_gs = _udatasel;
536 regs->tf_ss = _udatasel;
540 * Sanitize the trapframe for a virtual kernel passing control to a custom
541 * VM context. Remove any items that would otherwise create a privilage
544 * XXX at the moment we allow userland to set the resume flag. Is this a
548 cpu_sanitize_frame(struct trapframe *frame)
550 frame->tf_cs = _ucodesel;
551 frame->tf_ds = _udatasel;
552 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
554 frame->tf_fs = _udatasel;
555 frame->tf_gs = _udatasel;
557 frame->tf_ss = _udatasel;
558 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
559 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
564 cpu_sanitize_tls(struct savetls *tls)
566 struct segment_descriptor *desc;
569 for (i = 0; i < NGTLS; ++i) {
571 if (desc->sd_dpl == 0 && desc->sd_type == 0)
573 if (desc->sd_def32 == 0)
575 if (desc->sd_type != SDT_MEMRWA)
577 if (desc->sd_dpl != SEL_UPL)
579 if (desc->sd_xx != 0 || desc->sd_p != 1)
586 * sigreturn(ucontext_t *sigcntxp)
588 * System call to cleanup state after a signal
589 * has been taken. Reset signal mask and
590 * stack state from context left by sendsig (above).
591 * Return to previous pc and psl as specified by
592 * context left by sendsig. Check carefully to
593 * make sure that the user has not modified the
594 * state to gain improper privileges.
598 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
599 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
602 sys_sigreturn(struct sigreturn_args *uap)
604 struct lwp *lp = curthread->td_lwp;
605 struct proc *p = lp->lwp_proc;
606 struct trapframe *regs;
614 * We have to copy the information into kernel space so userland
615 * can't modify it while we are sniffing it.
617 regs = lp->lwp_md.md_regs;
618 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
622 eflags = ucp->uc_mcontext.mc_eflags;
624 if (eflags & PSL_VM) {
625 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
626 struct vm86_kernel *vm86;
629 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
630 * set up the vm86 area, and we can't enter vm86 mode.
632 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
634 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
635 if (vm86->vm86_inited == 0)
638 /* go back to user mode if both flags are set */
639 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
640 trapsignal(lp, SIGBUS, 0);
642 if (vm86->vm86_has_vme) {
643 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
644 (eflags & VME_USERCHANGE) | PSL_VM;
646 vm86->vm86_eflags = eflags; /* save VIF, VIP */
647 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
648 (eflags & VM_USERCHANGE) | PSL_VM;
650 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
651 tf->tf_eflags = eflags;
652 tf->tf_vm86_ds = tf->tf_ds;
653 tf->tf_vm86_es = tf->tf_es;
654 tf->tf_vm86_fs = tf->tf_fs;
655 tf->tf_vm86_gs = tf->tf_gs;
656 tf->tf_ds = _udatasel;
657 tf->tf_es = _udatasel;
659 tf->tf_fs = _udatasel;
660 tf->tf_gs = _udatasel;
664 * Don't allow users to change privileged or reserved flags.
667 * XXX do allow users to change the privileged flag PSL_RF.
668 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
669 * should sometimes set it there too. tf_eflags is kept in
670 * the signal context during signal handling and there is no
671 * other place to remember it, so the PSL_RF bit may be
672 * corrupted by the signal handler without us knowing.
673 * Corruption of the PSL_RF bit at worst causes one more or
674 * one less debugger trap, so allowing it is fairly harmless.
676 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
677 kprintf("sigreturn: eflags = 0x%x\n", eflags);
682 * Don't allow users to load a valid privileged %cs. Let the
683 * hardware check for invalid selectors, excess privilege in
684 * other selectors, invalid %eip's and invalid %esp's.
686 cs = ucp->uc_mcontext.mc_cs;
687 if (!CS_SECURE(cs)) {
688 kprintf("sigreturn: cs = 0x%x\n", cs);
689 trapsignal(lp, SIGBUS, T_PROTFLT);
692 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
696 * Restore the FPU state from the frame
699 npxpop(&ucp->uc_mcontext);
702 * Merge saved signal mailbox pending flag to maintain interlock
703 * semantics against system calls.
705 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX) {
706 lwkt_gettoken(&p->p_token);
707 p->p_flag |= P_MAILBOX;
708 lwkt_reltoken(&p->p_token);
711 if (ucp->uc_mcontext.mc_onstack & 1)
712 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
714 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
716 lp->lwp_sigmask = ucp->uc_sigmask;
717 SIG_CANTMASK(lp->lwp_sigmask);
723 * Stack frame on entry to function. %eax will contain the function vector,
724 * %ecx will contain the function data. flags, ecx, and eax will have
725 * already been pushed on the stack.
736 sendupcall(struct vmupcall *vu, int morepending)
738 struct lwp *lp = curthread->td_lwp;
739 struct trapframe *regs;
740 struct upcall upcall;
741 struct upc_frame upc_frame;
745 * If we are a virtual kernel running an emulated user process
746 * context, switch back to the virtual kernel context before
747 * trying to post the signal.
749 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
750 lp->lwp_md.md_regs->tf_trapno = 0;
751 vkernel_trap(lp, lp->lwp_md.md_regs);
755 * Get the upcall data structure
757 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
758 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
761 kprintf("bad upcall address\n");
766 * If the data structure is already marked pending or has a critical
767 * section count, mark the data structure as pending and return
768 * without doing an upcall. vu_pending is left set.
770 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
771 if (upcall.upc_pending < vu->vu_pending) {
772 upcall.upc_pending = vu->vu_pending;
773 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
774 sizeof(upcall.upc_pending));
780 * We can run this upcall now, clear vu_pending.
782 * Bump our critical section count and set or clear the
783 * user pending flag depending on whether more upcalls are
784 * pending. The user will be responsible for calling
785 * upc_dispatch(-1) to process remaining upcalls.
788 upcall.upc_pending = morepending;
790 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
791 sizeof(upcall.upc_pending));
792 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
796 * Construct a stack frame and issue the upcall
798 regs = lp->lwp_md.md_regs;
799 upc_frame.eax = regs->tf_eax;
800 upc_frame.ecx = regs->tf_ecx;
801 upc_frame.edx = regs->tf_edx;
802 upc_frame.flags = regs->tf_eflags;
803 upc_frame.oldip = regs->tf_eip;
804 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
805 sizeof(upc_frame)) != 0) {
806 kprintf("bad stack on upcall\n");
808 regs->tf_eax = (register_t)vu->vu_func;
809 regs->tf_ecx = (register_t)vu->vu_data;
810 regs->tf_edx = (register_t)lp->lwp_upcall;
811 regs->tf_eip = (register_t)vu->vu_ctx;
812 regs->tf_esp -= sizeof(upc_frame);
817 * fetchupcall occurs in the context of a system call, which means that
818 * we have to return EJUSTRETURN in order to prevent eax and edx from
819 * being overwritten by the syscall return value.
821 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
822 * and the function pointer in %eax.
825 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
827 struct upc_frame upc_frame;
828 struct lwp *lp = curthread->td_lwp;
829 struct trapframe *regs;
831 struct upcall upcall;
834 regs = lp->lwp_md.md_regs;
836 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
840 * This jumps us to the next ready context.
843 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
846 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
849 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
850 regs->tf_eax = (register_t)vu->vu_func;
851 regs->tf_ecx = (register_t)vu->vu_data;
852 regs->tf_edx = (register_t)lp->lwp_upcall;
853 regs->tf_eip = (register_t)vu->vu_ctx;
854 regs->tf_esp = (register_t)rsp;
857 * This returns us to the originally interrupted code.
859 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
860 regs->tf_eax = upc_frame.eax;
861 regs->tf_ecx = upc_frame.ecx;
862 regs->tf_edx = upc_frame.edx;
863 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
864 (upc_frame.flags & PSL_USERCHANGE);
865 regs->tf_eip = upc_frame.oldip;
866 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
875 * Machine dependent boot() routine
877 * I haven't seen anything to put here yet
878 * Possibly some stuff might be grafted back here from boot()
886 * Shutdown the CPU as much as possible
892 __asm__ __volatile("hlt");
896 * cpu_idle() represents the idle LWKT. You cannot return from this function
897 * (unless you want to blow things up!). Instead we look for runnable threads
898 * and loop or halt as appropriate. Giant is not held on entry to the thread.
900 * The main loop is entered with a critical section held, we must release
901 * the critical section before doing anything else. lwkt_switch() will
902 * check for pending interrupts due to entering and exiting its own
905 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
907 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
908 * 1 to just use hlt and for debugging purposes.
910 static int cpu_idle_hlt = 2;
911 static int cpu_idle_hltcnt;
912 static int cpu_idle_spincnt;
913 static u_int cpu_idle_repeat = 4;
914 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
915 &cpu_idle_hlt, 0, "Idle loop HLT enable");
916 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
917 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
918 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
919 &cpu_idle_spincnt, 0, "Idle loop entry spins");
920 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
921 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
924 cpu_idle_default_hook(void)
927 * We must guarentee that hlt is exactly the instruction
930 __asm __volatile("sti; hlt");
933 /* Other subsystems (e.g., ACPI) can hook this later. */
934 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
939 globaldata_t gd = mycpu;
940 struct thread *td __debugvar = gd->gd_curthread;
945 KKASSERT(td->td_critcount == 0);
948 * See if there are any LWKTs ready to go.
953 * When halting inside a cli we must check for reqflags
954 * races, particularly [re]schedule requests. Running
955 * splz() does the job.
958 * 0 Never halt, just spin
960 * 1 Always use HLT (or MONITOR/MWAIT if avail).
961 * This typically eats more power than the
964 * 2 Use HLT/MONITOR/MWAIT up to a point and then
965 * use the ACPI halt (default). This is a hybrid
966 * approach. See machdep.cpu_idle_repeat.
968 * 3 Always use the ACPI halt. This typically
969 * eats the least amount of power but the cpu
970 * will be slow waking up. Slows down e.g.
971 * compiles and other pipe/event oriented stuff.
974 * NOTE: Interrupts are enabled and we are not in a critical
977 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
978 * don't bother capping gd_idle_repeat, it is ok if
981 ++gd->gd_idle_repeat;
982 reqflags = gd->gd_reqflags;
983 quick = (cpu_idle_hlt == 1) ||
985 gd->gd_idle_repeat < cpu_idle_repeat);
987 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
988 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
989 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
991 } else if (cpu_idle_hlt) {
992 __asm __volatile("cli");
994 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
996 cpu_idle_default_hook();
1000 __asm __volatile("sti");
1004 __asm __volatile("sti");
1013 * This routine is called if a spinlock has been held through the
1014 * exponential backoff period and is seriously contested. On a real cpu
1018 cpu_spinlock_contested(void)
1026 * Clear registers on exec
1029 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1031 struct thread *td = curthread;
1032 struct lwp *lp = td->td_lwp;
1033 struct pcb *pcb = td->td_pcb;
1034 struct trapframe *regs = lp->lwp_md.md_regs;
1036 /* was i386_user_cleanup() in NetBSD */
1039 bzero((char *)regs, sizeof(struct trapframe));
1040 regs->tf_eip = entry;
1041 regs->tf_esp = stack;
1042 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1043 regs->tf_ss = _udatasel;
1044 regs->tf_ds = _udatasel;
1045 regs->tf_es = _udatasel;
1046 regs->tf_fs = _udatasel;
1047 regs->tf_gs = _udatasel;
1048 regs->tf_cs = _ucodesel;
1050 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1051 regs->tf_ebx = ps_strings;
1054 * Reset the hardware debug registers if they were in use.
1055 * They won't have any meaning for the newly exec'd process.
1057 if (pcb->pcb_flags & PCB_DBREGS) {
1064 if (pcb == td->td_pcb) {
1066 * Clear the debug registers on the running
1067 * CPU, otherwise they will end up affecting
1068 * the next process we switch to.
1072 pcb->pcb_flags &= ~PCB_DBREGS;
1076 * Initialize the math emulator (if any) for the current process.
1077 * Actually, just clear the bit that says that the emulator has
1078 * been initialized. Initialization is delayed until the process
1079 * traps to the emulator (if it is done at all) mainly because
1080 * emulators don't provide an entry point for initialization.
1082 pcb->pcb_flags &= ~FP_SOFTFP;
1085 * note: do not set CR0_TS here. npxinit() must do it after clearing
1086 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1090 load_cr0(rcr0() | CR0_MP);
1093 /* Initialize the npx (if any) for the current process. */
1094 npxinit(__INITIAL_NPXCW__);
1099 * note: linux emulator needs edx to be 0x0 on entry, which is
1100 * handled in execve simply by setting the 64 bit syscall
1101 * return value to 0.
1111 cr0 |= CR0_NE; /* Done by npxinit() */
1112 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1113 cr0 |= CR0_WP | CR0_AM;
1119 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1122 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1124 if (!error && req->newptr)
1129 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1130 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1132 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1133 CTLFLAG_RW, &disable_rtc_set, 0, "");
1135 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1136 CTLFLAG_RD, &bootinfo, bootinfo, "");
1138 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1139 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1141 extern u_long bootdev; /* not a cdev_t - encoding is different */
1142 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1143 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1146 * Initialize 386 and configure to run kernel
1150 * Initialize segments & interrupt table
1154 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1155 static struct gate_descriptor idt0[NIDT];
1156 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1157 union descriptor ldt[NLDT]; /* local descriptor table */
1159 /* table descriptors - used to load tables by cpu */
1160 struct region_descriptor r_gdt, r_idt;
1162 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1163 extern int has_f00f_bug;
1166 static struct i386tss dblfault_tss;
1167 static char dblfault_stack[PAGE_SIZE];
1169 extern struct user *proc0paddr;
1172 /* software prototypes -- in more palatable form */
1173 struct soft_segment_descriptor gdt_segs[] = {
1174 /* GNULL_SEL 0 Null Descriptor */
1175 { 0x0, /* segment base address */
1177 0, /* segment type */
1178 0, /* segment descriptor priority level */
1179 0, /* segment descriptor present */
1181 0, /* default 32 vs 16 bit size */
1182 0 /* limit granularity (byte/page units)*/ },
1183 /* GCODE_SEL 1 Code Descriptor for kernel */
1184 { 0x0, /* segment base address */
1185 0xfffff, /* length - all address space */
1186 SDT_MEMERA, /* segment type */
1187 0, /* segment descriptor priority level */
1188 1, /* segment descriptor present */
1190 1, /* default 32 vs 16 bit size */
1191 1 /* limit granularity (byte/page units)*/ },
1192 /* GDATA_SEL 2 Data Descriptor for kernel */
1193 { 0x0, /* segment base address */
1194 0xfffff, /* length - all address space */
1195 SDT_MEMRWA, /* segment type */
1196 0, /* segment descriptor priority level */
1197 1, /* segment descriptor present */
1199 1, /* default 32 vs 16 bit size */
1200 1 /* limit granularity (byte/page units)*/ },
1201 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1202 { 0x0, /* segment base address */
1203 0xfffff, /* length - all address space */
1204 SDT_MEMRWA, /* segment type */
1205 0, /* segment descriptor priority level */
1206 1, /* segment descriptor present */
1208 1, /* default 32 vs 16 bit size */
1209 1 /* limit granularity (byte/page units)*/ },
1210 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1212 0x0, /* segment base address */
1213 sizeof(struct i386tss)-1,/* length - all address space */
1214 SDT_SYS386TSS, /* segment type */
1215 0, /* segment descriptor priority level */
1216 1, /* segment descriptor present */
1218 0, /* unused - default 32 vs 16 bit size */
1219 0 /* limit granularity (byte/page units)*/ },
1220 /* GLDT_SEL 5 LDT Descriptor */
1221 { (int) ldt, /* segment base address */
1222 sizeof(ldt)-1, /* length - all address space */
1223 SDT_SYSLDT, /* segment type */
1224 SEL_UPL, /* segment descriptor priority level */
1225 1, /* segment descriptor present */
1227 0, /* unused - default 32 vs 16 bit size */
1228 0 /* limit granularity (byte/page units)*/ },
1229 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1230 { (int) ldt, /* segment base address */
1231 (512 * sizeof(union descriptor)-1), /* length */
1232 SDT_SYSLDT, /* segment type */
1233 0, /* segment descriptor priority level */
1234 1, /* segment descriptor present */
1236 0, /* unused - default 32 vs 16 bit size */
1237 0 /* limit granularity (byte/page units)*/ },
1238 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1239 { 0x0, /* segment base address */
1240 0x0, /* length - all address space */
1241 0, /* segment type */
1242 0, /* segment descriptor priority level */
1243 0, /* segment descriptor present */
1245 0, /* default 32 vs 16 bit size */
1246 0 /* limit granularity (byte/page units)*/ },
1247 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1248 { 0x400, /* segment base address */
1249 0xfffff, /* length */
1250 SDT_MEMRWA, /* segment type */
1251 0, /* segment descriptor priority level */
1252 1, /* segment descriptor present */
1254 1, /* default 32 vs 16 bit size */
1255 1 /* limit granularity (byte/page units)*/ },
1256 /* GPANIC_SEL 9 Panic Tss Descriptor */
1257 { (int) &dblfault_tss, /* segment base address */
1258 sizeof(struct i386tss)-1,/* length - all address space */
1259 SDT_SYS386TSS, /* segment type */
1260 0, /* segment descriptor priority level */
1261 1, /* segment descriptor present */
1263 0, /* unused - default 32 vs 16 bit size */
1264 0 /* limit granularity (byte/page units)*/ },
1265 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1266 { 0, /* segment base address (overwritten) */
1267 0xfffff, /* length */
1268 SDT_MEMERA, /* segment type */
1269 0, /* segment descriptor priority level */
1270 1, /* segment descriptor present */
1272 0, /* default 32 vs 16 bit size */
1273 1 /* limit granularity (byte/page units)*/ },
1274 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1275 { 0, /* segment base address (overwritten) */
1276 0xfffff, /* length */
1277 SDT_MEMERA, /* segment type */
1278 0, /* segment descriptor priority level */
1279 1, /* segment descriptor present */
1281 0, /* default 32 vs 16 bit size */
1282 1 /* limit granularity (byte/page units)*/ },
1283 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1284 { 0, /* segment base address (overwritten) */
1285 0xfffff, /* length */
1286 SDT_MEMRWA, /* segment type */
1287 0, /* segment descriptor priority level */
1288 1, /* segment descriptor present */
1290 1, /* default 32 vs 16 bit size */
1291 1 /* limit granularity (byte/page units)*/ },
1292 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1293 { 0, /* segment base address (overwritten) */
1294 0xfffff, /* length */
1295 SDT_MEMRWA, /* segment type */
1296 0, /* segment descriptor priority level */
1297 1, /* segment descriptor present */
1299 0, /* default 32 vs 16 bit size */
1300 1 /* limit granularity (byte/page units)*/ },
1301 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1302 { 0, /* segment base address (overwritten) */
1303 0xfffff, /* length */
1304 SDT_MEMRWA, /* segment type */
1305 0, /* segment descriptor priority level */
1306 1, /* segment descriptor present */
1308 0, /* default 32 vs 16 bit size */
1309 1 /* limit granularity (byte/page units)*/ },
1310 /* GTLS_START 15 TLS */
1311 { 0x0, /* segment base address */
1313 0, /* segment type */
1314 0, /* segment descriptor priority level */
1315 0, /* segment descriptor present */
1317 0, /* default 32 vs 16 bit size */
1318 0 /* limit granularity (byte/page units)*/ },
1319 /* GTLS_START+1 16 TLS */
1320 { 0x0, /* segment base address */
1322 0, /* segment type */
1323 0, /* segment descriptor priority level */
1324 0, /* segment descriptor present */
1326 0, /* default 32 vs 16 bit size */
1327 0 /* limit granularity (byte/page units)*/ },
1328 /* GTLS_END 17 TLS */
1329 { 0x0, /* segment base address */
1331 0, /* segment type */
1332 0, /* segment descriptor priority level */
1333 0, /* segment descriptor present */
1335 0, /* default 32 vs 16 bit size */
1336 0 /* limit granularity (byte/page units)*/ },
1337 /* GNDIS_SEL 18 NDIS Descriptor */
1338 { 0x0, /* segment base address */
1340 0, /* segment type */
1341 0, /* segment descriptor priority level */
1342 0, /* segment descriptor present */
1344 0, /* default 32 vs 16 bit size */
1345 0 /* limit granularity (byte/page units)*/ },
1348 static struct soft_segment_descriptor ldt_segs[] = {
1349 /* Null Descriptor - overwritten by call gate */
1350 { 0x0, /* segment base address */
1351 0x0, /* length - all address space */
1352 0, /* segment type */
1353 0, /* segment descriptor priority level */
1354 0, /* segment descriptor present */
1356 0, /* default 32 vs 16 bit size */
1357 0 /* limit granularity (byte/page units)*/ },
1358 /* Null Descriptor - overwritten by call gate */
1359 { 0x0, /* segment base address */
1360 0x0, /* length - all address space */
1361 0, /* segment type */
1362 0, /* segment descriptor priority level */
1363 0, /* segment descriptor present */
1365 0, /* default 32 vs 16 bit size */
1366 0 /* limit granularity (byte/page units)*/ },
1367 /* Null Descriptor - overwritten by call gate */
1368 { 0x0, /* segment base address */
1369 0x0, /* length - all address space */
1370 0, /* segment type */
1371 0, /* segment descriptor priority level */
1372 0, /* segment descriptor present */
1374 0, /* default 32 vs 16 bit size */
1375 0 /* limit granularity (byte/page units)*/ },
1376 /* Code Descriptor for user */
1377 { 0x0, /* segment base address */
1378 0xfffff, /* length - all address space */
1379 SDT_MEMERA, /* segment type */
1380 SEL_UPL, /* segment descriptor priority level */
1381 1, /* segment descriptor present */
1383 1, /* default 32 vs 16 bit size */
1384 1 /* limit granularity (byte/page units)*/ },
1385 /* Null Descriptor - overwritten by call gate */
1386 { 0x0, /* segment base address */
1387 0x0, /* length - all address space */
1388 0, /* segment type */
1389 0, /* segment descriptor priority level */
1390 0, /* segment descriptor present */
1392 0, /* default 32 vs 16 bit size */
1393 0 /* limit granularity (byte/page units)*/ },
1394 /* Data Descriptor for user */
1395 { 0x0, /* segment base address */
1396 0xfffff, /* length - all address space */
1397 SDT_MEMRWA, /* segment type */
1398 SEL_UPL, /* segment descriptor priority level */
1399 1, /* segment descriptor present */
1401 1, /* default 32 vs 16 bit size */
1402 1 /* limit granularity (byte/page units)*/ },
1406 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1408 struct gate_descriptor *ip;
1411 ip->gd_looffset = (int)func;
1412 ip->gd_selector = selec;
1418 ip->gd_hioffset = ((int)func)>>16 ;
1421 #define IDTVEC(name) __CONCAT(X,name)
1424 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1425 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1426 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1427 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1428 IDTVEC(xmm), IDTVEC(syscall),
1431 IDTVEC(int0x80_syscall);
1433 #ifdef DEBUG_INTERRUPTS
1434 extern inthand_t *Xrsvdary[256];
1438 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1440 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1441 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1442 ssd->ssd_type = sd->sd_type;
1443 ssd->ssd_dpl = sd->sd_dpl;
1444 ssd->ssd_p = sd->sd_p;
1445 ssd->ssd_def32 = sd->sd_def32;
1446 ssd->ssd_gran = sd->sd_gran;
1450 * Populate the (physmap) array with base/bound pairs describing the
1451 * available physical memory in the system, then test this memory and
1452 * build the phys_avail array describing the actually-available memory.
1454 * If we cannot accurately determine the physical memory map, then use
1455 * value from the 0xE801 call, and failing that, the RTC.
1457 * Total memory size may be set by the kernel environment variable
1458 * hw.physmem or the compile-time define MAXMEM.
1461 getmemsize(int first)
1463 int i, physmap_idx, pa_indx, da_indx;
1465 u_int basemem, extmem;
1466 struct vm86frame vmf;
1467 struct vm86context vmc;
1469 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1477 quad_t dcons_addr, dcons_size;
1479 bzero(&vmf, sizeof(struct vm86frame));
1480 bzero(physmap, sizeof(physmap));
1484 * Some newer BIOSes has broken INT 12H implementation which cause
1485 * kernel panic immediately. In this case, we need to scan SMAP
1486 * with INT 15:E820 first, then determine base memory size.
1489 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1490 if (hasbrokenint12) {
1495 * Perform "base memory" related probes & setup. If we get a crazy
1496 * value give the bios some scribble space just in case.
1498 vm86_intcall(0x12, &vmf);
1499 basemem = vmf.vmf_ax;
1500 if (basemem > 640) {
1501 kprintf("Preposterous BIOS basemem of %uK, "
1502 "truncating to < 640K\n", basemem);
1507 * XXX if biosbasemem is now < 640, there is a `hole'
1508 * between the end of base memory and the start of
1509 * ISA memory. The hole may be empty or it may
1510 * contain BIOS code or data. Map it read/write so
1511 * that the BIOS can write to it. (Memory from 0 to
1512 * the physical end of the kernel is mapped read-only
1513 * to begin with and then parts of it are remapped.
1514 * The parts that aren't remapped form holes that
1515 * remain read-only and are unused by the kernel.
1516 * The base memory area is below the physical end of
1517 * the kernel and right now forms a read-only hole.
1518 * The part of it from PAGE_SIZE to
1519 * (trunc_page(biosbasemem * 1024) - 1) will be
1520 * remapped and used by the kernel later.)
1522 * This code is similar to the code used in
1523 * pmap_mapdev, but since no memory needs to be
1524 * allocated we simply change the mapping.
1526 for (pa = trunc_page(basemem * 1024);
1527 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1528 pte = vtopte(pa + KERNBASE);
1529 *pte = pa | PG_RW | PG_V;
1533 * if basemem != 640, map pages r/w into vm86 page table so
1534 * that the bios can scribble on it.
1537 for (i = basemem / 4; i < 160; i++)
1538 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1542 * map page 1 R/W into the kernel page table so we can use it
1543 * as a buffer. The kernel will unmap this page later.
1545 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1546 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1549 * get memory map with INT 15:E820
1551 #define SMAPSIZ sizeof(*smap)
1552 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1555 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1556 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1561 vmf.vmf_eax = 0xE820;
1562 vmf.vmf_edx = SMAP_SIG;
1563 vmf.vmf_ecx = SMAPSIZ;
1564 i = vm86_datacall(0x15, &vmf, &vmc);
1565 if (i || vmf.vmf_eax != SMAP_SIG)
1567 if (boothowto & RB_VERBOSE)
1568 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1570 *(u_int32_t *)((char *)&smap->base + 4),
1571 (u_int32_t)smap->base,
1572 *(u_int32_t *)((char *)&smap->length + 4),
1573 (u_int32_t)smap->length);
1575 if (smap->type != 0x01)
1578 if (smap->length == 0)
1581 Realmem += smap->length;
1583 if (smap->base >= 0xffffffffLLU) {
1584 kprintf("%ju MB of memory above 4GB ignored\n",
1585 (uintmax_t)(smap->length / 1024 / 1024));
1589 for (i = 0; i <= physmap_idx; i += 2) {
1590 if (smap->base < physmap[i + 1]) {
1591 if (boothowto & RB_VERBOSE) {
1592 kprintf("Overlapping or non-montonic "
1593 "memory region, ignoring "
1596 Realmem -= smap->length;
1601 if (smap->base == physmap[physmap_idx + 1]) {
1602 physmap[physmap_idx + 1] += smap->length;
1607 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1608 kprintf("Too many segments in the physical "
1609 "address map, giving up\n");
1612 physmap[physmap_idx] = smap->base;
1613 physmap[physmap_idx + 1] = smap->base + smap->length;
1615 ; /* fix GCC3.x warning */
1616 } while (vmf.vmf_ebx != 0);
1619 * Perform "base memory" related probes & setup based on SMAP
1622 for (i = 0; i <= physmap_idx; i += 2) {
1623 if (physmap[i] == 0x00000000) {
1624 basemem = physmap[i + 1] / 1024;
1633 if (basemem > 640) {
1634 kprintf("Preposterous BIOS basemem of %uK, "
1635 "truncating to 640K\n", basemem);
1639 for (pa = trunc_page(basemem * 1024);
1640 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1641 pte = vtopte(pa + KERNBASE);
1642 *pte = pa | PG_RW | PG_V;
1646 for (i = basemem / 4; i < 160; i++)
1647 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1650 if (physmap[1] != 0)
1654 * If we failed above, try memory map with INT 15:E801
1656 vmf.vmf_ax = 0xE801;
1657 if (vm86_intcall(0x15, &vmf) == 0) {
1658 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1662 vm86_intcall(0x15, &vmf);
1663 extmem = vmf.vmf_ax;
1666 * Prefer the RTC value for extended memory.
1668 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1673 * Special hack for chipsets that still remap the 384k hole when
1674 * there's 16MB of memory - this really confuses people that
1675 * are trying to use bus mastering ISA controllers with the
1676 * "16MB limit"; they only have 16MB, but the remapping puts
1677 * them beyond the limit.
1679 * If extended memory is between 15-16MB (16-17MB phys address range),
1682 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1686 physmap[1] = basemem * 1024;
1688 physmap[physmap_idx] = 0x100000;
1689 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1693 * Now, physmap contains a map of physical memory.
1696 base_memory = physmap[1];
1698 /* make hole for AP bootstrap code YYY */
1699 physmap[1] = mp_bootaddress(base_memory);
1702 /* Save EBDA address, if any */
1703 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1707 * Maxmem isn't the "maximum memory", it's one larger than the
1708 * highest page of the physical address space. It should be
1709 * called something like "Maxphyspage". We may adjust this
1710 * based on ``hw.physmem'' and the results of the memory test.
1712 Maxmem = atop(physmap[physmap_idx + 1]);
1715 Maxmem = MAXMEM / 4;
1718 if (kgetenv_quad("hw.physmem", &maxmem))
1719 Maxmem = atop(maxmem);
1721 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1722 (boothowto & RB_VERBOSE))
1723 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1726 * If Maxmem has been increased beyond what the system has detected,
1727 * extend the last memory segment to the new limit.
1729 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1730 physmap[physmap_idx + 1] = ptoa(Maxmem);
1732 /* call pmap initialization to make new kernel address space */
1733 pmap_bootstrap(first, 0);
1736 * Size up each available chunk of physical memory.
1738 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1741 phys_avail[pa_indx++] = physmap[0];
1742 phys_avail[pa_indx] = physmap[0];
1743 dump_avail[da_indx] = physmap[0];
1748 * Get dcons buffer address
1750 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1751 kgetenv_quad("dcons.size", &dcons_size) == 0)
1755 * physmap is in bytes, so when converting to page boundaries,
1756 * round up the start address and round down the end address.
1758 for (i = 0; i <= physmap_idx; i += 2) {
1762 if (physmap[i + 1] < end)
1763 end = trunc_page(physmap[i + 1]);
1764 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1765 int tmp, page_bad, full;
1769 int *ptr = (int *)CADDR1;
1774 * block out kernel memory as not available.
1776 if (pa >= 0x100000 && pa < first)
1780 * block out dcons buffer
1783 && pa >= trunc_page(dcons_addr)
1784 && pa < dcons_addr + dcons_size)
1790 * map page into kernel: valid, read/write,non-cacheable
1792 *pte = pa | PG_V | PG_RW | PG_N;
1797 * Test for alternating 1's and 0's
1799 *(volatile int *)ptr = 0xaaaaaaaa;
1800 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1804 * Test for alternating 0's and 1's
1806 *(volatile int *)ptr = 0x55555555;
1807 if (*(volatile int *)ptr != 0x55555555) {
1813 *(volatile int *)ptr = 0xffffffff;
1814 if (*(volatile int *)ptr != 0xffffffff) {
1820 *(volatile int *)ptr = 0x0;
1821 if (*(volatile int *)ptr != 0x0) {
1825 * Restore original value.
1830 * Adjust array of valid/good pages.
1832 if (page_bad == TRUE) {
1836 * If this good page is a continuation of the
1837 * previous set of good pages, then just increase
1838 * the end pointer. Otherwise start a new chunk.
1839 * Note that "end" points one higher than end,
1840 * making the range >= start and < end.
1841 * If we're also doing a speculative memory
1842 * test and we at or past the end, bump up Maxmem
1843 * so that we keep going. The first bad page
1844 * will terminate the loop.
1846 if (phys_avail[pa_indx] == pa) {
1847 phys_avail[pa_indx] += PAGE_SIZE;
1850 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1851 kprintf("Too many holes in the physical address space, giving up\n");
1856 phys_avail[pa_indx++] = pa; /* start */
1857 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1861 if (dump_avail[da_indx] == pa) {
1862 dump_avail[da_indx] += PAGE_SIZE;
1865 if (da_indx >= PHYSMAP_ENTRIES*2) {
1869 dump_avail[da_indx++] = pa; /* start */
1870 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1883 * The last chunk must contain at least one page plus the message
1884 * buffer to avoid complicating other code (message buffer address
1885 * calculation, etc.).
1887 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1888 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1889 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1890 phys_avail[pa_indx--] = 0;
1891 phys_avail[pa_indx--] = 0;
1894 Maxmem = atop(phys_avail[pa_indx]);
1896 /* Trim off space for the message buffer. */
1897 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1899 avail_end = phys_avail[pa_indx];
1902 struct machintr_abi MachIntrABI;
1913 * 7 Device Not Available (x87)
1915 * 9 Coprocessor Segment overrun (unsupported, reserved)
1917 * 11 Segment not present
1919 * 13 General Protection
1922 * 16 x87 FP Exception pending
1923 * 17 Alignment Check
1925 * 19 SIMD floating point
1927 * 32-255 INTn/external sources
1932 struct gate_descriptor *gdp;
1933 int gsel_tss, metadata_missing, off, x;
1934 struct mdglobaldata *gd;
1937 * Prevent lowering of the ipl if we call tsleep() early.
1939 gd = &CPU_prvspace[0].mdglobaldata;
1940 bzero(gd, sizeof(*gd));
1942 gd->mi.gd_curthread = &thread0;
1943 thread0.td_gd = &gd->mi;
1945 atdevbase = ISA_HOLE_START + KERNBASE;
1947 metadata_missing = 0;
1948 if (bootinfo.bi_modulep) {
1949 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1950 preload_bootstrap_relocate(KERNBASE);
1952 metadata_missing = 1;
1954 if (bootinfo.bi_envp)
1955 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1957 if (boothowto & RB_VERBOSE)
1961 * Default MachIntrABI to ICU
1963 MachIntrABI = MachIntrABI_ICU;
1965 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1966 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1967 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1970 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1971 * and ncpus_fit_mask remain 0.
1976 /* Init basic tunables, hz etc */
1980 * make gdt memory segments, the code segment goes up to end of the
1981 * page with etext in it, the data segment goes to the end of
1985 * XXX text protection is temporarily (?) disabled. The limit was
1986 * i386_btop(round_page(etext)) - 1.
1988 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1989 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1991 gdt_segs[GPRIV_SEL].ssd_limit =
1992 atop(sizeof(struct privatespace) - 1);
1993 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1994 gdt_segs[GPROC0_SEL].ssd_base =
1995 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1997 gd->mi.gd_prvspace = &CPU_prvspace[0];
2000 * Note: on both UP and SMP curthread must be set non-NULL
2001 * early in the boot sequence because the system assumes
2002 * that 'curthread' is never NULL.
2005 for (x = 0; x < NGDT; x++) {
2007 /* avoid overwriting db entries with APM ones */
2008 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
2011 ssdtosd(&gdt_segs[x], &gdt[x].sd);
2014 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
2015 r_gdt.rd_base = (int) gdt;
2018 mi_gdinit(&gd->mi, 0);
2020 mi_proc0init(&gd->mi, proc0paddr);
2021 safepri = TDPRI_MAX;
2023 /* make ldt memory segments */
2025 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2026 * should be spelled ...MAX_USER...
2028 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2029 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2030 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2031 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2033 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2035 gd->gd_currentldt = _default_ldt;
2036 /* spinlocks and the BGL */
2040 * Setup the hardware exception table. Most exceptions use
2041 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2042 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2043 * an 'interrupt trap gate', which disables interrupts on entry,
2044 * in order to be able to poll the appropriate CRn register to
2045 * determine the fault address.
2047 for (x = 0; x < NIDT; x++) {
2048 #ifdef DEBUG_INTERRUPTS
2049 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2051 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2054 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2055 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2056 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2057 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2058 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2059 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2060 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2061 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2062 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2063 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2064 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2065 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2066 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2067 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2068 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2069 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2070 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2071 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2072 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2073 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2074 setidt(0x80, &IDTVEC(int0x80_syscall),
2075 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2077 r_idt.rd_limit = sizeof(idt0) - 1;
2078 r_idt.rd_base = (int) idt;
2082 * Initialize the console before we print anything out.
2086 if (metadata_missing)
2087 kprintf("WARNING: loader(8) metadata is missing!\n");
2096 * Initialize IRQ mapping
2099 * SHOULD be after elcr_probe()
2101 MachIntrABI_ICU.initmap();
2103 MachIntrABI_IOAPIC.initmap();
2108 if (boothowto & RB_KDB)
2109 Debugger("Boot flags requested debugger");
2112 finishidentcpu(); /* Final stage of CPU initialization */
2113 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2114 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2115 initializecpu(); /* Initialize CPU registers */
2118 * make an initial tss so cpu can get interrupt stack on syscall!
2119 * The 16 bytes is to save room for a VM86 context.
2121 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2122 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2123 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2124 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2125 gd->gd_common_tssd = *gd->gd_tss_gdt;
2126 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2129 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2130 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2131 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2132 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2133 dblfault_tss.tss_cr3 = (int)IdlePTD;
2134 dblfault_tss.tss_eip = (int) dblfault_handler;
2135 dblfault_tss.tss_eflags = PSL_KERNEL;
2136 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2137 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2138 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2139 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2140 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2144 init_param2(physmem);
2146 /* now running on new page tables, configured,and u/iom is accessible */
2148 /* Map the message buffer. */
2149 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2150 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2152 msgbufinit(msgbufp, MSGBUF_SIZE);
2154 /* make a call gate to reenter kernel with */
2155 gdp = &ldt[LSYS5CALLS_SEL].gd;
2157 x = (int) &IDTVEC(syscall);
2158 gdp->gd_looffset = x++;
2159 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2161 gdp->gd_type = SDT_SYS386CGT;
2162 gdp->gd_dpl = SEL_UPL;
2164 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2166 /* XXX does this work? */
2167 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2168 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2170 /* transfer to user mode */
2172 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2173 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2175 /* setup proc 0's pcb */
2176 thread0.td_pcb->pcb_flags = 0;
2177 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2178 thread0.td_pcb->pcb_ext = 0;
2179 lwp0.lwp_md.md_regs = &proc0_tf;
2183 * Initialize machine-dependant portions of the global data structure.
2184 * Note that the global data area and cpu0's idlestack in the private
2185 * data space were allocated in locore.
2187 * Note: the idlethread's cpl is 0
2189 * WARNING! Called from early boot, 'mycpu' may not work yet.
2192 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2195 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2197 lwkt_init_thread(&gd->mi.gd_idlethread,
2198 gd->mi.gd_prvspace->idlestack,
2199 sizeof(gd->mi.gd_prvspace->idlestack),
2201 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2202 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2203 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2204 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2208 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2210 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2211 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2218 globaldata_find(int cpu)
2220 KKASSERT(cpu >= 0 && cpu < ncpus);
2221 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2224 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2225 static void f00f_hack(void *unused);
2226 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2229 f00f_hack(void *unused)
2231 struct gate_descriptor *new_idt;
2237 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2239 r_idt.rd_limit = sizeof(idt0) - 1;
2241 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2243 panic("kmem_alloc returned 0");
2244 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2245 panic("kmem_alloc returned non-page-aligned memory");
2246 /* Put the first seven entries in the lower page */
2247 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2248 bcopy(idt, new_idt, sizeof(idt0));
2249 r_idt.rd_base = (int)new_idt;
2252 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2253 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2254 panic("vm_map_protect failed");
2257 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2260 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2262 lp->lwp_md.md_regs->tf_eip = addr;
2267 ptrace_single_step(struct lwp *lp)
2269 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2274 fill_regs(struct lwp *lp, struct reg *regs)
2276 struct trapframe *tp;
2278 tp = lp->lwp_md.md_regs;
2279 regs->r_gs = tp->tf_gs;
2280 regs->r_fs = tp->tf_fs;
2281 regs->r_es = tp->tf_es;
2282 regs->r_ds = tp->tf_ds;
2283 regs->r_edi = tp->tf_edi;
2284 regs->r_esi = tp->tf_esi;
2285 regs->r_ebp = tp->tf_ebp;
2286 regs->r_ebx = tp->tf_ebx;
2287 regs->r_edx = tp->tf_edx;
2288 regs->r_ecx = tp->tf_ecx;
2289 regs->r_eax = tp->tf_eax;
2290 regs->r_eip = tp->tf_eip;
2291 regs->r_cs = tp->tf_cs;
2292 regs->r_eflags = tp->tf_eflags;
2293 regs->r_esp = tp->tf_esp;
2294 regs->r_ss = tp->tf_ss;
2299 set_regs(struct lwp *lp, struct reg *regs)
2301 struct trapframe *tp;
2303 tp = lp->lwp_md.md_regs;
2304 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2305 !CS_SECURE(regs->r_cs))
2307 tp->tf_gs = regs->r_gs;
2308 tp->tf_fs = regs->r_fs;
2309 tp->tf_es = regs->r_es;
2310 tp->tf_ds = regs->r_ds;
2311 tp->tf_edi = regs->r_edi;
2312 tp->tf_esi = regs->r_esi;
2313 tp->tf_ebp = regs->r_ebp;
2314 tp->tf_ebx = regs->r_ebx;
2315 tp->tf_edx = regs->r_edx;
2316 tp->tf_ecx = regs->r_ecx;
2317 tp->tf_eax = regs->r_eax;
2318 tp->tf_eip = regs->r_eip;
2319 tp->tf_cs = regs->r_cs;
2320 tp->tf_eflags = regs->r_eflags;
2321 tp->tf_esp = regs->r_esp;
2322 tp->tf_ss = regs->r_ss;
2326 #ifndef CPU_DISABLE_SSE
2328 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2330 struct env87 *penv_87 = &sv_87->sv_env;
2331 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2334 /* FPU control/status */
2335 penv_87->en_cw = penv_xmm->en_cw;
2336 penv_87->en_sw = penv_xmm->en_sw;
2337 penv_87->en_tw = penv_xmm->en_tw;
2338 penv_87->en_fip = penv_xmm->en_fip;
2339 penv_87->en_fcs = penv_xmm->en_fcs;
2340 penv_87->en_opcode = penv_xmm->en_opcode;
2341 penv_87->en_foo = penv_xmm->en_foo;
2342 penv_87->en_fos = penv_xmm->en_fos;
2345 for (i = 0; i < 8; ++i)
2346 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2350 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2352 struct env87 *penv_87 = &sv_87->sv_env;
2353 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2356 /* FPU control/status */
2357 penv_xmm->en_cw = penv_87->en_cw;
2358 penv_xmm->en_sw = penv_87->en_sw;
2359 penv_xmm->en_tw = penv_87->en_tw;
2360 penv_xmm->en_fip = penv_87->en_fip;
2361 penv_xmm->en_fcs = penv_87->en_fcs;
2362 penv_xmm->en_opcode = penv_87->en_opcode;
2363 penv_xmm->en_foo = penv_87->en_foo;
2364 penv_xmm->en_fos = penv_87->en_fos;
2367 for (i = 0; i < 8; ++i)
2368 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2370 #endif /* CPU_DISABLE_SSE */
2373 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2375 #ifndef CPU_DISABLE_SSE
2377 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2378 (struct save87 *)fpregs);
2381 #endif /* CPU_DISABLE_SSE */
2382 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2387 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2389 #ifndef CPU_DISABLE_SSE
2391 set_fpregs_xmm((struct save87 *)fpregs,
2392 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2395 #endif /* CPU_DISABLE_SSE */
2396 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2401 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2404 dbregs->dr0 = rdr0();
2405 dbregs->dr1 = rdr1();
2406 dbregs->dr2 = rdr2();
2407 dbregs->dr3 = rdr3();
2408 dbregs->dr4 = rdr4();
2409 dbregs->dr5 = rdr5();
2410 dbregs->dr6 = rdr6();
2411 dbregs->dr7 = rdr7();
2415 pcb = lp->lwp_thread->td_pcb;
2416 dbregs->dr0 = pcb->pcb_dr0;
2417 dbregs->dr1 = pcb->pcb_dr1;
2418 dbregs->dr2 = pcb->pcb_dr2;
2419 dbregs->dr3 = pcb->pcb_dr3;
2422 dbregs->dr6 = pcb->pcb_dr6;
2423 dbregs->dr7 = pcb->pcb_dr7;
2429 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2432 load_dr0(dbregs->dr0);
2433 load_dr1(dbregs->dr1);
2434 load_dr2(dbregs->dr2);
2435 load_dr3(dbregs->dr3);
2436 load_dr4(dbregs->dr4);
2437 load_dr5(dbregs->dr5);
2438 load_dr6(dbregs->dr6);
2439 load_dr7(dbregs->dr7);
2442 struct ucred *ucred;
2444 uint32_t mask1, mask2;
2447 * Don't let an illegal value for dr7 get set. Specifically,
2448 * check for undefined settings. Setting these bit patterns
2449 * result in undefined behaviour and can lead to an unexpected
2452 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2453 i++, mask1 <<= 2, mask2 <<= 2)
2454 if ((dbregs->dr7 & mask1) == mask2)
2457 pcb = lp->lwp_thread->td_pcb;
2458 ucred = lp->lwp_proc->p_ucred;
2461 * Don't let a process set a breakpoint that is not within the
2462 * process's address space. If a process could do this, it
2463 * could halt the system by setting a breakpoint in the kernel
2464 * (if ddb was enabled). Thus, we need to check to make sure
2465 * that no breakpoints are being enabled for addresses outside
2466 * process's address space, unless, perhaps, we were called by
2469 * XXX - what about when the watched area of the user's
2470 * address space is written into from within the kernel
2471 * ... wouldn't that still cause a breakpoint to be generated
2472 * from within kernel mode?
2475 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2476 if (dbregs->dr7 & 0x3) {
2477 /* dr0 is enabled */
2478 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2482 if (dbregs->dr7 & (0x3<<2)) {
2483 /* dr1 is enabled */
2484 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2488 if (dbregs->dr7 & (0x3<<4)) {
2489 /* dr2 is enabled */
2490 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2494 if (dbregs->dr7 & (0x3<<6)) {
2495 /* dr3 is enabled */
2496 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2501 pcb->pcb_dr0 = dbregs->dr0;
2502 pcb->pcb_dr1 = dbregs->dr1;
2503 pcb->pcb_dr2 = dbregs->dr2;
2504 pcb->pcb_dr3 = dbregs->dr3;
2505 pcb->pcb_dr6 = dbregs->dr6;
2506 pcb->pcb_dr7 = dbregs->dr7;
2508 pcb->pcb_flags |= PCB_DBREGS;
2515 * Return > 0 if a hardware breakpoint has been hit, and the
2516 * breakpoint was in user space. Return 0, otherwise.
2519 user_dbreg_trap(void)
2521 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2522 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2523 int nbp; /* number of breakpoints that triggered */
2524 caddr_t addr[4]; /* breakpoint addresses */
2528 if ((dr7 & 0x000000ff) == 0) {
2530 * all GE and LE bits in the dr7 register are zero,
2531 * thus the trap couldn't have been caused by the
2532 * hardware debug registers
2539 bp = dr6 & 0x0000000f;
2543 * None of the breakpoint bits are set meaning this
2544 * trap was not caused by any of the debug registers
2550 * at least one of the breakpoints were hit, check to see
2551 * which ones and if any of them are user space addresses
2555 addr[nbp++] = (caddr_t)rdr0();
2558 addr[nbp++] = (caddr_t)rdr1();
2561 addr[nbp++] = (caddr_t)rdr2();
2564 addr[nbp++] = (caddr_t)rdr3();
2567 for (i=0; i<nbp; i++) {
2569 (caddr_t)VM_MAX_USER_ADDRESS) {
2571 * addr[i] is in user space
2578 * None of the breakpoints are in user space.
2586 Debugger(const char *msg)
2588 kprintf("Debugger(\"%s\") called.\n", msg);
2595 * Provide inb() and outb() as functions. They are normally only
2596 * available as macros calling inlined functions, thus cannot be
2597 * called inside DDB.
2599 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2605 /* silence compiler warnings */
2607 void outb(u_int, u_char);
2614 * We use %%dx and not %1 here because i/o is done at %dx and not at
2615 * %edx, while gcc generates inferior code (movw instead of movl)
2616 * if we tell it to load (u_short) port.
2618 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2623 outb(u_int port, u_char data)
2627 * Use an unnecessary assignment to help gcc's register allocator.
2628 * This make a large difference for gcc-1.40 and a tiny difference
2629 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2630 * best results. gcc-2.6.0 can't handle this.
2633 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2640 #include "opt_cpu.h"
2644 * initialize all the SMP locks
2647 /* critical region when masking or unmasking interupts */
2648 struct spinlock_deprecated imen_spinlock;
2650 /* critical region for old style disable_intr/enable_intr */
2651 struct spinlock_deprecated mpintr_spinlock;
2653 /* critical region around INTR() routines */
2654 struct spinlock_deprecated intr_spinlock;
2656 /* lock region used by kernel profiling */
2657 struct spinlock_deprecated mcount_spinlock;
2659 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2660 struct spinlock_deprecated com_spinlock;
2662 /* lock regions around the clock hardware */
2663 struct spinlock_deprecated clock_spinlock;
2665 /* lock around the MP rendezvous */
2666 struct spinlock_deprecated smp_rv_spinlock;
2673 * Get the initial mplock with a count of 1 for the BSP.
2674 * This uses a LOGICAL cpu ID, ie BSP == 0.
2676 cpu_get_initial_mplock();
2679 spin_lock_init(&mcount_spinlock);
2680 spin_lock_init(&intr_spinlock);
2681 spin_lock_init(&mpintr_spinlock);
2682 spin_lock_init(&imen_spinlock);
2683 spin_lock_init(&smp_rv_spinlock);
2684 spin_lock_init(&com_spinlock);
2685 spin_lock_init(&clock_spinlock);
2687 /* our token pool needs to work early */
2688 lwkt_token_pool_init();