mneumann's projects / dragonfly.git / blame
| Commit | Line | Data |
|---|---|---|
| 984263bc MD |
1 | /*- |
| 2 | * Copyright (c) 1997, by Steve Passe | |
| 3 | * All rights reserved. | |
| 4 | * | |
| 5 | * Redistribution and use in source and binary forms, with or without | |
| 6 | * modification, are permitted provided that the following conditions | |
| 7 | * are met: | |
| 8 | * 1. Redistributions of source code must retain the above copyright | |
| 9 | * notice, this list of conditions and the following disclaimer. | |
| 10 | * 2. The name of the developer may NOT be used to endorse or promote products | |
| 11 | * derived from this software without specific prior written permission. | |
| 12 | * | |
| 13 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND | |
| 14 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 15 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 16 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE | |
| 17 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL | |
| 18 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS | |
| 19 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) | |
| 20 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT | |
| 21 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY | |
| 22 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF | |
| 23 | * SUCH DAMAGE. | |
| 24 | * | |
| 25 | * $FreeBSD: src/sys/i386/isa/apic_ipl.h,v 1.3 1999/08/28 00:44:36 peter Exp $ | |
| f8334305 | 26 | * $DragonFly: src/sys/platform/pc32/apic/apic_ipl.h,v 1.8 2006/10/23 21:50:29 dillon Exp $ |
| 984263bc MD |
27 | */ |
| 28 | ||
| f8334305 MD |
29 | #ifndef _ARCH_APIC_IPL_H_ |
| 30 | #define _ARCH_APIC_IPL_H_ | |
| 984263bc | 31 | |
| 79b62055 | 32 | #ifdef SMP /* APIC-IO */ |
| 06f5be02 | 33 | |
| 10ff1029 | 34 | /* IDT vector base for regular (aka. slow) and fast interrupts */ |
| 10ff1029 MD |
35 | #define TPR_FAST_INTS 0x60 |
| 36 | ||
| fe5f755a | 37 | #define APIC_HWI_VECTORS 32 |
| 984263bc | 38 | |
| 06f5be02 MD |
39 | #endif |
| 40 | ||
| bdc560a1 MD |
41 | #ifdef LOCORE |
| 42 | ||
| 43 | /* | |
| 97359a5b | 44 | * Interrupts may or may not be disabled when using these functions. |
| bdc560a1 | 45 | */ |
| 97359a5b MD |
46 | #define APIC_IMASK_LOCK \ |
| 47 | SPIN_LOCK(imen_spinlock) ; \ | |
| bdc560a1 | 48 | |
| 97359a5b MD |
49 | #define APIC_IMASK_UNLOCK \ |
| 50 | SPIN_UNLOCK(imen_spinlock) ; \ | |
| bdc560a1 MD |
51 | |
| 52 | #endif | |
| 53 | ||
| f8334305 | 54 | #endif /* !_ARCH_APIC_IPL_H_ */ |