2 * Copyright (c) 2003,2004 The DragonFly Project. All rights reserved.
4 * This code is derived from software contributed to The DragonFly Project
5 * by Matthew Dillon <dillon@backplane.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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34 * Copyright (c) 1990 The Regents of the University of California.
35 * All rights reserved.
37 * This code is derived from software contributed to Berkeley by
40 * Redistribution and use in source and binary forms, with or without
41 * modification, are permitted provided that the following conditions
43 * 1. Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * 2. Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in the
47 * documentation and/or other materials provided with the distribution.
48 * 3. All advertising materials mentioning features or use of this software
49 * must display the following acknowledgement:
50 * This product includes software developed by the University of
51 * California, Berkeley and its contributors.
52 * 4. Neither the name of the University nor the names of its contributors
53 * may be used to endorse or promote products derived from this software
54 * without specific prior written permission.
56 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
57 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
58 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
59 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
60 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
61 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
62 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68 * $FreeBSD: src/sys/i386/i386/swtch.s,v 1.89.2.10 2003/01/23 03:36:24 ps Exp $
73 #include <sys/rtprio.h>
75 #include <machine/asmacros.h>
76 #include <machine/segments.h>
78 #include <machine/pmap.h>
79 #include <machine/lock.h>
83 #define MPLOCKED lock ;
88 .globl lwkt_switch_return
90 #if defined(SWTCH_OPTIM_STATS)
91 .globl swtch_optim_stats, tlb_flush_count
92 swtch_optim_stats: .long 0 /* number of _swtch_optims */
93 tlb_flush_count: .long 0
100 * cpu_heavy_switch(next_thread)
102 * Switch from the current thread to a new thread. This entry
103 * is normally called via the thread->td_switch function, and will
104 * only be called when the current thread is a heavy weight process.
106 * Some instructions have been reordered to reduce pipeline stalls.
108 * YYY disable interrupts once giant is removed.
110 ENTRY(cpu_heavy_switch)
114 movl PCPU(curthread),%ecx
115 movl (%esp),%eax /* (reorder optimization) */
116 movl TD_PCB(%ecx),%edx /* EDX = PCB */
117 movl %eax,PCB_EIP(%edx) /* return PC may be modified */
118 movl %ebx,PCB_EBX(%edx)
119 movl %esp,PCB_ESP(%edx)
120 movl %ebp,PCB_EBP(%edx)
121 movl %esi,PCB_ESI(%edx)
122 movl %edi,PCB_EDI(%edx)
124 movl %ecx,%ebx /* EBX = curthread */
125 movl TD_LWP(%ecx),%ecx
126 movl PCPU(cpuid), %eax
127 movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */
128 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx)
131 * Push the LWKT switch restore function, which resumes a heavy
132 * weight process. Note that the LWKT switcher is based on
133 * TD_SP, while the heavy weight process switcher is based on
134 * PCB_ESP. TD_SP is usually two ints pushed relative to
135 * PCB_ESP. We push the flags for later restore by cpu_heavy_restore.
138 pushl $cpu_heavy_restore
139 movl %esp,TD_SP(%ebx)
142 * Save debug regs if necessary
144 movb PCB_FLAGS(%edx),%al
146 jz 1f /* no, skip over */
147 movl %dr7,%eax /* yes, do the save */
148 movl %eax,PCB_DR7(%edx)
149 andl $0x0000fc00, %eax /* disable all watchpoints */
152 movl %eax,PCB_DR6(%edx)
154 movl %eax,PCB_DR3(%edx)
156 movl %eax,PCB_DR2(%edx)
158 movl %eax,PCB_DR1(%edx)
160 movl %eax,PCB_DR0(%edx)
165 * Save the FP state if we have used the FP. Note that calling
166 * npxsave will NULL out PCPU(npxthread).
168 cmpl %ebx,PCPU(npxthread)
170 pushl TD_SAVEFPU(%ebx)
171 call npxsave /* do it in a big C function */
172 addl $4,%esp /* EAX, ECX, EDX trashed */
174 #endif /* NNPX > 0 */
177 * Switch to the next thread, which was passed as an argument
178 * to cpu_heavy_switch(). Due to the eflags and switch-restore
179 * function we pushed, the argument is at 12(%esp). Set the current
180 * thread, load the stack pointer, and 'ret' into the switch-restore
183 * The switch restore function expects the new thread to be in %eax
184 * and the old one to be in %ebx.
186 * There is a one-instruction window where curthread is the new
187 * thread but %esp still points to the old thread's stack, but
188 * we are protected by a critical section so it is ok.
190 movl 12(%esp),%eax /* EAX = newtd, EBX = oldtd */
191 movl %eax,PCPU(curthread)
192 movl TD_SP(%eax),%esp
198 * The switch function is changed to this when a thread is going away
199 * for good. We have to ensure that the MMU state is not cached, and
200 * we don't bother saving the existing thread state before switching.
202 * At this point we are in a critical section and this cpu owns the
203 * thread's token, which serves as an interlock until the switchout is
206 ENTRY(cpu_exit_switch)
208 * Get us out of the vmspace
218 movl PCPU(curthread),%ebx
221 * If this is a process/lwp, deactivate the pmap after we've
224 movl TD_LWP(%ebx),%ecx
227 movl PCPU(cpuid), %eax
228 movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */
229 MPLOCKED btrl %eax, VM_PMAP+PM_ACTIVE(%ecx)
232 * Switch to the next thread. RET into the restore function, which
233 * expects the new thread in EAX and the old in EBX.
235 * There is a one-instruction window where curthread is the new
236 * thread but %esp still points to the old thread's stack, but
237 * we are protected by a critical section so it is ok.
240 movl %eax,PCPU(curthread)
241 movl TD_SP(%eax),%esp
245 * cpu_heavy_restore() (current thread in %eax on entry)
247 * Restore the thread after an LWKT switch. This entry is normally
248 * called via the LWKT switch restore function, which was pulled
249 * off the thread stack and jumped to.
251 * This entry is only called if the thread was previously saved
252 * using cpu_heavy_switch() (the heavy weight process thread switcher),
253 * or when a new process is initially scheduled.
255 * NOTE: The lwp may be in any state, not necessarily LSRUN, because
256 * a preemption switch may interrupt the process and then return via
259 * YYY theoretically we do not have to restore everything here, a lot
260 * of this junk can wait until we return to usermode. But for now
261 * we restore everything.
263 * YYY the PCB crap is really crap, it makes startup a bitch because
264 * we can't switch away.
266 * YYY note: spl check is done in mi_switch when it splx()'s.
269 ENTRY(cpu_heavy_restore)
271 movl TD_PCB(%eax),%edx /* EDX = PCB */
272 movl TD_LWP(%eax),%ecx
274 #if defined(SWTCH_OPTIM_STATS)
275 incl _swtch_optim_stats
278 * Tell the pmap that our cpu is using the VMSPACE now. We cannot
279 * safely test/reload %cr3 until after we have set the bit in the
280 * pmap (remember, we do not hold the MP lock in the switch code).
282 movl LWP_VMSPACE(%ecx), %ecx /* ECX = vmspace */
283 movl PCPU(cpuid), %esi
284 MPLOCKED btsl %esi, VM_PMAP+PM_ACTIVE(%ecx)
287 * Restore the MMU address space. If it is the same as the last
288 * thread we don't have to invalidate the tlb (i.e. reload cr3).
289 * YYY which naturally also means that the PM_ACTIVE bit had better
290 * already have been set before we set it above, check? YYY
294 movl PCB_CR3(%edx),%ecx
297 #if defined(SWTCH_OPTIM_STATS)
298 decl _swtch_optim_stats
299 incl _tlb_flush_count
305 * NOTE: %ebx is the previous thread and %eax is the new thread.
306 * %ebx is retained throughout so we can return it.
308 * lwkt_switch[_return] is responsible for handling TDF_RUNNING.
312 * Deal with the PCB extension, restore the private tss
314 movl PCB_EXT(%edx),%edi /* check for a PCB extension */
315 movl $1,%ecx /* maybe mark use of a private tss */
320 * Going back to the common_tss. We may need to update TSS_ESP0
321 * which sets the top of the supervisor stack when entering from
322 * usermode. The PCB is at the top of the stack but we need another
323 * 16 bytes to take vm86 into account.
326 movl %ecx, PCPU(common_tss) + TSS_ESP0
328 cmpl $0,PCPU(private_tss) /* don't have to reload if */
329 je 3f /* already using the common TSS */
331 subl %ecx,%ecx /* unmark use of private tss */
334 * Get the address of the common TSS descriptor for the ltr.
335 * There is no way to get the address of a segment-accessed variable
336 * so we store a self-referential pointer at the base of the per-cpu
337 * data area and add the appropriate offset.
339 movl $gd_common_tssd, %edi
343 * Move the correct TSS descriptor into the GDT slot, then reload
347 movl %ecx,PCPU(private_tss) /* mark/unmark private tss */
348 movl PCPU(tss_gdt), %ecx /* entry in GDT */
353 movl $GPROC0_SEL*8, %esi /* GSEL(entry, SEL_KPL) */
358 * Restore general registers. %ebx is restored later.
360 movl PCB_ESP(%edx),%esp
361 movl PCB_EBP(%edx),%ebp
362 movl PCB_ESI(%edx),%esi
363 movl PCB_EDI(%edx),%edi
364 movl PCB_EIP(%edx),%eax
369 * Restore the user LDT if we have one
371 cmpl $0, PCB_USERLDT(%edx)
373 movl _default_ldt,%eax
374 cmpl PCPU(currentldt),%eax
377 movl %eax,PCPU(currentldt)
386 * Restore the user TLS if we have one
394 * Restore the DEBUG register state if necessary.
396 movb PCB_FLAGS(%edx),%al
398 jz 1f /* no, skip over */
399 movl PCB_DR6(%edx),%eax /* yes, do the restore */
401 movl PCB_DR3(%edx),%eax
403 movl PCB_DR2(%edx),%eax
405 movl PCB_DR1(%edx),%eax
407 movl PCB_DR0(%edx),%eax
409 movl %dr7,%eax /* load dr7 so as not to disturb */
410 andl $0x0000fc00,%eax /* reserved bits */
411 movl PCB_DR7(%edx),%ecx
412 andl $~0x0000fc00,%ecx
416 movl %ebx,%eax /* return previous thread */
417 movl PCB_EBX(%edx),%ebx
423 * Update pcb, saving current processor state.
429 /* caller's return address - child won't execute this routine */
431 movl %eax,PCB_EIP(%ecx)
432 movl %ebx,PCB_EBX(%ecx)
433 movl %esp,PCB_ESP(%ecx)
434 movl %ebp,PCB_EBP(%ecx)
435 movl %esi,PCB_ESI(%ecx)
436 movl %edi,PCB_EDI(%ecx)
440 * If npxthread == NULL, then the npx h/w state is irrelevant and the
441 * state had better already be in the pcb. This is true for forks
442 * but not for dumps (the old book-keeping with FP flags in the pcb
443 * always lost for dumps because the dump pcb has 0 flags).
445 * If npxthread != NULL, then we have to save the npx h/w state to
446 * npxthread's pcb and copy it to the requested pcb, or save to the
447 * requested pcb and reload. Copying is easier because we would
448 * have to handle h/w bugs for reloading. We used to lose the
449 * parent's npx state for forks by forgetting to reload.
451 movl PCPU(npxthread),%eax
455 pushl %ecx /* target pcb */
456 movl TD_SAVEFPU(%eax),%eax /* originating savefpu area */
466 pushl $PCB_SAVEFPU_SIZE
467 leal PCB_SAVEFPU(%ecx),%ecx
472 #endif /* NNPX > 0 */
478 * cpu_idle_restore() (current thread in %eax on entry) (one-time execution)
480 * Don't bother setting up any regs other then %ebp so backtraces
481 * don't die. This restore function is used to bootstrap into the
482 * cpu_idle() LWKT only, after that cpu_lwkt_*() will be used for
485 * Clear TDF_RUNNING in old thread only after we've cleaned up %cr3.
486 * This only occurs during system boot so no special handling is
487 * required for migration.
489 * If we are an AP we have to call ap_init() before jumping to
490 * cpu_idle(). ap_init() will synchronize with the BP and finish
491 * setting up various ncpu-dependant globaldata fields. This may
492 * happen on UP as well as SMP if we happen to be simulating multiple
495 ENTRY(cpu_idle_restore)
499 andl $~TDF_RUNNING,TD_FLAGS(%ebx)
500 orl $TDF_RUNNING,TD_FLAGS(%eax) /* manual, no switch_return */
509 * cpu_kthread_restore() (current thread is %eax on entry) (one-time execution)
511 * Don't bother setting up any regs other then %ebp so backtraces
512 * don't die. This restore function is used to bootstrap into an
513 * LWKT based kernel thread only. cpu_lwkt_switch() will be used
516 * Since all of our context is on the stack we are reentrant and
517 * we can release our critical section and enable interrupts early.
519 * Because this switch target does not 'return' to lwkt_switch()
520 * we have to call lwkt_switch_return(otd) to clean up otd.
523 ENTRY(cpu_kthread_restore)
525 movl TD_PCB(%eax),%esi
529 pushl %ebx /* argument to lwkt_switch_return */
530 call lwkt_switch_return
533 decl TD_CRITCOUNT(%eax)
534 popl %eax /* kthread exit function */
535 pushl PCB_EBX(%esi) /* argument to ESI function */
536 pushl %eax /* set exit func as return address */
537 movl PCB_ESI(%esi),%eax
543 * Standard LWKT switching function. Only non-scratch registers are
544 * saved and we don't bother with the MMU state or anything else.
546 * This function is always called while in a critical section.
548 * There is a one-instruction window where curthread is the new
549 * thread but %esp still points to the old thread's stack, but
550 * we are protected by a critical section so it is ok.
554 ENTRY(cpu_lwkt_switch)
555 pushl %ebp /* note: GDB hacked to locate ebp relative to td_sp */
557 movl PCPU(curthread),%ebx
561 /* warning: adjust movl into %eax below if you change the pushes */
565 * Save the FP state if we have used the FP. Note that calling
566 * npxsave will NULL out PCPU(npxthread).
568 * We have to deal with the FP state for LWKT threads in case they
569 * happen to get preempted or block while doing an optimized
570 * bzero/bcopy/memcpy.
572 cmpl %ebx,PCPU(npxthread)
574 pushl TD_SAVEFPU(%ebx)
575 call npxsave /* do it in a big C function */
576 addl $4,%esp /* EAX, ECX, EDX trashed */
578 #endif /* NNPX > 0 */
580 movl 4+20(%esp),%eax /* switch to this thread */
581 pushl $cpu_lwkt_restore
582 movl %esp,TD_SP(%ebx)
583 movl %eax,PCPU(curthread)
584 movl TD_SP(%eax),%esp
587 * eax contains new thread, ebx contains old thread.
592 * cpu_lwkt_restore() (current thread in %eax on entry)
594 * Standard LWKT restore function. This function is always called
595 * while in a critical section.
597 * Warning: due to preemption the restore function can be used to
598 * 'return' to the original thread. Interrupt disablement must be
599 * protected through the switch so we cannot run splz here.
601 ENTRY(cpu_lwkt_restore)
603 * NOTE: %ebx is the previous thread and %eax is the new thread.
604 * %ebx is retained throughout so we can return it.
606 * lwkt_switch[_return] is responsible for handling TDF_RUNNING.
619 * Make AP become the idle loop.
621 ENTRY(bootstrap_idle)
622 movl PCPU(curthread),%eax
624 movl TD_SP(%eax),%esp