2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.135 2008/08/02 01:14:43 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
69 #include <sys/reboot.h>
71 #include <sys/msgbuf.h>
72 #include <sys/sysent.h>
73 #include <sys/sysctl.h>
74 #include <sys/vmmeter.h>
76 #include <sys/upcall.h>
77 #include <sys/usched.h>
81 #include <vm/vm_param.h>
83 #include <vm/vm_kern.h>
84 #include <vm/vm_object.h>
85 #include <vm/vm_page.h>
86 #include <vm/vm_map.h>
87 #include <vm/vm_pager.h>
88 #include <vm/vm_extern.h>
90 #include <sys/thread2.h>
98 #include <machine/cpu.h>
99 #include <machine/clock.h>
100 #include <machine/specialreg.h>
101 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
107 #include <machine/perfmon.h>
109 #include <machine/cputypes.h>
112 #include <bus/isa/isa_device.h>
114 #include <machine_base/isa/intr_machdep.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #define PHYSMAP_ENTRIES 10
123 extern void init386(int first);
124 extern void dblfault_handler(void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup(void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
143 int _udatasel, _ucodesel;
146 int64_t tsc_offsets[MAXCPU];
148 int64_t tsc_offsets[1];
151 #if defined(SWTCH_OPTIM_STATS)
152 extern int swtch_optim_stats;
153 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
154 CTLFLAG_RD, &swtch_optim_stats, 0, "");
155 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
156 CTLFLAG_RD, &tlb_flush_count, 0, "");
161 u_long ebda_addr = 0;
164 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
174 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - vmstats.v_wire_count), req);
181 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
185 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
192 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
195 vm_paddr_t Maxmem = 0;
197 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
199 static vm_offset_t buffer_sva, buffer_eva;
200 vm_offset_t clean_sva, clean_eva;
201 static vm_offset_t pager_sva, pager_eva;
202 static struct trapframe proc0_tf;
205 cpu_startup(void *dummy)
209 vm_offset_t firstaddr;
211 if (boothowto & RB_VERBOSE)
215 * Good {morning,afternoon,evening,night}.
217 kprintf("%s", version);
220 panicifcpuunsupported();
224 kprintf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
226 * Display any holes after the first chunk of extended memory.
231 kprintf("Physical memory chunk(s):\n");
232 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
233 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
235 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
236 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
242 * Allocate space for system data structures.
243 * The first available kernel virtual address is in "v".
244 * As pages of kernel virtual memory are allocated, "v" is incremented.
245 * As pages of memory are allocated and cleared,
246 * "firstaddr" is incremented.
247 * An index into the kernel page table corresponding to the
248 * virtual memory address maintained in "v" is kept in "mapaddr".
252 * Make two passes. The first pass calculates how much memory is
253 * needed and allocates it. The second pass assigns virtual
254 * addresses to the various data structures.
258 v = (caddr_t)firstaddr;
260 #define valloc(name, type, num) \
261 (name) = (type *)v; v = (caddr_t)((name)+(num))
262 #define valloclim(name, type, num, lim) \
263 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
266 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
267 * For the first 64MB of ram nominally allocate sufficient buffers to
268 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
269 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
270 * the buffer cache we limit the eventual kva reservation to
273 * factor represents the 1/4 x ram conversion.
276 int factor = 4 * BKVASIZE / 1024;
277 int kbytes = physmem * (PAGE_SIZE / 1024);
281 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
283 nbuf += (kbytes - 65536) * 2 / (factor * 5);
284 if (maxbcache && nbuf > maxbcache / BKVASIZE)
285 nbuf = maxbcache / BKVASIZE;
289 * Do not allow the buffer_map to be more then 1/2 the size of the
292 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
293 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
294 kprintf("Warning: nbufs capped at %d\n", nbuf);
297 nswbuf = max(min(nbuf/4, 256), 16);
299 if (nswbuf < NSWBUF_MIN)
306 valloc(swbuf, struct buf, nswbuf);
307 valloc(buf, struct buf, nbuf);
310 * End of first pass, size has been calculated so allocate memory
312 if (firstaddr == 0) {
313 size = (vm_size_t)(v - firstaddr);
314 firstaddr = kmem_alloc(&kernel_map, round_page(size));
316 panic("startup: no room for tables");
321 * End of second pass, addresses have been assigned
323 if ((vm_size_t)(v - firstaddr) != size)
324 panic("startup: table size inconsistency");
326 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
327 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
328 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
330 buffer_map.system_map = 1;
331 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
332 (nswbuf*MAXPHYS) + pager_map_size);
333 pager_map.system_map = 1;
335 #if defined(USERCONFIG)
337 cninit(); /* the preferred console may have changed */
340 kprintf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
341 ptoa(vmstats.v_free_count) / 1024);
344 * Set up buffers, so they can be used to read disk labels.
347 vm_pager_bufferinit();
351 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
353 mp_start(); /* fire up the APs and APICs */
360 * Send an interrupt to process.
362 * Stack is set up to allow sigcode stored
363 * at top to call routine, followed by kcall
364 * to sigreturn routine below. After sigreturn
365 * resets the signal mask, the stack, and the
366 * frame pointer, it returns to the user
370 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
372 struct lwp *lp = curthread->td_lwp;
373 struct proc *p = lp->lwp_proc;
374 struct trapframe *regs;
375 struct sigacts *psp = p->p_sigacts;
376 struct sigframe sf, *sfp;
379 regs = lp->lwp_md.md_regs;
380 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
382 /* save user context */
383 bzero(&sf, sizeof(struct sigframe));
384 sf.sf_uc.uc_sigmask = *mask;
385 sf.sf_uc.uc_stack = lp->lwp_sigstk;
386 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
387 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
389 /* make the size of the saved context visible to userland */
390 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
392 /* save mailbox pending state for syscall interlock semantics */
393 if (p->p_flag & P_MAILBOX)
394 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
396 /* Allocate and validate space for the signal handler context. */
397 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
398 SIGISMEMBER(psp->ps_sigonstack, sig)) {
399 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
400 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
401 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
403 sfp = (struct sigframe *)regs->tf_esp - 1;
406 /* Translate the signal is appropriate */
407 if (p->p_sysent->sv_sigtbl) {
408 if (sig <= p->p_sysent->sv_sigsize)
409 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
412 /* Build the argument list for the signal handler. */
414 sf.sf_ucontext = (register_t)&sfp->sf_uc;
415 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
416 /* Signal handler installed with SA_SIGINFO. */
417 sf.sf_siginfo = (register_t)&sfp->sf_si;
418 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
420 /* fill siginfo structure */
421 sf.sf_si.si_signo = sig;
422 sf.sf_si.si_code = code;
423 sf.sf_si.si_addr = (void*)regs->tf_err;
426 /* Old FreeBSD-style arguments. */
427 sf.sf_siginfo = code;
428 sf.sf_addr = regs->tf_err;
429 sf.sf_ahu.sf_handler = catcher;
433 * If we're a vm86 process, we want to save the segment registers.
434 * We also change eflags to be our emulated eflags, not the actual
437 if (regs->tf_eflags & PSL_VM) {
438 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
439 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
441 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
442 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
443 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
444 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
446 if (vm86->vm86_has_vme == 0)
447 sf.sf_uc.uc_mcontext.mc_eflags =
448 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
449 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
452 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
453 * syscalls made by the signal handler. This just avoids
454 * wasting time for our lazy fixup of such faults. PSL_NT
455 * does nothing in vm86 mode, but vm86 programs can set it
456 * almost legitimately in probes for old cpu types.
458 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
462 * Save the FPU state and reinit the FP unit
464 npxpush(&sf.sf_uc.uc_mcontext);
467 * Copy the sigframe out to the user's stack.
469 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
471 * Something is wrong with the stack pointer.
472 * ...Kill the process.
477 regs->tf_esp = (int)sfp;
478 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
481 * i386 abi specifies that the direction flag must be cleared
484 regs->tf_eflags &= ~(PSL_T|PSL_D);
486 regs->tf_cs = _ucodesel;
487 regs->tf_ds = _udatasel;
488 regs->tf_es = _udatasel;
491 * Allow the signal handler to inherit %fs in addition to %gs as
492 * the userland program might be using both.
494 * However, if a T_PROTFLT occured the segment registers could be
495 * totally broken. They must be reset in order to be able to
496 * return to userland.
498 if (regs->tf_trapno == T_PROTFLT) {
499 regs->tf_fs = _udatasel;
500 regs->tf_gs = _udatasel;
502 regs->tf_ss = _udatasel;
506 * Sanitize the trapframe for a virtual kernel passing control to a custom
507 * VM context. Remove any items that would otherwise create a privilage
510 * XXX at the moment we allow userland to set the resume flag. Is this a
514 cpu_sanitize_frame(struct trapframe *frame)
516 frame->tf_cs = _ucodesel;
517 frame->tf_ds = _udatasel;
518 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
520 frame->tf_fs = _udatasel;
521 frame->tf_gs = _udatasel;
523 frame->tf_ss = _udatasel;
524 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
525 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
530 cpu_sanitize_tls(struct savetls *tls)
532 struct segment_descriptor *desc;
535 for (i = 0; i < NGTLS; ++i) {
537 if (desc->sd_dpl == 0 && desc->sd_type == 0)
539 if (desc->sd_def32 == 0)
541 if (desc->sd_type != SDT_MEMRWA)
543 if (desc->sd_dpl != SEL_UPL)
545 if (desc->sd_xx != 0 || desc->sd_p != 1)
552 * sigreturn(ucontext_t *sigcntxp)
554 * System call to cleanup state after a signal
555 * has been taken. Reset signal mask and
556 * stack state from context left by sendsig (above).
557 * Return to previous pc and psl as specified by
558 * context left by sendsig. Check carefully to
559 * make sure that the user has not modified the
560 * state to gain improper privileges.
562 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
563 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
566 sys_sigreturn(struct sigreturn_args *uap)
568 struct lwp *lp = curthread->td_lwp;
569 struct proc *p = lp->lwp_proc;
570 struct trapframe *regs;
578 * We have to copy the information into kernel space so userland
579 * can't modify it while we are sniffing it.
581 regs = lp->lwp_md.md_regs;
582 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
586 eflags = ucp->uc_mcontext.mc_eflags;
588 if (eflags & PSL_VM) {
589 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
590 struct vm86_kernel *vm86;
593 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
594 * set up the vm86 area, and we can't enter vm86 mode.
596 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
598 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
599 if (vm86->vm86_inited == 0)
602 /* go back to user mode if both flags are set */
603 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
604 trapsignal(lp, SIGBUS, 0);
606 if (vm86->vm86_has_vme) {
607 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
608 (eflags & VME_USERCHANGE) | PSL_VM;
610 vm86->vm86_eflags = eflags; /* save VIF, VIP */
611 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
612 (eflags & VM_USERCHANGE) | PSL_VM;
614 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
615 tf->tf_eflags = eflags;
616 tf->tf_vm86_ds = tf->tf_ds;
617 tf->tf_vm86_es = tf->tf_es;
618 tf->tf_vm86_fs = tf->tf_fs;
619 tf->tf_vm86_gs = tf->tf_gs;
620 tf->tf_ds = _udatasel;
621 tf->tf_es = _udatasel;
623 tf->tf_fs = _udatasel;
624 tf->tf_gs = _udatasel;
628 * Don't allow users to change privileged or reserved flags.
631 * XXX do allow users to change the privileged flag PSL_RF.
632 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
633 * should sometimes set it there too. tf_eflags is kept in
634 * the signal context during signal handling and there is no
635 * other place to remember it, so the PSL_RF bit may be
636 * corrupted by the signal handler without us knowing.
637 * Corruption of the PSL_RF bit at worst causes one more or
638 * one less debugger trap, so allowing it is fairly harmless.
640 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
641 kprintf("sigreturn: eflags = 0x%x\n", eflags);
646 * Don't allow users to load a valid privileged %cs. Let the
647 * hardware check for invalid selectors, excess privilege in
648 * other selectors, invalid %eip's and invalid %esp's.
650 cs = ucp->uc_mcontext.mc_cs;
651 if (!CS_SECURE(cs)) {
652 kprintf("sigreturn: cs = 0x%x\n", cs);
653 trapsignal(lp, SIGBUS, T_PROTFLT);
656 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
660 * Restore the FPU state from the frame
662 npxpop(&ucp->uc_mcontext);
665 * Merge saved signal mailbox pending flag to maintain interlock
666 * semantics against system calls.
668 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
669 p->p_flag |= P_MAILBOX;
671 if (ucp->uc_mcontext.mc_onstack & 1)
672 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
674 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
676 lp->lwp_sigmask = ucp->uc_sigmask;
677 SIG_CANTMASK(lp->lwp_sigmask);
682 * Stack frame on entry to function. %eax will contain the function vector,
683 * %ecx will contain the function data. flags, ecx, and eax will have
684 * already been pushed on the stack.
695 sendupcall(struct vmupcall *vu, int morepending)
697 struct lwp *lp = curthread->td_lwp;
698 struct trapframe *regs;
699 struct upcall upcall;
700 struct upc_frame upc_frame;
704 * If we are a virtual kernel running an emulated user process
705 * context, switch back to the virtual kernel context before
706 * trying to post the signal.
708 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
709 lp->lwp_md.md_regs->tf_trapno = 0;
710 vkernel_trap(lp, lp->lwp_md.md_regs);
714 * Get the upcall data structure
716 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
717 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
720 kprintf("bad upcall address\n");
725 * If the data structure is already marked pending or has a critical
726 * section count, mark the data structure as pending and return
727 * without doing an upcall. vu_pending is left set.
729 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
730 if (upcall.upc_pending < vu->vu_pending) {
731 upcall.upc_pending = vu->vu_pending;
732 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
733 sizeof(upcall.upc_pending));
739 * We can run this upcall now, clear vu_pending.
741 * Bump our critical section count and set or clear the
742 * user pending flag depending on whether more upcalls are
743 * pending. The user will be responsible for calling
744 * upc_dispatch(-1) to process remaining upcalls.
747 upcall.upc_pending = morepending;
748 crit_count += TDPRI_CRIT;
749 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
750 sizeof(upcall.upc_pending));
751 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
755 * Construct a stack frame and issue the upcall
757 regs = lp->lwp_md.md_regs;
758 upc_frame.eax = regs->tf_eax;
759 upc_frame.ecx = regs->tf_ecx;
760 upc_frame.edx = regs->tf_edx;
761 upc_frame.flags = regs->tf_eflags;
762 upc_frame.oldip = regs->tf_eip;
763 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
764 sizeof(upc_frame)) != 0) {
765 kprintf("bad stack on upcall\n");
767 regs->tf_eax = (register_t)vu->vu_func;
768 regs->tf_ecx = (register_t)vu->vu_data;
769 regs->tf_edx = (register_t)lp->lwp_upcall;
770 regs->tf_eip = (register_t)vu->vu_ctx;
771 regs->tf_esp -= sizeof(upc_frame);
776 * fetchupcall occurs in the context of a system call, which means that
777 * we have to return EJUSTRETURN in order to prevent eax and edx from
778 * being overwritten by the syscall return value.
780 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
781 * and the function pointer in %eax.
784 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
786 struct upc_frame upc_frame;
787 struct lwp *lp = curthread->td_lwp;
788 struct trapframe *regs;
790 struct upcall upcall;
793 regs = lp->lwp_md.md_regs;
795 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
799 * This jumps us to the next ready context.
802 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
805 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
806 crit_count += TDPRI_CRIT;
808 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
809 regs->tf_eax = (register_t)vu->vu_func;
810 regs->tf_ecx = (register_t)vu->vu_data;
811 regs->tf_edx = (register_t)lp->lwp_upcall;
812 regs->tf_eip = (register_t)vu->vu_ctx;
813 regs->tf_esp = (register_t)rsp;
816 * This returns us to the originally interrupted code.
818 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
819 regs->tf_eax = upc_frame.eax;
820 regs->tf_ecx = upc_frame.ecx;
821 regs->tf_edx = upc_frame.edx;
822 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
823 (upc_frame.flags & PSL_USERCHANGE);
824 regs->tf_eip = upc_frame.oldip;
825 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
834 * Machine dependent boot() routine
836 * I haven't seen anything to put here yet
837 * Possibly some stuff might be grafted back here from boot()
845 * Shutdown the CPU as much as possible
851 __asm__ __volatile("hlt");
855 * cpu_idle() represents the idle LWKT. You cannot return from this function
856 * (unless you want to blow things up!). Instead we look for runnable threads
857 * and loop or halt as appropriate. Giant is not held on entry to the thread.
859 * The main loop is entered with a critical section held, we must release
860 * the critical section before doing anything else. lwkt_switch() will
861 * check for pending interrupts due to entering and exiting its own
864 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
865 * to wake a HLTed cpu up. However, there are cases where the idlethread
866 * will be entered with the possibility that no IPI will occur and in such
867 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
869 static int cpu_idle_hlt = 1;
870 static int cpu_idle_hltcnt;
871 static int cpu_idle_spincnt;
872 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
873 &cpu_idle_hlt, 0, "Idle loop HLT enable");
874 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
875 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
876 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
877 &cpu_idle_spincnt, 0, "Idle loop entry spins");
880 cpu_idle_default_hook(void)
883 * We must guarentee that hlt is exactly the instruction
886 __asm __volatile("sti; hlt");
889 /* Other subsystems (e.g., ACPI) can hook this later. */
890 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
895 struct thread *td = curthread;
898 KKASSERT(td->td_pri < TDPRI_CRIT);
901 * See if there are any LWKTs ready to go.
906 * If we are going to halt call splz unconditionally after
907 * CLIing to catch any interrupt races. Note that we are
908 * at SPL0 and interrupts are enabled.
910 if (cpu_idle_hlt && !lwkt_runnable() &&
911 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
912 __asm __volatile("cli");
914 if (!lwkt_runnable())
918 __asm __volatile("pause");
922 td->td_flags &= ~TDF_IDLE_NOHLT;
925 __asm __volatile("sti; pause");
927 __asm __volatile("sti");
935 * This routine is called when the only runnable threads require
936 * the MP lock, and the scheduler couldn't get it. On a real cpu
937 * we let the scheduler spin.
940 cpu_mplock_contested(void)
946 * This routine is called if a spinlock has been held through the
947 * exponential backoff period and is seriously contested. On a real cpu
951 cpu_spinlock_contested(void)
957 * Clear registers on exec
960 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
962 struct thread *td = curthread;
963 struct lwp *lp = td->td_lwp;
964 struct pcb *pcb = td->td_pcb;
965 struct trapframe *regs = lp->lwp_md.md_regs;
967 /* was i386_user_cleanup() in NetBSD */
970 bzero((char *)regs, sizeof(struct trapframe));
971 regs->tf_eip = entry;
972 regs->tf_esp = stack;
973 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
974 regs->tf_ss = _udatasel;
975 regs->tf_ds = _udatasel;
976 regs->tf_es = _udatasel;
977 regs->tf_fs = _udatasel;
978 regs->tf_gs = _udatasel;
979 regs->tf_cs = _ucodesel;
981 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
982 regs->tf_ebx = ps_strings;
985 * Reset the hardware debug registers if they were in use.
986 * They won't have any meaning for the newly exec'd process.
988 if (pcb->pcb_flags & PCB_DBREGS) {
995 if (pcb == td->td_pcb) {
997 * Clear the debug registers on the running
998 * CPU, otherwise they will end up affecting
999 * the next process we switch to.
1003 pcb->pcb_flags &= ~PCB_DBREGS;
1007 * Initialize the math emulator (if any) for the current process.
1008 * Actually, just clear the bit that says that the emulator has
1009 * been initialized. Initialization is delayed until the process
1010 * traps to the emulator (if it is done at all) mainly because
1011 * emulators don't provide an entry point for initialization.
1013 pcb->pcb_flags &= ~FP_SOFTFP;
1016 * note: do not set CR0_TS here. npxinit() must do it after clearing
1017 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1021 load_cr0(rcr0() | CR0_MP);
1024 /* Initialize the npx (if any) for the current process. */
1025 npxinit(__INITIAL_NPXCW__);
1030 * note: linux emulator needs edx to be 0x0 on entry, which is
1031 * handled in execve simply by setting the 64 bit syscall
1032 * return value to 0.
1042 cr0 |= CR0_NE; /* Done by npxinit() */
1043 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1044 cr0 |= CR0_WP | CR0_AM;
1050 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1053 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1055 if (!error && req->newptr)
1060 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1061 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1063 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1064 CTLFLAG_RW, &disable_rtc_set, 0, "");
1066 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1067 CTLFLAG_RD, &bootinfo, bootinfo, "");
1069 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1070 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1072 extern u_long bootdev; /* not a cdev_t - encoding is different */
1073 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1074 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1077 * Initialize 386 and configure to run kernel
1081 * Initialize segments & interrupt table
1085 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1086 static struct gate_descriptor idt0[NIDT];
1087 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1088 union descriptor ldt[NLDT]; /* local descriptor table */
1090 /* table descriptors - used to load tables by cpu */
1091 struct region_descriptor r_gdt, r_idt;
1093 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1094 extern int has_f00f_bug;
1097 static struct i386tss dblfault_tss;
1098 static char dblfault_stack[PAGE_SIZE];
1100 extern struct user *proc0paddr;
1103 /* software prototypes -- in more palatable form */
1104 struct soft_segment_descriptor gdt_segs[] = {
1105 /* GNULL_SEL 0 Null Descriptor */
1106 { 0x0, /* segment base address */
1108 0, /* segment type */
1109 0, /* segment descriptor priority level */
1110 0, /* segment descriptor present */
1112 0, /* default 32 vs 16 bit size */
1113 0 /* limit granularity (byte/page units)*/ },
1114 /* GCODE_SEL 1 Code Descriptor for kernel */
1115 { 0x0, /* segment base address */
1116 0xfffff, /* length - all address space */
1117 SDT_MEMERA, /* segment type */
1118 0, /* segment descriptor priority level */
1119 1, /* segment descriptor present */
1121 1, /* default 32 vs 16 bit size */
1122 1 /* limit granularity (byte/page units)*/ },
1123 /* GDATA_SEL 2 Data Descriptor for kernel */
1124 { 0x0, /* segment base address */
1125 0xfffff, /* length - all address space */
1126 SDT_MEMRWA, /* segment type */
1127 0, /* segment descriptor priority level */
1128 1, /* segment descriptor present */
1130 1, /* default 32 vs 16 bit size */
1131 1 /* limit granularity (byte/page units)*/ },
1132 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1133 { 0x0, /* segment base address */
1134 0xfffff, /* length - all address space */
1135 SDT_MEMRWA, /* segment type */
1136 0, /* segment descriptor priority level */
1137 1, /* segment descriptor present */
1139 1, /* default 32 vs 16 bit size */
1140 1 /* limit granularity (byte/page units)*/ },
1141 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1143 0x0, /* segment base address */
1144 sizeof(struct i386tss)-1,/* length - all address space */
1145 SDT_SYS386TSS, /* segment type */
1146 0, /* segment descriptor priority level */
1147 1, /* segment descriptor present */
1149 0, /* unused - default 32 vs 16 bit size */
1150 0 /* limit granularity (byte/page units)*/ },
1151 /* GLDT_SEL 5 LDT Descriptor */
1152 { (int) ldt, /* segment base address */
1153 sizeof(ldt)-1, /* length - all address space */
1154 SDT_SYSLDT, /* segment type */
1155 SEL_UPL, /* segment descriptor priority level */
1156 1, /* segment descriptor present */
1158 0, /* unused - default 32 vs 16 bit size */
1159 0 /* limit granularity (byte/page units)*/ },
1160 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1161 { (int) ldt, /* segment base address */
1162 (512 * sizeof(union descriptor)-1), /* length */
1163 SDT_SYSLDT, /* segment type */
1164 0, /* segment descriptor priority level */
1165 1, /* segment descriptor present */
1167 0, /* unused - default 32 vs 16 bit size */
1168 0 /* limit granularity (byte/page units)*/ },
1169 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1170 { 0x0, /* segment base address */
1171 0x0, /* length - all address space */
1172 0, /* segment type */
1173 0, /* segment descriptor priority level */
1174 0, /* segment descriptor present */
1176 0, /* default 32 vs 16 bit size */
1177 0 /* limit granularity (byte/page units)*/ },
1178 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1179 { 0x400, /* segment base address */
1180 0xfffff, /* length */
1181 SDT_MEMRWA, /* segment type */
1182 0, /* segment descriptor priority level */
1183 1, /* segment descriptor present */
1185 1, /* default 32 vs 16 bit size */
1186 1 /* limit granularity (byte/page units)*/ },
1187 /* GPANIC_SEL 9 Panic Tss Descriptor */
1188 { (int) &dblfault_tss, /* segment base address */
1189 sizeof(struct i386tss)-1,/* length - all address space */
1190 SDT_SYS386TSS, /* segment type */
1191 0, /* segment descriptor priority level */
1192 1, /* segment descriptor present */
1194 0, /* unused - default 32 vs 16 bit size */
1195 0 /* limit granularity (byte/page units)*/ },
1196 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1197 { 0, /* segment base address (overwritten) */
1198 0xfffff, /* length */
1199 SDT_MEMERA, /* segment type */
1200 0, /* segment descriptor priority level */
1201 1, /* segment descriptor present */
1203 0, /* default 32 vs 16 bit size */
1204 1 /* limit granularity (byte/page units)*/ },
1205 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1206 { 0, /* segment base address (overwritten) */
1207 0xfffff, /* length */
1208 SDT_MEMERA, /* segment type */
1209 0, /* segment descriptor priority level */
1210 1, /* segment descriptor present */
1212 0, /* default 32 vs 16 bit size */
1213 1 /* limit granularity (byte/page units)*/ },
1214 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1215 { 0, /* segment base address (overwritten) */
1216 0xfffff, /* length */
1217 SDT_MEMRWA, /* segment type */
1218 0, /* segment descriptor priority level */
1219 1, /* segment descriptor present */
1221 1, /* default 32 vs 16 bit size */
1222 1 /* limit granularity (byte/page units)*/ },
1223 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1224 { 0, /* segment base address (overwritten) */
1225 0xfffff, /* length */
1226 SDT_MEMRWA, /* segment type */
1227 0, /* segment descriptor priority level */
1228 1, /* segment descriptor present */
1230 0, /* default 32 vs 16 bit size */
1231 1 /* limit granularity (byte/page units)*/ },
1232 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1233 { 0, /* segment base address (overwritten) */
1234 0xfffff, /* length */
1235 SDT_MEMRWA, /* segment type */
1236 0, /* segment descriptor priority level */
1237 1, /* segment descriptor present */
1239 0, /* default 32 vs 16 bit size */
1240 1 /* limit granularity (byte/page units)*/ },
1241 /* GTLS_START 15 TLS */
1242 { 0x0, /* segment base address */
1244 0, /* segment type */
1245 0, /* segment descriptor priority level */
1246 0, /* segment descriptor present */
1248 0, /* default 32 vs 16 bit size */
1249 0 /* limit granularity (byte/page units)*/ },
1250 /* GTLS_START+1 16 TLS */
1251 { 0x0, /* segment base address */
1253 0, /* segment type */
1254 0, /* segment descriptor priority level */
1255 0, /* segment descriptor present */
1257 0, /* default 32 vs 16 bit size */
1258 0 /* limit granularity (byte/page units)*/ },
1259 /* GTLS_END 17 TLS */
1260 { 0x0, /* segment base address */
1262 0, /* segment type */
1263 0, /* segment descriptor priority level */
1264 0, /* segment descriptor present */
1266 0, /* default 32 vs 16 bit size */
1267 0 /* limit granularity (byte/page units)*/ },
1270 static struct soft_segment_descriptor ldt_segs[] = {
1271 /* Null Descriptor - overwritten by call gate */
1272 { 0x0, /* segment base address */
1273 0x0, /* length - all address space */
1274 0, /* segment type */
1275 0, /* segment descriptor priority level */
1276 0, /* segment descriptor present */
1278 0, /* default 32 vs 16 bit size */
1279 0 /* limit granularity (byte/page units)*/ },
1280 /* Null Descriptor - overwritten by call gate */
1281 { 0x0, /* segment base address */
1282 0x0, /* length - all address space */
1283 0, /* segment type */
1284 0, /* segment descriptor priority level */
1285 0, /* segment descriptor present */
1287 0, /* default 32 vs 16 bit size */
1288 0 /* limit granularity (byte/page units)*/ },
1289 /* Null Descriptor - overwritten by call gate */
1290 { 0x0, /* segment base address */
1291 0x0, /* length - all address space */
1292 0, /* segment type */
1293 0, /* segment descriptor priority level */
1294 0, /* segment descriptor present */
1296 0, /* default 32 vs 16 bit size */
1297 0 /* limit granularity (byte/page units)*/ },
1298 /* Code Descriptor for user */
1299 { 0x0, /* segment base address */
1300 0xfffff, /* length - all address space */
1301 SDT_MEMERA, /* segment type */
1302 SEL_UPL, /* segment descriptor priority level */
1303 1, /* segment descriptor present */
1305 1, /* default 32 vs 16 bit size */
1306 1 /* limit granularity (byte/page units)*/ },
1307 /* Null Descriptor - overwritten by call gate */
1308 { 0x0, /* segment base address */
1309 0x0, /* length - all address space */
1310 0, /* segment type */
1311 0, /* segment descriptor priority level */
1312 0, /* segment descriptor present */
1314 0, /* default 32 vs 16 bit size */
1315 0 /* limit granularity (byte/page units)*/ },
1316 /* Data Descriptor for user */
1317 { 0x0, /* segment base address */
1318 0xfffff, /* length - all address space */
1319 SDT_MEMRWA, /* segment type */
1320 SEL_UPL, /* segment descriptor priority level */
1321 1, /* segment descriptor present */
1323 1, /* default 32 vs 16 bit size */
1324 1 /* limit granularity (byte/page units)*/ },
1328 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1330 struct gate_descriptor *ip;
1333 ip->gd_looffset = (int)func;
1334 ip->gd_selector = selec;
1340 ip->gd_hioffset = ((int)func)>>16 ;
1343 #define IDTVEC(name) __CONCAT(X,name)
1346 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1347 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1348 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1349 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1350 IDTVEC(xmm), IDTVEC(syscall),
1353 IDTVEC(int0x80_syscall);
1355 #ifdef DEBUG_INTERRUPTS
1356 extern inthand_t *Xrsvdary[256];
1360 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1362 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1363 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1364 ssd->ssd_type = sd->sd_type;
1365 ssd->ssd_dpl = sd->sd_dpl;
1366 ssd->ssd_p = sd->sd_p;
1367 ssd->ssd_def32 = sd->sd_def32;
1368 ssd->ssd_gran = sd->sd_gran;
1372 * Populate the (physmap) array with base/bound pairs describing the
1373 * available physical memory in the system, then test this memory and
1374 * build the phys_avail array describing the actually-available memory.
1376 * If we cannot accurately determine the physical memory map, then use
1377 * value from the 0xE801 call, and failing that, the RTC.
1379 * Total memory size may be set by the kernel environment variable
1380 * hw.physmem or the compile-time define MAXMEM.
1383 getmemsize(int first)
1385 int i, physmap_idx, pa_indx;
1387 u_int basemem, extmem;
1388 struct vm86frame vmf;
1389 struct vm86context vmc;
1391 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1399 quad_t dcons_addr, dcons_size;
1401 bzero(&vmf, sizeof(struct vm86frame));
1402 bzero(physmap, sizeof(physmap));
1406 * Some newer BIOSes has broken INT 12H implementation which cause
1407 * kernel panic immediately. In this case, we need to scan SMAP
1408 * with INT 15:E820 first, then determine base memory size.
1411 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1412 if (hasbrokenint12) {
1417 * Perform "base memory" related probes & setup. If we get a crazy
1418 * value give the bios some scribble space just in case.
1420 vm86_intcall(0x12, &vmf);
1421 basemem = vmf.vmf_ax;
1422 if (basemem > 640) {
1423 kprintf("Preposterous BIOS basemem of %uK, "
1424 "truncating to < 640K\n", basemem);
1429 * XXX if biosbasemem is now < 640, there is a `hole'
1430 * between the end of base memory and the start of
1431 * ISA memory. The hole may be empty or it may
1432 * contain BIOS code or data. Map it read/write so
1433 * that the BIOS can write to it. (Memory from 0 to
1434 * the physical end of the kernel is mapped read-only
1435 * to begin with and then parts of it are remapped.
1436 * The parts that aren't remapped form holes that
1437 * remain read-only and are unused by the kernel.
1438 * The base memory area is below the physical end of
1439 * the kernel and right now forms a read-only hole.
1440 * The part of it from PAGE_SIZE to
1441 * (trunc_page(biosbasemem * 1024) - 1) will be
1442 * remapped and used by the kernel later.)
1444 * This code is similar to the code used in
1445 * pmap_mapdev, but since no memory needs to be
1446 * allocated we simply change the mapping.
1448 for (pa = trunc_page(basemem * 1024);
1449 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1450 pte = vtopte(pa + KERNBASE);
1451 *pte = pa | PG_RW | PG_V;
1455 * if basemem != 640, map pages r/w into vm86 page table so
1456 * that the bios can scribble on it.
1459 for (i = basemem / 4; i < 160; i++)
1460 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1464 * map page 1 R/W into the kernel page table so we can use it
1465 * as a buffer. The kernel will unmap this page later.
1467 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1468 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1471 * get memory map with INT 15:E820
1473 #define SMAPSIZ sizeof(*smap)
1474 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1477 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1478 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1483 vmf.vmf_eax = 0xE820;
1484 vmf.vmf_edx = SMAP_SIG;
1485 vmf.vmf_ecx = SMAPSIZ;
1486 i = vm86_datacall(0x15, &vmf, &vmc);
1487 if (i || vmf.vmf_eax != SMAP_SIG)
1489 if (boothowto & RB_VERBOSE)
1490 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1492 *(u_int32_t *)((char *)&smap->base + 4),
1493 (u_int32_t)smap->base,
1494 *(u_int32_t *)((char *)&smap->length + 4),
1495 (u_int32_t)smap->length);
1497 if (smap->type != 0x01)
1500 if (smap->length == 0)
1503 if (smap->base >= 0xffffffff) {
1504 kprintf("%uK of memory above 4GB ignored\n",
1505 (u_int)(smap->length / 1024));
1509 for (i = 0; i <= physmap_idx; i += 2) {
1510 if (smap->base < physmap[i + 1]) {
1511 if (boothowto & RB_VERBOSE)
1513 "Overlapping or non-montonic memory region, ignoring second region\n");
1518 if (smap->base == physmap[physmap_idx + 1]) {
1519 physmap[physmap_idx + 1] += smap->length;
1524 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1526 "Too many segments in the physical address map, giving up\n");
1529 physmap[physmap_idx] = smap->base;
1530 physmap[physmap_idx + 1] = smap->base + smap->length;
1532 ; /* fix GCC3.x warning */
1533 } while (vmf.vmf_ebx != 0);
1536 * Perform "base memory" related probes & setup based on SMAP
1539 for (i = 0; i <= physmap_idx; i += 2) {
1540 if (physmap[i] == 0x00000000) {
1541 basemem = physmap[i + 1] / 1024;
1550 if (basemem > 640) {
1551 kprintf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1556 for (pa = trunc_page(basemem * 1024);
1557 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1558 pte = vtopte(pa + KERNBASE);
1559 *pte = pa | PG_RW | PG_V;
1563 for (i = basemem / 4; i < 160; i++)
1564 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1567 if (physmap[1] != 0)
1571 * If we failed above, try memory map with INT 15:E801
1573 vmf.vmf_ax = 0xE801;
1574 if (vm86_intcall(0x15, &vmf) == 0) {
1575 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1579 vm86_intcall(0x15, &vmf);
1580 extmem = vmf.vmf_ax;
1583 * Prefer the RTC value for extended memory.
1585 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1590 * Special hack for chipsets that still remap the 384k hole when
1591 * there's 16MB of memory - this really confuses people that
1592 * are trying to use bus mastering ISA controllers with the
1593 * "16MB limit"; they only have 16MB, but the remapping puts
1594 * them beyond the limit.
1596 * If extended memory is between 15-16MB (16-17MB phys address range),
1599 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1603 physmap[1] = basemem * 1024;
1605 physmap[physmap_idx] = 0x100000;
1606 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1610 * Now, physmap contains a map of physical memory.
1614 /* make hole for AP bootstrap code YYY */
1615 physmap[1] = mp_bootaddress(physmap[1]);
1617 /* Save EBDA address, if any */
1618 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1623 * Maxmem isn't the "maximum memory", it's one larger than the
1624 * highest page of the physical address space. It should be
1625 * called something like "Maxphyspage". We may adjust this
1626 * based on ``hw.physmem'' and the results of the memory test.
1628 Maxmem = atop(physmap[physmap_idx + 1]);
1631 Maxmem = MAXMEM / 4;
1634 if (kgetenv_quad("hw.physmem", &maxmem))
1635 Maxmem = atop(maxmem);
1637 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1638 (boothowto & RB_VERBOSE))
1639 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1642 * If Maxmem has been increased beyond what the system has detected,
1643 * extend the last memory segment to the new limit.
1645 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1646 physmap[physmap_idx + 1] = ptoa(Maxmem);
1648 /* call pmap initialization to make new kernel address space */
1649 pmap_bootstrap(first, 0);
1652 * Size up each available chunk of physical memory.
1654 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1656 phys_avail[pa_indx++] = physmap[0];
1657 phys_avail[pa_indx] = physmap[0];
1661 * Get dcons buffer address
1663 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1664 kgetenv_quad("dcons.size", &dcons_size) == 0)
1668 * physmap is in bytes, so when converting to page boundaries,
1669 * round up the start address and round down the end address.
1671 for (i = 0; i <= physmap_idx; i += 2) {
1675 if (physmap[i + 1] < end)
1676 end = trunc_page(physmap[i + 1]);
1677 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1682 int *ptr = (int *)CADDR1;
1686 * block out kernel memory as not available.
1688 if (pa >= 0x100000 && pa < first)
1692 * block out dcons buffer
1695 && pa >= trunc_page(dcons_addr)
1696 && pa < dcons_addr + dcons_size)
1702 * map page into kernel: valid, read/write,non-cacheable
1704 *pte = pa | PG_V | PG_RW | PG_N;
1709 * Test for alternating 1's and 0's
1711 *(volatile int *)ptr = 0xaaaaaaaa;
1712 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1716 * Test for alternating 0's and 1's
1718 *(volatile int *)ptr = 0x55555555;
1719 if (*(volatile int *)ptr != 0x55555555) {
1725 *(volatile int *)ptr = 0xffffffff;
1726 if (*(volatile int *)ptr != 0xffffffff) {
1732 *(volatile int *)ptr = 0x0;
1733 if (*(volatile int *)ptr != 0x0) {
1737 * Restore original value.
1742 * Adjust array of valid/good pages.
1744 if (page_bad == TRUE) {
1748 * If this good page is a continuation of the
1749 * previous set of good pages, then just increase
1750 * the end pointer. Otherwise start a new chunk.
1751 * Note that "end" points one higher than end,
1752 * making the range >= start and < end.
1753 * If we're also doing a speculative memory
1754 * test and we at or past the end, bump up Maxmem
1755 * so that we keep going. The first bad page
1756 * will terminate the loop.
1758 if (phys_avail[pa_indx] == pa) {
1759 phys_avail[pa_indx] += PAGE_SIZE;
1762 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1763 kprintf("Too many holes in the physical address space, giving up\n");
1767 phys_avail[pa_indx++] = pa; /* start */
1768 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1778 * The last chunk must contain at least one page plus the message
1779 * buffer to avoid complicating other code (message buffer address
1780 * calculation, etc.).
1782 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1783 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1784 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1785 phys_avail[pa_indx--] = 0;
1786 phys_avail[pa_indx--] = 0;
1789 Maxmem = atop(phys_avail[pa_indx]);
1791 /* Trim off space for the message buffer. */
1792 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1794 avail_end = phys_avail[pa_indx];
1806 * 7 Device Not Available (x87)
1808 * 9 Coprocessor Segment overrun (unsupported, reserved)
1810 * 11 Segment not present
1812 * 13 General Protection
1815 * 16 x87 FP Exception pending
1816 * 17 Alignment Check
1818 * 19 SIMD floating point
1820 * 32-255 INTn/external sources
1825 struct gate_descriptor *gdp;
1826 int gsel_tss, metadata_missing, off, x;
1827 struct mdglobaldata *gd;
1830 * Prevent lowering of the ipl if we call tsleep() early.
1832 gd = &CPU_prvspace[0].mdglobaldata;
1833 bzero(gd, sizeof(*gd));
1835 gd->mi.gd_curthread = &thread0;
1836 thread0.td_gd = &gd->mi;
1838 atdevbase = ISA_HOLE_START + KERNBASE;
1840 metadata_missing = 0;
1841 if (bootinfo.bi_modulep) {
1842 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1843 preload_bootstrap_relocate(KERNBASE);
1845 metadata_missing = 1;
1847 if (bootinfo.bi_envp)
1848 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1851 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1852 * and ncpus_fit_mask remain 0.
1857 /* Init basic tunables, hz etc */
1861 * make gdt memory segments, the code segment goes up to end of the
1862 * page with etext in it, the data segment goes to the end of
1866 * XXX text protection is temporarily (?) disabled. The limit was
1867 * i386_btop(round_page(etext)) - 1.
1869 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1870 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1872 gdt_segs[GPRIV_SEL].ssd_limit =
1873 atop(sizeof(struct privatespace) - 1);
1874 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1875 gdt_segs[GPROC0_SEL].ssd_base =
1876 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1878 gd->mi.gd_prvspace = &CPU_prvspace[0];
1881 * Note: on both UP and SMP curthread must be set non-NULL
1882 * early in the boot sequence because the system assumes
1883 * that 'curthread' is never NULL.
1886 for (x = 0; x < NGDT; x++) {
1888 /* avoid overwriting db entries with APM ones */
1889 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1892 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1895 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1896 r_gdt.rd_base = (int) gdt;
1899 mi_gdinit(&gd->mi, 0);
1901 mi_proc0init(&gd->mi, proc0paddr);
1902 safepri = TDPRI_MAX;
1904 /* make ldt memory segments */
1906 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
1907 * should be spelled ...MAX_USER...
1909 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1910 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1911 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1912 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1914 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1916 gd->gd_currentldt = _default_ldt;
1917 /* spinlocks and the BGL */
1921 * Setup the hardware exception table. Most exceptions use
1922 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
1923 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
1924 * an 'interrupt trap gate', which disables interrupts on entry,
1925 * in order to be able to poll the appropriate CRn register to
1926 * determine the fault address.
1928 for (x = 0; x < NIDT; x++) {
1929 #ifdef DEBUG_INTERRUPTS
1930 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1932 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1935 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1936 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1937 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1938 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1939 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1940 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1941 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1942 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1943 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1944 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1945 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1946 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1947 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1948 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1949 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1950 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1951 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1952 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1953 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1954 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(0x80, &IDTVEC(int0x80_syscall),
1956 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1958 r_idt.rd_limit = sizeof(idt0) - 1;
1959 r_idt.rd_base = (int) idt;
1963 * Initialize the console before we print anything out.
1967 if (metadata_missing)
1968 kprintf("WARNING: loader(8) metadata is missing!\n");
1977 if (boothowto & RB_KDB)
1978 Debugger("Boot flags requested debugger");
1981 finishidentcpu(); /* Final stage of CPU initialization */
1982 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1983 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1984 initializecpu(); /* Initialize CPU registers */
1987 * make an initial tss so cpu can get interrupt stack on syscall!
1988 * The 16 bytes is to save room for a VM86 context.
1990 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
1991 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
1992 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1993 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
1994 gd->gd_common_tssd = *gd->gd_tss_gdt;
1995 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
1998 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
1999 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2000 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2001 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2002 dblfault_tss.tss_cr3 = (int)IdlePTD;
2003 dblfault_tss.tss_eip = (int) dblfault_handler;
2004 dblfault_tss.tss_eflags = PSL_KERNEL;
2005 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2006 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2007 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2008 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2009 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2013 init_param2(physmem);
2015 /* now running on new page tables, configured,and u/iom is accessible */
2017 /* Map the message buffer. */
2018 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2019 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2021 msgbufinit(msgbufp, MSGBUF_SIZE);
2023 /* make a call gate to reenter kernel with */
2024 gdp = &ldt[LSYS5CALLS_SEL].gd;
2026 x = (int) &IDTVEC(syscall);
2027 gdp->gd_looffset = x++;
2028 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2030 gdp->gd_type = SDT_SYS386CGT;
2031 gdp->gd_dpl = SEL_UPL;
2033 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2035 /* XXX does this work? */
2036 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2037 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2039 /* transfer to user mode */
2041 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2042 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2044 /* setup proc 0's pcb */
2045 thread0.td_pcb->pcb_flags = 0;
2046 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2047 thread0.td_pcb->pcb_ext = 0;
2048 lwp0.lwp_md.md_regs = &proc0_tf;
2052 * Initialize machine-dependant portions of the global data structure.
2053 * Note that the global data area and cpu0's idlestack in the private
2054 * data space were allocated in locore.
2056 * Note: the idlethread's cpl is 0
2058 * WARNING! Called from early boot, 'mycpu' may not work yet.
2061 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2064 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2066 lwkt_init_thread(&gd->mi.gd_idlethread,
2067 gd->mi.gd_prvspace->idlestack,
2068 sizeof(gd->mi.gd_prvspace->idlestack),
2069 TDF_MPSAFE, &gd->mi);
2070 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2071 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2072 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2073 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2077 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2079 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2080 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2087 globaldata_find(int cpu)
2089 KKASSERT(cpu >= 0 && cpu < ncpus);
2090 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2093 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2094 static void f00f_hack(void *unused);
2095 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2098 f00f_hack(void *unused)
2100 struct gate_descriptor *new_idt;
2106 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2108 r_idt.rd_limit = sizeof(idt0) - 1;
2110 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2112 panic("kmem_alloc returned 0");
2113 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2114 panic("kmem_alloc returned non-page-aligned memory");
2115 /* Put the first seven entries in the lower page */
2116 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2117 bcopy(idt, new_idt, sizeof(idt0));
2118 r_idt.rd_base = (int)new_idt;
2121 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2122 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2123 panic("vm_map_protect failed");
2126 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2129 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2131 lp->lwp_md.md_regs->tf_eip = addr;
2136 ptrace_single_step(struct lwp *lp)
2138 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2143 fill_regs(struct lwp *lp, struct reg *regs)
2146 struct trapframe *tp;
2148 tp = lp->lwp_md.md_regs;
2149 regs->r_gs = tp->tf_gs;
2150 regs->r_fs = tp->tf_fs;
2151 regs->r_es = tp->tf_es;
2152 regs->r_ds = tp->tf_ds;
2153 regs->r_edi = tp->tf_edi;
2154 regs->r_esi = tp->tf_esi;
2155 regs->r_ebp = tp->tf_ebp;
2156 regs->r_ebx = tp->tf_ebx;
2157 regs->r_edx = tp->tf_edx;
2158 regs->r_ecx = tp->tf_ecx;
2159 regs->r_eax = tp->tf_eax;
2160 regs->r_eip = tp->tf_eip;
2161 regs->r_cs = tp->tf_cs;
2162 regs->r_eflags = tp->tf_eflags;
2163 regs->r_esp = tp->tf_esp;
2164 regs->r_ss = tp->tf_ss;
2165 pcb = lp->lwp_thread->td_pcb;
2170 set_regs(struct lwp *lp, struct reg *regs)
2173 struct trapframe *tp;
2175 tp = lp->lwp_md.md_regs;
2176 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2177 !CS_SECURE(regs->r_cs))
2179 tp->tf_gs = regs->r_gs;
2180 tp->tf_fs = regs->r_fs;
2181 tp->tf_es = regs->r_es;
2182 tp->tf_ds = regs->r_ds;
2183 tp->tf_edi = regs->r_edi;
2184 tp->tf_esi = regs->r_esi;
2185 tp->tf_ebp = regs->r_ebp;
2186 tp->tf_ebx = regs->r_ebx;
2187 tp->tf_edx = regs->r_edx;
2188 tp->tf_ecx = regs->r_ecx;
2189 tp->tf_eax = regs->r_eax;
2190 tp->tf_eip = regs->r_eip;
2191 tp->tf_cs = regs->r_cs;
2192 tp->tf_eflags = regs->r_eflags;
2193 tp->tf_esp = regs->r_esp;
2194 tp->tf_ss = regs->r_ss;
2195 pcb = lp->lwp_thread->td_pcb;
2199 #ifndef CPU_DISABLE_SSE
2201 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2203 struct env87 *penv_87 = &sv_87->sv_env;
2204 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2207 /* FPU control/status */
2208 penv_87->en_cw = penv_xmm->en_cw;
2209 penv_87->en_sw = penv_xmm->en_sw;
2210 penv_87->en_tw = penv_xmm->en_tw;
2211 penv_87->en_fip = penv_xmm->en_fip;
2212 penv_87->en_fcs = penv_xmm->en_fcs;
2213 penv_87->en_opcode = penv_xmm->en_opcode;
2214 penv_87->en_foo = penv_xmm->en_foo;
2215 penv_87->en_fos = penv_xmm->en_fos;
2218 for (i = 0; i < 8; ++i)
2219 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2221 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2225 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2227 struct env87 *penv_87 = &sv_87->sv_env;
2228 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2231 /* FPU control/status */
2232 penv_xmm->en_cw = penv_87->en_cw;
2233 penv_xmm->en_sw = penv_87->en_sw;
2234 penv_xmm->en_tw = penv_87->en_tw;
2235 penv_xmm->en_fip = penv_87->en_fip;
2236 penv_xmm->en_fcs = penv_87->en_fcs;
2237 penv_xmm->en_opcode = penv_87->en_opcode;
2238 penv_xmm->en_foo = penv_87->en_foo;
2239 penv_xmm->en_fos = penv_87->en_fos;
2242 for (i = 0; i < 8; ++i)
2243 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2245 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2247 #endif /* CPU_DISABLE_SSE */
2250 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2252 #ifndef CPU_DISABLE_SSE
2254 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2255 (struct save87 *)fpregs);
2258 #endif /* CPU_DISABLE_SSE */
2259 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2264 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2266 #ifndef CPU_DISABLE_SSE
2268 set_fpregs_xmm((struct save87 *)fpregs,
2269 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2272 #endif /* CPU_DISABLE_SSE */
2273 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2278 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2281 dbregs->dr0 = rdr0();
2282 dbregs->dr1 = rdr1();
2283 dbregs->dr2 = rdr2();
2284 dbregs->dr3 = rdr3();
2285 dbregs->dr4 = rdr4();
2286 dbregs->dr5 = rdr5();
2287 dbregs->dr6 = rdr6();
2288 dbregs->dr7 = rdr7();
2292 pcb = lp->lwp_thread->td_pcb;
2293 dbregs->dr0 = pcb->pcb_dr0;
2294 dbregs->dr1 = pcb->pcb_dr1;
2295 dbregs->dr2 = pcb->pcb_dr2;
2296 dbregs->dr3 = pcb->pcb_dr3;
2299 dbregs->dr6 = pcb->pcb_dr6;
2300 dbregs->dr7 = pcb->pcb_dr7;
2306 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2309 load_dr0(dbregs->dr0);
2310 load_dr1(dbregs->dr1);
2311 load_dr2(dbregs->dr2);
2312 load_dr3(dbregs->dr3);
2313 load_dr4(dbregs->dr4);
2314 load_dr5(dbregs->dr5);
2315 load_dr6(dbregs->dr6);
2316 load_dr7(dbregs->dr7);
2319 struct ucred *ucred;
2321 uint32_t mask1, mask2;
2324 * Don't let an illegal value for dr7 get set. Specifically,
2325 * check for undefined settings. Setting these bit patterns
2326 * result in undefined behaviour and can lead to an unexpected
2329 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2330 i++, mask1 <<= 2, mask2 <<= 2)
2331 if ((dbregs->dr7 & mask1) == mask2)
2334 pcb = lp->lwp_thread->td_pcb;
2335 ucred = lp->lwp_proc->p_ucred;
2338 * Don't let a process set a breakpoint that is not within the
2339 * process's address space. If a process could do this, it
2340 * could halt the system by setting a breakpoint in the kernel
2341 * (if ddb was enabled). Thus, we need to check to make sure
2342 * that no breakpoints are being enabled for addresses outside
2343 * process's address space, unless, perhaps, we were called by
2346 * XXX - what about when the watched area of the user's
2347 * address space is written into from within the kernel
2348 * ... wouldn't that still cause a breakpoint to be generated
2349 * from within kernel mode?
2352 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2353 if (dbregs->dr7 & 0x3) {
2354 /* dr0 is enabled */
2355 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2359 if (dbregs->dr7 & (0x3<<2)) {
2360 /* dr1 is enabled */
2361 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2365 if (dbregs->dr7 & (0x3<<4)) {
2366 /* dr2 is enabled */
2367 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2371 if (dbregs->dr7 & (0x3<<6)) {
2372 /* dr3 is enabled */
2373 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2378 pcb->pcb_dr0 = dbregs->dr0;
2379 pcb->pcb_dr1 = dbregs->dr1;
2380 pcb->pcb_dr2 = dbregs->dr2;
2381 pcb->pcb_dr3 = dbregs->dr3;
2382 pcb->pcb_dr6 = dbregs->dr6;
2383 pcb->pcb_dr7 = dbregs->dr7;
2385 pcb->pcb_flags |= PCB_DBREGS;
2392 * Return > 0 if a hardware breakpoint has been hit, and the
2393 * breakpoint was in user space. Return 0, otherwise.
2396 user_dbreg_trap(void)
2398 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2399 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2400 int nbp; /* number of breakpoints that triggered */
2401 caddr_t addr[4]; /* breakpoint addresses */
2405 if ((dr7 & 0x000000ff) == 0) {
2407 * all GE and LE bits in the dr7 register are zero,
2408 * thus the trap couldn't have been caused by the
2409 * hardware debug registers
2416 bp = dr6 & 0x0000000f;
2420 * None of the breakpoint bits are set meaning this
2421 * trap was not caused by any of the debug registers
2427 * at least one of the breakpoints were hit, check to see
2428 * which ones and if any of them are user space addresses
2432 addr[nbp++] = (caddr_t)rdr0();
2435 addr[nbp++] = (caddr_t)rdr1();
2438 addr[nbp++] = (caddr_t)rdr2();
2441 addr[nbp++] = (caddr_t)rdr3();
2444 for (i=0; i<nbp; i++) {
2446 (caddr_t)VM_MAX_USER_ADDRESS) {
2448 * addr[i] is in user space
2455 * None of the breakpoints are in user space.
2463 Debugger(const char *msg)
2465 kprintf("Debugger(\"%s\") called.\n", msg);
2472 * Provide inb() and outb() as functions. They are normally only
2473 * available as macros calling inlined functions, thus cannot be
2474 * called inside DDB.
2476 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2482 /* silence compiler warnings */
2484 void outb(u_int, u_char);
2491 * We use %%dx and not %1 here because i/o is done at %dx and not at
2492 * %edx, while gcc generates inferior code (movw instead of movl)
2493 * if we tell it to load (u_short) port.
2495 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2500 outb(u_int port, u_char data)
2504 * Use an unnecessary assignment to help gcc's register allocator.
2505 * This make a large difference for gcc-1.40 and a tiny difference
2506 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2507 * best results. gcc-2.6.0 can't handle this.
2510 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2517 #include "opt_cpu.h"
2521 * initialize all the SMP locks
2524 /* critical region when masking or unmasking interupts */
2525 struct spinlock_deprecated imen_spinlock;
2527 /* Make FAST_INTR() routines sequential */
2528 struct spinlock_deprecated fast_intr_spinlock;
2530 /* critical region for old style disable_intr/enable_intr */
2531 struct spinlock_deprecated mpintr_spinlock;
2533 /* critical region around INTR() routines */
2534 struct spinlock_deprecated intr_spinlock;
2536 /* lock region used by kernel profiling */
2537 struct spinlock_deprecated mcount_spinlock;
2539 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2540 struct spinlock_deprecated com_spinlock;
2542 /* locks kernel kprintfs */
2543 struct spinlock_deprecated cons_spinlock;
2545 /* lock regions around the clock hardware */
2546 struct spinlock_deprecated clock_spinlock;
2548 /* lock around the MP rendezvous */
2549 struct spinlock_deprecated smp_rv_spinlock;
2555 * mp_lock = 0; BSP already owns the MP lock
2558 * Get the initial mp_lock with a count of 1 for the BSP.
2559 * This uses a LOGICAL cpu ID, ie BSP == 0.
2562 cpu_get_initial_mplock();
2565 spin_lock_init(&mcount_spinlock);
2566 spin_lock_init(&fast_intr_spinlock);
2567 spin_lock_init(&intr_spinlock);
2568 spin_lock_init(&mpintr_spinlock);
2569 spin_lock_init(&imen_spinlock);
2570 spin_lock_init(&smp_rv_spinlock);
2571 spin_lock_init(&com_spinlock);
2572 spin_lock_init(&clock_spinlock);
2573 spin_lock_init(&cons_spinlock);
2575 /* our token pool needs to work early */
2576 lwkt_token_pool_init();