sys/platform/pc64/isa/clock.c

   1 /*-
   2  * Copyright (c) 1990 The Regents of the University of California.
   3  * Copyright (c) 2008 The DragonFly Project.
   4  * All rights reserved.
   5  *
   6  * This code is derived from software contributed to Berkeley by
   7  * William Jolitz and Don Ahn.
   8  *
   9  * Redistribution and use in source and binary forms, with or without
  10  * modification, are permitted provided that the following conditions
  11  * are met:
  12  * 1. Redistributions of source code must retain the above copyright
  13  *    notice, this list of conditions and the following disclaimer.
  14  * 2. Redistributions in binary form must reproduce the above copyright
  15  *    notice, this list of conditions and the following disclaimer in the
  16  *    documentation and/or other materials provided with the distribution.
  17  * 3. All advertising materials mentioning features or use of this software
  18  *    must display the following acknowledgement:
  19  *      This product includes software developed by the University of
  20  *      California, Berkeley and its contributors.
  21  * 4. Neither the name of the University nor the names of its contributors
  22  *    may be used to endorse or promote products derived from this software
  23  *    without specific prior written permission.
  24  *
  25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
  26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  28  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
  29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  35  * SUCH DAMAGE.
  36  *
  37  *      from: @(#)clock.c       7.2 (Berkeley) 5/12/91
  38  * $FreeBSD: src/sys/i386/isa/clock.c,v 1.149.2.6 2002/11/02 04:41:50 iwasaki Exp $
  39  */
  40
  41 /*
  42  * Routines to handle clock hardware.
  43  */
  44
  45 /*
  46  * inittodr, settodr and support routines written
  47  * by Christoph Robitschko <chmr@edvz.tu-graz.ac.at>
  48  *
  49  * reintroduced and updated by Chris Stenton <chris@gnome.co.uk> 8/10/94
  50  */
  51
  52 #if 0
  53 #include "opt_clock.h"
  54 #endif
  55
  56 #include <sys/param.h>
  57 #include <sys/systm.h>
  58 #include <sys/eventhandler.h>
  59 #include <sys/time.h>
  60 #include <sys/kernel.h>
  61 #include <sys/bus.h>
  62 #include <sys/sysctl.h>
  63 #include <sys/cons.h>
  64 #include <sys/systimer.h>
  65 #include <sys/globaldata.h>
  66 #include <sys/thread2.h>
  67 #include <sys/systimer.h>
  68 #include <sys/machintr.h>
  69 #include <sys/interrupt.h>
  70
  71 #include <machine/clock.h>
  72 #include <machine/cputypes.h>
  73 #include <machine/frame.h>
  74 #include <machine/ipl.h>
  75 #include <machine/limits.h>
  76 #include <machine/md_var.h>
  77 #include <machine/psl.h>
  78 #include <machine/segments.h>
  79 #include <machine/smp.h>
  80 #include <machine/specialreg.h>
  81 #include <machine/intr_machdep.h>
  82
  83 #include <machine_base/apic/ioapic.h>
  84 #include <machine_base/apic/ioapic_abi.h>
  85 #include <machine_base/icu/icu.h>
  86 #include <bus/isa/isa.h>
  87 #include <bus/isa/rtc.h>
  88 #include <machine_base/isa/timerreg.h>
  89
  90 static void i8254_restore(void);
  91 static void resettodr_on_shutdown(void *arg __unused);
  92
  93 /*
  94  * 32-bit time_t's can't reach leap years before 1904 or after 2036, so we
  95  * can use a simple formula for leap years.
  96  */
  97 #define LEAPYEAR(y) ((u_int)(y) % 4 == 0)
  98 #define DAYSPERYEAR   (31+28+31+30+31+30+31+31+30+31+30+31)
  99
 100 #ifndef TIMER_FREQ
 101 #define TIMER_FREQ   1193182
 102 #endif
 103
 104 static uint8_t i8254_walltimer_sel;
 105 static uint16_t i8254_walltimer_cntr;
 106
 107 int     adjkerntz;              /* local offset from GMT in seconds */
 108 int     disable_rtc_set;        /* disable resettodr() if != 0 */
 109 int     tsc_present;
 110 int     tsc_invariant;
 111 int64_t tsc_frequency;
 112 int     tsc_is_broken;
 113 int     wall_cmos_clock;        /* wall CMOS clock assumed if != 0 */
 114 int     timer0_running;
 115 enum tstate { RELEASED, ACQUIRED };
 116 enum tstate timer0_state;
 117 enum tstate timer1_state;
 118 enum tstate timer2_state;
 119
 120 static  int     beeping = 0;
 121 static  const u_char daysinmonth[] = {31,28,31,30,31,30,31,31,30,31,30,31};
 122 static  u_char  rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
 123 static  u_char  rtc_statusb = RTCSB_24HR | RTCSB_PINTR;
 124 static  int     rtc_loaded;
 125
 126 static int i8254_cputimer_div;
 127
 128 static int i8254_nointr;
 129 static int i8254_intr_disable = 1;
 130 TUNABLE_INT("hw.i8254.intr_disable", &i8254_intr_disable);
 131
 132 static struct callout sysbeepstop_ch;
 133
 134 static sysclock_t i8254_cputimer_count(void);
 135 static void i8254_cputimer_construct(struct cputimer *cputimer, sysclock_t last);
 136 static void i8254_cputimer_destruct(struct cputimer *cputimer);
 137
 138 static struct cputimer  i8254_cputimer = {
 139     SLIST_ENTRY_INITIALIZER,
 140     "i8254",
 141     CPUTIMER_PRI_8254,
 142     0,
 143     i8254_cputimer_count,
 144     cputimer_default_fromhz,
 145     cputimer_default_fromus,
 146     i8254_cputimer_construct,
 147     i8254_cputimer_destruct,
 148     TIMER_FREQ,
 149     0, 0, 0
 150 };
 151
 152 static void i8254_intr_reload(struct cputimer_intr *, sysclock_t);
 153 static void i8254_intr_config(struct cputimer_intr *, const struct cputimer *);
 154 static void i8254_intr_initclock(struct cputimer_intr *, boolean_t);
 155
 156 static struct cputimer_intr i8254_cputimer_intr = {
 157     .freq = TIMER_FREQ,
 158     .reload = i8254_intr_reload,
 159     .enable = cputimer_intr_default_enable,
 160     .config = i8254_intr_config,
 161     .restart = cputimer_intr_default_restart,
 162     .pmfixup = cputimer_intr_default_pmfixup,
 163     .initclock = i8254_intr_initclock,
 164     .next = SLIST_ENTRY_INITIALIZER,
 165     .name = "i8254",
 166     .type = CPUTIMER_INTR_8254,
 167     .prio = CPUTIMER_INTR_PRIO_8254,
 168     .caps = CPUTIMER_INTR_CAP_PS
 169 };
 170
 171 /*
 172  * timer0 clock interrupt.  Timer0 is in one-shot mode and has stopped
 173  * counting as of this interrupt.  We use timer1 in free-running mode (not
 174  * generating any interrupts) as our main counter.  Each cpu has timeouts
 175  * pending.
 176  *
 177  * This code is INTR_MPSAFE and may be called without the BGL held.
 178  */
 179 static void
 180 clkintr(void *dummy, void *frame_arg)
 181 {
 182         static sysclock_t sysclock_count;       /* NOTE! Must be static */
 183         struct globaldata *gd = mycpu;
 184         struct globaldata *gscan;
 185         int n;
 186
 187         /*
 188          * SWSTROBE mode is a one-shot, the timer is no longer running
 189          */
 190         timer0_running = 0;
 191
 192         /*
 193          * XXX the dispatcher needs work.  right now we call systimer_intr()
 194          * directly or via IPI for any cpu with systimers queued, which is
 195          * usually *ALL* of them.  We need to use the LAPIC timer for this.
 196          */
 197         sysclock_count = sys_cputimer->count();
 198         for (n = 0; n < ncpus; ++n) {
 199             gscan = globaldata_find(n);
 200             if (TAILQ_FIRST(&gscan->gd_systimerq) == NULL)
 201                 continue;
 202             if (gscan != gd) {
 203                 lwkt_send_ipiq3(gscan, (ipifunc3_t)systimer_intr,
 204                                 &sysclock_count, 1);
 205             } else {
 206                 systimer_intr(&sysclock_count, 0, frame_arg);
 207             }
 208         }
 209 }
 210
 211
 212 /*
 213  * NOTE! not MP safe.
 214  */
 215 int
 216 acquire_timer2(int mode)
 217 {
 218         if (timer2_state != RELEASED)
 219                 return (-1);
 220         timer2_state = ACQUIRED;
 221
 222         /*
 223          * This access to the timer registers is as atomic as possible
 224          * because it is a single instruction.  We could do better if we
 225          * knew the rate.
 226          */
 227         outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
 228         return (0);
 229 }
 230
 231 int
 232 release_timer2(void)
 233 {
 234         if (timer2_state != ACQUIRED)
 235                 return (-1);
 236         outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
 237         timer2_state = RELEASED;
 238         return (0);
 239 }
 240
 241 #include "opt_ddb.h"
 242 #ifdef DDB
 243 #include <ddb/ddb.h>
 244
 245 DB_SHOW_COMMAND(rtc, rtc)
 246 {
 247         kprintf("%02x/%02x/%02x %02x:%02x:%02x, A = %02x, B = %02x, C = %02x\n",
 248                rtcin(RTC_YEAR), rtcin(RTC_MONTH), rtcin(RTC_DAY),
 249                rtcin(RTC_HRS), rtcin(RTC_MIN), rtcin(RTC_SEC),
 250                rtcin(RTC_STATUSA), rtcin(RTC_STATUSB), rtcin(RTC_INTR));
 251 }
 252 #endif /* DDB */
 253
 254 /*
 255  * Return the current cpu timer count as a 32 bit integer.
 256  */
 257 static
 258 sysclock_t
 259 i8254_cputimer_count(void)
 260 {
 261         static __uint16_t cputimer_last;
 262         __uint16_t count;
 263         sysclock_t ret;
 264
 265         clock_lock();
 266         outb(TIMER_MODE, i8254_walltimer_sel | TIMER_LATCH);
 267         count = (__uint8_t)inb(i8254_walltimer_cntr);           /* get countdown */
 268         count |= ((__uint8_t)inb(i8254_walltimer_cntr) << 8);
 269         count = -count;                                 /* -> countup */
 270         if (count < cputimer_last)                      /* rollover */
 271                 i8254_cputimer.base += 0x00010000;
 272         ret = i8254_cputimer.base | count;
 273         cputimer_last = count;
 274         clock_unlock();
 275         return(ret);
 276 }
 277
 278 /*
 279  * This function is called whenever the system timebase changes, allowing
 280  * us to calculate what is needed to convert a system timebase tick
 281  * into an 8254 tick for the interrupt timer.  If we can convert to a
 282  * simple shift, multiplication, or division, we do so.  Otherwise 64
 283  * bit arithmatic is required every time the interrupt timer is reloaded.
 284  */
 285 static void
 286 i8254_intr_config(struct cputimer_intr *cti, const struct cputimer *timer)
 287 {
 288     int freq;
 289     int div;
 290
 291     /*
 292      * Will a simple divide do the trick?
 293      */
 294     div = (timer->freq + (cti->freq / 2)) / cti->freq;
 295     freq = cti->freq * div;
 296
 297     if (freq >= timer->freq - 1 && freq <= timer->freq + 1)
 298         i8254_cputimer_div = div;
 299     else
 300         i8254_cputimer_div = 0;
 301 }
 302
 303 /*
 304  * Reload for the next timeout.  It is possible for the reload value
 305  * to be 0 or negative, indicating that an immediate timer interrupt
 306  * is desired.  For now make the minimum 2 ticks.
 307  *
 308  * We may have to convert from the system timebase to the 8254 timebase.
 309  */
 310 static void
 311 i8254_intr_reload(struct cputimer_intr *cti, sysclock_t reload)
 312 {
 313     __uint16_t count;
 314
 315     if (i8254_cputimer_div)
 316         reload /= i8254_cputimer_div;
 317     else
 318         reload = (int64_t)reload * cti->freq / sys_cputimer->freq;
 319
 320     if ((int)reload < 2)
 321         reload = 2;
 322
 323     clock_lock();
 324     if (timer0_running) {
 325         outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);     /* count-down timer */
 326         count = (__uint8_t)inb(TIMER_CNTR0);            /* lsb */
 327         count |= ((__uint8_t)inb(TIMER_CNTR0) << 8);    /* msb */
 328         if (reload < count) {
 329             outb(TIMER_MODE, TIMER_SEL0 | TIMER_SWSTROBE | TIMER_16BIT);
 330             outb(TIMER_CNTR0, (__uint8_t)reload);       /* lsb */
 331             outb(TIMER_CNTR0, (__uint8_t)(reload >> 8)); /* msb */
 332         }
 333     } else {
 334         timer0_running = 1;
 335         if (reload > 0xFFFF)
 336             reload = 0;         /* full count */
 337         outb(TIMER_MODE, TIMER_SEL0 | TIMER_SWSTROBE | TIMER_16BIT);
 338         outb(TIMER_CNTR0, (__uint8_t)reload);           /* lsb */
 339         outb(TIMER_CNTR0, (__uint8_t)(reload >> 8));    /* msb */
 340     }
 341     clock_unlock();
 342 }
 343
 344 /*
 345  * DELAY(usec)       - Spin for the specified number of microseconds.
 346  * DRIVERSLEEP(usec) - Spin for the specified number of microseconds,
 347  *                     but do a thread switch in the loop
 348  *
 349  * Relies on timer 1 counting down from (cputimer_freq / hz)
 350  * Note: timer had better have been programmed before this is first used!
 351  */
 352 static void
 353 DODELAY(int n, int doswitch)
 354 {
 355         ssysclock_t delta, ticks_left;
 356         sysclock_t prev_tick, tick;
 357
 358 #ifdef DELAYDEBUG
 359         int getit_calls = 1;
 360         int n1;
 361         static int state = 0;
 362
 363         if (state == 0) {
 364                 state = 1;
 365                 for (n1 = 1; n1 <= 10000000; n1 *= 10)
 366                         DELAY(n1);
 367                 state = 2;
 368         }
 369         if (state == 1)
 370                 kprintf("DELAY(%d)...", n);
 371 #endif
 372         /*
 373          * Guard against the timer being uninitialized if we are called
 374          * early for console i/o.
 375          */
 376         if (timer0_state == RELEASED)
 377                 i8254_restore();
 378
 379         /*
 380          * Read the counter first, so that the rest of the setup overhead is
 381          * counted.  Then calculate the number of hardware timer ticks
 382          * required, rounding up to be sure we delay at least the requested
 383          * number of microseconds.
 384          */
 385         prev_tick = sys_cputimer->count();
 386         ticks_left = ((u_int)n * (int64_t)sys_cputimer->freq + 999999) /
 387                      1000000;
 388
 389         /*
 390          * Loop until done.
 391          */
 392         while (ticks_left > 0) {
 393                 tick = sys_cputimer->count();
 394 #ifdef DELAYDEBUG
 395                 ++getit_calls;
 396 #endif
 397                 delta = tick - prev_tick;
 398                 prev_tick = tick;
 399                 if (delta < 0)
 400                         delta = 0;
 401                 ticks_left -= delta;
 402                 if (doswitch && ticks_left > 0)
 403                         lwkt_switch();
 404                 cpu_pause();
 405         }
 406 #ifdef DELAYDEBUG
 407         if (state == 1)
 408                 kprintf(" %d calls to getit() at %d usec each\n",
 409                        getit_calls, (n + 5) / getit_calls);
 410 #endif
 411 }
 412
 413 /*
 414  * DELAY() never switches.
 415  */
 416 void
 417 DELAY(int n)
 418 {
 419         DODELAY(n, 0);
 420 }
 421
 422 /*
 423  * Returns non-zero if the specified time period has elapsed.  Call
 424  * first with last_clock set to 0.
 425  */
 426 int
 427 CHECKTIMEOUT(TOTALDELAY *tdd)
 428 {
 429         sysclock_t delta;
 430         int us;
 431
 432         if (tdd->started == 0) {
 433                 if (timer0_state == RELEASED)
 434                         i8254_restore();
 435                 tdd->last_clock = sys_cputimer->count();
 436                 tdd->started = 1;
 437                 return(0);
 438         }
 439         delta = sys_cputimer->count() - tdd->last_clock;
 440         us = (u_int64_t)delta * (u_int64_t)1000000 /
 441              (u_int64_t)sys_cputimer->freq;
 442         tdd->last_clock += (u_int64_t)us * (u_int64_t)sys_cputimer->freq /
 443                            1000000;
 444         tdd->us -= us;
 445         return (tdd->us < 0);
 446 }
 447
 448
 449 /*
 450  * DRIVERSLEEP() does not switch if called with a spinlock held or
 451  * from a hard interrupt.
 452  */
 453 void
 454 DRIVERSLEEP(int usec)
 455 {
 456         globaldata_t gd = mycpu;
 457
 458         if (gd->gd_intr_nesting_level || gd->gd_spinlocks) {
 459                 DODELAY(usec, 0);
 460         } else {
 461                 DODELAY(usec, 1);
 462         }
 463 }
 464
 465 static void
 466 sysbeepstop(void *chan)
 467 {
 468         outb(IO_PPI, inb(IO_PPI)&0xFC); /* disable counter2 output to speaker */
 469         beeping = 0;
 470         release_timer2();
 471 }
 472
 473 int
 474 sysbeep(int pitch, int period)
 475 {
 476         if (acquire_timer2(TIMER_SQWAVE|TIMER_16BIT))
 477                 return(-1);
 478         if (sysbeep_enable == 0)
 479                 return(-1);
 480         /*
 481          * Nobody else is using timer2, we do not need the clock lock
 482          */
 483         outb(TIMER_CNTR2, pitch);
 484         outb(TIMER_CNTR2, (pitch>>8));
 485         if (!beeping) {
 486                 /* enable counter2 output to speaker */
 487                 outb(IO_PPI, inb(IO_PPI) | 3);
 488                 beeping = period;
 489                 callout_reset(&sysbeepstop_ch, period, sysbeepstop, NULL);
 490         }
 491         return (0);
 492 }
 493
 494 /*
 495  * RTC support routines
 496  */
 497
 498 int
 499 rtcin(int reg)
 500 {
 501         u_char val;
 502
 503         crit_enter();
 504         outb(IO_RTC, reg);
 505         inb(0x84);
 506         val = inb(IO_RTC + 1);
 507         inb(0x84);
 508         crit_exit();
 509         return (val);
 510 }
 511
 512 static __inline void
 513 writertc(u_char reg, u_char val)
 514 {
 515         crit_enter();
 516         inb(0x84);
 517         outb(IO_RTC, reg);
 518         inb(0x84);
 519         outb(IO_RTC + 1, val);
 520         inb(0x84);              /* XXX work around wrong order in rtcin() */
 521         crit_exit();
 522 }
 523
 524 static __inline int
 525 readrtc(int port)
 526 {
 527         return(bcd2bin(rtcin(port)));
 528 }
 529
 530 static u_int
 531 calibrate_clocks(void)
 532 {
 533         u_int64_t old_tsc;
 534         u_int tot_count;
 535         sysclock_t count, prev_count;
 536         int sec, start_sec, timeout;
 537
 538         if (bootverbose)
 539                 kprintf("Calibrating clock(s) ...\n");
 540         if (!(rtcin(RTC_STATUSD) & RTCSD_PWR))
 541                 goto fail;
 542         timeout = 100000000;
 543
 544         /* Read the mc146818A seconds counter. */
 545         for (;;) {
 546                 if (!(rtcin(RTC_STATUSA) & RTCSA_TUP)) {
 547                         sec = rtcin(RTC_SEC);
 548                         break;
 549                 }
 550                 if (--timeout == 0)
 551                         goto fail;
 552         }
 553
 554         /* Wait for the mC146818A seconds counter to change. */
 555         start_sec = sec;
 556         for (;;) {
 557                 if (!(rtcin(RTC_STATUSA) & RTCSA_TUP)) {
 558                         sec = rtcin(RTC_SEC);
 559                         if (sec != start_sec)
 560                                 break;
 561                 }
 562                 if (--timeout == 0)
 563                         goto fail;
 564         }
 565
 566         /* Start keeping track of the i8254 counter. */
 567         prev_count = sys_cputimer->count();
 568         tot_count = 0;
 569
 570         if (tsc_present)
 571                 old_tsc = rdtsc();
 572         else
 573                 old_tsc = 0;            /* shut up gcc */
 574
 575         /*
 576          * Wait for the mc146818A seconds counter to change.  Read the i8254
 577          * counter for each iteration since this is convenient and only
 578          * costs a few usec of inaccuracy. The timing of the final reads
 579          * of the counters almost matches the timing of the initial reads,
 580          * so the main cause of inaccuracy is the varying latency from
 581          * inside getit() or rtcin(RTC_STATUSA) to the beginning of the
 582          * rtcin(RTC_SEC) that returns a changed seconds count.  The
 583          * maximum inaccuracy from this cause is < 10 usec on 486's.
 584          */
 585         start_sec = sec;
 586         for (;;) {
 587                 if (!(rtcin(RTC_STATUSA) & RTCSA_TUP))
 588                         sec = rtcin(RTC_SEC);
 589                 count = sys_cputimer->count();
 590                 tot_count += (int)(count - prev_count);
 591                 prev_count = count;
 592                 if (sec != start_sec)
 593                         break;
 594                 if (--timeout == 0)
 595                         goto fail;
 596         }
 597
 598         /*
 599          * Read the cpu cycle counter.  The timing considerations are
 600          * similar to those for the i8254 clock.
 601          */
 602         if (tsc_present) {
 603                 tsc_frequency = rdtsc() - old_tsc;
 604         }
 605
 606         if (tsc_present) {
 607                 kprintf("TSC%s clock: %llu Hz, ",
 608                     tsc_invariant ? " invariant" : "",
 609                     (long long)tsc_frequency);
 610         }
 611         kprintf("i8254 clock: %u Hz\n", tot_count);
 612         return (tot_count);
 613
 614 fail:
 615         kprintf("failed, using default i8254 clock of %u Hz\n",
 616                 i8254_cputimer.freq);
 617         return (i8254_cputimer.freq);
 618 }
 619
 620 static void
 621 i8254_restore(void)
 622 {
 623         timer0_state = ACQUIRED;
 624
 625         clock_lock();
 626
 627         /*
 628          * Timer0 is our fine-grained variable clock interrupt
 629          */
 630         outb(TIMER_MODE, TIMER_SEL0 | TIMER_SWSTROBE | TIMER_16BIT);
 631         outb(TIMER_CNTR0, 2);   /* lsb */
 632         outb(TIMER_CNTR0, 0);   /* msb */
 633         clock_unlock();
 634
 635         if (!i8254_nointr) {
 636                 cputimer_intr_register(&i8254_cputimer_intr);
 637                 cputimer_intr_select(&i8254_cputimer_intr, 0);
 638         }
 639
 640         /*
 641          * Timer1 or timer2 is our free-running clock, but only if another
 642          * has not been selected.
 643          */
 644         cputimer_register(&i8254_cputimer);
 645         cputimer_select(&i8254_cputimer, 0);
 646 }
 647
 648 static void
 649 i8254_cputimer_construct(struct cputimer *timer, sysclock_t oldclock)
 650 {
 651         int which;
 652
 653         /*
 654          * Should we use timer 1 or timer 2 ?
 655          */
 656         which = 0;
 657         TUNABLE_INT_FETCH("hw.i8254.walltimer", &which);
 658         if (which != 1 && which != 2)
 659                 which = 2;
 660
 661         switch(which) {
 662         case 1:
 663                 timer->name = "i8254_timer1";
 664                 timer->type = CPUTIMER_8254_SEL1;
 665                 i8254_walltimer_sel = TIMER_SEL1;
 666                 i8254_walltimer_cntr = TIMER_CNTR1;
 667                 timer1_state = ACQUIRED;
 668                 break;
 669         case 2:
 670                 timer->name = "i8254_timer2";
 671                 timer->type = CPUTIMER_8254_SEL2;
 672                 i8254_walltimer_sel = TIMER_SEL2;
 673                 i8254_walltimer_cntr = TIMER_CNTR2;
 674                 timer2_state = ACQUIRED;
 675                 break;
 676         }
 677
 678         timer->base = (oldclock + 0xFFFF) & ~0xFFFF;
 679
 680         clock_lock();
 681         outb(TIMER_MODE, i8254_walltimer_sel | TIMER_RATEGEN | TIMER_16BIT);
 682         outb(i8254_walltimer_cntr, 0);  /* lsb */
 683         outb(i8254_walltimer_cntr, 0);  /* msb */
 684         outb(IO_PPI, inb(IO_PPI) | 1);  /* bit 0: enable gate, bit 1: spkr */
 685         clock_unlock();
 686 }
 687
 688 static void
 689 i8254_cputimer_destruct(struct cputimer *timer)
 690 {
 691         switch(timer->type) {
 692         case CPUTIMER_8254_SEL1:
 693             timer1_state = RELEASED;
 694             break;
 695         case CPUTIMER_8254_SEL2:
 696             timer2_state = RELEASED;
 697             break;
 698         default:
 699             break;
 700         }
 701         timer->type = 0;
 702 }
 703
 704 static void
 705 rtc_restore(void)
 706 {
 707         /* Restore all of the RTC's "status" (actually, control) registers. */
 708         writertc(RTC_STATUSB, RTCSB_24HR);
 709         writertc(RTC_STATUSA, rtc_statusa);
 710         writertc(RTC_STATUSB, rtc_statusb);
 711 }
 712
 713 /*
 714  * Restore all the timers.
 715  *
 716  * This function is called to resynchronize our core timekeeping after a
 717  * long halt, e.g. from apm_default_resume() and friends.  It is also
 718  * called if after a BIOS call we have detected munging of the 8254.
 719  * It is necessary because cputimer_count() counter's delta may have grown
 720  * too large for nanouptime() and friends to handle, or (in the case of 8254
 721  * munging) might cause the SYSTIMER code to prematurely trigger.
 722  */
 723 void
 724 timer_restore(void)
 725 {
 726         crit_enter();
 727         i8254_restore();                /* restore timer_freq and hz */
 728         rtc_restore();                  /* reenable RTC interrupts */
 729         crit_exit();
 730 }
 731
 732 /*
 733  * Initialize 8254 timer 0 early so that it can be used in DELAY().
 734  */
 735 void
 736 startrtclock(void)
 737 {
 738         u_int delta, freq;
 739
 740         /*
 741          * Can we use the TSC?
 742          */
 743         if (cpu_feature & CPUID_TSC) {
 744                 tsc_present = 1;
 745                 if ((cpu_vendor_id == CPU_VENDOR_INTEL ||
 746                      cpu_vendor_id == CPU_VENDOR_AMD) &&
 747                     cpu_exthigh >= 0x80000007) {
 748                         u_int regs[4];
 749
 750                         do_cpuid(0x80000007, regs);
 751                         if (regs[3] & 0x100)
 752                                 tsc_invariant = 1;
 753                 }
 754         } else {
 755                 tsc_present = 0;
 756         }
 757
 758         /*
 759          * Initial RTC state, don't do anything unexpected
 760          */
 761         writertc(RTC_STATUSA, rtc_statusa);
 762         writertc(RTC_STATUSB, RTCSB_24HR);
 763
 764         /*
 765          * Set the 8254 timer0 in TIMER_SWSTROBE mode and cause it to
 766          * generate an interrupt, which we will ignore for now.
 767          *
 768          * Set the 8254 timer1 in TIMER_RATEGEN mode and load 0x0000
 769          * (so it counts a full 2^16 and repeats).  We will use this timer
 770          * for our counting.
 771          */
 772         i8254_restore();
 773         freq = calibrate_clocks();
 774 #ifdef CLK_CALIBRATION_LOOP
 775         if (bootverbose) {
 776                 kprintf(
 777                 "Press a key on the console to abort clock calibration\n");
 778                 while (cncheckc() == -1)
 779                         calibrate_clocks();
 780         }
 781 #endif
 782
 783         /*
 784          * Use the calibrated i8254 frequency if it seems reasonable.
 785          * Otherwise use the default, and don't use the calibrated i586
 786          * frequency.
 787          */
 788         delta = freq > i8254_cputimer.freq ?
 789                         freq - i8254_cputimer.freq : i8254_cputimer.freq - freq;
 790         if (delta < i8254_cputimer.freq / 100) {
 791 #ifndef CLK_USE_I8254_CALIBRATION
 792                 if (bootverbose)
 793                         kprintf(
 794 "CLK_USE_I8254_CALIBRATION not specified - using default frequency\n");
 795                 freq = i8254_cputimer.freq;
 796 #endif
 797                 /*
 798                  * NOTE:
 799                  * Interrupt timer's freq must be adjusted
 800                  * before we change the cuptimer's frequency.
 801                  */
 802                 i8254_cputimer_intr.freq = freq;
 803                 cputimer_set_frequency(&i8254_cputimer, freq);
 804         } else {
 805                 if (bootverbose)
 806                         kprintf(
 807                     "%d Hz differs from default of %d Hz by more than 1%%\n",
 808                                freq, i8254_cputimer.freq);
 809                 tsc_frequency = 0;
 810         }
 811
 812 #ifndef CLK_USE_TSC_CALIBRATION
 813         if (tsc_frequency != 0) {
 814                 if (bootverbose)
 815                         kprintf(
 816 "CLK_USE_TSC_CALIBRATION not specified - using old calibration method\n");
 817                 tsc_frequency = 0;
 818         }
 819 #endif
 820         if (tsc_present && tsc_frequency == 0) {
 821                 /*
 822                  * Calibration of the i586 clock relative to the mc146818A
 823                  * clock failed.  Do a less accurate calibration relative
 824                  * to the i8254 clock.
 825                  */
 826                 u_int64_t old_tsc = rdtsc();
 827
 828                 DELAY(1000000);
 829                 tsc_frequency = rdtsc() - old_tsc;
 830 #ifdef CLK_USE_TSC_CALIBRATION
 831                 if (bootverbose) {
 832                         kprintf("TSC clock: %llu Hz (Method B)\n",
 833                                 tsc_frequency);
 834                 }
 835 #endif
 836         }
 837
 838         EVENTHANDLER_REGISTER(shutdown_post_sync, resettodr_on_shutdown, NULL, SHUTDOWN_PRI_LAST);
 839 }
 840
 841 /*
 842  * Sync the time of day back to the RTC on shutdown, but only if
 843  * we have already loaded it and have not crashed.
 844  */
 845 static void
 846 resettodr_on_shutdown(void *arg __unused)
 847 {
 848         if (rtc_loaded && panicstr == NULL) {
 849                 resettodr();
 850         }
 851 }
 852
 853 /*
 854  * Initialize the time of day register, based on the time base which is, e.g.
 855  * from a filesystem.
 856  */
 857 void
 858 inittodr(time_t base)
 859 {
 860         unsigned long   sec, days;
 861         int             year, month;
 862         int             y, m;
 863         struct timespec ts;
 864
 865         if (base) {
 866                 ts.tv_sec = base;
 867                 ts.tv_nsec = 0;
 868                 set_timeofday(&ts);
 869         }
 870
 871         /* Look if we have a RTC present and the time is valid */
 872         if (!(rtcin(RTC_STATUSD) & RTCSD_PWR))
 873                 goto wrong_time;
 874
 875         /* wait for time update to complete */
 876         /* If RTCSA_TUP is zero, we have at least 244us before next update */
 877         crit_enter();
 878         while (rtcin(RTC_STATUSA) & RTCSA_TUP) {
 879                 crit_exit();
 880                 crit_enter();
 881         }
 882
 883         days = 0;
 884 #ifdef USE_RTC_CENTURY
 885         year = readrtc(RTC_YEAR) + readrtc(RTC_CENTURY) * 100;
 886 #else
 887         year = readrtc(RTC_YEAR) + 1900;
 888         if (year < 1970)
 889                 year += 100;
 890 #endif
 891         if (year < 1970) {
 892                 crit_exit();
 893                 goto wrong_time;
 894         }
 895         month = readrtc(RTC_MONTH);
 896         for (m = 1; m < month; m++)
 897                 days += daysinmonth[m-1];
 898         if ((month > 2) && LEAPYEAR(year))
 899                 days ++;
 900         days += readrtc(RTC_DAY) - 1;
 901         for (y = 1970; y < year; y++)
 902                 days += DAYSPERYEAR + LEAPYEAR(y);
 903         sec = ((( days * 24 +
 904                   readrtc(RTC_HRS)) * 60 +
 905                   readrtc(RTC_MIN)) * 60 +
 906                   readrtc(RTC_SEC));
 907         /* sec now contains the number of seconds, since Jan 1 1970,
 908            in the local time zone */
 909
 910         sec += tz.tz_minuteswest * 60 + (wall_cmos_clock ? adjkerntz : 0);
 911
 912         y = time_second - sec;
 913         if (y <= -2 || y >= 2) {
 914                 /* badly off, adjust it */
 915                 ts.tv_sec = sec;
 916                 ts.tv_nsec = 0;
 917                 set_timeofday(&ts);
 918         }
 919         rtc_loaded = 1;
 920         crit_exit();
 921         return;
 922
 923 wrong_time:
 924         kprintf("Invalid time in real time clock.\n");
 925         kprintf("Check and reset the date immediately!\n");
 926 }
 927
 928 /*
 929  * Write system time back to RTC
 930  */
 931 void
 932 resettodr(void)
 933 {
 934         struct timeval tv;
 935         unsigned long tm;
 936         int m;
 937         int y;
 938
 939         if (disable_rtc_set)
 940                 return;
 941
 942         microtime(&tv);
 943         tm = tv.tv_sec;
 944
 945         crit_enter();
 946         /* Disable RTC updates and interrupts. */
 947         writertc(RTC_STATUSB, RTCSB_HALT | RTCSB_24HR);
 948
 949         /* Calculate local time to put in RTC */
 950
 951         tm -= tz.tz_minuteswest * 60 + (wall_cmos_clock ? adjkerntz : 0);
 952
 953         writertc(RTC_SEC, bin2bcd(tm%60)); tm /= 60;    /* Write back Seconds */
 954         writertc(RTC_MIN, bin2bcd(tm%60)); tm /= 60;    /* Write back Minutes */
 955         writertc(RTC_HRS, bin2bcd(tm%24)); tm /= 24;    /* Write back Hours   */
 956
 957         /* We have now the days since 01-01-1970 in tm */
 958         writertc(RTC_WDAY, (tm+4)%7);                   /* Write back Weekday */
 959         for (y = 1970, m = DAYSPERYEAR + LEAPYEAR(y);
 960              tm >= m;
 961              y++,      m = DAYSPERYEAR + LEAPYEAR(y))
 962              tm -= m;
 963
 964         /* Now we have the years in y and the day-of-the-year in tm */
 965         writertc(RTC_YEAR, bin2bcd(y%100));             /* Write back Year    */
 966 #ifdef USE_RTC_CENTURY
 967         writertc(RTC_CENTURY, bin2bcd(y/100));          /* ... and Century    */
 968 #endif
 969         for (m = 0; ; m++) {
 970                 int ml;
 971
 972                 ml = daysinmonth[m];
 973                 if (m == 1 && LEAPYEAR(y))
 974                         ml++;
 975                 if (tm < ml)
 976                         break;
 977                 tm -= ml;
 978         }
 979
 980         writertc(RTC_MONTH, bin2bcd(m + 1));            /* Write back Month   */
 981         writertc(RTC_DAY, bin2bcd(tm + 1));             /* Write back Month Day */
 982
 983         /* Reenable RTC updates and interrupts. */
 984         writertc(RTC_STATUSB, rtc_statusb);
 985         crit_exit();
 986 }
 987
 988 static int
 989 i8254_ioapic_trial(int irq, struct cputimer_intr *cti)
 990 {
 991         sysclock_t base;
 992         long lastcnt;
 993
 994         /*
 995          * Following code assumes the 8254 is the cpu timer,
 996          * so make sure it is.
 997          */
 998         KKASSERT(sys_cputimer == &i8254_cputimer);
 999         KKASSERT(cti == &i8254_cputimer_intr);
1000
1001         lastcnt = get_interrupt_counter(irq, mycpuid);
1002
1003         /*
1004          * Force an 8254 Timer0 interrupt and wait 1/100s for
1005          * it to happen, then see if we got it.
1006          */
1007         kprintf("IOAPIC: testing 8254 interrupt delivery\n");
1008
1009         i8254_intr_reload(cti, 2);
1010         base = sys_cputimer->count();
1011         while (sys_cputimer->count() - base < sys_cputimer->freq / 100)
1012                 ; /* nothing */
1013
1014         if (get_interrupt_counter(irq, mycpuid) - lastcnt == 0)
1015                 return ENOENT;
1016         return 0;
1017 }
1018
1019 /*
1020  * Start both clocks running.  DragonFly note: the stat clock is no longer
1021  * used.  Instead, 8254 based systimers are used for all major clock
1022  * interrupts.
1023  */
1024 static void
1025 i8254_intr_initclock(struct cputimer_intr *cti, boolean_t selected)
1026 {
1027         void *clkdesc = NULL;
1028         int irq = 0, mixed_mode = 0, error;
1029
1030         KKASSERT(mycpuid == 0);
1031         callout_init_mp(&sysbeepstop_ch);
1032
1033         if (!selected && i8254_intr_disable)
1034                 goto nointr;
1035
1036         /*
1037          * The stat interrupt mask is different without the
1038          * statistics clock.  Also, don't set the interrupt
1039          * flag which would normally cause the RTC to generate
1040          * interrupts.
1041          */
1042         rtc_statusb = RTCSB_24HR;
1043
1044         /* Finish initializing 8254 timer 0. */
1045         if (ioapic_enable) {
1046                 irq = machintr_legacy_intr_find(0, INTR_TRIGGER_EDGE,
1047                         INTR_POLARITY_HIGH);
1048                 if (irq < 0) {
1049 mixed_mode_setup:
1050                         error = ioapic_conf_legacy_extint(0);
1051                         if (!error) {
1052                                 irq = machintr_legacy_intr_find(0,
1053                                     INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
1054                                 if (irq < 0)
1055                                         error = ENOENT;
1056                         }
1057
1058                         if (error) {
1059                                 if (!selected) {
1060                                         kprintf("IOAPIC: setup mixed mode for "
1061                                                 "irq 0 failed: %d\n", error);
1062                                         goto nointr;
1063                                 } else {
1064                                         panic("IOAPIC: setup mixed mode for "
1065                                               "irq 0 failed: %d\n", error);
1066                                 }
1067                         }
1068                         mixed_mode = 1;
1069                 }
1070                 clkdesc = register_int(irq, clkintr, NULL, "clk",
1071                                        NULL,
1072                                        INTR_EXCL | INTR_CLOCK |
1073                                        INTR_NOPOLL | INTR_MPSAFE |
1074                                        INTR_NOENTROPY, 0);
1075         } else {
1076                 register_int(0, clkintr, NULL, "clk", NULL,
1077                              INTR_EXCL | INTR_CLOCK |
1078                              INTR_NOPOLL | INTR_MPSAFE |
1079                              INTR_NOENTROPY, 0);
1080         }
1081
1082         /* Initialize RTC. */
1083         writertc(RTC_STATUSA, rtc_statusa);
1084         writertc(RTC_STATUSB, RTCSB_24HR);
1085
1086         if (ioapic_enable) {
1087                 error = i8254_ioapic_trial(irq, cti);
1088                 if (error) {
1089                         if (mixed_mode) {
1090                                 if (!selected) {
1091                                         kprintf("IOAPIC: mixed mode for irq %d "
1092                                                 "trial failed: %d\n",
1093                                                 irq, error);
1094                                         goto nointr;
1095                                 } else {
1096                                         panic("IOAPIC: mixed mode for irq %d "
1097                                               "trial failed: %d\n", irq, error);
1098                                 }
1099                         } else {
1100                                 kprintf("IOAPIC: warning 8254 is not connected "
1101                                         "to the correct pin, try mixed mode\n");
1102                                 unregister_int(clkdesc, 0);
1103                                 goto mixed_mode_setup;
1104                         }
1105                 }
1106         }
1107         return;
1108
1109 nointr:
1110         i8254_nointr = 1; /* don't try to register again */
1111         cputimer_intr_deregister(cti);
1112 }
1113
1114 void
1115 setstatclockrate(int newhz)
1116 {
1117         if (newhz == RTC_PROFRATE)
1118                 rtc_statusa = RTCSA_DIVIDER | RTCSA_PROF;
1119         else
1120                 rtc_statusa = RTCSA_DIVIDER | RTCSA_NOPROF;
1121         writertc(RTC_STATUSA, rtc_statusa);
1122 }
1123
1124 #if 0
1125 static unsigned
1126 tsc_get_timecount(struct timecounter *tc)
1127 {
1128         return (rdtsc());
1129 }
1130 #endif
1131
1132 #ifdef KERN_TIMESTAMP
1133 #define KERN_TIMESTAMP_SIZE 16384
1134 static u_long tsc[KERN_TIMESTAMP_SIZE] ;
1135 SYSCTL_OPAQUE(_debug, OID_AUTO, timestamp, CTLFLAG_RD, tsc,
1136         sizeof(tsc), "LU", "Kernel timestamps");
1137 void
1138 _TSTMP(u_int32_t x)
1139 {
1140         static int i;
1141
1142         tsc[i] = (u_int32_t)rdtsc();
1143         tsc[i+1] = x;
1144         i = i + 2;
1145         if (i >= KERN_TIMESTAMP_SIZE)
1146                 i = 0;
1147         tsc[i] = 0; /* mark last entry */
1148 }
1149 #endif /* KERN_TIMESTAMP */
1150
1151 /*
1152  *
1153  */
1154
1155 static int
1156 hw_i8254_timestamp(SYSCTL_HANDLER_ARGS)
1157 {
1158     sysclock_t count;
1159     __uint64_t tscval;
1160     char buf[32];
1161
1162     crit_enter();
1163     if (sys_cputimer == &i8254_cputimer)
1164         count = sys_cputimer->count();
1165     else
1166         count = 0;
1167     if (tsc_present)
1168         tscval = rdtsc();
1169     else
1170         tscval = 0;
1171     crit_exit();
1172     ksnprintf(buf, sizeof(buf), "%08x %016llx", count, (long long)tscval);
1173     return(SYSCTL_OUT(req, buf, strlen(buf) + 1));
1174 }
1175
1176 SYSCTL_NODE(_hw, OID_AUTO, i8254, CTLFLAG_RW, 0, "I8254");
1177 SYSCTL_UINT(_hw_i8254, OID_AUTO, freq, CTLFLAG_RD, &i8254_cputimer.freq, 0,
1178             "frequency");
1179 SYSCTL_PROC(_hw_i8254, OID_AUTO, timestamp, CTLTYPE_STRING|CTLFLAG_RD,
1180             0, 0, hw_i8254_timestamp, "A", "");
1181
1182 SYSCTL_INT(_hw, OID_AUTO, tsc_present, CTLFLAG_RD,
1183             &tsc_present, 0, "TSC Available");
1184 SYSCTL_INT(_hw, OID_AUTO, tsc_invariant, CTLFLAG_RD,
1185             &tsc_invariant, 0, "Invariant TSC");
1186 SYSCTL_QUAD(_hw, OID_AUTO, tsc_frequency, CTLFLAG_RD,
1187             &tsc_frequency, 0, "TSC Frequency");