Initial import of binutils 2.22 on the new vendor branch
[dragonfly.git] / sys / bus / usb / ehci_pci.c
1 /*
2  * Copyright (c) 1998 The NetBSD Foundation, Inc.
3  * All rights reserved.
4  *
5  * This code is derived from software contributed to The NetBSD Foundation
6  * by Lennart Augustsson (augustss@carlstedt.se) at
7  * Carlstedt Research & Technology.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *        This product includes software developed by the NetBSD
20  *        Foundation, Inc. and its contributors.
21  * 4. Neither the name of The NetBSD Foundation nor the names of its
22  *    contributors may be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  *
37  * $FreeBSD: src/sys/dev/usb/ehci_pci.c,v 1.18.2.1 2006/01/26 01:43:13 iedowse Exp $
38  */
39
40 /*
41  * USB Enhanced Host Controller Driver, a.k.a. USB 2.0 controller.
42  *
43  * The EHCI 1.0 spec can be found at
44  * http://developer.intel.com/technology/usb/download/ehci-r10.pdf
45  * and the USB 2.0 spec at
46  * http://www.usb.org/developers/docs/usb_20.zip
47  */
48
49 /* The low level controller code for EHCI has been split into
50  * PCI probes and EHCI specific code. This was done to facilitate the
51  * sharing of code between *BSD's
52  */
53
54 #include "opt_bus.h"
55
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/kernel.h>
59 #include <sys/module.h>
60 #include <sys/bus.h>
61 #include <sys/queue.h>
62 #include <sys/lock.h>
63 #include <sys/rman.h>
64
65 #include <bus/pci/pcivar.h>
66 #include <bus/pci/pcireg.h>
67
68 #include <bus/usb/usb.h>
69 #include <bus/usb/usbdi.h>
70 #include <bus/usb/usbdivar.h>
71 #include <bus/usb/usb_mem.h>
72
73 #include <bus/usb/ehcireg.h>
74 #include <bus/usb/ehcivar.h>
75
76 #define PCI_EHCI_VENDORID_ACERLABS      0x10b9
77 #define PCI_EHCI_VENDORID_AMD           0x1022
78 #define PCI_EHCI_VENDORID_APPLE         0x106b
79 #define PCI_EHCI_VENDORID_ATI           0x1002
80 #define PCI_EHCI_VENDORID_CMDTECH       0x1095
81 #define PCI_EHCI_VENDORID_INTEL         0x8086
82 #define PCI_EHCI_VENDORID_NEC           0x1033
83 #define PCI_EHCI_VENDORID_OPTI          0x1045
84 #define PCI_EHCI_VENDORID_PHILIPS       0x1131
85 #define PCI_EHCI_VENDORID_SIS           0x1039
86 #define PCI_EHCI_VENDORID_NVIDIA        0x12D2
87 #define PCI_EHCI_VENDORID_NVIDIA2       0x10DE
88 #define PCI_EHCI_VENDORID_VIA           0x1106
89
90 /* AcerLabs/ALi */
91 #define PCI_EHCI_DEVICEID_M5239         0x523910b9
92 static const char *ehci_device_m5239 = "ALi M5239 USB 2.0 controller";
93
94 /* AMD */
95 #define PCI_EHCI_DEVICEID_8111          0x74631022
96 #define PCI_EHCI_DEVICEID_CS5536        0x20951022
97 static const char *ehci_device_8111 = "AMD 8111 USB 2.0 controller";
98 static const char *ehci_device_CS5536 = "AMD CS5536 USB 2.0 controller";
99
100 /* ATI */
101 #define PCI_EHCI_DEVICEID_SB200         0x43451002
102 static const char *ehci_device_sb200 = "ATI SB200 USB 2.0 controller";
103 #define PCI_EHCI_DEVICEID_SB400         0x43731002
104 static const char *ehci_device_sb400 = "ATI SB400 USB 2.0 controller";
105
106 /* Intel */
107 #define PCI_EHCI_DEVICEID_6300          0x25ad8086
108 static const char *ehci_device_6300 = "Intel 6300ESB USB 2.0 controller";
109 #define PCI_EHCI_DEVICEID_ICH4          0x24cd8086
110 static const char *ehci_device_ich4 = "Intel 82801DB/L/M USB 2.0 controller";
111 #define PCI_EHCI_DEVICEID_ICH5          0x24dd8086
112 static const char *ehci_device_ich5 = "Intel 82801EB/R USB 2.0 controller";
113 #define PCI_EHCI_DEVICEID_ICH6          0x265c8086
114 static const char *ehci_device_ich6 = "Intel 82801FB USB 2.0 controller";
115 #define PCI_EHCI_DEVICEID_ICH7          0x27cc8086
116 static const char *ehci_device_ich7 = "Intel 82801GB/R USB 2.0 controller";
117  
118 /* NEC */
119 #define PCI_EHCI_DEVICEID_NEC           0x00e01033
120 static const char *ehci_device_nec = "NEC uPD 720100 USB 2.0 controller";
121
122 /* NVIDIA */
123 #define PCI_EHCI_DEVICEID_NF2           0x006810de
124 static const char *ehci_device_nf2 = "NVIDIA nForce2 USB 2.0 controller";
125 #define PCI_EHCI_DEVICEID_NF2_400       0x008810de
126 static const char *ehci_device_nf2_400 = "NVIDIA nForce2 Ultra 400 USB 2.0 controller";
127 #define PCI_EHCI_DEVICEID_NF3           0x00d810de
128 static const char *ehci_device_nf3 = "NVIDIA nForce3 USB 2.0 controller";
129 #define PCI_EHCI_DEVICEID_NF3_250       0x00e810de
130 static const char *ehci_device_nf3_250 = "NVIDIA nForce3 250 USB 2.0 controller";
131 #define PCI_EHCI_DEVICEID_NF4           0x005b10de
132 static const char *ehci_device_nf4 = "NVIDIA nForce4 USB 2.0 controller";
133
134 /* Philips */
135 #define PCI_EHCI_DEVICEID_ISP156X       0x15621131
136 static const char *ehci_device_isp156x = "Philips ISP156x USB 2.0 controller";
137
138 /* VIA */
139 #define PCI_EHCI_DEVICEID_VIA           0x31041106
140 static const char *ehci_device_via = "VIA VT6202 USB 2.0 controller";
141
142 /* Generic */
143 static const char *ehci_device_generic = "EHCI (generic) USB 2.0 controller";
144
145 #define PCI_EHCI_BASE_REG       0x10
146
147 #ifdef USB_DEBUG
148 #define EHCI_DEBUG USB_DEBUG
149 #define DPRINTF(x)      do { if (ehcidebug) kprintf x; } while (0)
150 extern int ehcidebug;
151 #else
152 #define DPRINTF(x)
153 #endif
154
155 static int ehci_pci_attach(device_t self);
156 static int ehci_pci_detach(device_t self);
157 static int ehci_pci_shutdown(device_t self);
158 static int ehci_pci_suspend(device_t self);
159 static int ehci_pci_resume(device_t self);
160 static void ehci_pci_givecontroller(device_t self);
161 static void ehci_pci_takecontroller(device_t self);
162
163 static int
164 ehci_pci_suspend(device_t self)
165 {
166         ehci_softc_t *sc = device_get_softc(self);
167         int err;
168
169         err = bus_generic_suspend(self);
170         if (err)
171                 return (err);
172         ehci_power(PWR_SUSPEND, sc);
173
174         return 0;
175 }
176
177 static int
178 ehci_pci_resume(device_t self)
179 {
180         ehci_softc_t *sc = device_get_softc(self);
181
182         ehci_pci_takecontroller(self);
183         ehci_power(PWR_RESUME, sc);
184         bus_generic_resume(self);
185
186         return 0;
187 }
188
189 static int
190 ehci_pci_shutdown(device_t self)
191 {
192         ehci_softc_t *sc = device_get_softc(self);
193         int err;
194
195         err = bus_generic_shutdown(self);
196         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
197                 ehci_shutdown(sc);
198                 ehci_pci_givecontroller(self);
199         }
200
201         return err;
202 }
203
204 static const char *
205 ehci_pci_match(device_t self)
206 {
207         u_int32_t device_id = pci_get_devid(self);
208
209         switch (device_id) {
210         case PCI_EHCI_DEVICEID_M5239:
211                 return (ehci_device_m5239);
212         case PCI_EHCI_DEVICEID_8111:
213                 return (ehci_device_8111);
214         case PCI_EHCI_DEVICEID_CS5536:
215                 return (ehci_device_CS5536);
216         case PCI_EHCI_DEVICEID_SB200:
217                 return (ehci_device_sb200);
218         case PCI_EHCI_DEVICEID_SB400:
219                 return (ehci_device_sb400);
220         case PCI_EHCI_DEVICEID_6300:
221                 return (ehci_device_6300);
222         case PCI_EHCI_DEVICEID_ICH4:
223                 return (ehci_device_ich4);
224         case PCI_EHCI_DEVICEID_ICH5:
225                 return (ehci_device_ich5);
226         case PCI_EHCI_DEVICEID_ICH6:
227                 return (ehci_device_ich6);
228         case PCI_EHCI_DEVICEID_ICH7:
229                 return (ehci_device_ich7);
230         case PCI_EHCI_DEVICEID_NEC:
231                 return (ehci_device_nec);
232         case PCI_EHCI_DEVICEID_NF2:
233                 return (ehci_device_nf2);
234         case PCI_EHCI_DEVICEID_NF2_400:
235                 return (ehci_device_nf2_400);
236         case PCI_EHCI_DEVICEID_NF3:
237                 return (ehci_device_nf3);
238         case PCI_EHCI_DEVICEID_NF3_250:
239                 return (ehci_device_nf3_250);
240         case PCI_EHCI_DEVICEID_NF4:
241                 return (ehci_device_nf4);
242         case PCI_EHCI_DEVICEID_ISP156X:
243                 return (ehci_device_isp156x);
244         case PCI_EHCI_DEVICEID_VIA:
245                 return (ehci_device_via);
246         default:
247                 if (pci_get_class(self) == PCIC_SERIALBUS
248                     && pci_get_subclass(self) == PCIS_SERIALBUS_USB
249                     && pci_get_progif(self) == PCI_INTERFACE_EHCI) {
250                         return (ehci_device_generic);
251                 }
252         }
253
254         return NULL;            /* dunno */
255 }
256
257 static int
258 ehci_pci_probe(device_t self)
259 {
260         const char *desc = ehci_pci_match(self);
261
262         if (desc) {
263                 device_set_desc(self, desc);
264                 device_set_async_attach(self, TRUE);
265                 return 0;
266         } else {
267                 return ENXIO;
268         }
269 }
270
271 static int
272 ehci_pci_attach(device_t self)
273 {
274         ehci_softc_t *sc = device_get_softc(self);
275         device_t parent;
276         device_t *neighbors;
277         device_t *nbus;
278         struct usb_softc *usb_sc;
279         struct usbd_bus *bsc;
280         int err;
281         int rid;
282         int ncomp;
283         int count, buscount;
284         int slot, function;
285         int res;
286         int i;
287
288         switch(pci_read_config(self, PCI_USBREV, 1) & PCI_USBREV_MASK) {
289         case PCI_USBREV_PRE_1_0:
290         case PCI_USBREV_1_0:
291         case PCI_USBREV_1_1:
292                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
293                 kprintf("pre-2.0 USB rev\n");
294                 return ENXIO;
295         case PCI_USBREV_2_0:
296                 sc->sc_bus.usbrev = USBREV_2_0;
297                 break;
298         default:
299                 sc->sc_bus.usbrev = USBREV_UNKNOWN;
300                 break;
301         }
302
303         pci_enable_busmaster(self);
304
305         rid = PCI_CBMEM;
306         sc->io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid,
307             RF_ACTIVE);
308         if (!sc->io_res) {
309                 device_printf(self, "Could not map memory\n");
310                 return ENXIO;
311         }
312         sc->iot = rman_get_bustag(sc->io_res);
313         sc->ioh = rman_get_bushandle(sc->io_res);
314
315         rid = 0;
316         sc->irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
317             RF_SHAREABLE | RF_ACTIVE);
318         if (sc->irq_res == NULL) {
319                 device_printf(self, "Could not allocate irq\n");
320                 ehci_pci_detach(self);
321                 return ENXIO;
322         }
323         sc->sc_bus.bdev = device_add_child(self, "usb", -1);
324         if (!sc->sc_bus.bdev) {
325                 device_printf(self, "Could not add USB device\n");
326                 ehci_pci_detach(self);
327                 return ENOMEM;
328         }
329         device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
330
331         /* ehci_pci_match will never return NULL if ehci_pci_probe succeeded */
332         device_set_desc(sc->sc_bus.bdev, ehci_pci_match(self));
333         switch (pci_get_vendor(self)) {
334         case PCI_EHCI_VENDORID_ACERLABS:
335                 ksprintf(sc->sc_vendor, "AcerLabs");
336                 break;
337         case PCI_EHCI_VENDORID_AMD:
338                 ksprintf(sc->sc_vendor, "AMD");
339                 break;
340         case PCI_EHCI_VENDORID_APPLE:
341                 ksprintf(sc->sc_vendor, "Apple");
342                 break;
343         case PCI_EHCI_VENDORID_ATI:
344                 ksprintf(sc->sc_vendor, "ATI");
345                 break;
346         case PCI_EHCI_VENDORID_CMDTECH:
347                 ksprintf(sc->sc_vendor, "CMDTECH");
348                 break;
349         case PCI_EHCI_VENDORID_INTEL:
350                 ksprintf(sc->sc_vendor, "Intel");
351                 break;
352         case PCI_EHCI_VENDORID_NEC:
353                 ksprintf(sc->sc_vendor, "NEC");
354                 break;
355         case PCI_EHCI_VENDORID_OPTI:
356                 ksprintf(sc->sc_vendor, "OPTi");
357                 break;
358         case PCI_EHCI_VENDORID_SIS:
359                 ksprintf(sc->sc_vendor, "SiS");
360                 break;
361         case PCI_EHCI_VENDORID_NVIDIA:
362         case PCI_EHCI_VENDORID_NVIDIA2:
363                 ksprintf(sc->sc_vendor, "nVidia");
364                 break;
365         case PCI_EHCI_VENDORID_VIA:
366                 ksprintf(sc->sc_vendor, "VIA");
367                 break;
368         default:
369                 if (bootverbose)
370                         device_printf(self, "(New EHCI DeviceId=0x%08x)\n",
371                             pci_get_devid(self));
372                 ksprintf(sc->sc_vendor, "(0x%04x)", pci_get_vendor(self));
373         }
374
375         err = bus_setup_intr(self, sc->irq_res, 0,
376             (driver_intr_t *) ehci_intr, sc, &sc->ih, NULL);
377         if (err) {
378                 device_printf(self, "Could not setup irq, %d\n", err);
379                 sc->ih = NULL;
380                 ehci_pci_detach(self);
381                 return ENXIO;
382         }
383
384         /* Enable workaround for dropped interrupts as required */
385         switch (pci_get_vendor(self)) {
386         case PCI_EHCI_VENDORID_ATI:
387         case PCI_EHCI_VENDORID_VIA:
388                 sc->sc_flags |= EHCI_SCFLG_LOSTINTRBUG;
389                 if (bootverbose)
390                         device_printf(self,
391                             "Dropped interrupts workaround enabled\n");
392                 break;
393         default:
394                 break;
395         }
396
397         /*
398          * Find companion controllers.  According to the spec they always
399          * have lower function numbers so they should be enumerated already.
400          */
401         parent = device_get_parent(self);
402         res = device_get_children(parent, &neighbors, &count);
403         if (res != 0) {
404                 device_printf(self, "Error finding companion busses\n");
405                 ehci_pci_detach(self);
406                 return ENXIO;
407         }
408         ncomp = 0;
409         slot = pci_get_slot(self);
410         function = pci_get_function(self);
411         for (i = 0; i < count; i++) {
412                 if (pci_get_slot(neighbors[i]) == slot && \
413                         pci_get_function(neighbors[i]) < function) {
414                         res = device_get_children(neighbors[i],
415                                 &nbus, &buscount);
416                         if (res != 0 || buscount != 1)
417                                 continue;
418                         usb_sc = device_get_softc(nbus[0]);
419                         if (usb_sc == NULL)
420                                 continue;
421                         bsc = usb_getbushandle(usb_sc);
422                         if (bsc == NULL)
423                                 continue;
424                         DPRINTF(("ehci_pci_attach: companion %s\n",
425                             device_get_nameunit(bsc->bdev)));
426                         sc->sc_comps[ncomp++] = bsc;
427                         if (ncomp >= EHCI_COMPANION_MAX)
428                                 break;
429                 }
430         }
431         sc->sc_ncomp = ncomp;
432
433         ehci_pci_takecontroller(self);
434         err = ehci_init(sc);
435         if (err == 0)
436                 err = device_probe_and_attach(sc->sc_bus.bdev);
437
438         if (err) {
439                 device_printf(self, "USB init failed err=%d\n", err);
440                 ehci_pci_detach(self);
441                 return EIO;
442         }
443         return 0;
444 }
445
446 static int
447 ehci_pci_detach(device_t self)
448 {
449         ehci_softc_t *sc = device_get_softc(self);
450
451         if (sc->sc_flags & EHCI_SCFLG_DONEINIT) {
452                 ehci_detach(sc, 0);
453                 sc->sc_flags &= ~EHCI_SCFLG_DONEINIT;
454         }
455
456         /*
457          * disable interrupts that might have been switched on in ehci_init
458          */
459         if (sc->iot && sc->ioh)
460                 bus_space_write_4(sc->iot, sc->ioh, EHCI_USBINTR, 0);
461
462         if (sc->irq_res && sc->ih) {
463                 int err = bus_teardown_intr(self, sc->irq_res, sc->ih);
464
465                 if (err)
466                         /* XXX or should we panic? */
467                         device_printf(self, "Could not tear down irq, %d\n",
468                             err);
469                 sc->ih = NULL;
470         }
471         if (sc->sc_bus.bdev) {
472                 device_delete_child(self, sc->sc_bus.bdev);
473                 sc->sc_bus.bdev = NULL;
474         }
475         if (sc->irq_res) {
476                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
477                 sc->irq_res = NULL;
478         }
479         if (sc->io_res) {
480                 bus_release_resource(self, SYS_RES_MEMORY, PCI_CBMEM, sc->io_res);
481                 sc->io_res = NULL;
482                 sc->iot = 0;
483                 sc->ioh = 0;
484         }
485         return 0;
486 }
487
488 static void
489 ehci_pci_takecontroller(device_t self)
490 {
491         ehci_softc_t *sc = device_get_softc(self);
492         u_int32_t cparams, eec, legsup;
493         int eecp, i;
494
495         cparams = EREAD4(sc, EHCI_HCCPARAMS);
496
497         /* Synchronise with the BIOS if it owns the controller. */
498         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
499              eecp = EHCI_EECP_NEXT(eec)) {
500                 eec = pci_read_config(self, eecp, 4);
501                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
502                         continue;
503                 legsup = eec;
504                 pci_write_config(self, eecp, legsup | EHCI_LEGSUP_OSOWNED, 4);
505                 if (legsup & EHCI_LEGSUP_BIOSOWNED) {
506                         device_printf(sc->sc_bus.bdev,
507                             "waiting for BIOS to give up control\n");
508                         for (i = 0; i < 5000; i++) {
509                                 legsup = pci_read_config(self, eecp, 4);
510                                 if ((legsup & EHCI_LEGSUP_BIOSOWNED) == 0)
511                                         break;
512                                 DELAY(1000);
513                         }
514                         if (legsup & EHCI_LEGSUP_BIOSOWNED)
515                                 device_printf(sc->sc_bus.bdev,
516                                     "timed out waiting for BIOS\n");
517                 }
518         }
519 }
520
521 /*
522  * Return the controller to the BIOS.  Do we really need to do this?
523  *
524  * One thing we do need to do is give the chip reset (from the shutdown)
525  * time to finish before handing anything back.  This fixes a machine
526  * lockup.
527  */
528 static void
529 ehci_pci_givecontroller(device_t self)
530 {
531         ehci_softc_t *sc = device_get_softc(self);
532         u_int32_t cparams, eec, legsup;
533         int eecp;
534
535         DELAY(1000);
536         cparams = EREAD4(sc, EHCI_HCCPARAMS);
537         for (eecp = EHCI_HCC_EECP(cparams); eecp != 0;
538              eecp = EHCI_EECP_NEXT(eec)) {
539                 eec = pci_read_config(self, eecp, 4);
540                 if (EHCI_EECP_ID(eec) != EHCI_EC_LEGSUP)
541                         continue;
542                 legsup = eec;
543                 pci_write_config(self, eecp, legsup & ~EHCI_LEGSUP_OSOWNED, 4);
544         }
545 }
546
547 static device_method_t ehci_methods[] = {
548         /* Device interface */
549         DEVMETHOD(device_probe, ehci_pci_probe),
550         DEVMETHOD(device_attach, ehci_pci_attach),
551         DEVMETHOD(device_detach, ehci_pci_detach),
552         DEVMETHOD(device_suspend, ehci_pci_suspend),
553         DEVMETHOD(device_resume, ehci_pci_resume),
554         DEVMETHOD(device_shutdown, ehci_pci_shutdown),
555
556         /* Bus interface */
557         DEVMETHOD(bus_print_child, bus_generic_print_child),
558
559         {0, 0}
560 };
561
562 static driver_t ehci_driver = {
563         "ehci",
564         ehci_methods,
565         sizeof(ehci_softc_t),
566 };
567
568 static devclass_t ehci_devclass;
569
570 DRIVER_MODULE(ehci, pci, ehci_driver, ehci_devclass, NULL, NULL);
571 DRIVER_MODULE(ehci, cardbus, ehci_driver, ehci_devclass, NULL, NULL);