2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2008 Atheros Communications, Inc.
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar2425.c 188979 2009-02-24 01:07:06Z sam $
23 #include "ah_internal.h"
25 #include "ar5212/ar5212.h"
26 #include "ar5212/ar5212reg.h"
27 #include "ar5212/ar5212phy.h"
29 #include "ah_eeprom_v3.h"
33 #include "ar5212/ar5212.ini"
36 RF_HAL_FUNCS base; /* public state, must be first */
37 uint16_t pcdacTable[PWR_TABLE_SIZE_2413];
39 uint32_t Bank1Data[NELEM(ar5212Bank1_2425)];
40 uint32_t Bank2Data[NELEM(ar5212Bank2_2425)];
41 uint32_t Bank3Data[NELEM(ar5212Bank3_2425)];
42 uint32_t Bank6Data[NELEM(ar5212Bank6_2425)]; /* 2417 is same size */
43 uint32_t Bank7Data[NELEM(ar5212Bank7_2425)];
45 #define AR2425(ah) ((struct ar2425State *) AH5212(ah)->ah_rfHal)
47 extern void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
48 uint32_t numBits, uint32_t firstBit, uint32_t column);
51 ar2425WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
54 HAL_INI_WRITE_ARRAY(ah, ar5212Modes_2425, modesIndex, writes);
55 HAL_INI_WRITE_ARRAY(ah, ar5212Common_2425, 1, writes);
56 HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_2425, freqIndex, writes);
59 * for SWAN similar to Condor
60 * Bit 0 enables link to go to L1 when MAC goes to sleep.
61 * Bit 3 enables the loop back the link down to reset.
63 if (AH_PRIVATE(ah)->ah_ispcie && && ath_hal_pcieL1SKPEnable) {
64 OS_REG_WRITE(ah, AR_PCIE_PMC,
65 AR_PCIE_PMC_ENA_L1 | AR_PCIE_PMC_ENA_RESET);
68 * for Standby issue in Swan/Condor.
69 * Bit 9 (MAC_WOW_PWR_STATE_MASK_D2)to be set to avoid skips
70 * before last Training Sequence 2 (TS2)
71 * Bit 8 (MAC_WOW_PWR_STATE_MASK_D1)to be unset to assert
72 * Power Reset along with PCI Reset
74 OS_REG_SET_BIT(ah, AR_PCIE_PMC, MAC_WOW_PWR_STATE_MASK_D2);
79 * Take the MHz channel value and set the Channel value
81 * ASSUMES: Writes enabled to analog bus
84 ar2425SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
86 uint16_t freq = ath_hal_gethwchannel(ah, chan);
87 uint32_t channelSel = 0;
88 uint32_t bModeSynth = 0;
89 uint32_t aModeRefSel = 0;
92 OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
97 channelSel = freq - 2272;
98 channelSel = ath_hal_reverseBits(channelSel, 8);
100 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
102 // Enable channel spreading for channel 14
103 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
104 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
106 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
107 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
110 } else if (((freq % 5) == 2) && (freq <= 5435)) {
111 freq = freq - 2; /* Align to even 5MHz raster */
112 channelSel = ath_hal_reverseBits(
113 (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
114 aModeRefSel = ath_hal_reverseBits(0, 2);
115 } else if ((freq % 20) == 0 && freq >= 5120) {
116 channelSel = ath_hal_reverseBits(
117 ((freq - 4800) / 20 << 2), 8);
118 aModeRefSel = ath_hal_reverseBits(1, 2);
119 } else if ((freq % 10) == 0) {
120 channelSel = ath_hal_reverseBits(
121 ((freq - 4800) / 10 << 1), 8);
122 aModeRefSel = ath_hal_reverseBits(1, 2);
123 } else if ((freq % 5) == 0) {
124 channelSel = ath_hal_reverseBits(
125 (freq - 4800) / 5, 8);
126 aModeRefSel = ath_hal_reverseBits(1, 2);
128 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
133 reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
135 OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
138 OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
140 AH_PRIVATE(ah)->ah_curchan = chan;
145 * Reads EEPROM header info from device structure and programs
148 * REQUIRES: Access to the analog rf device
151 ar2425SetRfRegs(struct ath_hal *ah,
152 const struct ieee80211_channel *chan,
153 uint16_t modesIndex, uint16_t *rfXpdGain)
155 #define RF_BANK_SETUP(_priv, _ix, _col) do { \
157 for (i = 0; i < NELEM(ar5212Bank##_ix##_2425); i++) \
158 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_2425[i][_col];\
160 struct ath_hal_5212 *ahp = AH5212(ah);
161 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
162 struct ar2425State *priv = AR2425(ah);
163 uint16_t ob2GHz = 0, db2GHz = 0;
166 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
167 __func__, chan->ic_freq, chan->ic_flags, modesIndex);
171 /* Setup rf parameters */
172 if (IEEE80211_IS_CHAN_B(chan)) {
173 ob2GHz = ee->ee_obFor24;
174 db2GHz = ee->ee_dbFor24;
176 ob2GHz = ee->ee_obFor24g;
177 db2GHz = ee->ee_dbFor24g;
181 RF_BANK_SETUP(priv, 1, 1);
184 RF_BANK_SETUP(priv, 2, modesIndex);
187 RF_BANK_SETUP(priv, 3, modesIndex);
190 RF_BANK_SETUP(priv, 6, modesIndex);
192 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 193, 0);
193 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 190, 0);
196 RF_BANK_SETUP(priv, 7, modesIndex);
198 /* Write Analog registers */
199 HAL_INI_WRITE_BANK(ah, ar5212Bank1_2425, priv->Bank1Data, regWrites);
200 HAL_INI_WRITE_BANK(ah, ar5212Bank2_2425, priv->Bank2Data, regWrites);
201 HAL_INI_WRITE_BANK(ah, ar5212Bank3_2425, priv->Bank3Data, regWrites);
203 HALASSERT(NELEM(ar5212Bank6_2425) == NELEM(ar5212Bank6_2417));
204 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2417, priv->Bank6Data,
207 HAL_INI_WRITE_BANK(ah, ar5212Bank6_2425, priv->Bank6Data,
209 HAL_INI_WRITE_BANK(ah, ar5212Bank7_2425, priv->Bank7Data, regWrites);
211 /* Now that we have reprogrammed rfgain value, clear the flag. */
212 ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
214 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
220 * Return a reference to the requested RF Bank.
223 ar2425GetRfBank(struct ath_hal *ah, int bank)
225 struct ar2425State *priv = AR2425(ah);
227 HALASSERT(priv != AH_NULL);
229 case 1: return priv->Bank1Data;
230 case 2: return priv->Bank2Data;
231 case 3: return priv->Bank3Data;
232 case 6: return priv->Bank6Data;
233 case 7: return priv->Bank7Data;
235 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
241 * Return indices surrounding the value in sorted integer lists.
243 * NB: the input list is assumed to be sorted in ascending order
246 GetLowerUpperIndex(int16_t v, const uint16_t *lp, uint16_t listSize,
247 uint32_t *vlo, uint32_t *vhi)
250 const uint16_t *ep = lp+listSize;
254 * Check first and last elements for out-of-bounds conditions.
256 if (target < lp[0]) {
260 if (target >= ep[-1]) {
261 *vlo = *vhi = listSize - 1;
265 /* look for value being near or between 2 values in list */
266 for (tp = lp; tp < ep; tp++) {
268 * If value is close to the current value of the list
269 * then target is not between values, it is one of the values
272 *vlo = *vhi = tp - (const uint16_t *) lp;
276 * Look for value being between current value and next value
277 * if so return these 2 values
279 if (target < tp[1]) {
280 *vlo = tp - (const uint16_t *) lp;
288 * Fill the Vpdlist for indices Pmax-Pmin
291 ar2425FillVpdTable(uint32_t pdGainIdx, int16_t Pmin, int16_t Pmax,
292 const int16_t *pwrList, const uint16_t *VpdList,
293 uint16_t numIntercepts,
294 uint16_t retVpdList[][64])
297 int16_t currPwr = (int16_t)(2*Pmin);
298 /* since Pmin is pwr*2 and pwrList is 4*pwr */
304 if (numIntercepts < 2)
307 while (ii <= (uint16_t)(Pmax - Pmin)) {
308 GetLowerUpperIndex(currPwr, (const uint16_t *) pwrList,
309 numIntercepts, &(idxL), &(idxR));
311 idxR = 1; /* extrapolate below */
312 if (idxL == (uint32_t)(numIntercepts - 1))
313 idxL = numIntercepts - 2; /* extrapolate above */
314 if (pwrList[idxL] == pwrList[idxR])
318 (((currPwr - pwrList[idxL])*VpdList[idxR]+
319 (pwrList[idxR] - currPwr)*VpdList[idxL])/
320 (pwrList[idxR] - pwrList[idxL]));
321 retVpdList[pdGainIdx][ii] = kk;
323 currPwr += 2; /* half dB steps */
330 * Returns interpolated or the scaled up interpolated value
333 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
334 int16_t targetLeft, int16_t targetRight)
338 if (srcRight != srcLeft) {
339 rv = ((target - srcLeft)*targetRight +
340 (srcRight - target)*targetLeft) / (srcRight - srcLeft);
348 * Uses the data points read from EEPROM to reconstruct the pdadc power table
349 * Called by ar2425SetPowerTable()
352 ar2425getGainBoundariesAndPdadcsForPowers(struct ath_hal *ah, uint16_t channel,
353 const RAW_DATA_STRUCT_2413 *pRawDataset,
354 uint16_t pdGainOverlap_t2,
355 int16_t *pMinCalPower, uint16_t pPdGainBoundaries[],
356 uint16_t pPdGainValues[], uint16_t pPDADCValues[])
358 /* Note the items statically allocated below are to reduce stack usage */
360 int32_t ss;/* potentially -ve index for taking care of pdGainOverlap */
362 uint32_t numPdGainsUsed = 0;
363 static uint16_t VpdTable_L[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
364 /* filled out Vpd table for all pdGains (chanL) */
365 static uint16_t VpdTable_R[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
366 /* filled out Vpd table for all pdGains (chanR) */
367 static uint16_t VpdTable_I[MAX_NUM_PDGAINS_PER_CHANNEL][MAX_PWR_RANGE_IN_HALF_DB];
368 /* filled out Vpd table for all pdGains (interpolated) */
370 * If desired to support -ve power levels in future, just
371 * change pwr_I_0 to signed 5-bits.
373 static int16_t Pmin_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
374 /* to accomodate -ve power levels later on. */
375 static int16_t Pmax_t2[MAX_NUM_PDGAINS_PER_CHANNEL];
376 /* to accomodate -ve power levels later on */
380 uint32_t sizeCurrVpdTable, maxIndex, tgtIndex;
382 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "==>%s:\n", __func__);
384 /* Get upper lower index */
385 GetLowerUpperIndex(channel, pRawDataset->pChannels,
386 pRawDataset->numChannels, &(idxL), &(idxR));
388 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
389 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
390 /* work backwards 'cause highest pdGain for lowest power */
391 numVpd = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].numVpd;
393 pPdGainValues[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pd_gain;
394 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0];
395 if (Pmin_t2[numPdGainsUsed] >pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]) {
396 Pmin_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0];
398 Pmin_t2[numPdGainsUsed] = (int16_t)
399 (Pmin_t2[numPdGainsUsed] / 2);
400 Pmax_t2[numPdGainsUsed] = pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[numVpd-1];
401 if (Pmax_t2[numPdGainsUsed] > pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1])
402 Pmax_t2[numPdGainsUsed] =
403 pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[numVpd-1];
404 Pmax_t2[numPdGainsUsed] = (int16_t)(Pmax_t2[numPdGainsUsed] / 2);
406 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
407 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].pwr_t4[0]),
408 &(pRawDataset->pDataPerChannel[idxL].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_L
411 numPdGainsUsed, Pmin_t2[numPdGainsUsed], Pmax_t2[numPdGainsUsed],
412 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].pwr_t4[0]),
413 &(pRawDataset->pDataPerChannel[idxR].pDataPerPDGain[jj].Vpd[0]), numVpd, VpdTable_R
415 for (kk = 0; kk < (uint16_t)(Pmax_t2[numPdGainsUsed] - Pmin_t2[numPdGainsUsed]); kk++) {
416 VpdTable_I[numPdGainsUsed][kk] =
418 channel, pRawDataset->pChannels[idxL], pRawDataset->pChannels[idxR],
419 (int16_t)VpdTable_L[numPdGainsUsed][kk], (int16_t)VpdTable_R[numPdGainsUsed][kk]);
421 /* fill VpdTable_I for this pdGain */
424 /* if this pdGain is used */
427 *pMinCalPower = Pmin_t2[0];
428 kk = 0; /* index for the final table */
429 for (ii = 0; ii < numPdGainsUsed; ii++) {
430 if (ii == (numPdGainsUsed - 1))
431 pPdGainBoundaries[ii] = Pmax_t2[ii] +
432 PD_GAIN_BOUNDARY_STRETCH_IN_HALF_DB;
434 pPdGainBoundaries[ii] = (uint16_t)
435 ((Pmax_t2[ii] + Pmin_t2[ii+1]) / 2 );
437 /* Find starting index for this pdGain */
439 ss = 0; /* for the first pdGain, start from index 0 */
441 ss = (pPdGainBoundaries[ii-1] - Pmin_t2[ii]) -
443 Vpd_step = (uint16_t)(VpdTable_I[ii][1] - VpdTable_I[ii][0]);
444 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
446 *-ve ss indicates need to extrapolate data below for this pdGain
449 tmpVal = (int16_t)(VpdTable_I[ii][0] + ss*Vpd_step);
450 pPDADCValues[kk++] = (uint16_t)((tmpVal < 0) ? 0 : tmpVal);
454 sizeCurrVpdTable = Pmax_t2[ii] - Pmin_t2[ii];
455 tgtIndex = pPdGainBoundaries[ii] + pdGainOverlap_t2 - Pmin_t2[ii];
456 maxIndex = (tgtIndex < sizeCurrVpdTable) ? tgtIndex : sizeCurrVpdTable;
458 while (ss < (int16_t)maxIndex)
459 pPDADCValues[kk++] = VpdTable_I[ii][ss++];
461 Vpd_step = (uint16_t)(VpdTable_I[ii][sizeCurrVpdTable-1] -
462 VpdTable_I[ii][sizeCurrVpdTable-2]);
463 Vpd_step = (uint16_t)((Vpd_step < 1) ? 1 : Vpd_step);
465 * for last gain, pdGainBoundary == Pmax_t2, so will
466 * have to extrapolate
468 if (tgtIndex > maxIndex) { /* need to extrapolate above */
469 while(ss < (int16_t)tgtIndex) {
471 (VpdTable_I[ii][sizeCurrVpdTable-1] +
472 (ss-maxIndex)*Vpd_step);
473 pPDADCValues[kk++] = (tmpVal > 127) ?
477 } /* extrapolated above */
478 } /* for all pdGainUsed */
480 while (ii < MAX_NUM_PDGAINS_PER_CHANNEL) {
481 pPdGainBoundaries[ii] = pPdGainBoundaries[ii-1];
485 pPDADCValues[kk] = pPDADCValues[kk-1];
489 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "<==%s\n", __func__);
493 /* Same as 2413 set power table */
495 ar2425SetPowerTable(struct ath_hal *ah,
496 int16_t *minPower, int16_t *maxPower,
497 const struct ieee80211_channel *chan,
500 uint16_t freq = ath_hal_gethwchannel(ah, chan);
501 struct ath_hal_5212 *ahp = AH5212(ah);
502 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
503 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
504 uint16_t pdGainOverlap_t2;
505 int16_t minCalPower2413_t2;
506 uint16_t *pdadcValues = ahp->ah_pcdacTable;
507 uint16_t gainBoundaries[4];
508 uint32_t i, reg32, regoffset;
510 HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s:chan 0x%x flag 0x%x\n",
511 __func__, freq, chan->ic_flags);
513 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
514 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
515 else if (IEEE80211_IS_CHAN_B(chan))
516 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
518 HALDEBUG(ah, HAL_DEBUG_ANY, "%s:illegal mode\n", __func__);
522 pdGainOverlap_t2 = (uint16_t) SM(OS_REG_READ(ah, AR_PHY_TPCRG5),
523 AR_PHY_TPCRG5_PD_GAIN_OVERLAP);
525 ar2425getGainBoundariesAndPdadcsForPowers(ah, freq,
526 pRawDataset, pdGainOverlap_t2,&minCalPower2413_t2,gainBoundaries,
527 rfXpdGain, pdadcValues);
529 OS_REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_NUM_PD_GAIN,
530 (pRawDataset->pDataPerChannel[0].numPdGains - 1));
533 * Note the pdadc table may not start at 0 dBm power, could be
534 * negative or greater than 0. Need to offset the power
535 * values by the amount of minPower for griffin
537 if (minCalPower2413_t2 != 0)
538 ahp->ah_txPowerIndexOffset = (int16_t)(0 - minCalPower2413_t2);
540 ahp->ah_txPowerIndexOffset = 0;
542 /* Finally, write the power values into the baseband power table */
543 regoffset = 0x9800 + (672 <<2); /* beginning of pdadc table in griffin */
544 for (i = 0; i < 32; i++) {
545 reg32 = ((pdadcValues[4*i + 0] & 0xFF) << 0) |
546 ((pdadcValues[4*i + 1] & 0xFF) << 8) |
547 ((pdadcValues[4*i + 2] & 0xFF) << 16) |
548 ((pdadcValues[4*i + 3] & 0xFF) << 24) ;
549 OS_REG_WRITE(ah, regoffset, reg32);
553 OS_REG_WRITE(ah, AR_PHY_TPCRG5,
554 SM(pdGainOverlap_t2, AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
555 SM(gainBoundaries[0], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1) |
556 SM(gainBoundaries[1], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2) |
557 SM(gainBoundaries[2], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3) |
558 SM(gainBoundaries[3], AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
564 ar2425GetMinPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
567 uint16_t Pmin=0,numVpd;
569 for (ii = 0; ii < MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
570 jj = MAX_NUM_PDGAINS_PER_CHANNEL - ii - 1;
571 /* work backwards 'cause highest pdGain for lowest power */
572 numVpd = data->pDataPerPDGain[jj].numVpd;
574 Pmin = data->pDataPerPDGain[jj].pwr_t4[0];
582 ar2425GetMaxPower(struct ath_hal *ah, const RAW_DATA_PER_CHANNEL_2413 *data)
585 uint16_t Pmax=0,numVpd;
587 for (ii=0; ii< MAX_NUM_PDGAINS_PER_CHANNEL; ii++) {
588 /* work forwards cuase lowest pdGain for highest power */
589 numVpd = data->pDataPerPDGain[ii].numVpd;
591 Pmax = data->pDataPerPDGain[ii].pwr_t4[numVpd-1];
600 ar2425GetChannelMaxMinPower(struct ath_hal *ah,
601 const struct ieee80211_channel *chan,
602 int16_t *maxPow, int16_t *minPow)
604 uint16_t freq = chan->ic_freq; /* NB: never mapped */
605 const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
606 const RAW_DATA_STRUCT_2413 *pRawDataset = AH_NULL;
607 const RAW_DATA_PER_CHANNEL_2413 *data = AH_NULL;
608 uint16_t numChannels;
609 int totalD,totalF, totalMin,last, i;
613 if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan))
614 pRawDataset = &ee->ee_rawDataset2413[headerInfo11G];
615 else if (IEEE80211_IS_CHAN_B(chan))
616 pRawDataset = &ee->ee_rawDataset2413[headerInfo11B];
620 numChannels = pRawDataset->numChannels;
621 data = pRawDataset->pDataPerChannel;
623 /* Make sure the channel is in the range of the TP values
629 if ((freq < data[0].channelValue) ||
630 (freq > data[numChannels-1].channelValue)) {
631 if (freq < data[0].channelValue) {
632 *maxPow = ar2425GetMaxPower(ah, &data[0]);
633 *minPow = ar2425GetMinPower(ah, &data[0]);
636 *maxPow = ar2425GetMaxPower(ah, &data[numChannels - 1]);
637 *minPow = ar2425GetMinPower(ah, &data[numChannels - 1]);
642 /* Linearly interpolate the power value now */
643 for (last=0,i=0; (i<numChannels) && (freq > data[i].channelValue);
645 totalD = data[i].channelValue - data[last].channelValue;
647 totalF = ar2425GetMaxPower(ah, &data[i]) - ar2425GetMaxPower(ah, &data[last]);
648 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) +
649 ar2425GetMaxPower(ah, &data[last])*totalD)/totalD);
650 totalMin = ar2425GetMinPower(ah, &data[i]) - ar2425GetMinPower(ah, &data[last]);
651 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) +
652 ar2425GetMinPower(ah, &data[last])*totalD)/totalD);
655 if (freq == data[i].channelValue) {
656 *maxPow = ar2425GetMaxPower(ah, &data[i]);
657 *minPow = ar2425GetMinPower(ah, &data[i]);
665 * Free memory for analog bank scratch buffers
668 ar2425RfDetach(struct ath_hal *ah)
670 struct ath_hal_5212 *ahp = AH5212(ah);
672 HALASSERT(ahp->ah_rfHal != AH_NULL);
673 ath_hal_free(ahp->ah_rfHal);
674 ahp->ah_rfHal = AH_NULL;
678 * Allocate memory for analog bank scratch buffers
679 * Scratch Buffer will be reinitialized every reset so no need to zero now
682 ar2425RfAttach(struct ath_hal *ah, HAL_STATUS *status)
684 struct ath_hal_5212 *ahp = AH5212(ah);
685 struct ar2425State *priv;
687 HALASSERT(ah->ah_magic == AR5212_MAGIC);
689 HALASSERT(ahp->ah_rfHal == AH_NULL);
690 priv = ath_hal_malloc(sizeof(struct ar2425State));
691 if (priv == AH_NULL) {
692 HALDEBUG(ah, HAL_DEBUG_ANY,
693 "%s: cannot allocate private state\n", __func__);
694 *status = HAL_ENOMEM; /* XXX */
697 priv->base.rfDetach = ar2425RfDetach;
698 priv->base.writeRegs = ar2425WriteRegs;
699 priv->base.getRfBank = ar2425GetRfBank;
700 priv->base.setChannel = ar2425SetChannel;
701 priv->base.setRfRegs = ar2425SetRfRegs;
702 priv->base.setPowerTable = ar2425SetPowerTable;
703 priv->base.getChannelMaxMinPower = ar2425GetChannelMaxMinPower;
704 priv->base.getNfAdjust = ar5212GetNfAdjust;
706 ahp->ah_pcdacTable = priv->pcdacTable;
707 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
708 ahp->ah_rfHal = &priv->base;
714 ar2425Probe(struct ath_hal *ah)
716 return IS_2425(ah) || IS_2417(ah);
718 AH_RF(RF2425, ar2425Probe, ar2425RfAttach);