sys/dev/netif/ath/hal/ath_hal/ar5212/ar5112.c

   1 /*
   2  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
   3  * Copyright (c) 2002-2008 Atheros Communications, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  *
  17  * $FreeBSD: head/sys/dev/ath/ath_hal/ar5212/ar5112.c 187831 2009-01-28 18:00:22Z sam $
  18  * $DragonFly$
  19  */
  20 #include "opt_ah.h"
  21
  22 #include "ah.h"
  23 #include "ah_internal.h"
  24
  25 #include "ah_eeprom_v3.h"
  26
  27 #include "ar5212/ar5212.h"
  28 #include "ar5212/ar5212reg.h"
  29 #include "ar5212/ar5212phy.h"
  30
  31 #define AH_5212_5112
  32 #include "ar5212/ar5212.ini"
  33
  34 struct ar5112State {
  35         RF_HAL_FUNCS    base;           /* public state, must be first */
  36         uint16_t        pcdacTable[PWR_TABLE_SIZE];
  37
  38         uint32_t        Bank1Data[NELEM(ar5212Bank1_5112)];
  39         uint32_t        Bank2Data[NELEM(ar5212Bank2_5112)];
  40         uint32_t        Bank3Data[NELEM(ar5212Bank3_5112)];
  41         uint32_t        Bank6Data[NELEM(ar5212Bank6_5112)];
  42         uint32_t        Bank7Data[NELEM(ar5212Bank7_5112)];
  43 };
  44 #define AR5112(ah)      ((struct ar5112State *) AH5212(ah)->ah_rfHal)
  45
  46 static  void ar5212GetLowerUpperIndex(uint16_t v,
  47                 uint16_t *lp, uint16_t listSize,
  48                 uint32_t *vlo, uint32_t *vhi);
  49 static HAL_BOOL getFullPwrTable(uint16_t numPcdacs, uint16_t *pcdacs,
  50                 int16_t *power, int16_t maxPower, int16_t *retVals);
  51 static int16_t getPminAndPcdacTableFromPowerTable(int16_t *pwrTableT4,
  52                 uint16_t retVals[]);
  53 static int16_t getPminAndPcdacTableFromTwoPowerTables(int16_t *pwrTableLXpdT4,
  54                 int16_t *pwrTableHXpdT4, uint16_t retVals[], int16_t *pMid);
  55 static int16_t interpolate_signed(uint16_t target,
  56                 uint16_t srcLeft, uint16_t srcRight,
  57                 int16_t targetLeft, int16_t targetRight);
  58
  59 extern  void ar5212ModifyRfBuffer(uint32_t *rfBuf, uint32_t reg32,
  60                 uint32_t numBits, uint32_t firstBit, uint32_t column);
  61
  62 static void
  63 ar5112WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
  64         int writes)
  65 {
  66         HAL_INI_WRITE_ARRAY(ah, ar5212Modes_5112, modesIndex, writes);
  67         HAL_INI_WRITE_ARRAY(ah, ar5212Common_5112, 1, writes);
  68         HAL_INI_WRITE_ARRAY(ah, ar5212BB_RfGain_5112, freqIndex, writes);
  69 }
  70
  71 /*
  72  * Take the MHz channel value and set the Channel value
  73  *
  74  * ASSUMES: Writes enabled to analog bus
  75  */
  76 static HAL_BOOL
  77 ar5112SetChannel(struct ath_hal *ah, const struct ieee80211_channel *chan)
  78 {
  79         uint16_t freq = ath_hal_gethwchannel(ah, chan);
  80         uint32_t channelSel  = 0;
  81         uint32_t bModeSynth  = 0;
  82         uint32_t aModeRefSel = 0;
  83         uint32_t reg32       = 0;
  84
  85         OS_MARK(ah, AH_MARK_SETCHANNEL, freq);
  86
  87         if (freq < 4800) {
  88                 uint32_t txctl;
  89
  90                 if (((freq - 2192) % 5) == 0) {
  91                         channelSel = ((freq - 672) * 2 - 3040)/10;
  92                         bModeSynth = 0;
  93                 } else if (((freq - 2224) % 5) == 0) {
  94                         channelSel = ((freq - 704) * 2 - 3040) / 10;
  95                         bModeSynth = 1;
  96                 } else {
  97                         HALDEBUG(ah, HAL_DEBUG_ANY,
  98                             "%s: invalid channel %u MHz\n",
  99                             __func__, freq);
 100                         return AH_FALSE;
 101                 }
 102
 103                 channelSel = (channelSel << 2) & 0xff;
 104                 channelSel = ath_hal_reverseBits(channelSel, 8);
 105
 106                 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
 107                 if (freq == 2484) {
 108                         /* Enable channel spreading for channel 14 */
 109                         OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
 110                                 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
 111                 } else {
 112                         OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
 113                                 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
 114                 }
 115         } else if (((freq % 5) == 2) && (freq <= 5435)) {
 116                 freq = freq - 2; /* Align to even 5MHz raster */
 117                 channelSel = ath_hal_reverseBits(
 118                         (uint32_t)(((freq - 4800)*10)/25 + 1), 8);
 119                 aModeRefSel = ath_hal_reverseBits(0, 2);
 120         } else if ((freq % 20) == 0 && freq >= 5120) {
 121                 channelSel = ath_hal_reverseBits(
 122                         ((freq - 4800) / 20 << 2), 8);
 123                 aModeRefSel = ath_hal_reverseBits(3, 2);
 124         } else if ((freq % 10) == 0) {
 125                 channelSel = ath_hal_reverseBits(
 126                         ((freq - 4800) / 10 << 1), 8);
 127                 aModeRefSel = ath_hal_reverseBits(2, 2);
 128         } else if ((freq % 5) == 0) {
 129                 channelSel = ath_hal_reverseBits(
 130                         (freq - 4800) / 5, 8);
 131                 aModeRefSel = ath_hal_reverseBits(1, 2);
 132         } else {
 133                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel %u MHz\n",
 134                     __func__, freq);
 135                 return AH_FALSE;
 136         }
 137
 138         reg32 = (channelSel << 4) | (aModeRefSel << 2) | (bModeSynth << 1) |
 139                         (1 << 12) | 0x1;
 140         OS_REG_WRITE(ah, AR_PHY(0x27), reg32 & 0xff);
 141
 142         reg32 >>= 8;
 143         OS_REG_WRITE(ah, AR_PHY(0x36), reg32 & 0x7f);
 144
 145         AH_PRIVATE(ah)->ah_curchan = chan;
 146         return AH_TRUE;
 147 }
 148
 149 /*
 150  * Return a reference to the requested RF Bank.
 151  */
 152 static uint32_t *
 153 ar5112GetRfBank(struct ath_hal *ah, int bank)
 154 {
 155         struct ar5112State *priv = AR5112(ah);
 156
 157         HALASSERT(priv != AH_NULL);
 158         switch (bank) {
 159         case 1: return priv->Bank1Data;
 160         case 2: return priv->Bank2Data;
 161         case 3: return priv->Bank3Data;
 162         case 6: return priv->Bank6Data;
 163         case 7: return priv->Bank7Data;
 164         }
 165         HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
 166             __func__, bank);
 167         return AH_NULL;
 168 }
 169
 170 /*
 171  * Reads EEPROM header info from device structure and programs
 172  * all rf registers
 173  *
 174  * REQUIRES: Access to the analog rf device
 175  */
 176 static HAL_BOOL
 177 ar5112SetRfRegs(struct ath_hal *ah,
 178         const struct ieee80211_channel *chan,
 179         uint16_t modesIndex, uint16_t *rfXpdGain)
 180 {
 181 #define RF_BANK_SETUP(_priv, _ix, _col) do {                                \
 182         int i;                                                              \
 183         for (i = 0; i < NELEM(ar5212Bank##_ix##_5112); i++)                 \
 184                 (_priv)->Bank##_ix##Data[i] = ar5212Bank##_ix##_5112[i][_col];\
 185 } while (0)
 186         uint16_t freq = ath_hal_gethwchannel(ah, chan);
 187         struct ath_hal_5212 *ahp = AH5212(ah);
 188         const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
 189         uint16_t rfXpdSel, gainI;
 190         uint16_t ob5GHz = 0, db5GHz = 0;
 191         uint16_t ob2GHz = 0, db2GHz = 0;
 192         struct ar5112State *priv = AR5112(ah);
 193         GAIN_VALUES *gv = &ahp->ah_gainValues;
 194         int regWrites = 0;
 195
 196         HALASSERT(priv);
 197
 198         HALDEBUG(ah, HAL_DEBUG_RFPARAM, "%s: chan %u/0x%x modesIndex %u\n",
 199             __func__, chan->ic_freq, chan->ic_flags, modesIndex);
 200
 201         /* Setup rf parameters */
 202         switch (chan->ic_flags & IEEE80211_CHAN_ALLFULL) {
 203         case IEEE80211_CHAN_A:
 204                 if (freq > 4000 && freq < 5260) {
 205                         ob5GHz = ee->ee_ob1;
 206                         db5GHz = ee->ee_db1;
 207                 } else if (freq >= 5260 && freq < 5500) {
 208                         ob5GHz = ee->ee_ob2;
 209                         db5GHz = ee->ee_db2;
 210                 } else if (freq >= 5500 && freq < 5725) {
 211                         ob5GHz = ee->ee_ob3;
 212                         db5GHz = ee->ee_db3;
 213                 } else if (freq >= 5725) {
 214                         ob5GHz = ee->ee_ob4;
 215                         db5GHz = ee->ee_db4;
 216                 } else {
 217                         /* XXX else */
 218                 }
 219                 rfXpdSel = ee->ee_xpd[headerInfo11A];
 220                 gainI = ee->ee_gainI[headerInfo11A];
 221                 break;
 222         case IEEE80211_CHAN_B:
 223                 ob2GHz = ee->ee_ob2GHz[0];
 224                 db2GHz = ee->ee_db2GHz[0];
 225                 rfXpdSel = ee->ee_xpd[headerInfo11B];
 226                 gainI = ee->ee_gainI[headerInfo11B];
 227                 break;
 228         case IEEE80211_CHAN_G:
 229         case IEEE80211_CHAN_PUREG:      /* NB: really 108G */
 230                 ob2GHz = ee->ee_ob2GHz[1];
 231                 db2GHz = ee->ee_ob2GHz[1];
 232                 rfXpdSel = ee->ee_xpd[headerInfo11G];
 233                 gainI = ee->ee_gainI[headerInfo11G];
 234                 break;
 235         default:
 236                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: invalid channel flags 0x%x\n",
 237                     __func__, chan->ic_flags);
 238                 return AH_FALSE;
 239         }
 240
 241         /* Setup Bank 1 Write */
 242         RF_BANK_SETUP(priv, 1, 1);
 243
 244         /* Setup Bank 2 Write */
 245         RF_BANK_SETUP(priv, 2, modesIndex);
 246
 247         /* Setup Bank 3 Write */
 248         RF_BANK_SETUP(priv, 3, modesIndex);
 249
 250         /* Setup Bank 6 Write */
 251         RF_BANK_SETUP(priv, 6, modesIndex);
 252
 253         ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdSel,     1, 302, 0);
 254
 255         ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdGain[0], 2, 270, 0);
 256         ar5212ModifyRfBuffer(priv->Bank6Data, rfXpdGain[1], 2, 257, 0);
 257
 258         if (IEEE80211_IS_CHAN_OFDM(chan)) {
 259                 ar5212ModifyRfBuffer(priv->Bank6Data,
 260                         gv->currStep->paramVal[GP_PWD_138], 1, 168, 3);
 261                 ar5212ModifyRfBuffer(priv->Bank6Data,
 262                         gv->currStep->paramVal[GP_PWD_137], 1, 169, 3);
 263                 ar5212ModifyRfBuffer(priv->Bank6Data,
 264                         gv->currStep->paramVal[GP_PWD_136], 1, 170, 3);
 265                 ar5212ModifyRfBuffer(priv->Bank6Data,
 266                         gv->currStep->paramVal[GP_PWD_132], 1, 174, 3);
 267                 ar5212ModifyRfBuffer(priv->Bank6Data,
 268                         gv->currStep->paramVal[GP_PWD_131], 1, 175, 3);
 269                 ar5212ModifyRfBuffer(priv->Bank6Data,
 270                         gv->currStep->paramVal[GP_PWD_130], 1, 176, 3);
 271         }
 272
 273         /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
 274         if (IEEE80211_IS_CHAN_2GHZ(chan)) {
 275                 ar5212ModifyRfBuffer(priv->Bank6Data, ob2GHz, 3, 287, 0);
 276                 ar5212ModifyRfBuffer(priv->Bank6Data, db2GHz, 3, 290, 0);
 277         } else {
 278                 ar5212ModifyRfBuffer(priv->Bank6Data, ob5GHz, 3, 279, 0);
 279                 ar5212ModifyRfBuffer(priv->Bank6Data, db5GHz, 3, 282, 0);
 280         }
 281
 282         /* Lower synth voltage for X112 Rev 2.0 only */
 283         if (IS_RADX112_REV2(ah)) {
 284                 /* Non-Reversed analyg registers - so values are pre-reversed */
 285                 ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 90, 2);
 286                 ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 92, 2);
 287                 ar5212ModifyRfBuffer(priv->Bank6Data, 2, 2, 94, 2);
 288                 ar5212ModifyRfBuffer(priv->Bank6Data, 2, 1, 254, 2);
 289         }
 290
 291     /* Decrease Power Consumption for 5312/5213 and up */
 292     if (AH_PRIVATE(ah)->ah_phyRev >= AR_PHY_CHIP_ID_REV_2) {
 293         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 281, 1);
 294         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 2, 1, 3);
 295         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 2, 3, 3);
 296         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 139, 3);
 297         ar5212ModifyRfBuffer(priv->Bank6Data, 1, 1, 140, 3);
 298     }
 299
 300         /* Setup Bank 7 Setup */
 301         RF_BANK_SETUP(priv, 7, modesIndex);
 302         if (IEEE80211_IS_CHAN_OFDM(chan))
 303                 ar5212ModifyRfBuffer(priv->Bank7Data,
 304                         gv->currStep->paramVal[GP_MIXGAIN_OVR], 2, 37, 0);
 305
 306         ar5212ModifyRfBuffer(priv->Bank7Data, gainI, 6, 14, 0);
 307
 308         /* Adjust params for Derby TX power control */
 309         if (IEEE80211_IS_CHAN_HALF(chan) || IEEE80211_IS_CHAN_QUARTER(chan)) {
 310                 uint32_t        rfDelay, rfPeriod;
 311
 312                 rfDelay = 0xf;
 313                 rfPeriod = (IEEE80211_IS_CHAN_HALF(chan)) ?  0x8 : 0xf;
 314                 ar5212ModifyRfBuffer(priv->Bank7Data, rfDelay, 4, 58, 0);
 315                 ar5212ModifyRfBuffer(priv->Bank7Data, rfPeriod, 4, 70, 0);
 316         }
 317
 318 #ifdef notyet
 319         /* Analog registers are setup - EAR can modify */
 320         if (ar5212IsEarEngaged(pDev, chan))
 321                 uint32_t modifier;
 322                 ar5212EarModify(pDev, EAR_LC_RF_WRITE, chan, &modifier);
 323 #endif
 324         /* Write Analog registers */
 325         HAL_INI_WRITE_BANK(ah, ar5212Bank1_5112, priv->Bank1Data, regWrites);
 326         HAL_INI_WRITE_BANK(ah, ar5212Bank2_5112, priv->Bank2Data, regWrites);
 327         HAL_INI_WRITE_BANK(ah, ar5212Bank3_5112, priv->Bank3Data, regWrites);
 328         HAL_INI_WRITE_BANK(ah, ar5212Bank6_5112, priv->Bank6Data, regWrites);
 329         HAL_INI_WRITE_BANK(ah, ar5212Bank7_5112, priv->Bank7Data, regWrites);
 330
 331         /* Now that we have reprogrammed rfgain value, clear the flag. */
 332         ahp->ah_rfgainState = HAL_RFGAIN_INACTIVE;
 333         return AH_TRUE;
 334 #undef  RF_BANK_SETUP
 335 }
 336
 337 /*
 338  * Read the transmit power levels from the structures taken from EEPROM
 339  * Interpolate read transmit power values for this channel
 340  * Organize the transmit power values into a table for writing into the hardware
 341  */
 342 static HAL_BOOL
 343 ar5112SetPowerTable(struct ath_hal *ah,
 344         int16_t *pPowerMin, int16_t *pPowerMax,
 345         const struct ieee80211_channel *chan,
 346         uint16_t *rfXpdGain)
 347 {
 348         uint16_t freq = ath_hal_gethwchannel(ah, chan);
 349         struct ath_hal_5212 *ahp = AH5212(ah);
 350         const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
 351         uint32_t numXpdGain = IS_RADX112_REV2(ah) ? 2 : 1;
 352         uint32_t    xpdGainMask = 0;
 353         int16_t     powerMid, *pPowerMid = &powerMid;
 354
 355         const EXPN_DATA_PER_CHANNEL_5112 *pRawCh;
 356         const EEPROM_POWER_EXPN_5112     *pPowerExpn = AH_NULL;
 357
 358         uint32_t    ii, jj, kk;
 359         int16_t     minPwr_t4, maxPwr_t4, Pmin, Pmid;
 360
 361         uint32_t    chan_idx_L = 0, chan_idx_R = 0;
 362         uint16_t    chan_L, chan_R;
 363
 364         int16_t     pwr_table0[64];
 365         int16_t     pwr_table1[64];
 366         uint16_t    pcdacs[10];
 367         int16_t     powers[10];
 368         uint16_t    numPcd;
 369         int16_t     powTableLXPD[2][64];
 370         int16_t     powTableHXPD[2][64];
 371         int16_t     tmpPowerTable[64];
 372         uint16_t    xgainList[2];
 373         uint16_t    xpdMask;
 374
 375         switch (chan->ic_flags & IEEE80211_CHAN_ALLTURBOFULL) {
 376         case IEEE80211_CHAN_A:
 377         case IEEE80211_CHAN_ST:
 378                 pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11A];
 379                 xpdGainMask = ee->ee_xgain[headerInfo11A];
 380                 break;
 381         case IEEE80211_CHAN_B:
 382                 pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11B];
 383                 xpdGainMask = ee->ee_xgain[headerInfo11B];
 384                 break;
 385         case IEEE80211_CHAN_G:
 386         case IEEE80211_CHAN_108G:
 387                 pPowerExpn = &ee->ee_modePowerArray5112[headerInfo11G];
 388                 xpdGainMask = ee->ee_xgain[headerInfo11G];
 389                 break;
 390         default:
 391                 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown channel flags 0x%x\n",
 392                     __func__, chan->ic_flags);
 393                 return AH_FALSE;
 394         }
 395
 396         if ((xpdGainMask & pPowerExpn->xpdMask) < 1) {
 397                 HALDEBUG(ah, HAL_DEBUG_ANY,
 398                     "%s: desired xpdGainMask 0x%x not supported by "
 399                     "calibrated xpdMask 0x%x\n", __func__,
 400                     xpdGainMask, pPowerExpn->xpdMask);
 401                 return AH_FALSE;
 402         }
 403
 404         maxPwr_t4 = (int16_t)(2*(*pPowerMax));  /* pwr_t2 -> pwr_t4 */
 405         minPwr_t4 = (int16_t)(2*(*pPowerMin));  /* pwr_t2 -> pwr_t4 */
 406
 407         xgainList[0] = 0xDEAD;
 408         xgainList[1] = 0xDEAD;
 409
 410         kk = 0;
 411         xpdMask = pPowerExpn->xpdMask;
 412         for (jj = 0; jj < NUM_XPD_PER_CHANNEL; jj++) {
 413                 if (((xpdMask >> jj) & 1) > 0) {
 414                         if (kk > 1) {
 415                                 HALDEBUG(ah, HAL_DEBUG_ANY,
 416                                     "A maximum of 2 xpdGains supported"
 417                                     "in pExpnPower data\n");
 418                                 return AH_FALSE;
 419                         }
 420                         xgainList[kk++] = (uint16_t)jj;
 421                 }
 422         }
 423
 424         ar5212GetLowerUpperIndex(freq, &pPowerExpn->pChannels[0],
 425                 pPowerExpn->numChannels, &chan_idx_L, &chan_idx_R);
 426
 427         kk = 0;
 428         for (ii = chan_idx_L; ii <= chan_idx_R; ii++) {
 429                 pRawCh = &(pPowerExpn->pDataPerChannel[ii]);
 430                 if (xgainList[1] == 0xDEAD) {
 431                         jj = xgainList[0];
 432                         numPcd = pRawCh->pDataPerXPD[jj].numPcdacs;
 433                         OS_MEMCPY(&pcdacs[0], &pRawCh->pDataPerXPD[jj].pcdac[0],
 434                                 numPcd * sizeof(uint16_t));
 435                         OS_MEMCPY(&powers[0], &pRawCh->pDataPerXPD[jj].pwr_t4[0],
 436                                 numPcd * sizeof(int16_t));
 437                         if (!getFullPwrTable(numPcd, &pcdacs[0], &powers[0],
 438                                 pRawCh->maxPower_t4, &tmpPowerTable[0])) {
 439                                 return AH_FALSE;
 440                         }
 441                         OS_MEMCPY(&powTableLXPD[kk][0], &tmpPowerTable[0],
 442                                 64*sizeof(int16_t));
 443                 } else {
 444                         jj = xgainList[0];
 445                         numPcd = pRawCh->pDataPerXPD[jj].numPcdacs;
 446                         OS_MEMCPY(&pcdacs[0], &pRawCh->pDataPerXPD[jj].pcdac[0],
 447                                 numPcd*sizeof(uint16_t));
 448                         OS_MEMCPY(&powers[0],
 449                                 &pRawCh->pDataPerXPD[jj].pwr_t4[0],
 450                                 numPcd*sizeof(int16_t));
 451                         if (!getFullPwrTable(numPcd, &pcdacs[0], &powers[0],
 452                                 pRawCh->maxPower_t4, &tmpPowerTable[0])) {
 453                                 return AH_FALSE;
 454                         }
 455                         OS_MEMCPY(&powTableLXPD[kk][0], &tmpPowerTable[0],
 456                                 64 * sizeof(int16_t));
 457
 458                         jj = xgainList[1];
 459                         numPcd = pRawCh->pDataPerXPD[jj].numPcdacs;
 460                         OS_MEMCPY(&pcdacs[0], &pRawCh->pDataPerXPD[jj].pcdac[0],
 461                                 numPcd * sizeof(uint16_t));
 462                         OS_MEMCPY(&powers[0],
 463                                 &pRawCh->pDataPerXPD[jj].pwr_t4[0],
 464                                 numPcd * sizeof(int16_t));
 465                         if (!getFullPwrTable(numPcd, &pcdacs[0], &powers[0],
 466                                 pRawCh->maxPower_t4, &tmpPowerTable[0])) {
 467                                 return AH_FALSE;
 468                         }
 469                         OS_MEMCPY(&powTableHXPD[kk][0], &tmpPowerTable[0],
 470                                 64 * sizeof(int16_t));
 471                 }
 472                 kk++;
 473         }
 474
 475         chan_L = pPowerExpn->pChannels[chan_idx_L];
 476         chan_R = pPowerExpn->pChannels[chan_idx_R];
 477         kk = chan_idx_R - chan_idx_L;
 478
 479         if (xgainList[1] == 0xDEAD) {
 480                 for (jj = 0; jj < 64; jj++) {
 481                         pwr_table0[jj] = interpolate_signed(
 482                                 freq, chan_L, chan_R,
 483                                 powTableLXPD[0][jj], powTableLXPD[kk][jj]);
 484                 }
 485                 Pmin = getPminAndPcdacTableFromPowerTable(&pwr_table0[0],
 486                                 ahp->ah_pcdacTable);
 487                 *pPowerMin = (int16_t) (Pmin / 2);
 488                 *pPowerMid = (int16_t) (pwr_table0[63] / 2);
 489                 *pPowerMax = (int16_t) (pwr_table0[63] / 2);
 490                 rfXpdGain[0] = xgainList[0];
 491                 rfXpdGain[1] = rfXpdGain[0];
 492         } else {
 493                 for (jj = 0; jj < 64; jj++) {
 494                         pwr_table0[jj] = interpolate_signed(
 495                                 freq, chan_L, chan_R,
 496                                 powTableLXPD[0][jj], powTableLXPD[kk][jj]);
 497                         pwr_table1[jj] = interpolate_signed(
 498                                 freq, chan_L, chan_R,
 499                                 powTableHXPD[0][jj], powTableHXPD[kk][jj]);
 500                 }
 501                 if (numXpdGain == 2) {
 502                         Pmin = getPminAndPcdacTableFromTwoPowerTables(
 503                                 &pwr_table0[0], &pwr_table1[0],
 504                                 ahp->ah_pcdacTable, &Pmid);
 505                         *pPowerMin = (int16_t) (Pmin / 2);
 506                         *pPowerMid = (int16_t) (Pmid / 2);
 507                         *pPowerMax = (int16_t) (pwr_table0[63] / 2);
 508                         rfXpdGain[0] = xgainList[0];
 509                         rfXpdGain[1] = xgainList[1];
 510                 } else if (minPwr_t4 <= pwr_table1[63] &&
 511                            maxPwr_t4 <= pwr_table1[63]) {
 512                         Pmin = getPminAndPcdacTableFromPowerTable(
 513                                 &pwr_table1[0], ahp->ah_pcdacTable);
 514                         rfXpdGain[0] = xgainList[1];
 515                         rfXpdGain[1] = rfXpdGain[0];
 516                         *pPowerMin = (int16_t) (Pmin / 2);
 517                         *pPowerMid = (int16_t) (pwr_table1[63] / 2);
 518                         *pPowerMax = (int16_t) (pwr_table1[63] / 2);
 519                 } else {
 520                         Pmin = getPminAndPcdacTableFromPowerTable(
 521                                 &pwr_table0[0], ahp->ah_pcdacTable);
 522                         rfXpdGain[0] = xgainList[0];
 523                         rfXpdGain[1] = rfXpdGain[0];
 524                         *pPowerMin = (int16_t) (Pmin/2);
 525                         *pPowerMid = (int16_t) (pwr_table0[63] / 2);
 526                         *pPowerMax = (int16_t) (pwr_table0[63] / 2);
 527                 }
 528         }
 529
 530         /*
 531          * Move 5112 rates to match power tables where the max
 532          * power table entry corresponds with maxPower.
 533          */
 534         HALASSERT(*pPowerMax <= PCDAC_STOP);
 535         ahp->ah_txPowerIndexOffset = PCDAC_STOP - *pPowerMax;
 536
 537         return AH_TRUE;
 538 }
 539
 540 /*
 541  * Returns interpolated or the scaled up interpolated value
 542  */
 543 static int16_t
 544 interpolate_signed(uint16_t target, uint16_t srcLeft, uint16_t srcRight,
 545         int16_t targetLeft, int16_t targetRight)
 546 {
 547         int16_t rv;
 548
 549         if (srcRight != srcLeft) {
 550                 rv = ((target - srcLeft)*targetRight +
 551                       (srcRight - target)*targetLeft) / (srcRight - srcLeft);
 552         } else {
 553                 rv = targetLeft;
 554         }
 555         return rv;
 556 }
 557
 558 /*
 559  * Return indices surrounding the value in sorted integer lists.
 560  *
 561  * NB: the input list is assumed to be sorted in ascending order
 562  */
 563 static void
 564 ar5212GetLowerUpperIndex(uint16_t v, uint16_t *lp, uint16_t listSize,
 565                           uint32_t *vlo, uint32_t *vhi)
 566 {
 567         uint32_t target = v;
 568         uint16_t *ep = lp+listSize;
 569         uint16_t *tp;
 570
 571         /*
 572          * Check first and last elements for out-of-bounds conditions.
 573          */
 574         if (target < lp[0]) {
 575                 *vlo = *vhi = 0;
 576                 return;
 577         }
 578         if (target >= ep[-1]) {
 579                 *vlo = *vhi = listSize - 1;
 580                 return;
 581         }
 582
 583         /* look for value being near or between 2 values in list */
 584         for (tp = lp; tp < ep; tp++) {
 585                 /*
 586                  * If value is close to the current value of the list
 587                  * then target is not between values, it is one of the values
 588                  */
 589                 if (*tp == target) {
 590                         *vlo = *vhi = tp - lp;
 591                         return;
 592                 }
 593                 /*
 594                  * Look for value being between current value and next value
 595                  * if so return these 2 values
 596                  */
 597                 if (target < tp[1]) {
 598                         *vlo = tp - lp;
 599                         *vhi = *vlo + 1;
 600                         return;
 601                 }
 602         }
 603 }
 604
 605 static HAL_BOOL
 606 getFullPwrTable(uint16_t numPcdacs, uint16_t *pcdacs, int16_t *power, int16_t maxPower, int16_t *retVals)
 607 {
 608         uint16_t    ii;
 609         uint16_t    idxL = 0;
 610         uint16_t    idxR = 1;
 611
 612         if (numPcdacs < 2) {
 613                 HALDEBUG(AH_NULL, HAL_DEBUG_ANY,
 614                      "%s: at least 2 pcdac values needed [%d]\n",
 615                      __func__, numPcdacs);
 616                 return AH_FALSE;
 617         }
 618         for (ii = 0; ii < 64; ii++) {
 619                 if (ii>pcdacs[idxR] && idxR < numPcdacs-1) {
 620                         idxL++;
 621                         idxR++;
 622                 }
 623                 retVals[ii] = interpolate_signed(ii,
 624                         pcdacs[idxL], pcdacs[idxR], power[idxL], power[idxR]);
 625                 if (retVals[ii] >= maxPower) {
 626                         while (ii < 64)
 627                                 retVals[ii++] = maxPower;
 628                 }
 629         }
 630         return AH_TRUE;
 631 }
 632
 633 /*
 634  * Takes a single calibration curve and creates a power table.
 635  * Adjusts the new power table so the max power is relative
 636  * to the maximum index in the power table.
 637  *
 638  * WARNING: rates must be adjusted for this relative power table
 639  */
 640 static int16_t
 641 getPminAndPcdacTableFromPowerTable(int16_t *pwrTableT4, uint16_t retVals[])
 642 {
 643     int16_t ii, jj, jjMax;
 644     int16_t pMin, currPower, pMax;
 645
 646     /* If the spread is > 31.5dB, keep the upper 31.5dB range */
 647     if ((pwrTableT4[63] - pwrTableT4[0]) > 126) {
 648         pMin = pwrTableT4[63] - 126;
 649     } else {
 650         pMin = pwrTableT4[0];
 651     }
 652
 653     pMax = pwrTableT4[63];
 654     jjMax = 63;
 655
 656     /* Search for highest pcdac 0.25dB below maxPower */
 657     while ((pwrTableT4[jjMax] > (pMax - 1) ) && (jjMax >= 0)) {
 658         jjMax--;
 659     }
 660
 661     jj = jjMax;
 662     currPower = pMax;
 663     for (ii = 63; ii >= 0; ii--) {
 664         while ((jj < 64) && (jj > 0) && (pwrTableT4[jj] >= currPower)) {
 665             jj--;
 666         }
 667         if (jj == 0) {
 668             while (ii >= 0) {
 669                 retVals[ii] = retVals[ii + 1];
 670                 ii--;
 671             }
 672             break;
 673         }
 674         retVals[ii] = jj;
 675         currPower -= 2;  // corresponds to a 0.5dB step
 676     }
 677     return pMin;
 678 }
 679
 680 /*
 681  * Combines the XPD curves from two calibration sets into a single
 682  * power table and adjusts the power table so the max power is relative
 683  * to the maximum index in the power table
 684  *
 685  * WARNING: rates must be adjusted for this relative power table
 686  */
 687 static int16_t
 688 getPminAndPcdacTableFromTwoPowerTables(int16_t *pwrTableLXpdT4,
 689         int16_t *pwrTableHXpdT4, uint16_t retVals[], int16_t *pMid)
 690 {
 691     int16_t     ii, jj, jjMax;
 692     int16_t     pMin, pMax, currPower;
 693     int16_t     *pwrTableT4;
 694     uint16_t    msbFlag = 0x40;  // turns on the 7th bit of the pcdac
 695
 696     /* If the spread is > 31.5dB, keep the upper 31.5dB range */
 697     if ((pwrTableLXpdT4[63] - pwrTableHXpdT4[0]) > 126) {
 698         pMin = pwrTableLXpdT4[63] - 126;
 699     } else {
 700         pMin = pwrTableHXpdT4[0];
 701     }
 702
 703     pMax = pwrTableLXpdT4[63];
 704     jjMax = 63;
 705     /* Search for highest pcdac 0.25dB below maxPower */
 706     while ((pwrTableLXpdT4[jjMax] > (pMax - 1) ) && (jjMax >= 0)){
 707         jjMax--;
 708     }
 709
 710     *pMid = pwrTableHXpdT4[63];
 711     jj = jjMax;
 712     ii = 63;
 713     currPower = pMax;
 714     pwrTableT4 = &(pwrTableLXpdT4[0]);
 715     while (ii >= 0) {
 716         if ((currPower <= *pMid) || ( (jj == 0) && (msbFlag == 0x40))){
 717             msbFlag = 0x00;
 718             pwrTableT4 = &(pwrTableHXpdT4[0]);
 719             jj = 63;
 720         }
 721         while ((jj > 0) && (pwrTableT4[jj] >= currPower)) {
 722             jj--;
 723         }
 724         if ((jj == 0) && (msbFlag == 0x00)) {
 725             while (ii >= 0) {
 726                 retVals[ii] = retVals[ii+1];
 727                 ii--;
 728             }
 729             break;
 730         }
 731         retVals[ii] = jj | msbFlag;
 732         currPower -= 2;  // corresponds to a 0.5dB step
 733         ii--;
 734     }
 735     return pMin;
 736 }
 737
 738 static int16_t
 739 ar5112GetMinPower(struct ath_hal *ah, const EXPN_DATA_PER_CHANNEL_5112 *data)
 740 {
 741         int i, minIndex;
 742         int16_t minGain,minPwr,minPcdac,retVal;
 743
 744         /* Assume NUM_POINTS_XPD0 > 0 */
 745         minGain = data->pDataPerXPD[0].xpd_gain;
 746         for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
 747                 if (data->pDataPerXPD[i].xpd_gain < minGain) {
 748                         minIndex = i;
 749                         minGain = data->pDataPerXPD[i].xpd_gain;
 750                 }
 751         }
 752         minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
 753         minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
 754         for (i=1; i<NUM_POINTS_XPD0; i++) {
 755                 if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
 756                         minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
 757                         minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
 758                 }
 759         }
 760         retVal = minPwr - (minPcdac*2);
 761         return(retVal);
 762 }
 763
 764 static HAL_BOOL
 765 ar5112GetChannelMaxMinPower(struct ath_hal *ah,
 766         const struct ieee80211_channel *chan,
 767         int16_t *maxPow, int16_t *minPow)
 768 {
 769         uint16_t freq = chan->ic_freq;          /* NB: never mapped */
 770         const HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
 771         int numChannels=0,i,last;
 772         int totalD, totalF,totalMin;
 773         const EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
 774         const EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
 775
 776         *maxPow = 0;
 777         if (IEEE80211_IS_CHAN_A(chan)) {
 778                 powerArray = ee->ee_modePowerArray5112;
 779                 data = powerArray[headerInfo11A].pDataPerChannel;
 780                 numChannels = powerArray[headerInfo11A].numChannels;
 781         } else if (IEEE80211_IS_CHAN_G(chan) || IEEE80211_IS_CHAN_108G(chan)) {
 782                 /* XXX - is this correct? Should we also use the same power for turbo G? */
 783                 powerArray = ee->ee_modePowerArray5112;
 784                 data = powerArray[headerInfo11G].pDataPerChannel;
 785                 numChannels = powerArray[headerInfo11G].numChannels;
 786         } else if (IEEE80211_IS_CHAN_B(chan)) {
 787                 powerArray = ee->ee_modePowerArray5112;
 788                 data = powerArray[headerInfo11B].pDataPerChannel;
 789                 numChannels = powerArray[headerInfo11B].numChannels;
 790         } else {
 791                 return (AH_TRUE);
 792         }
 793         /* Make sure the channel is in the range of the TP values
 794          *  (freq piers)
 795          */
 796         if (numChannels < 1)
 797                 return(AH_FALSE);
 798
 799         if ((freq < data[0].channelValue) ||
 800             (freq > data[numChannels-1].channelValue)) {
 801                 if (freq < data[0].channelValue) {
 802                         *maxPow = data[0].maxPower_t4;
 803                         *minPow = ar5112GetMinPower(ah, &data[0]);
 804                         return(AH_TRUE);
 805                 } else {
 806                         *maxPow = data[numChannels - 1].maxPower_t4;
 807                         *minPow = ar5112GetMinPower(ah, &data[numChannels - 1]);
 808                         return(AH_TRUE);
 809                 }
 810         }
 811
 812         /* Linearly interpolate the power value now */
 813         for (last=0,i=0;
 814              (i<numChannels) && (freq > data[i].channelValue);
 815              last=i++);
 816         totalD = data[i].channelValue - data[last].channelValue;
 817         if (totalD > 0) {
 818                 totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
 819                 *maxPow = (int8_t) ((totalF*(freq-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
 820
 821                 totalMin = ar5112GetMinPower(ah,&data[i]) - ar5112GetMinPower(ah, &data[last]);
 822                 *minPow = (int8_t) ((totalMin*(freq-data[last].channelValue) + ar5112GetMinPower(ah, &data[last])*totalD)/totalD);
 823                 return (AH_TRUE);
 824         } else {
 825                 if (freq == data[i].channelValue) {
 826                         *maxPow = data[i].maxPower_t4;
 827                         *minPow = ar5112GetMinPower(ah, &data[i]);
 828                         return(AH_TRUE);
 829                 } else
 830                         return(AH_FALSE);
 831         }
 832 }
 833
 834 /*
 835  * Free memory for analog bank scratch buffers
 836  */
 837 static void
 838 ar5112RfDetach(struct ath_hal *ah)
 839 {
 840         struct ath_hal_5212 *ahp = AH5212(ah);
 841
 842         HALASSERT(ahp->ah_rfHal != AH_NULL);
 843         ath_hal_free(ahp->ah_rfHal);
 844         ahp->ah_rfHal = AH_NULL;
 845 }
 846
 847 /*
 848  * Allocate memory for analog bank scratch buffers
 849  * Scratch Buffer will be reinitialized every reset so no need to zero now
 850  */
 851 static HAL_BOOL
 852 ar5112RfAttach(struct ath_hal *ah, HAL_STATUS *status)
 853 {
 854         struct ath_hal_5212 *ahp = AH5212(ah);
 855         struct ar5112State *priv;
 856
 857         HALASSERT(ah->ah_magic == AR5212_MAGIC);
 858
 859         HALASSERT(ahp->ah_rfHal == AH_NULL);
 860         priv = ath_hal_malloc(sizeof(struct ar5112State));
 861         if (priv == AH_NULL) {
 862                 HALDEBUG(ah, HAL_DEBUG_ANY,
 863                     "%s: cannot allocate private state\n", __func__);
 864                 *status = HAL_ENOMEM;           /* XXX */
 865                 return AH_FALSE;
 866         }
 867         priv->base.rfDetach             = ar5112RfDetach;
 868         priv->base.writeRegs            = ar5112WriteRegs;
 869         priv->base.getRfBank            = ar5112GetRfBank;
 870         priv->base.setChannel           = ar5112SetChannel;
 871         priv->base.setRfRegs            = ar5112SetRfRegs;
 872         priv->base.setPowerTable        = ar5112SetPowerTable;
 873         priv->base.getChannelMaxMinPower = ar5112GetChannelMaxMinPower;
 874         priv->base.getNfAdjust          = ar5212GetNfAdjust;
 875
 876         ahp->ah_pcdacTable = priv->pcdacTable;
 877         ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
 878         ahp->ah_rfHal = &priv->base;
 879
 880         return AH_TRUE;
 881 }
 882
 883 static HAL_BOOL
 884 ar5112Probe(struct ath_hal *ah)
 885 {
 886         return IS_RAD5112(ah);
 887 }
 888 AH_RF(RF5112, ar5112Probe, ar5112RfAttach);