2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
42 #include "use_ether.h"
45 #include "opt_atalk.h"
46 #include "opt_compat.h"
49 #include "opt_directio.h"
52 #include "opt_maxmem.h"
53 #include "opt_msgbuf.h"
54 #include "opt_perfmon.h"
56 #include "opt_userconfig.h"
58 #include <sys/param.h>
59 #include <sys/systm.h>
60 #include <sys/sysproto.h>
61 #include <sys/signalvar.h>
62 #include <sys/kernel.h>
63 #include <sys/linker.h>
64 #include <sys/malloc.h>
68 #include <sys/reboot.h>
70 #include <sys/msgbuf.h>
71 #include <sys/sysent.h>
72 #include <sys/sysctl.h>
73 #include <sys/vmmeter.h>
75 #include <sys/upcall.h>
76 #include <sys/usched.h>
80 #include <vm/vm_param.h>
82 #include <vm/vm_kern.h>
83 #include <vm/vm_object.h>
84 #include <vm/vm_page.h>
85 #include <vm/vm_map.h>
86 #include <vm/vm_pager.h>
87 #include <vm/vm_extern.h>
89 #include <sys/thread2.h>
90 #include <sys/mplock2.h>
98 #include <machine/cpu.h>
99 #include <machine/clock.h>
100 #include <machine/specialreg.h>
101 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
107 #include <machine/perfmon.h>
109 #include <machine/cputypes.h>
112 #include <bus/isa/isa_device.h>
114 #include <machine_base/isa/intr_machdep.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #define PHYSMAP_ENTRIES 10
123 extern void init386(int first);
124 extern void dblfault_handler(void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup(void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
143 int _udatasel, _ucodesel;
146 int64_t tsc_offsets[MAXCPU];
148 int64_t tsc_offsets[1];
151 #if defined(SWTCH_OPTIM_STATS)
152 extern int swtch_optim_stats;
153 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
154 CTLFLAG_RD, &swtch_optim_stats, 0, "");
155 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
156 CTLFLAG_RD, &tlb_flush_count, 0, "");
161 u_long ebda_addr = 0;
164 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
174 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - vmstats.v_wire_count), req);
181 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
185 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
192 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
195 vm_paddr_t Maxmem = 0;
197 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
198 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
201 static vm_offset_t buffer_sva, buffer_eva;
202 vm_offset_t clean_sva, clean_eva;
203 static vm_offset_t pager_sva, pager_eva;
204 static struct trapframe proc0_tf;
207 cpu_startup(void *dummy)
211 vm_offset_t firstaddr;
213 if (boothowto & RB_VERBOSE)
217 * Good {morning,afternoon,evening,night}.
219 kprintf("%s", version);
222 panicifcpuunsupported();
226 kprintf("real memory = %ju (%ju MB)\n",
227 (intmax_t)ptoa(Maxmem), (intmax_t)ptoa(Maxmem) / 1024 / 1024);
229 * Display any holes after the first chunk of extended memory.
234 kprintf("Physical memory chunk(s):\n");
235 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
236 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
238 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
239 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
245 * Allocate space for system data structures.
246 * The first available kernel virtual address is in "v".
247 * As pages of kernel virtual memory are allocated, "v" is incremented.
248 * As pages of memory are allocated and cleared,
249 * "firstaddr" is incremented.
250 * An index into the kernel page table corresponding to the
251 * virtual memory address maintained in "v" is kept in "mapaddr".
255 * Make two passes. The first pass calculates how much memory is
256 * needed and allocates it. The second pass assigns virtual
257 * addresses to the various data structures.
261 v = (caddr_t)firstaddr;
263 #define valloc(name, type, num) \
264 (name) = (type *)v; v = (caddr_t)((name)+(num))
265 #define valloclim(name, type, num, lim) \
266 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
269 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
270 * For the first 64MB of ram nominally allocate sufficient buffers to
271 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
272 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
273 * the buffer cache we limit the eventual kva reservation to
276 * factor represents the 1/4 x ram conversion.
279 int factor = 4 * BKVASIZE / 1024;
280 int kbytes = physmem * (PAGE_SIZE / 1024);
284 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
286 nbuf += (kbytes - 65536) * 2 / (factor * 5);
287 if (maxbcache && nbuf > maxbcache / BKVASIZE)
288 nbuf = maxbcache / BKVASIZE;
292 * Do not allow the buffer_map to be more then 1/2 the size of the
295 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
296 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
297 kprintf("Warning: nbufs capped at %d\n", nbuf);
300 nswbuf = max(min(nbuf/4, 256), 16);
302 if (nswbuf < NSWBUF_MIN)
309 valloc(swbuf, struct buf, nswbuf);
310 valloc(buf, struct buf, nbuf);
313 * End of first pass, size has been calculated so allocate memory
315 if (firstaddr == 0) {
316 size = (vm_size_t)(v - firstaddr);
317 firstaddr = kmem_alloc(&kernel_map, round_page(size));
319 panic("startup: no room for tables");
324 * End of second pass, addresses have been assigned
326 if ((vm_size_t)(v - firstaddr) != size)
327 panic("startup: table size inconsistency");
329 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
330 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
331 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
333 buffer_map.system_map = 1;
334 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
335 (nswbuf*MAXPHYS) + pager_map_size);
336 pager_map.system_map = 1;
338 #if defined(USERCONFIG)
340 cninit(); /* the preferred console may have changed */
343 kprintf("avail memory = %ju (%ju MB)\n",
344 (intmax_t)ptoa(vmstats.v_free_count),
345 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
348 * Set up buffers, so they can be used to read disk labels.
351 vm_pager_bufferinit();
355 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
357 mp_start(); /* fire up the APs and APICs */
364 * Send an interrupt to process.
366 * Stack is set up to allow sigcode stored
367 * at top to call routine, followed by kcall
368 * to sigreturn routine below. After sigreturn
369 * resets the signal mask, the stack, and the
370 * frame pointer, it returns to the user
374 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
376 struct lwp *lp = curthread->td_lwp;
377 struct proc *p = lp->lwp_proc;
378 struct trapframe *regs;
379 struct sigacts *psp = p->p_sigacts;
380 struct sigframe sf, *sfp;
383 regs = lp->lwp_md.md_regs;
384 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
386 /* save user context */
387 bzero(&sf, sizeof(struct sigframe));
388 sf.sf_uc.uc_sigmask = *mask;
389 sf.sf_uc.uc_stack = lp->lwp_sigstk;
390 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
391 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
393 /* make the size of the saved context visible to userland */
394 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
396 /* save mailbox pending state for syscall interlock semantics */
397 if (p->p_flag & P_MAILBOX)
398 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
400 /* Allocate and validate space for the signal handler context. */
401 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
402 SIGISMEMBER(psp->ps_sigonstack, sig)) {
403 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
404 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
405 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
407 sfp = (struct sigframe *)regs->tf_esp - 1;
410 /* Translate the signal is appropriate */
411 if (p->p_sysent->sv_sigtbl) {
412 if (sig <= p->p_sysent->sv_sigsize)
413 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
416 /* Build the argument list for the signal handler. */
418 sf.sf_ucontext = (register_t)&sfp->sf_uc;
419 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
420 /* Signal handler installed with SA_SIGINFO. */
421 sf.sf_siginfo = (register_t)&sfp->sf_si;
422 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
424 /* fill siginfo structure */
425 sf.sf_si.si_signo = sig;
426 sf.sf_si.si_code = code;
427 sf.sf_si.si_addr = (void*)regs->tf_err;
430 /* Old FreeBSD-style arguments. */
431 sf.sf_siginfo = code;
432 sf.sf_addr = regs->tf_err;
433 sf.sf_ahu.sf_handler = catcher;
437 * If we're a vm86 process, we want to save the segment registers.
438 * We also change eflags to be our emulated eflags, not the actual
441 if (regs->tf_eflags & PSL_VM) {
442 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
443 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
445 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
446 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
447 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
448 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
450 if (vm86->vm86_has_vme == 0)
451 sf.sf_uc.uc_mcontext.mc_eflags =
452 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
453 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
456 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
457 * syscalls made by the signal handler. This just avoids
458 * wasting time for our lazy fixup of such faults. PSL_NT
459 * does nothing in vm86 mode, but vm86 programs can set it
460 * almost legitimately in probes for old cpu types.
462 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
466 * Save the FPU state and reinit the FP unit
468 npxpush(&sf.sf_uc.uc_mcontext);
471 * Copy the sigframe out to the user's stack.
473 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
475 * Something is wrong with the stack pointer.
476 * ...Kill the process.
481 regs->tf_esp = (int)sfp;
482 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
485 * i386 abi specifies that the direction flag must be cleared
488 regs->tf_eflags &= ~(PSL_T|PSL_D);
490 regs->tf_cs = _ucodesel;
491 regs->tf_ds = _udatasel;
492 regs->tf_es = _udatasel;
495 * Allow the signal handler to inherit %fs in addition to %gs as
496 * the userland program might be using both.
498 * However, if a T_PROTFLT occured the segment registers could be
499 * totally broken. They must be reset in order to be able to
500 * return to userland.
502 if (regs->tf_trapno == T_PROTFLT) {
503 regs->tf_fs = _udatasel;
504 regs->tf_gs = _udatasel;
506 regs->tf_ss = _udatasel;
510 * Sanitize the trapframe for a virtual kernel passing control to a custom
511 * VM context. Remove any items that would otherwise create a privilage
514 * XXX at the moment we allow userland to set the resume flag. Is this a
518 cpu_sanitize_frame(struct trapframe *frame)
520 frame->tf_cs = _ucodesel;
521 frame->tf_ds = _udatasel;
522 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
524 frame->tf_fs = _udatasel;
525 frame->tf_gs = _udatasel;
527 frame->tf_ss = _udatasel;
528 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
529 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
534 cpu_sanitize_tls(struct savetls *tls)
536 struct segment_descriptor *desc;
539 for (i = 0; i < NGTLS; ++i) {
541 if (desc->sd_dpl == 0 && desc->sd_type == 0)
543 if (desc->sd_def32 == 0)
545 if (desc->sd_type != SDT_MEMRWA)
547 if (desc->sd_dpl != SEL_UPL)
549 if (desc->sd_xx != 0 || desc->sd_p != 1)
556 * sigreturn(ucontext_t *sigcntxp)
558 * System call to cleanup state after a signal
559 * has been taken. Reset signal mask and
560 * stack state from context left by sendsig (above).
561 * Return to previous pc and psl as specified by
562 * context left by sendsig. Check carefully to
563 * make sure that the user has not modified the
564 * state to gain improper privileges.
568 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
569 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
572 sys_sigreturn(struct sigreturn_args *uap)
574 struct lwp *lp = curthread->td_lwp;
575 struct proc *p = lp->lwp_proc;
576 struct trapframe *regs;
584 * We have to copy the information into kernel space so userland
585 * can't modify it while we are sniffing it.
587 regs = lp->lwp_md.md_regs;
588 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
592 eflags = ucp->uc_mcontext.mc_eflags;
594 if (eflags & PSL_VM) {
595 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
596 struct vm86_kernel *vm86;
599 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
600 * set up the vm86 area, and we can't enter vm86 mode.
602 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
604 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
605 if (vm86->vm86_inited == 0)
608 /* go back to user mode if both flags are set */
609 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
610 trapsignal(lp, SIGBUS, 0);
612 if (vm86->vm86_has_vme) {
613 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
614 (eflags & VME_USERCHANGE) | PSL_VM;
616 vm86->vm86_eflags = eflags; /* save VIF, VIP */
617 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
618 (eflags & VM_USERCHANGE) | PSL_VM;
620 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
621 tf->tf_eflags = eflags;
622 tf->tf_vm86_ds = tf->tf_ds;
623 tf->tf_vm86_es = tf->tf_es;
624 tf->tf_vm86_fs = tf->tf_fs;
625 tf->tf_vm86_gs = tf->tf_gs;
626 tf->tf_ds = _udatasel;
627 tf->tf_es = _udatasel;
629 tf->tf_fs = _udatasel;
630 tf->tf_gs = _udatasel;
634 * Don't allow users to change privileged or reserved flags.
637 * XXX do allow users to change the privileged flag PSL_RF.
638 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
639 * should sometimes set it there too. tf_eflags is kept in
640 * the signal context during signal handling and there is no
641 * other place to remember it, so the PSL_RF bit may be
642 * corrupted by the signal handler without us knowing.
643 * Corruption of the PSL_RF bit at worst causes one more or
644 * one less debugger trap, so allowing it is fairly harmless.
646 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
647 kprintf("sigreturn: eflags = 0x%x\n", eflags);
652 * Don't allow users to load a valid privileged %cs. Let the
653 * hardware check for invalid selectors, excess privilege in
654 * other selectors, invalid %eip's and invalid %esp's.
656 cs = ucp->uc_mcontext.mc_cs;
657 if (!CS_SECURE(cs)) {
658 kprintf("sigreturn: cs = 0x%x\n", cs);
659 trapsignal(lp, SIGBUS, T_PROTFLT);
662 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
666 * Restore the FPU state from the frame
669 npxpop(&ucp->uc_mcontext);
672 * Merge saved signal mailbox pending flag to maintain interlock
673 * semantics against system calls.
675 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
676 p->p_flag |= P_MAILBOX;
678 if (ucp->uc_mcontext.mc_onstack & 1)
679 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
681 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
683 lp->lwp_sigmask = ucp->uc_sigmask;
684 SIG_CANTMASK(lp->lwp_sigmask);
690 * Stack frame on entry to function. %eax will contain the function vector,
691 * %ecx will contain the function data. flags, ecx, and eax will have
692 * already been pushed on the stack.
703 sendupcall(struct vmupcall *vu, int morepending)
705 struct lwp *lp = curthread->td_lwp;
706 struct trapframe *regs;
707 struct upcall upcall;
708 struct upc_frame upc_frame;
712 * If we are a virtual kernel running an emulated user process
713 * context, switch back to the virtual kernel context before
714 * trying to post the signal.
716 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
717 lp->lwp_md.md_regs->tf_trapno = 0;
718 vkernel_trap(lp, lp->lwp_md.md_regs);
722 * Get the upcall data structure
724 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
725 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
728 kprintf("bad upcall address\n");
733 * If the data structure is already marked pending or has a critical
734 * section count, mark the data structure as pending and return
735 * without doing an upcall. vu_pending is left set.
737 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
738 if (upcall.upc_pending < vu->vu_pending) {
739 upcall.upc_pending = vu->vu_pending;
740 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
741 sizeof(upcall.upc_pending));
747 * We can run this upcall now, clear vu_pending.
749 * Bump our critical section count and set or clear the
750 * user pending flag depending on whether more upcalls are
751 * pending. The user will be responsible for calling
752 * upc_dispatch(-1) to process remaining upcalls.
755 upcall.upc_pending = morepending;
756 crit_count += TDPRI_CRIT;
757 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
758 sizeof(upcall.upc_pending));
759 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
763 * Construct a stack frame and issue the upcall
765 regs = lp->lwp_md.md_regs;
766 upc_frame.eax = regs->tf_eax;
767 upc_frame.ecx = regs->tf_ecx;
768 upc_frame.edx = regs->tf_edx;
769 upc_frame.flags = regs->tf_eflags;
770 upc_frame.oldip = regs->tf_eip;
771 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
772 sizeof(upc_frame)) != 0) {
773 kprintf("bad stack on upcall\n");
775 regs->tf_eax = (register_t)vu->vu_func;
776 regs->tf_ecx = (register_t)vu->vu_data;
777 regs->tf_edx = (register_t)lp->lwp_upcall;
778 regs->tf_eip = (register_t)vu->vu_ctx;
779 regs->tf_esp -= sizeof(upc_frame);
784 * fetchupcall occurs in the context of a system call, which means that
785 * we have to return EJUSTRETURN in order to prevent eax and edx from
786 * being overwritten by the syscall return value.
788 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
789 * and the function pointer in %eax.
792 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
794 struct upc_frame upc_frame;
795 struct lwp *lp = curthread->td_lwp;
796 struct trapframe *regs;
798 struct upcall upcall;
801 regs = lp->lwp_md.md_regs;
803 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
807 * This jumps us to the next ready context.
810 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
813 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
814 crit_count += TDPRI_CRIT;
816 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
817 regs->tf_eax = (register_t)vu->vu_func;
818 regs->tf_ecx = (register_t)vu->vu_data;
819 regs->tf_edx = (register_t)lp->lwp_upcall;
820 regs->tf_eip = (register_t)vu->vu_ctx;
821 regs->tf_esp = (register_t)rsp;
824 * This returns us to the originally interrupted code.
826 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
827 regs->tf_eax = upc_frame.eax;
828 regs->tf_ecx = upc_frame.ecx;
829 regs->tf_edx = upc_frame.edx;
830 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
831 (upc_frame.flags & PSL_USERCHANGE);
832 regs->tf_eip = upc_frame.oldip;
833 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
842 * Machine dependent boot() routine
844 * I haven't seen anything to put here yet
845 * Possibly some stuff might be grafted back here from boot()
853 * Shutdown the CPU as much as possible
859 __asm__ __volatile("hlt");
863 * cpu_idle() represents the idle LWKT. You cannot return from this function
864 * (unless you want to blow things up!). Instead we look for runnable threads
865 * and loop or halt as appropriate. Giant is not held on entry to the thread.
867 * The main loop is entered with a critical section held, we must release
868 * the critical section before doing anything else. lwkt_switch() will
869 * check for pending interrupts due to entering and exiting its own
872 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
873 * to wake a HLTed cpu up. However, there are cases where the idlethread
874 * will be entered with the possibility that no IPI will occur and in such
875 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
877 static int cpu_idle_hlt = 1;
878 static int cpu_idle_hltcnt;
879 static int cpu_idle_spincnt;
880 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
881 &cpu_idle_hlt, 0, "Idle loop HLT enable");
882 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
883 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
884 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
885 &cpu_idle_spincnt, 0, "Idle loop entry spins");
888 cpu_idle_default_hook(void)
891 * We must guarentee that hlt is exactly the instruction
894 __asm __volatile("sti; hlt");
897 /* Other subsystems (e.g., ACPI) can hook this later. */
898 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
903 struct thread *td = curthread;
906 KKASSERT(td->td_pri < TDPRI_CRIT);
909 * See if there are any LWKTs ready to go.
914 * If we are going to halt call splz unconditionally after
915 * CLIing to catch any interrupt races. Note that we are
916 * at SPL0 and interrupts are enabled.
918 if (cpu_idle_hlt && !lwkt_runnable() &&
919 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
920 __asm __volatile("cli");
922 if (!lwkt_runnable())
926 __asm __volatile("pause");
930 td->td_flags &= ~TDF_IDLE_NOHLT;
933 __asm __volatile("sti; pause");
935 __asm __volatile("sti");
945 * This routine is called when the only runnable threads require
946 * the MP lock, and the scheduler couldn't get it. On a real cpu
947 * we let the scheduler spin.
950 cpu_mplock_contested(void)
956 * This routine is called if a spinlock has been held through the
957 * exponential backoff period and is seriously contested. On a real cpu
961 cpu_spinlock_contested(void)
969 * Clear registers on exec
972 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
974 struct thread *td = curthread;
975 struct lwp *lp = td->td_lwp;
976 struct pcb *pcb = td->td_pcb;
977 struct trapframe *regs = lp->lwp_md.md_regs;
979 /* was i386_user_cleanup() in NetBSD */
982 bzero((char *)regs, sizeof(struct trapframe));
983 regs->tf_eip = entry;
984 regs->tf_esp = stack;
985 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
986 regs->tf_ss = _udatasel;
987 regs->tf_ds = _udatasel;
988 regs->tf_es = _udatasel;
989 regs->tf_fs = _udatasel;
990 regs->tf_gs = _udatasel;
991 regs->tf_cs = _ucodesel;
993 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
994 regs->tf_ebx = ps_strings;
997 * Reset the hardware debug registers if they were in use.
998 * They won't have any meaning for the newly exec'd process.
1000 if (pcb->pcb_flags & PCB_DBREGS) {
1007 if (pcb == td->td_pcb) {
1009 * Clear the debug registers on the running
1010 * CPU, otherwise they will end up affecting
1011 * the next process we switch to.
1015 pcb->pcb_flags &= ~PCB_DBREGS;
1019 * Initialize the math emulator (if any) for the current process.
1020 * Actually, just clear the bit that says that the emulator has
1021 * been initialized. Initialization is delayed until the process
1022 * traps to the emulator (if it is done at all) mainly because
1023 * emulators don't provide an entry point for initialization.
1025 pcb->pcb_flags &= ~FP_SOFTFP;
1028 * note: do not set CR0_TS here. npxinit() must do it after clearing
1029 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1033 load_cr0(rcr0() | CR0_MP);
1036 /* Initialize the npx (if any) for the current process. */
1037 npxinit(__INITIAL_NPXCW__);
1042 * note: linux emulator needs edx to be 0x0 on entry, which is
1043 * handled in execve simply by setting the 64 bit syscall
1044 * return value to 0.
1054 cr0 |= CR0_NE; /* Done by npxinit() */
1055 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1056 cr0 |= CR0_WP | CR0_AM;
1062 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1065 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1067 if (!error && req->newptr)
1072 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1073 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1075 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1076 CTLFLAG_RW, &disable_rtc_set, 0, "");
1078 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1079 CTLFLAG_RD, &bootinfo, bootinfo, "");
1081 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1082 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1084 extern u_long bootdev; /* not a cdev_t - encoding is different */
1085 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1086 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1089 * Initialize 386 and configure to run kernel
1093 * Initialize segments & interrupt table
1097 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1098 static struct gate_descriptor idt0[NIDT];
1099 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1100 union descriptor ldt[NLDT]; /* local descriptor table */
1102 /* table descriptors - used to load tables by cpu */
1103 struct region_descriptor r_gdt, r_idt;
1105 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1106 extern int has_f00f_bug;
1109 static struct i386tss dblfault_tss;
1110 static char dblfault_stack[PAGE_SIZE];
1112 extern struct user *proc0paddr;
1115 /* software prototypes -- in more palatable form */
1116 struct soft_segment_descriptor gdt_segs[] = {
1117 /* GNULL_SEL 0 Null Descriptor */
1118 { 0x0, /* segment base address */
1120 0, /* segment type */
1121 0, /* segment descriptor priority level */
1122 0, /* segment descriptor present */
1124 0, /* default 32 vs 16 bit size */
1125 0 /* limit granularity (byte/page units)*/ },
1126 /* GCODE_SEL 1 Code Descriptor for kernel */
1127 { 0x0, /* segment base address */
1128 0xfffff, /* length - all address space */
1129 SDT_MEMERA, /* segment type */
1130 0, /* segment descriptor priority level */
1131 1, /* segment descriptor present */
1133 1, /* default 32 vs 16 bit size */
1134 1 /* limit granularity (byte/page units)*/ },
1135 /* GDATA_SEL 2 Data Descriptor for kernel */
1136 { 0x0, /* segment base address */
1137 0xfffff, /* length - all address space */
1138 SDT_MEMRWA, /* segment type */
1139 0, /* segment descriptor priority level */
1140 1, /* segment descriptor present */
1142 1, /* default 32 vs 16 bit size */
1143 1 /* limit granularity (byte/page units)*/ },
1144 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1145 { 0x0, /* segment base address */
1146 0xfffff, /* length - all address space */
1147 SDT_MEMRWA, /* segment type */
1148 0, /* segment descriptor priority level */
1149 1, /* segment descriptor present */
1151 1, /* default 32 vs 16 bit size */
1152 1 /* limit granularity (byte/page units)*/ },
1153 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1155 0x0, /* segment base address */
1156 sizeof(struct i386tss)-1,/* length - all address space */
1157 SDT_SYS386TSS, /* segment type */
1158 0, /* segment descriptor priority level */
1159 1, /* segment descriptor present */
1161 0, /* unused - default 32 vs 16 bit size */
1162 0 /* limit granularity (byte/page units)*/ },
1163 /* GLDT_SEL 5 LDT Descriptor */
1164 { (int) ldt, /* segment base address */
1165 sizeof(ldt)-1, /* length - all address space */
1166 SDT_SYSLDT, /* segment type */
1167 SEL_UPL, /* segment descriptor priority level */
1168 1, /* segment descriptor present */
1170 0, /* unused - default 32 vs 16 bit size */
1171 0 /* limit granularity (byte/page units)*/ },
1172 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1173 { (int) ldt, /* segment base address */
1174 (512 * sizeof(union descriptor)-1), /* length */
1175 SDT_SYSLDT, /* segment type */
1176 0, /* segment descriptor priority level */
1177 1, /* segment descriptor present */
1179 0, /* unused - default 32 vs 16 bit size */
1180 0 /* limit granularity (byte/page units)*/ },
1181 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1182 { 0x0, /* segment base address */
1183 0x0, /* length - all address space */
1184 0, /* segment type */
1185 0, /* segment descriptor priority level */
1186 0, /* segment descriptor present */
1188 0, /* default 32 vs 16 bit size */
1189 0 /* limit granularity (byte/page units)*/ },
1190 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1191 { 0x400, /* segment base address */
1192 0xfffff, /* length */
1193 SDT_MEMRWA, /* segment type */
1194 0, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1197 1, /* default 32 vs 16 bit size */
1198 1 /* limit granularity (byte/page units)*/ },
1199 /* GPANIC_SEL 9 Panic Tss Descriptor */
1200 { (int) &dblfault_tss, /* segment base address */
1201 sizeof(struct i386tss)-1,/* length - all address space */
1202 SDT_SYS386TSS, /* segment type */
1203 0, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1206 0, /* unused - default 32 vs 16 bit size */
1207 0 /* limit granularity (byte/page units)*/ },
1208 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1209 { 0, /* segment base address (overwritten) */
1210 0xfffff, /* length */
1211 SDT_MEMERA, /* segment type */
1212 0, /* segment descriptor priority level */
1213 1, /* segment descriptor present */
1215 0, /* default 32 vs 16 bit size */
1216 1 /* limit granularity (byte/page units)*/ },
1217 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1218 { 0, /* segment base address (overwritten) */
1219 0xfffff, /* length */
1220 SDT_MEMERA, /* segment type */
1221 0, /* segment descriptor priority level */
1222 1, /* segment descriptor present */
1224 0, /* default 32 vs 16 bit size */
1225 1 /* limit granularity (byte/page units)*/ },
1226 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1227 { 0, /* segment base address (overwritten) */
1228 0xfffff, /* length */
1229 SDT_MEMRWA, /* segment type */
1230 0, /* segment descriptor priority level */
1231 1, /* segment descriptor present */
1233 1, /* default 32 vs 16 bit size */
1234 1 /* limit granularity (byte/page units)*/ },
1235 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1236 { 0, /* segment base address (overwritten) */
1237 0xfffff, /* length */
1238 SDT_MEMRWA, /* segment type */
1239 0, /* segment descriptor priority level */
1240 1, /* segment descriptor present */
1242 0, /* default 32 vs 16 bit size */
1243 1 /* limit granularity (byte/page units)*/ },
1244 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1245 { 0, /* segment base address (overwritten) */
1246 0xfffff, /* length */
1247 SDT_MEMRWA, /* segment type */
1248 0, /* segment descriptor priority level */
1249 1, /* segment descriptor present */
1251 0, /* default 32 vs 16 bit size */
1252 1 /* limit granularity (byte/page units)*/ },
1253 /* GTLS_START 15 TLS */
1254 { 0x0, /* segment base address */
1256 0, /* segment type */
1257 0, /* segment descriptor priority level */
1258 0, /* segment descriptor present */
1260 0, /* default 32 vs 16 bit size */
1261 0 /* limit granularity (byte/page units)*/ },
1262 /* GTLS_START+1 16 TLS */
1263 { 0x0, /* segment base address */
1265 0, /* segment type */
1266 0, /* segment descriptor priority level */
1267 0, /* segment descriptor present */
1269 0, /* default 32 vs 16 bit size */
1270 0 /* limit granularity (byte/page units)*/ },
1271 /* GTLS_END 17 TLS */
1272 { 0x0, /* segment base address */
1274 0, /* segment type */
1275 0, /* segment descriptor priority level */
1276 0, /* segment descriptor present */
1278 0, /* default 32 vs 16 bit size */
1279 0 /* limit granularity (byte/page units)*/ },
1282 static struct soft_segment_descriptor ldt_segs[] = {
1283 /* Null Descriptor - overwritten by call gate */
1284 { 0x0, /* segment base address */
1285 0x0, /* length - all address space */
1286 0, /* segment type */
1287 0, /* segment descriptor priority level */
1288 0, /* segment descriptor present */
1290 0, /* default 32 vs 16 bit size */
1291 0 /* limit granularity (byte/page units)*/ },
1292 /* Null Descriptor - overwritten by call gate */
1293 { 0x0, /* segment base address */
1294 0x0, /* length - all address space */
1295 0, /* segment type */
1296 0, /* segment descriptor priority level */
1297 0, /* segment descriptor present */
1299 0, /* default 32 vs 16 bit size */
1300 0 /* limit granularity (byte/page units)*/ },
1301 /* Null Descriptor - overwritten by call gate */
1302 { 0x0, /* segment base address */
1303 0x0, /* length - all address space */
1304 0, /* segment type */
1305 0, /* segment descriptor priority level */
1306 0, /* segment descriptor present */
1308 0, /* default 32 vs 16 bit size */
1309 0 /* limit granularity (byte/page units)*/ },
1310 /* Code Descriptor for user */
1311 { 0x0, /* segment base address */
1312 0xfffff, /* length - all address space */
1313 SDT_MEMERA, /* segment type */
1314 SEL_UPL, /* segment descriptor priority level */
1315 1, /* segment descriptor present */
1317 1, /* default 32 vs 16 bit size */
1318 1 /* limit granularity (byte/page units)*/ },
1319 /* Null Descriptor - overwritten by call gate */
1320 { 0x0, /* segment base address */
1321 0x0, /* length - all address space */
1322 0, /* segment type */
1323 0, /* segment descriptor priority level */
1324 0, /* segment descriptor present */
1326 0, /* default 32 vs 16 bit size */
1327 0 /* limit granularity (byte/page units)*/ },
1328 /* Data Descriptor for user */
1329 { 0x0, /* segment base address */
1330 0xfffff, /* length - all address space */
1331 SDT_MEMRWA, /* segment type */
1332 SEL_UPL, /* segment descriptor priority level */
1333 1, /* segment descriptor present */
1335 1, /* default 32 vs 16 bit size */
1336 1 /* limit granularity (byte/page units)*/ },
1340 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1342 struct gate_descriptor *ip;
1345 ip->gd_looffset = (int)func;
1346 ip->gd_selector = selec;
1352 ip->gd_hioffset = ((int)func)>>16 ;
1355 #define IDTVEC(name) __CONCAT(X,name)
1358 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1359 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1360 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1361 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1362 IDTVEC(xmm), IDTVEC(syscall),
1365 IDTVEC(int0x80_syscall);
1367 #ifdef DEBUG_INTERRUPTS
1368 extern inthand_t *Xrsvdary[256];
1372 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1374 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1375 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1376 ssd->ssd_type = sd->sd_type;
1377 ssd->ssd_dpl = sd->sd_dpl;
1378 ssd->ssd_p = sd->sd_p;
1379 ssd->ssd_def32 = sd->sd_def32;
1380 ssd->ssd_gran = sd->sd_gran;
1384 * Populate the (physmap) array with base/bound pairs describing the
1385 * available physical memory in the system, then test this memory and
1386 * build the phys_avail array describing the actually-available memory.
1388 * If we cannot accurately determine the physical memory map, then use
1389 * value from the 0xE801 call, and failing that, the RTC.
1391 * Total memory size may be set by the kernel environment variable
1392 * hw.physmem or the compile-time define MAXMEM.
1395 getmemsize(int first)
1397 int i, physmap_idx, pa_indx, da_indx;
1399 u_int basemem, extmem;
1400 struct vm86frame vmf;
1401 struct vm86context vmc;
1403 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1411 quad_t dcons_addr, dcons_size;
1413 bzero(&vmf, sizeof(struct vm86frame));
1414 bzero(physmap, sizeof(physmap));
1418 * Some newer BIOSes has broken INT 12H implementation which cause
1419 * kernel panic immediately. In this case, we need to scan SMAP
1420 * with INT 15:E820 first, then determine base memory size.
1423 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1424 if (hasbrokenint12) {
1429 * Perform "base memory" related probes & setup. If we get a crazy
1430 * value give the bios some scribble space just in case.
1432 vm86_intcall(0x12, &vmf);
1433 basemem = vmf.vmf_ax;
1434 if (basemem > 640) {
1435 kprintf("Preposterous BIOS basemem of %uK, "
1436 "truncating to < 640K\n", basemem);
1441 * XXX if biosbasemem is now < 640, there is a `hole'
1442 * between the end of base memory and the start of
1443 * ISA memory. The hole may be empty or it may
1444 * contain BIOS code or data. Map it read/write so
1445 * that the BIOS can write to it. (Memory from 0 to
1446 * the physical end of the kernel is mapped read-only
1447 * to begin with and then parts of it are remapped.
1448 * The parts that aren't remapped form holes that
1449 * remain read-only and are unused by the kernel.
1450 * The base memory area is below the physical end of
1451 * the kernel and right now forms a read-only hole.
1452 * The part of it from PAGE_SIZE to
1453 * (trunc_page(biosbasemem * 1024) - 1) will be
1454 * remapped and used by the kernel later.)
1456 * This code is similar to the code used in
1457 * pmap_mapdev, but since no memory needs to be
1458 * allocated we simply change the mapping.
1460 for (pa = trunc_page(basemem * 1024);
1461 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1462 pte = vtopte(pa + KERNBASE);
1463 *pte = pa | PG_RW | PG_V;
1467 * if basemem != 640, map pages r/w into vm86 page table so
1468 * that the bios can scribble on it.
1471 for (i = basemem / 4; i < 160; i++)
1472 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1476 * map page 1 R/W into the kernel page table so we can use it
1477 * as a buffer. The kernel will unmap this page later.
1479 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1480 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1483 * get memory map with INT 15:E820
1485 #define SMAPSIZ sizeof(*smap)
1486 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1489 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1490 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1495 vmf.vmf_eax = 0xE820;
1496 vmf.vmf_edx = SMAP_SIG;
1497 vmf.vmf_ecx = SMAPSIZ;
1498 i = vm86_datacall(0x15, &vmf, &vmc);
1499 if (i || vmf.vmf_eax != SMAP_SIG)
1501 if (boothowto & RB_VERBOSE)
1502 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1504 *(u_int32_t *)((char *)&smap->base + 4),
1505 (u_int32_t)smap->base,
1506 *(u_int32_t *)((char *)&smap->length + 4),
1507 (u_int32_t)smap->length);
1509 if (smap->type != 0x01)
1512 if (smap->length == 0)
1515 if (smap->base >= 0xffffffff) {
1516 kprintf("%ju MB of memory above 4GB ignored\n",
1517 (uintmax_t)(smap->length / 1024 / 1024));
1521 for (i = 0; i <= physmap_idx; i += 2) {
1522 if (smap->base < physmap[i + 1]) {
1523 if (boothowto & RB_VERBOSE)
1525 "Overlapping or non-montonic memory region, ignoring second region\n");
1530 if (smap->base == physmap[physmap_idx + 1]) {
1531 physmap[physmap_idx + 1] += smap->length;
1536 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1538 "Too many segments in the physical address map, giving up\n");
1541 physmap[physmap_idx] = smap->base;
1542 physmap[physmap_idx + 1] = smap->base + smap->length;
1544 ; /* fix GCC3.x warning */
1545 } while (vmf.vmf_ebx != 0);
1548 * Perform "base memory" related probes & setup based on SMAP
1551 for (i = 0; i <= physmap_idx; i += 2) {
1552 if (physmap[i] == 0x00000000) {
1553 basemem = physmap[i + 1] / 1024;
1562 if (basemem > 640) {
1563 kprintf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1568 for (pa = trunc_page(basemem * 1024);
1569 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1570 pte = vtopte(pa + KERNBASE);
1571 *pte = pa | PG_RW | PG_V;
1575 for (i = basemem / 4; i < 160; i++)
1576 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1579 if (physmap[1] != 0)
1583 * If we failed above, try memory map with INT 15:E801
1585 vmf.vmf_ax = 0xE801;
1586 if (vm86_intcall(0x15, &vmf) == 0) {
1587 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1591 vm86_intcall(0x15, &vmf);
1592 extmem = vmf.vmf_ax;
1595 * Prefer the RTC value for extended memory.
1597 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1602 * Special hack for chipsets that still remap the 384k hole when
1603 * there's 16MB of memory - this really confuses people that
1604 * are trying to use bus mastering ISA controllers with the
1605 * "16MB limit"; they only have 16MB, but the remapping puts
1606 * them beyond the limit.
1608 * If extended memory is between 15-16MB (16-17MB phys address range),
1611 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1615 physmap[1] = basemem * 1024;
1617 physmap[physmap_idx] = 0x100000;
1618 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1622 * Now, physmap contains a map of physical memory.
1626 /* make hole for AP bootstrap code YYY */
1627 physmap[1] = mp_bootaddress(physmap[1]);
1629 /* Save EBDA address, if any */
1630 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1635 * Maxmem isn't the "maximum memory", it's one larger than the
1636 * highest page of the physical address space. It should be
1637 * called something like "Maxphyspage". We may adjust this
1638 * based on ``hw.physmem'' and the results of the memory test.
1640 Maxmem = atop(physmap[physmap_idx + 1]);
1643 Maxmem = MAXMEM / 4;
1646 if (kgetenv_quad("hw.physmem", &maxmem))
1647 Maxmem = atop(maxmem);
1649 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1650 (boothowto & RB_VERBOSE))
1651 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1654 * If Maxmem has been increased beyond what the system has detected,
1655 * extend the last memory segment to the new limit.
1657 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1658 physmap[physmap_idx + 1] = ptoa(Maxmem);
1660 /* call pmap initialization to make new kernel address space */
1661 pmap_bootstrap(first, 0);
1664 * Size up each available chunk of physical memory.
1666 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1669 phys_avail[pa_indx++] = physmap[0];
1670 phys_avail[pa_indx] = physmap[0];
1671 dump_avail[da_indx] = physmap[0];
1676 * Get dcons buffer address
1678 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1679 kgetenv_quad("dcons.size", &dcons_size) == 0)
1683 * physmap is in bytes, so when converting to page boundaries,
1684 * round up the start address and round down the end address.
1686 for (i = 0; i <= physmap_idx; i += 2) {
1690 if (physmap[i + 1] < end)
1691 end = trunc_page(physmap[i + 1]);
1692 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1693 int tmp, page_bad, full;
1697 int *ptr = (int *)CADDR1;
1702 * block out kernel memory as not available.
1704 if (pa >= 0x100000 && pa < first)
1708 * block out dcons buffer
1711 && pa >= trunc_page(dcons_addr)
1712 && pa < dcons_addr + dcons_size)
1718 * map page into kernel: valid, read/write,non-cacheable
1720 *pte = pa | PG_V | PG_RW | PG_N;
1725 * Test for alternating 1's and 0's
1727 *(volatile int *)ptr = 0xaaaaaaaa;
1728 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1732 * Test for alternating 0's and 1's
1734 *(volatile int *)ptr = 0x55555555;
1735 if (*(volatile int *)ptr != 0x55555555) {
1741 *(volatile int *)ptr = 0xffffffff;
1742 if (*(volatile int *)ptr != 0xffffffff) {
1748 *(volatile int *)ptr = 0x0;
1749 if (*(volatile int *)ptr != 0x0) {
1753 * Restore original value.
1758 * Adjust array of valid/good pages.
1760 if (page_bad == TRUE) {
1764 * If this good page is a continuation of the
1765 * previous set of good pages, then just increase
1766 * the end pointer. Otherwise start a new chunk.
1767 * Note that "end" points one higher than end,
1768 * making the range >= start and < end.
1769 * If we're also doing a speculative memory
1770 * test and we at or past the end, bump up Maxmem
1771 * so that we keep going. The first bad page
1772 * will terminate the loop.
1774 if (phys_avail[pa_indx] == pa) {
1775 phys_avail[pa_indx] += PAGE_SIZE;
1778 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1779 kprintf("Too many holes in the physical address space, giving up\n");
1784 phys_avail[pa_indx++] = pa; /* start */
1785 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1789 if (dump_avail[da_indx] == pa) {
1790 dump_avail[da_indx] += PAGE_SIZE;
1793 if (da_indx >= PHYSMAP_ENTRIES*2) {
1797 dump_avail[da_indx++] = pa; /* start */
1798 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1811 * The last chunk must contain at least one page plus the message
1812 * buffer to avoid complicating other code (message buffer address
1813 * calculation, etc.).
1815 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1816 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1817 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1818 phys_avail[pa_indx--] = 0;
1819 phys_avail[pa_indx--] = 0;
1822 Maxmem = atop(phys_avail[pa_indx]);
1824 /* Trim off space for the message buffer. */
1825 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1827 avail_end = phys_avail[pa_indx];
1839 * 7 Device Not Available (x87)
1841 * 9 Coprocessor Segment overrun (unsupported, reserved)
1843 * 11 Segment not present
1845 * 13 General Protection
1848 * 16 x87 FP Exception pending
1849 * 17 Alignment Check
1851 * 19 SIMD floating point
1853 * 32-255 INTn/external sources
1858 struct gate_descriptor *gdp;
1859 int gsel_tss, metadata_missing, off, x;
1860 struct mdglobaldata *gd;
1863 * Prevent lowering of the ipl if we call tsleep() early.
1865 gd = &CPU_prvspace[0].mdglobaldata;
1866 bzero(gd, sizeof(*gd));
1868 gd->mi.gd_curthread = &thread0;
1869 thread0.td_gd = &gd->mi;
1871 atdevbase = ISA_HOLE_START + KERNBASE;
1873 metadata_missing = 0;
1874 if (bootinfo.bi_modulep) {
1875 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1876 preload_bootstrap_relocate(KERNBASE);
1878 metadata_missing = 1;
1880 if (bootinfo.bi_envp)
1881 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1884 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1885 * and ncpus_fit_mask remain 0.
1890 /* Init basic tunables, hz etc */
1894 * make gdt memory segments, the code segment goes up to end of the
1895 * page with etext in it, the data segment goes to the end of
1899 * XXX text protection is temporarily (?) disabled. The limit was
1900 * i386_btop(round_page(etext)) - 1.
1902 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1903 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1905 gdt_segs[GPRIV_SEL].ssd_limit =
1906 atop(sizeof(struct privatespace) - 1);
1907 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1908 gdt_segs[GPROC0_SEL].ssd_base =
1909 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1911 gd->mi.gd_prvspace = &CPU_prvspace[0];
1914 * Note: on both UP and SMP curthread must be set non-NULL
1915 * early in the boot sequence because the system assumes
1916 * that 'curthread' is never NULL.
1919 for (x = 0; x < NGDT; x++) {
1921 /* avoid overwriting db entries with APM ones */
1922 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1925 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1928 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1929 r_gdt.rd_base = (int) gdt;
1932 mi_gdinit(&gd->mi, 0);
1934 mi_proc0init(&gd->mi, proc0paddr);
1935 safepri = TDPRI_MAX;
1937 /* make ldt memory segments */
1939 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
1940 * should be spelled ...MAX_USER...
1942 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1943 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1944 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1945 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1947 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1949 gd->gd_currentldt = _default_ldt;
1950 /* spinlocks and the BGL */
1954 * Setup the hardware exception table. Most exceptions use
1955 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
1956 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
1957 * an 'interrupt trap gate', which disables interrupts on entry,
1958 * in order to be able to poll the appropriate CRn register to
1959 * determine the fault address.
1961 for (x = 0; x < NIDT; x++) {
1962 #ifdef DEBUG_INTERRUPTS
1963 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1965 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1968 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1969 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1970 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1971 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1972 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1973 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1974 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1975 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1976 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1977 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1978 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1979 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1980 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1981 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1982 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1983 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1984 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1985 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1986 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1987 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1988 setidt(0x80, &IDTVEC(int0x80_syscall),
1989 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1991 r_idt.rd_limit = sizeof(idt0) - 1;
1992 r_idt.rd_base = (int) idt;
1996 * Initialize the console before we print anything out.
2000 if (metadata_missing)
2001 kprintf("WARNING: loader(8) metadata is missing!\n");
2010 if (boothowto & RB_KDB)
2011 Debugger("Boot flags requested debugger");
2014 finishidentcpu(); /* Final stage of CPU initialization */
2015 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2016 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2017 initializecpu(); /* Initialize CPU registers */
2020 * make an initial tss so cpu can get interrupt stack on syscall!
2021 * The 16 bytes is to save room for a VM86 context.
2023 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2024 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2025 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2026 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2027 gd->gd_common_tssd = *gd->gd_tss_gdt;
2028 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2031 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2032 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2033 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2034 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2035 dblfault_tss.tss_cr3 = (int)IdlePTD;
2036 dblfault_tss.tss_eip = (int) dblfault_handler;
2037 dblfault_tss.tss_eflags = PSL_KERNEL;
2038 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2039 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2040 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2041 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2042 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2046 init_param2(physmem);
2048 /* now running on new page tables, configured,and u/iom is accessible */
2050 /* Map the message buffer. */
2051 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2052 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2054 msgbufinit(msgbufp, MSGBUF_SIZE);
2056 /* make a call gate to reenter kernel with */
2057 gdp = &ldt[LSYS5CALLS_SEL].gd;
2059 x = (int) &IDTVEC(syscall);
2060 gdp->gd_looffset = x++;
2061 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2063 gdp->gd_type = SDT_SYS386CGT;
2064 gdp->gd_dpl = SEL_UPL;
2066 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2068 /* XXX does this work? */
2069 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2070 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2072 /* transfer to user mode */
2074 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2075 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2077 /* setup proc 0's pcb */
2078 thread0.td_pcb->pcb_flags = 0;
2079 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2080 thread0.td_pcb->pcb_ext = 0;
2081 lwp0.lwp_md.md_regs = &proc0_tf;
2085 * Initialize machine-dependant portions of the global data structure.
2086 * Note that the global data area and cpu0's idlestack in the private
2087 * data space were allocated in locore.
2089 * Note: the idlethread's cpl is 0
2091 * WARNING! Called from early boot, 'mycpu' may not work yet.
2094 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2097 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2099 lwkt_init_thread(&gd->mi.gd_idlethread,
2100 gd->mi.gd_prvspace->idlestack,
2101 sizeof(gd->mi.gd_prvspace->idlestack),
2102 TDF_MPSAFE, &gd->mi);
2103 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2104 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2105 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2106 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2110 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2112 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2113 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2120 globaldata_find(int cpu)
2122 KKASSERT(cpu >= 0 && cpu < ncpus);
2123 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2126 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2127 static void f00f_hack(void *unused);
2128 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2131 f00f_hack(void *unused)
2133 struct gate_descriptor *new_idt;
2139 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2141 r_idt.rd_limit = sizeof(idt0) - 1;
2143 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2145 panic("kmem_alloc returned 0");
2146 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2147 panic("kmem_alloc returned non-page-aligned memory");
2148 /* Put the first seven entries in the lower page */
2149 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2150 bcopy(idt, new_idt, sizeof(idt0));
2151 r_idt.rd_base = (int)new_idt;
2154 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2155 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2156 panic("vm_map_protect failed");
2159 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2162 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2164 lp->lwp_md.md_regs->tf_eip = addr;
2169 ptrace_single_step(struct lwp *lp)
2171 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2176 fill_regs(struct lwp *lp, struct reg *regs)
2178 struct trapframe *tp;
2180 tp = lp->lwp_md.md_regs;
2181 regs->r_gs = tp->tf_gs;
2182 regs->r_fs = tp->tf_fs;
2183 regs->r_es = tp->tf_es;
2184 regs->r_ds = tp->tf_ds;
2185 regs->r_edi = tp->tf_edi;
2186 regs->r_esi = tp->tf_esi;
2187 regs->r_ebp = tp->tf_ebp;
2188 regs->r_ebx = tp->tf_ebx;
2189 regs->r_edx = tp->tf_edx;
2190 regs->r_ecx = tp->tf_ecx;
2191 regs->r_eax = tp->tf_eax;
2192 regs->r_eip = tp->tf_eip;
2193 regs->r_cs = tp->tf_cs;
2194 regs->r_eflags = tp->tf_eflags;
2195 regs->r_esp = tp->tf_esp;
2196 regs->r_ss = tp->tf_ss;
2201 set_regs(struct lwp *lp, struct reg *regs)
2203 struct trapframe *tp;
2205 tp = lp->lwp_md.md_regs;
2206 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2207 !CS_SECURE(regs->r_cs))
2209 tp->tf_gs = regs->r_gs;
2210 tp->tf_fs = regs->r_fs;
2211 tp->tf_es = regs->r_es;
2212 tp->tf_ds = regs->r_ds;
2213 tp->tf_edi = regs->r_edi;
2214 tp->tf_esi = regs->r_esi;
2215 tp->tf_ebp = regs->r_ebp;
2216 tp->tf_ebx = regs->r_ebx;
2217 tp->tf_edx = regs->r_edx;
2218 tp->tf_ecx = regs->r_ecx;
2219 tp->tf_eax = regs->r_eax;
2220 tp->tf_eip = regs->r_eip;
2221 tp->tf_cs = regs->r_cs;
2222 tp->tf_eflags = regs->r_eflags;
2223 tp->tf_esp = regs->r_esp;
2224 tp->tf_ss = regs->r_ss;
2228 #ifndef CPU_DISABLE_SSE
2230 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2232 struct env87 *penv_87 = &sv_87->sv_env;
2233 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2236 /* FPU control/status */
2237 penv_87->en_cw = penv_xmm->en_cw;
2238 penv_87->en_sw = penv_xmm->en_sw;
2239 penv_87->en_tw = penv_xmm->en_tw;
2240 penv_87->en_fip = penv_xmm->en_fip;
2241 penv_87->en_fcs = penv_xmm->en_fcs;
2242 penv_87->en_opcode = penv_xmm->en_opcode;
2243 penv_87->en_foo = penv_xmm->en_foo;
2244 penv_87->en_fos = penv_xmm->en_fos;
2247 for (i = 0; i < 8; ++i)
2248 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2250 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2254 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2256 struct env87 *penv_87 = &sv_87->sv_env;
2257 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2260 /* FPU control/status */
2261 penv_xmm->en_cw = penv_87->en_cw;
2262 penv_xmm->en_sw = penv_87->en_sw;
2263 penv_xmm->en_tw = penv_87->en_tw;
2264 penv_xmm->en_fip = penv_87->en_fip;
2265 penv_xmm->en_fcs = penv_87->en_fcs;
2266 penv_xmm->en_opcode = penv_87->en_opcode;
2267 penv_xmm->en_foo = penv_87->en_foo;
2268 penv_xmm->en_fos = penv_87->en_fos;
2271 for (i = 0; i < 8; ++i)
2272 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2274 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2276 #endif /* CPU_DISABLE_SSE */
2279 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2281 #ifndef CPU_DISABLE_SSE
2283 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2284 (struct save87 *)fpregs);
2287 #endif /* CPU_DISABLE_SSE */
2288 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2293 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2295 #ifndef CPU_DISABLE_SSE
2297 set_fpregs_xmm((struct save87 *)fpregs,
2298 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2301 #endif /* CPU_DISABLE_SSE */
2302 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2307 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2310 dbregs->dr0 = rdr0();
2311 dbregs->dr1 = rdr1();
2312 dbregs->dr2 = rdr2();
2313 dbregs->dr3 = rdr3();
2314 dbregs->dr4 = rdr4();
2315 dbregs->dr5 = rdr5();
2316 dbregs->dr6 = rdr6();
2317 dbregs->dr7 = rdr7();
2321 pcb = lp->lwp_thread->td_pcb;
2322 dbregs->dr0 = pcb->pcb_dr0;
2323 dbregs->dr1 = pcb->pcb_dr1;
2324 dbregs->dr2 = pcb->pcb_dr2;
2325 dbregs->dr3 = pcb->pcb_dr3;
2328 dbregs->dr6 = pcb->pcb_dr6;
2329 dbregs->dr7 = pcb->pcb_dr7;
2335 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2338 load_dr0(dbregs->dr0);
2339 load_dr1(dbregs->dr1);
2340 load_dr2(dbregs->dr2);
2341 load_dr3(dbregs->dr3);
2342 load_dr4(dbregs->dr4);
2343 load_dr5(dbregs->dr5);
2344 load_dr6(dbregs->dr6);
2345 load_dr7(dbregs->dr7);
2348 struct ucred *ucred;
2350 uint32_t mask1, mask2;
2353 * Don't let an illegal value for dr7 get set. Specifically,
2354 * check for undefined settings. Setting these bit patterns
2355 * result in undefined behaviour and can lead to an unexpected
2358 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2359 i++, mask1 <<= 2, mask2 <<= 2)
2360 if ((dbregs->dr7 & mask1) == mask2)
2363 pcb = lp->lwp_thread->td_pcb;
2364 ucred = lp->lwp_proc->p_ucred;
2367 * Don't let a process set a breakpoint that is not within the
2368 * process's address space. If a process could do this, it
2369 * could halt the system by setting a breakpoint in the kernel
2370 * (if ddb was enabled). Thus, we need to check to make sure
2371 * that no breakpoints are being enabled for addresses outside
2372 * process's address space, unless, perhaps, we were called by
2375 * XXX - what about when the watched area of the user's
2376 * address space is written into from within the kernel
2377 * ... wouldn't that still cause a breakpoint to be generated
2378 * from within kernel mode?
2381 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2382 if (dbregs->dr7 & 0x3) {
2383 /* dr0 is enabled */
2384 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2388 if (dbregs->dr7 & (0x3<<2)) {
2389 /* dr1 is enabled */
2390 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2394 if (dbregs->dr7 & (0x3<<4)) {
2395 /* dr2 is enabled */
2396 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2400 if (dbregs->dr7 & (0x3<<6)) {
2401 /* dr3 is enabled */
2402 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2407 pcb->pcb_dr0 = dbregs->dr0;
2408 pcb->pcb_dr1 = dbregs->dr1;
2409 pcb->pcb_dr2 = dbregs->dr2;
2410 pcb->pcb_dr3 = dbregs->dr3;
2411 pcb->pcb_dr6 = dbregs->dr6;
2412 pcb->pcb_dr7 = dbregs->dr7;
2414 pcb->pcb_flags |= PCB_DBREGS;
2421 * Return > 0 if a hardware breakpoint has been hit, and the
2422 * breakpoint was in user space. Return 0, otherwise.
2425 user_dbreg_trap(void)
2427 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2428 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2429 int nbp; /* number of breakpoints that triggered */
2430 caddr_t addr[4]; /* breakpoint addresses */
2434 if ((dr7 & 0x000000ff) == 0) {
2436 * all GE and LE bits in the dr7 register are zero,
2437 * thus the trap couldn't have been caused by the
2438 * hardware debug registers
2445 bp = dr6 & 0x0000000f;
2449 * None of the breakpoint bits are set meaning this
2450 * trap was not caused by any of the debug registers
2456 * at least one of the breakpoints were hit, check to see
2457 * which ones and if any of them are user space addresses
2461 addr[nbp++] = (caddr_t)rdr0();
2464 addr[nbp++] = (caddr_t)rdr1();
2467 addr[nbp++] = (caddr_t)rdr2();
2470 addr[nbp++] = (caddr_t)rdr3();
2473 for (i=0; i<nbp; i++) {
2475 (caddr_t)VM_MAX_USER_ADDRESS) {
2477 * addr[i] is in user space
2484 * None of the breakpoints are in user space.
2492 Debugger(const char *msg)
2494 kprintf("Debugger(\"%s\") called.\n", msg);
2501 * Provide inb() and outb() as functions. They are normally only
2502 * available as macros calling inlined functions, thus cannot be
2503 * called inside DDB.
2505 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2511 /* silence compiler warnings */
2513 void outb(u_int, u_char);
2520 * We use %%dx and not %1 here because i/o is done at %dx and not at
2521 * %edx, while gcc generates inferior code (movw instead of movl)
2522 * if we tell it to load (u_short) port.
2524 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2529 outb(u_int port, u_char data)
2533 * Use an unnecessary assignment to help gcc's register allocator.
2534 * This make a large difference for gcc-1.40 and a tiny difference
2535 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2536 * best results. gcc-2.6.0 can't handle this.
2539 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2546 #include "opt_cpu.h"
2550 * initialize all the SMP locks
2553 /* critical region when masking or unmasking interupts */
2554 struct spinlock_deprecated imen_spinlock;
2556 /* Make FAST_INTR() routines sequential */
2557 struct spinlock_deprecated fast_intr_spinlock;
2559 /* critical region for old style disable_intr/enable_intr */
2560 struct spinlock_deprecated mpintr_spinlock;
2562 /* critical region around INTR() routines */
2563 struct spinlock_deprecated intr_spinlock;
2565 /* lock region used by kernel profiling */
2566 struct spinlock_deprecated mcount_spinlock;
2568 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2569 struct spinlock_deprecated com_spinlock;
2571 /* locks kernel kprintfs */
2572 struct spinlock_deprecated cons_spinlock;
2574 /* lock regions around the clock hardware */
2575 struct spinlock_deprecated clock_spinlock;
2577 /* lock around the MP rendezvous */
2578 struct spinlock_deprecated smp_rv_spinlock;
2584 * mp_lock = 0; BSP already owns the MP lock
2587 * Get the initial mp_lock with a count of 1 for the BSP.
2588 * This uses a LOGICAL cpu ID, ie BSP == 0.
2591 cpu_get_initial_mplock();
2594 spin_lock_init(&mcount_spinlock);
2595 spin_lock_init(&fast_intr_spinlock);
2596 spin_lock_init(&intr_spinlock);
2597 spin_lock_init(&mpintr_spinlock);
2598 spin_lock_init(&imen_spinlock);
2599 spin_lock_init(&smp_rv_spinlock);
2600 spin_lock_init(&com_spinlock);
2601 spin_lock_init(&clock_spinlock);
2602 spin_lock_init(&cons_spinlock);
2604 /* our token pool needs to work early */
2605 lwkt_token_pool_init();