acpi/pstate: Fix the long standing P-State detection problem on Intel CPUs
authorSepherosa Ziehau <sephe@dragonflybsd.org>
Thu, 29 Dec 2011 08:33:11 +0000 (16:33 +0800)
committerSepherosa Ziehau <sephe@dragonflybsd.org>
Thu, 29 Dec 2011 08:33:11 +0000 (16:33 +0800)
commit47cf4819ea1fbf8eb9d0da5cd92623dcac44298b
tree735438b9ac9afc1df5e4817481a07ea4c90a0f0d
parent759fc5332c2b97c3a48b5aefb94b6cab57de07a4
acpi/pstate: Fix the long standing P-State detection problem on Intel CPUs

- Rename the ACPI_CAP to ACPI_PDC according to Intel's document.
  While I'm here, update the document revision.
- Remove unapplied comment about _OSC and _PDC's revision; Intel's
  document states clearly that it should be 1
- Fix the 'Count' argument for _OSC evaluation; the intergers in
  'Capabilities buffer' argument is 2
- Fix the buffer length of _OSC's 'Capabilities buffer'; we only
  pass 2 intergers.
- Perfer _OSC evaluation, fall back to _PDC evaluation only if _OSC
  evaluation fails.
- Add MD cpu features, so MD code could deliver proper settings.
  For AMD CPUs, the old configuration just works (AMD actually has
  no documents about _PDC and _OSC).
  For Intel CPUs w/ EST, it looks like P-State's _PCT will appear
  only when bit0 (P-State MSR), bit5 (P-State software coordination)
  and bit11 (P-State hardware coordination) are turned on.
sys/dev/acpica5/Makefile
sys/dev/acpica5/acpi_cpu.c
sys/dev/acpica5/acpi_cpu.h
sys/dev/acpica5/acpi_cpu_cstate.c
sys/dev/acpica5/acpivar.h
sys/platform/pc32/acpica5/acpi_cpu_machdep.c [new file with mode: 0644]
sys/platform/pc64/acpica5/acpi_cpu_machdep.c [new file with mode: 0644]