From: Sepherosa Ziehau <sephe@dragonflybsd.org>
Date: Sat, 23 Apr 2011 04:06:02 +0000 (+0800)
Subject: i386: Remove old IOAPIC code
X-Git-Url: https://gitweb.dragonflybsd.org/~mneumann/dragonfly.git/commitdiff_plain/6ac31e9dbdd0f66793f25e2026c133c5d2af3ddd

i386: Remove old IOAPIC code
---

diff --git a/sys/bus/pci/i386/mptable_pci.c b/sys/bus/pci/i386/mptable_pci.c
index 36f26e9cd1..7bae558b52 100644
--- a/sys/bus/pci/i386/mptable_pci.c
+++ b/sys/bus/pci/i386/mptable_pci.c
@@ -54,38 +54,15 @@
 static int
 mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
 {
-	int line, bus, slot;
+	int line, bus, slot, irq;
 
 	bus = pci_get_bus(dev);
 	slot = pci_get_slot(dev);
+	irq = pci_get_irq(dev);
 
-	if (ioapic_use_old) {
-		line = pci_apic_irq(bus, slot, pin);
-		if (line >= 0) {
-			goto done;
-		} else {
-			int irq = pci_get_irq(dev);
-
-			/* 
-			 * PCI interrupts might be redirected to the
-			 * ISA bus according to some MP tables.  Use the
-			 * same methods as used by the ISA devices
-			 * devices to find the proper IOAPIC int pin.
-			 */
-			kprintf("MPTable: Try routing through ISA bus for "
-				"bus %d slot %d INT%c irq %d\n",
-				bus, slot, 'A' + pin - 1, irq);
-			line = isa_apic_irq(irq);
-			if (line >= 0)
-				goto done;
-		}
-	} else {
-		int irq = pci_get_irq(dev);
-
-		line = mptable_pci_int_route(bus, slot, pin, irq);
-		if (line >= 0)
-			goto done;
-	}
+	line = mptable_pci_int_route(bus, slot, pin, irq);
+	if (line >= 0)
+		goto done;
 
 	kprintf("MPTABLE: Unable to route for bus %d slot %d INT%c\n",
 		bus, slot, 'A' + pin - 1);
@@ -110,10 +87,9 @@ mptable_hostb_probe(device_t dev)
 	if (mptable_pci_probe_table(pcib_get_bus(dev)) != 0)
 		return (ENXIO);
 #endif
-	if (!ioapic_use_old) {
-		if (bootverbose)
-			mptable_pci_int_dump();
-	}
+
+	if (bootverbose)
+		mptable_pci_int_dump();
 
 	device_set_desc(dev, "MPTABLE Host-PCI bridge");
 	return (0);
diff --git a/sys/platform/pc32/acpica5/acpi_madt.c b/sys/platform/pc32/acpica5/acpi_madt.c
index a4aa924309..bf4bc80f64 100644
--- a/sys/platform/pc32/acpica5/acpi_madt.c
+++ b/sys/platform/pc32/acpica5/acpi_madt.c
@@ -614,25 +614,21 @@ madt_ioapic_enum_callback(void *xarg, const struct acpi_madt_ent *ent)
 			      trig, pola);
 	} else if (ent->me_type == MADT_ENT_IOAPIC) {
 		const struct acpi_madt_ioapic *ioapic_ent;
+		uint32_t ver;
+		void *addr;
+		int npin;
 
 		ioapic_ent = (const struct acpi_madt_ioapic *)ent;
 		MADT_VPRINTF("IOAPIC addr 0x%08x, apic id %d, gsi base %u\n",
 			     ioapic_ent->mio_addr, ioapic_ent->mio_apic_id,
 			     ioapic_ent->mio_gsi_base);
 
-		if (!ioapic_use_old) {
-			uint32_t ver;
-			void *addr;
-			int npin;
+		addr = ioapic_map(ioapic_ent->mio_addr);
 
-			addr = ioapic_map(ioapic_ent->mio_addr);
+		ver = ioapic_read(addr, IOAPIC_VER);
+		npin = ((ver & IOART_VER_MAXREDIR) >> MAXREDIRSHIFT) + 1;
 
-			ver = ioapic_read(addr, IOAPIC_VER);
-			npin = ((ver & IOART_VER_MAXREDIR) >>
-				MAXREDIRSHIFT) + 1;
-
-			ioapic_add(addr, ioapic_ent->mio_gsi_base, npin);
-		}
+		ioapic_add(addr, ioapic_ent->mio_gsi_base, npin);
 	}
 	return 0;
 }
diff --git a/sys/platform/pc32/apic/ioapic_abi.c b/sys/platform/pc32/apic/ioapic_abi.c
index 5a500dafc0..9b82a08521 100644
--- a/sys/platform/pc32/apic/ioapic_abi.c
+++ b/sys/platform/pc32/apic/ioapic_abi.c
@@ -779,14 +779,6 @@ ioapic_intr_config(int irq, enum intr_trigger trig, enum intr_polarity pola)
 	void *ioaddr;
 	int pin;
 
-	if (ioapic_use_old) {
-		if (bootverbose) {
-			kprintf("irq %d, trig %c\n", irq,
-				trig == INTR_TRIGGER_EDGE ? 'E' : 'L');
-		}
-		return;
-	}
-
 	KKASSERT(trig == INTR_TRIGGER_EDGE || trig == INTR_TRIGGER_LEVEL);
 	KKASSERT(pola == INTR_POLARITY_HIGH || pola == INTR_POLARITY_LOW);
 
diff --git a/sys/platform/pc32/apic/mpapic.c b/sys/platform/pc32/apic/mpapic.c
index 3909627bdb..d3c82c05ac 100644
--- a/sys/platform/pc32/apic/mpapic.c
+++ b/sys/platform/pc32/apic/mpapic.c
@@ -1147,6 +1147,8 @@ static TAILQ_HEAD(, ioapic_enumerator) ioapic_enumerators =
 void
 ioapic_config(void)
 {
+	struct ioapic_info *info;
+	int start_apic_id = 0;
 	struct ioapic_enumerator *e;
 	int error, i;
 	u_long ef = 0;
@@ -1170,107 +1172,100 @@ ioapic_config(void)
 #endif
 	}
 
-	if (!ioapic_use_old) {
-		crit_enter();
+	crit_enter();
 
-		ef = read_eflags();
-		cpu_disable_intr();
+	ef = read_eflags();
+	cpu_disable_intr();
 
-		/*
-		 * Switch to I/O APIC MachIntrABI and reconfigure
-		 * the default IDT entries.
-		 */
-		MachIntrABI = MachIntrABI_IOAPIC;
-		MachIntrABI.setdefault();
-	}
+	/*
+	 * Switch to I/O APIC MachIntrABI and reconfigure
+	 * the default IDT entries.
+	 */
+	MachIntrABI = MachIntrABI_IOAPIC;
+	MachIntrABI.setdefault();
 
 	e->ioapic_enumerate(e);
 
-	if (!ioapic_use_old) {
-		struct ioapic_info *info;
-		int start_apic_id = 0;
-
-		/*
-		 * Setup index
-		 */
-		i = 0;
-		TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
-			info->io_idx = i++;
-
-		if (i > IOAPIC_COUNT_MAX) /* XXX magic number */
-			panic("ioapic_config: more than 16 I/O APIC\n");
+	/*
+	 * Setup index
+	 */
+	i = 0;
+	TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
+		info->io_idx = i++;
 
-		/*
-		 * Setup APIC ID
-		 */
-		TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-			int apic_id;
+	if (i > IOAPIC_COUNT_MAX) /* XXX magic number */
+		panic("ioapic_config: more than 16 I/O APIC\n");
 
-			apic_id = ioapic_alloc_apic_id(start_apic_id);
-			if (apic_id == NAPICID) {
-				kprintf("IOAPIC: can't alloc APIC ID for "
-					"%dth I/O APIC\n", info->io_idx);
-				break;
-			}
-			info->io_apic_id = apic_id;
+	/*
+	 * Setup APIC ID
+	 */
+	TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
+		int apic_id;
 
-			start_apic_id = apic_id + 1;
-		}
-		if (info != NULL) {
-			/*
-			 * xAPIC allows I/O APIC's APIC ID to be same
-			 * as the LAPIC's APIC ID
-			 */
-			kprintf("IOAPIC: use xAPIC model to alloc APIC ID "
-				"for I/O APIC\n");
-
-			TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
-				info->io_apic_id = info->io_idx;
+		apic_id = ioapic_alloc_apic_id(start_apic_id);
+		if (apic_id == NAPICID) {
+			kprintf("IOAPIC: can't alloc APIC ID for "
+				"%dth I/O APIC\n", info->io_idx);
+			break;
 		}
+		info->io_apic_id = apic_id;
 
+		start_apic_id = apic_id + 1;
+	}
+	if (info != NULL) {
 		/*
-		 * Warning about any GSI holes
+		 * xAPIC allows I/O APIC's APIC ID to be same
+		 * as the LAPIC's APIC ID
 		 */
-		TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-			const struct ioapic_info *prev_info;
-
-			prev_info = TAILQ_PREV(info, ioapic_info_list, io_link);
-			if (prev_info != NULL) {
-				if (info->io_gsi_base !=
-				prev_info->io_gsi_base + prev_info->io_npin) {
-					kprintf("IOAPIC: warning gsi hole "
-						"[%d, %d]\n",
-						prev_info->io_gsi_base +
-						prev_info->io_npin,
-						info->io_gsi_base - 1);
-				}
+		kprintf("IOAPIC: use xAPIC model to alloc APIC ID "
+			"for I/O APIC\n");
+
+		TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
+			info->io_apic_id = info->io_idx;
+	}
+
+	/*
+	 * Warning about any GSI holes
+	 */
+	TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
+		const struct ioapic_info *prev_info;
+
+		prev_info = TAILQ_PREV(info, ioapic_info_list, io_link);
+		if (prev_info != NULL) {
+			if (info->io_gsi_base !=
+			prev_info->io_gsi_base + prev_info->io_npin) {
+				kprintf("IOAPIC: warning gsi hole "
+					"[%d, %d]\n",
+					prev_info->io_gsi_base +
+					prev_info->io_npin,
+					info->io_gsi_base - 1);
 			}
 		}
+	}
 
-		if (bootverbose) {
-			TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
-				kprintf("IOAPIC: idx %d, apic id %d, "
-					"gsi base %d, npin %d\n",
-					info->io_idx,
-					info->io_apic_id,
-					info->io_gsi_base,
-					info->io_npin);
-			}
+	if (bootverbose) {
+		TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link) {
+			kprintf("IOAPIC: idx %d, apic id %d, "
+				"gsi base %d, npin %d\n",
+				info->io_idx,
+				info->io_apic_id,
+				info->io_gsi_base,
+				info->io_npin);
 		}
+	}
 
-		/*
-		 * Setup all I/O APIC
-		 */
-		TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
-			ioapic_setup(info);
-		ioapic_abi_fixup_irqmap();
+	/*
+	 * Setup all I/O APIC
+	 */
+	TAILQ_FOREACH(info, &ioapic_conf.ioc_list, io_link)
+		ioapic_setup(info);
+	ioapic_abi_fixup_irqmap();
 
-		write_eflags(ef);
+	write_eflags(ef);
 
-		MachIntrABI.cleanup();
+	MachIntrABI.cleanup();
 
-		crit_exit();
-	}
+	crit_exit();
 }
 
 void
diff --git a/sys/platform/pc32/i386/autoconf.c b/sys/platform/pc32/i386/autoconf.c
index dca32d6a96..47280af6a0 100644
--- a/sys/platform/pc32/i386/autoconf.c
+++ b/sys/platform/pc32/i386/autoconf.c
@@ -155,11 +155,6 @@ configure_final(void *dummy)
 	cninit_finish();
 
 	if (bootverbose) {
-#ifdef SMP /* APIC-IO */
-		if (apic_io_enable && ioapic_use_old)
-			imen_dump();
-#endif
-
 		/*
 		 * Print out the BIOS's idea of the disk geometries.
 		 */
diff --git a/sys/platform/pc32/i386/machdep.c b/sys/platform/pc32/i386/machdep.c
index 273e976764..d5cb81260f 100644
--- a/sys/platform/pc32/i386/machdep.c
+++ b/sys/platform/pc32/i386/machdep.c
@@ -1873,8 +1873,6 @@ do_next:
 }
 
 #ifdef SMP
-int ioapic_use_old = 0;
-
 #ifdef APIC_IO
 int apic_io_enable = 1; /* Enabled by default for kernels compiled w/APIC_IO */
 #else
@@ -1946,7 +1944,6 @@ init386(int first)
 	MachIntrABI = MachIntrABI_ICU;
 #ifdef SMP
 	TUNABLE_INT_FETCH("hw.apic_io_enable", &apic_io_enable);
-	TUNABLE_INT_FETCH("hw.ioapic_use_old", &ioapic_use_old);
 #endif
 
 	/*
diff --git a/sys/platform/pc32/i386/mp_machdep.c b/sys/platform/pc32/i386/mp_machdep.c
index f83afe5e9d..a17a898d15 100644
--- a/sys/platform/pc32/i386/mp_machdep.c
+++ b/sys/platform/pc32/i386/mp_machdep.c
@@ -340,12 +340,6 @@ static int	mptable_iterate_entries(const mpcth_t,
 static int	mptable_search(void);
 static int	mptable_search_sig(u_int32_t target, int count);
 static int	mptable_hyperthread_fixup(cpumask_t, int);
-#ifdef SMP /* APIC-IO */
-static void	mptable_pass1(struct mptable_pos *);
-static void	mptable_pass2(struct mptable_pos *);
-static void	mptable_default(int type);
-static void	mptable_fix(void);
-#endif
 static int	mptable_map(struct mptable_pos *);
 static void	mptable_unmap(struct mptable_pos *);
 static void	mptable_bus_info_alloc(const mpcth_t,
@@ -360,7 +354,6 @@ static int	mptable_ioapic_probe(struct ioapic_enumerator *);
 static void	mptable_ioapic_enumerate(struct ioapic_enumerator *);
 
 #ifdef SMP /* APIC-IO */
-static void	setup_apic_irq_mapping(void);
 static int	apic_int_is_bus_type(int intr, int bus_type);
 #endif
 static int	start_all_aps(u_int boot_addr);
@@ -554,17 +547,8 @@ mp_announce(void)
 		kprintf(", version: 0x%08x\n", cpu_apic_versions[x]);
 	}
 
-if (apic_io_enable) {
-	if (ioapic_use_old) {
-		for (x = 0; x < mp_napics; ++x) {
-			kprintf(" io%d (APIC): apic id: %2d", x, IO_TO_ID(x));
-			kprintf(", version: 0x%08x", io_apic_versions[x]);
-			kprintf(", at 0x%08lx\n", io_apic_address[x]);
-		}
-	}
-} else {
-	kprintf(" Warning: APIC I/O disabled\n");
-}
+	if (!apic_io_enable)
+		kprintf(" Warning: APIC I/O disabled\n");
 }
 
 /*
@@ -647,10 +631,6 @@ init_secondary(void)
 static void
 mp_enable(u_int boot_addr)
 {
-	int     apic;
-	u_int   ux;
-	struct mptable_pos mpt;
-
 	POSTCODE(MP_ENABLE_POST);
 
 	lapic_config();
@@ -664,58 +644,6 @@ mp_enable(u_int boot_addr)
 	if (apic_io_enable)
 		ioapic_config();
 
-if (apic_io_enable && ioapic_use_old) {
-	u_long ef;
-
-	if (!mptable_fps_phyaddr)
-		panic("no MP table, disable APIC_IO! (set hw.apic_io_enable=0)\n");
-
-	crit_enter();
-
-	ef = read_eflags();
-	cpu_disable_intr();
-
-	/*
-	 * Switch to I/O APIC MachIntrABI and reconfigure
-	 * the default IDT entries.
-	 */
-	MachIntrABI = MachIntrABI_IOAPIC;
-	MachIntrABI.setdefault();
-
-	mptable_map(&mpt);
-
-	/*
-	 * Examine the MP table for needed info
-	 */
-	mptable_pass1(&mpt);
-	mptable_pass2(&mpt);
-
-	mptable_unmap(&mpt);
-
-	/* Post scan cleanup */
-	mptable_fix();
-
-	setup_apic_irq_mapping();
-
-	/* fill the LOGICAL io_apic_versions table */
-	for (apic = 0; apic < mp_napics; ++apic) {
-		ux = ioapic_read(ioapic[apic], IOAPIC_VER);
-		io_apic_versions[apic] = ux;
-		io_apic_set_id(apic, IO_TO_ID(apic));
-	}
-
-	/* program each IO APIC in the system */
-	for (apic = 0; apic < mp_napics; ++apic)
-		if (io_apic_setup(apic) < 0)
-			panic("IO APIC setup failure");
-
-	write_eflags(ef);
-
-	MachIntrABI.cleanup();
-
-	crit_exit();
-}
-
 	/* Finalize PIC */
 	MachIntrABI.finalize();
 }
@@ -774,42 +702,6 @@ typedef struct BUSTYPENAME {
 	char    name[7];
 }       bus_type_name;
 
-static bus_type_name bus_type_table[] =
-{
-	{CBUS, "CBUS"},
-	{CBUSII, "CBUSII"},
-	{EISA, "EISA"},
-	{MCA, "MCA"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{ISA, "ISA"},
-	{MCA, "MCA"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{PCI, "PCI"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{UNKNOWN_BUSTYPE, "---"},
-	{XPRESS, "XPRESS"},
-	{UNKNOWN_BUSTYPE, "---"}
-};
-/* from MP spec v1.4, table 5-1 */
-static int default_data[7][5] =
-{
-/*   nbus, id0, type0, id1, type1 */
-	{1, 0, ISA, 255, 255},
-	{1, 0, EISA, 255, 255},
-	{1, 0, EISA, 255, 255},
-	{1, 0, MCA, 255, 255},
-	{2, 0, ISA, 1, PCI},
-	{2, 0, EISA, 1, PCI},
-	{2, 0, MCA, 1, PCI}
-};
-
-
 /* the bus data */
 static bus_datum *bus_data;
 
@@ -818,171 +710,6 @@ static io_int  *io_apic_ints;
 static int nintrs;
 
 static int processor_entry	(const struct PROCENTRY *entry, int cpu);
-static int bus_entry		(const struct BUSENTRY *entry, int bus);
-static int io_apic_entry	(const struct IOAPICENTRY *entry, int apic);
-static int int_entry		(const struct INTENTRY *entry, int intr);
-static int lookup_bus_type	(char *name);
-
-static int
-mptable_ioapic_pass1_callback(void *xarg, const void *pos, int type)
-{
-	const struct IOAPICENTRY *ioapic_ent;
-
-	switch (type) {
-	case 1: /* bus_entry */
-		++mp_nbusses;
-		break;
-
-	case 2: /* io_apic_entry */
-		ioapic_ent = pos;
-		if (ioapic_ent->apic_flags & IOAPICENTRY_FLAG_EN) {
-			io_apic_address[mp_napics++] =
-			    (vm_offset_t)ioapic_ent->apic_address;
-		}
-		break;
-
-	case 3: /* int_entry */
-		++nintrs;
-		break;
-	}
-	return 0;
-}
-
-/*
- * 1st pass on motherboard's Intel MP specification table.
- *
- * determines:
- *	io_apic_address[N]
- *	mp_nbusses
- *	mp_napics
- *	nintrs
- */
-static void
-mptable_pass1(struct mptable_pos *mpt)
-{
-	mpfps_t fps;
-	int x;
-
-	POSTCODE(MPTABLE_PASS1_POST);
-
-	fps = mpt->mp_fps;
-	KKASSERT(fps != NULL);
-
-	/* clear various tables */
-	for (x = 0; x < NAPICID; ++x)
-		io_apic_address[x] = ~0;	/* IO APIC address table */
-
-	mp_nbusses = 0;
-	mp_napics = 0;
-	nintrs = 0;
-
-	/* check for use of 'default' configuration */
-	if (fps->mpfb1 != 0) {
-		io_apic_address[0] = DEFAULT_IO_APIC_BASE;
-		mp_nbusses = default_data[fps->mpfb1 - 1][0];
-		mp_napics = 1;
-		nintrs = 16;
-	} else {
-		int error;
-
-		error = mptable_iterate_entries(mpt->mp_cth,
-			    mptable_ioapic_pass1_callback, NULL);
-		if (error)
-			panic("mptable_iterate_entries(ioapic_pass1) failed\n");
-	}
-}
-
-struct mptable_ioapic2_cbarg {
-	int	bus;
-	int	apic;
-	int	intr;
-};
-
-static int
-mptable_ioapic_pass2_callback(void *xarg, const void *pos, int type)
-{
-	struct mptable_ioapic2_cbarg *arg = xarg;
-
-	switch (type) {
-	case 1:
-		if (bus_entry(pos, arg->bus))
-			++arg->bus;
-		break;
-
-	case 2:
-		if (io_apic_entry(pos, arg->apic))
-			++arg->apic;
-		break;
-
-	case 3:
-		if (int_entry(pos, arg->intr))
-			++arg->intr;
-		break;
-	}
-	return 0;
-}
-
-/*
- * 2nd pass on motherboard's Intel MP specification table.
- *
- * sets:
- *	ID_TO_IO(N), phy APIC ID to log CPU/IO table
- *	IO_TO_ID(N), logical IO to APIC ID table
- *	bus_data[N]
- *	io_apic_ints[N]
- */
-static void
-mptable_pass2(struct mptable_pos *mpt)
-{
-	struct mptable_ioapic2_cbarg arg;
-	mpfps_t fps;
-	int error, x;
-
-	POSTCODE(MPTABLE_PASS2_POST);
-
-	fps = mpt->mp_fps;
-	KKASSERT(fps != NULL);
-
-	MALLOC(io_apic_versions, u_int32_t *, sizeof(u_int32_t) * mp_napics,
-	    M_DEVBUF, M_WAITOK);
-	MALLOC(ioapic, volatile ioapic_t **, sizeof(ioapic_t *) * mp_napics,
-	    M_DEVBUF, M_WAITOK | M_ZERO);
-	MALLOC(io_apic_ints, io_int *, sizeof(io_int) * (nintrs + FIXUP_EXTRA_APIC_INTS),
-	    M_DEVBUF, M_WAITOK);
-	MALLOC(bus_data, bus_datum *, sizeof(bus_datum) * mp_nbusses,
-	    M_DEVBUF, M_WAITOK);
-
-	for (x = 0; x < mp_napics; x++)
-		ioapic[x] = ioapic_map(io_apic_address[x]);
-
-	/* clear various tables */
-	for (x = 0; x < NAPICID; ++x) {
-		ID_TO_IO(x) = -1;	/* phy APIC ID to log CPU/IO table */
-		IO_TO_ID(x) = -1;	/* logical IO to APIC ID table */
-	}
-
-	/* clear bus data table */
-	for (x = 0; x < mp_nbusses; ++x)
-		bus_data[x].bus_id = 0xff;
-
-	/* clear IO APIC INT table */
-	for (x = 0; x < nintrs + FIXUP_EXTRA_APIC_INTS; ++x) {
-		io_apic_ints[x].int_type = 0xff;
-		io_apic_ints[x].int_vector = 0xff;
-	}
-
-	/* check for use of 'default' configuration */
-	if (fps->mpfb1 != 0) {
-		mptable_default(fps->mpfb1);
-		return;
-	}
-
-	bzero(&arg, sizeof(arg));
-	error = mptable_iterate_entries(mpt->mp_cth,
-		    mptable_ioapic_pass2_callback, &arg);
-	if (error)
-		panic("mptable_iterate_entries(ioapic_pass2) failed\n");
-}
 
 /*
  * Check if we should perform a hyperthreading "fix-up" to
@@ -1202,346 +929,6 @@ revoke_apic_irq(int irq)
 	}
 }
 
-/*
- * Allocate an IRQ 
- */
-static void
-allocate_apic_irq(int intr)
-{
-	int apic;
-	int intpin;
-	int irq;
-	
-	if (io_apic_ints[intr].int_vector != 0xff)
-		return;		/* Interrupt handler already assigned */
-	
-	if (io_apic_ints[intr].int_type != 0 &&
-	    (io_apic_ints[intr].int_type != 3 ||
-	     (io_apic_ints[intr].dst_apic_id == IO_TO_ID(0) &&
-	      io_apic_ints[intr].dst_apic_int == 0)))
-		return;		/* Not INT or ExtInt on != (0, 0) */
-	
-	irq = 0;
-	while (irq < APIC_INTMAPSIZE &&
-	       int_to_apicintpin[irq].ioapic != -1)
-		irq++;
-	
-	if (irq >= APIC_INTMAPSIZE)
-		return;		/* No free interrupt handlers */
-	
-	apic = ID_TO_IO(io_apic_ints[intr].dst_apic_id);
-	intpin = io_apic_ints[intr].dst_apic_int;
-	
-	assign_apic_irq(apic, intpin, irq);
-}
-
-
-static void
-swap_apic_id(int apic, int oldid, int newid)
-{
-	int x;
-	int oapic;
-	
-
-	if (oldid == newid)
-		return;			/* Nothing to do */
-	
-	kprintf("Changing APIC ID for IO APIC #%d from %d to %d in MP table\n",
-	       apic, oldid, newid);
-	
-	/* Swap physical APIC IDs in interrupt entries */
-	for (x = 0; x < nintrs; x++) {
-		if (io_apic_ints[x].dst_apic_id == oldid)
-			io_apic_ints[x].dst_apic_id = newid;
-		else if (io_apic_ints[x].dst_apic_id == newid)
-			io_apic_ints[x].dst_apic_id = oldid;
-	}
-	
-	/* Swap physical APIC IDs in IO_TO_ID mappings */
-	for (oapic = 0; oapic < mp_napics; oapic++)
-		if (IO_TO_ID(oapic) == newid)
-			break;
-	
-	if (oapic < mp_napics) {
-		kprintf("Changing APIC ID for IO APIC #%d from "
-		       "%d to %d in MP table\n",
-		       oapic, newid, oldid);
-		IO_TO_ID(oapic) = oldid;
-	}
-	IO_TO_ID(apic) = newid;
-}
-
-
-static void
-fix_id_to_io_mapping(void)
-{
-	int x;
-
-	for (x = 0; x < NAPICID; x++)
-		ID_TO_IO(x) = -1;
-	
-	for (x = 0; x <= mp_naps; x++)
-		if (CPU_TO_ID(x) < NAPICID)
-			ID_TO_IO(CPU_TO_ID(x)) = x;
-	
-	for (x = 0; x < mp_napics; x++)
-		if (IO_TO_ID(x) < NAPICID)
-			ID_TO_IO(IO_TO_ID(x)) = x;
-}
-
-
-static int
-first_free_apic_id(void)
-{
-	int freeid, x;
-	
-	for (freeid = 0; freeid < NAPICID; freeid++) {
-		for (x = 0; x <= mp_naps; x++)
-			if (CPU_TO_ID(x) == freeid)
-				break;
-		if (x <= mp_naps)
-			continue;
-		for (x = 0; x < mp_napics; x++)
-			if (IO_TO_ID(x) == freeid)
-				break;
-		if (x < mp_napics)
-			continue;
-		return freeid;
-	}
-	return freeid;
-}
-
-
-static int
-io_apic_id_acceptable(int apic, int id)
-{
-	int cpu;		/* Logical CPU number */
-	int oapic;		/* Logical IO APIC number for other IO APIC */
-
-	if (id >= NAPICID)
-		return 0;	/* Out of range */
-	
-	for (cpu = 0; cpu <= mp_naps; cpu++)
-		if (CPU_TO_ID(cpu) == id)
-			return 0;	/* Conflict with CPU */
-	
-	for (oapic = 0; oapic < mp_napics && oapic < apic; oapic++)
-		if (IO_TO_ID(oapic) == id)
-			return 0;	/* Conflict with other APIC */
-	
-	return 1;		/* ID is acceptable for IO APIC */
-}
-
-static
-io_int *
-io_apic_find_int_entry(int apic, int pin)
-{
-	int     x;
-
-	/* search each of the possible INTerrupt sources */
-	for (x = 0; x < nintrs; ++x) {
-		if ((apic == ID_TO_IO(io_apic_ints[x].dst_apic_id)) &&
-		    (pin == io_apic_ints[x].dst_apic_int))
-			return (&io_apic_ints[x]);
-	}
-	return NULL;
-}
-
-/*
- * parse an Intel MP specification table
- */
-static void
-mptable_fix(void)
-{
-	int	x;
-	int	id;
-	int	apic;		/* IO APIC unit number */
-	int     freeid;		/* Free physical APIC ID */
-	int	physid;		/* Current physical IO APIC ID */
-	io_int *io14;
-	int	bus_0 = 0;	/* Stop GCC warning */
-	int	bus_pci = 0;	/* Stop GCC warning */
-	int	num_pci_bus;
-
-	/*
-	 * Fix mis-numbering of the PCI bus and its INT entries if the BIOS
-	 * did it wrong.  The MP spec says that when more than 1 PCI bus
-	 * exists the BIOS must begin with bus entries for the PCI bus and use
-	 * actual PCI bus numbering.  This implies that when only 1 PCI bus
-	 * exists the BIOS can choose to ignore this ordering, and indeed many
-	 * MP motherboards do ignore it.  This causes a problem when the PCI
-	 * sub-system makes requests of the MP sub-system based on PCI bus
-	 * numbers.	So here we look for the situation and renumber the
-	 * busses and associated INTs in an effort to "make it right".
-	 */
-
-	/* find bus 0, PCI bus, count the number of PCI busses */
-	for (num_pci_bus = 0, x = 0; x < mp_nbusses; ++x) {
-		if (bus_data[x].bus_id == 0) {
-			bus_0 = x;
-		}
-		if (bus_data[x].bus_type == PCI) {
-			++num_pci_bus;
-			bus_pci = x;
-		}
-	}
-	/*
-	 * bus_0 == slot of bus with ID of 0
-	 * bus_pci == slot of last PCI bus encountered
-	 */
-
-	/* check the 1 PCI bus case for sanity */
-	/* if it is number 0 all is well */
-	if (num_pci_bus == 1 &&
-	    bus_data[bus_pci].bus_id != 0) {
-		
-		/* mis-numbered, swap with whichever bus uses slot 0 */
-
-		/* swap the bus entry types */
-		bus_data[bus_pci].bus_type = bus_data[bus_0].bus_type;
-		bus_data[bus_0].bus_type = PCI;
-
-		/* swap each relavant INTerrupt entry */
-		id = bus_data[bus_pci].bus_id;
-		for (x = 0; x < nintrs; ++x) {
-			if (io_apic_ints[x].src_bus_id == id) {
-				io_apic_ints[x].src_bus_id = 0;
-			}
-			else if (io_apic_ints[x].src_bus_id == 0) {
-				io_apic_ints[x].src_bus_id = id;
-			}
-		}
-	}
-
-	/* Assign IO APIC IDs.
-	 * 
-	 * First try the existing ID. If a conflict is detected, try
-	 * the ID in the MP table.  If a conflict is still detected, find
-	 * a free id.
-	 *
-	 * We cannot use the ID_TO_IO table before all conflicts has been
-	 * resolved and the table has been corrected.
-	 */
-	for (apic = 0; apic < mp_napics; ++apic) { /* For all IO APICs */
-		
-		/* First try to use the value set by the BIOS */
-		physid = io_apic_get_id(apic);
-		if (io_apic_id_acceptable(apic, physid)) {
-			if (IO_TO_ID(apic) != physid)
-				swap_apic_id(apic, IO_TO_ID(apic), physid);
-			continue;
-		}
-
-		/* Then check if the value in the MP table is acceptable */
-		if (io_apic_id_acceptable(apic, IO_TO_ID(apic)))
-			continue;
-
-		/* Last resort, find a free APIC ID and use it */
-		freeid = first_free_apic_id();
-		if (freeid >= NAPICID)
-			panic("No free physical APIC IDs found");
-		
-		if (io_apic_id_acceptable(apic, freeid)) {
-			swap_apic_id(apic, IO_TO_ID(apic), freeid);
-			continue;
-		}
-		panic("Free physical APIC ID not usable");
-	}
-	fix_id_to_io_mapping();
-
-	/* detect and fix broken Compaq MP table */
-	if (apic_int_type(0, 0) == -1) {
-		kprintf("APIC_IO: MP table broken: 8259->APIC entry missing!\n");
-		io_apic_ints[nintrs].int_type = 3;	/* ExtInt */
-		io_apic_ints[nintrs].int_vector = 0xff;	/* Unassigned */
-		/* XXX fixme, set src bus id etc, but it doesn't seem to hurt */
-		io_apic_ints[nintrs].dst_apic_id = IO_TO_ID(0);
-		io_apic_ints[nintrs].dst_apic_int = 0;	/* Pin 0 */
-		nintrs++;
-	} else if (apic_int_type(0, 0) == 0) {
-		kprintf("APIC_IO: MP table broken: ExtINT entry corrupt!\n");
-		for (x = 0; x < nintrs; ++x)
-			if ((0 == ID_TO_IO(io_apic_ints[x].dst_apic_id)) &&
-			    (0 == io_apic_ints[x].dst_apic_int)) {
-				io_apic_ints[x].int_type = 3;
-				io_apic_ints[x].int_vector = 0xff;
-				break;
-			}
-	}
-
-	/*
-	 * Fix missing IRQ 15 when IRQ 14 is an ISA interrupt.  IDE
-	 * controllers universally come in pairs.  If IRQ 14 is specified
-	 * as an ISA interrupt, then IRQ 15 had better be too.
-	 *
-	 * [ Shuttle XPC / AMD Athlon X2 ]
-	 *	The MPTable is missing an entry for IRQ 15.  Note that the
-	 *	ACPI table has an entry for both 14 and 15.
-	 */
-	if (apic_int_type(0, 14) == 0 && apic_int_type(0, 15) == -1) {
-		kprintf("APIC_IO: MP table broken: IRQ 15 not ISA when IRQ 14 is!\n");
-		io14 = io_apic_find_int_entry(0, 14);
-		io_apic_ints[nintrs] = *io14;
-		io_apic_ints[nintrs].src_bus_irq = 15;
-		io_apic_ints[nintrs].dst_apic_int = 15;
-		nintrs++;
-	}
-}
-
-/* Assign low level interrupt handlers */
-static void
-setup_apic_irq_mapping(void)
-{
-	int	x;
-	int	int_vector;
-
-	/* Clear array */
-	for (x = 0; x < APIC_INTMAPSIZE; x++) {
-		int_to_apicintpin[x].ioapic = -1;
-		int_to_apicintpin[x].int_pin = 0;
-		int_to_apicintpin[x].apic_address = NULL;
-		int_to_apicintpin[x].redirindex = 0;
-
-		/* Default to masked */
-		int_to_apicintpin[x].flags = IOAPIC_IM_FLAG_MASKED;
-	}
-
-	/* First assign ISA/EISA interrupts */
-	for (x = 0; x < nintrs; x++) {
-		int_vector = io_apic_ints[x].src_bus_irq;
-		if (int_vector < APIC_INTMAPSIZE &&
-		    io_apic_ints[x].int_vector == 0xff && 
-		    int_to_apicintpin[int_vector].ioapic == -1 &&
-		    (apic_int_is_bus_type(x, ISA) ||
-		     apic_int_is_bus_type(x, EISA)) &&
-		    io_apic_ints[x].int_type == 0) {
-			assign_apic_irq(ID_TO_IO(io_apic_ints[x].dst_apic_id), 
-					io_apic_ints[x].dst_apic_int,
-					int_vector);
-		}
-	}
-
-	/* Assign ExtInt entry if no ISA/EISA interrupt 0 entry */
-	for (x = 0; x < nintrs; x++) {
-		if (io_apic_ints[x].dst_apic_int == 0 &&
-		    io_apic_ints[x].dst_apic_id == IO_TO_ID(0) &&
-		    io_apic_ints[x].int_vector == 0xff && 
-		    int_to_apicintpin[0].ioapic == -1 &&
-		    io_apic_ints[x].int_type == 3) {
-			assign_apic_irq(0, 0, 0);
-			break;
-		}
-	}
-
-	/* Assign PCI interrupts */
-	for (x = 0; x < nintrs; ++x) {
-		if (io_apic_ints[x].int_type == 0 &&
-		    io_apic_ints[x].int_vector == 0xff && 
-		    apic_int_is_bus_type(x, PCI))
-			allocate_apic_irq(x);
-	}
-}
-
 void
 mp_set_cpuids(int cpu_id, int apic_id)
 {
@@ -1576,81 +963,6 @@ processor_entry(const struct PROCENTRY *entry, int cpu)
 	return 0;
 }
 
-static int
-bus_entry(const struct BUSENTRY *entry, int bus)
-{
-	int     x;
-	char    c, name[8];
-
-	/* encode the name into an index */
-	for (x = 0; x < 6; ++x) {
-		if ((c = entry->bus_type[x]) == ' ')
-			break;
-		name[x] = c;
-	}
-	name[x] = '\0';
-
-	if ((x = lookup_bus_type(name)) == UNKNOWN_BUSTYPE)
-		panic("unknown bus type: '%s'", name);
-
-	bus_data[bus].bus_id = entry->bus_id;
-	bus_data[bus].bus_type = x;
-
-	return 1;
-}
-
-static int
-io_apic_entry(const struct IOAPICENTRY *entry, int apic)
-{
-	if (!(entry->apic_flags & IOAPICENTRY_FLAG_EN))
-		return 0;
-
-	IO_TO_ID(apic) = entry->apic_id;
-	ID_TO_IO(entry->apic_id) = apic;
-
-	return 1;
-}
-
-static int
-lookup_bus_type(char *name)
-{
-	int     x;
-
-	for (x = 0; x < MAX_BUSTYPE; ++x)
-		if (strcmp(bus_type_table[x].name, name) == 0)
-			return bus_type_table[x].type;
-
-	return UNKNOWN_BUSTYPE;
-}
-
-static int
-int_entry(const struct INTENTRY *entry, int intr)
-{
-	int apic;
-
-	io_apic_ints[intr].int_type = entry->int_type;
-	io_apic_ints[intr].int_flags = entry->int_flags;
-	io_apic_ints[intr].src_bus_id = entry->src_bus_id;
-	io_apic_ints[intr].src_bus_irq = entry->src_bus_irq;
-	if (entry->dst_apic_id == 255) {
-		/* This signal goes to all IO APICS.  Select an IO APIC
-		   with sufficient number of interrupt pins */
-		for (apic = 0; apic < mp_napics; apic++)
-			if (((ioapic_read(ioapic[apic], IOAPIC_VER) & 
-			      IOART_VER_MAXREDIR) >> MAXREDIRSHIFT) >= 
-			    entry->dst_apic_int)
-				break;
-		if (apic < mp_napics)
-			io_apic_ints[intr].dst_apic_id = IO_TO_ID(apic);
-		else
-			io_apic_ints[intr].dst_apic_id = entry->dst_apic_id;
-	} else
-		io_apic_ints[intr].dst_apic_id = entry->dst_apic_id;
-	io_apic_ints[intr].dst_apic_int = entry->dst_apic_int;
-
-	return 1;
-}
-
 static int
 apic_int_is_bus_type(int intr, int bus_type)
 {
@@ -1996,114 +1308,6 @@ apic_polarity(int apic, int pin)
 	return -1;		/* NOT found */
 }
 
-/*
- * set data according to MP defaults
- * FIXME: probably not complete yet...
- */
-static void
-mptable_default(int type)
-{
-	int     io_apic_id;
-	int     pin;
-
-#if 0
-	kprintf("  MP default config type: %d\n", type);
-	switch (type) {
-	case 1:
-		kprintf("   bus: ISA, APIC: 82489DX\n");
-		break;
-	case 2:
-		kprintf("   bus: EISA, APIC: 82489DX\n");
-		break;
-	case 3:
-		kprintf("   bus: EISA, APIC: 82489DX\n");
-		break;
-	case 4:
-		kprintf("   bus: MCA, APIC: 82489DX\n");
-		break;
-	case 5:
-		kprintf("   bus: ISA+PCI, APIC: Integrated\n");
-		break;
-	case 6:
-		kprintf("   bus: EISA+PCI, APIC: Integrated\n");
-		break;
-	case 7:
-		kprintf("   bus: MCA+PCI, APIC: Integrated\n");
-		break;
-	default:
-		kprintf("   future type\n");
-		break;
-		/* NOTREACHED */
-	}
-#endif	/* 0 */
-
-	/* one and only IO APIC */
-	io_apic_id = (ioapic_read(ioapic[0], IOAPIC_ID) & APIC_ID_MASK) >> 24;
-
-	/*
-	 * sanity check, refer to MP spec section 3.6.6, last paragraph
-	 * necessary as some hardware isn't properly setting up the IO APIC
-	 */
-#if defined(REALLY_ANAL_IOAPICID_VALUE)
-	if (io_apic_id != 2) {
-#else
-	if ((io_apic_id == 0) || (io_apic_id == 1) || (io_apic_id == 15)) {
-#endif	/* REALLY_ANAL_IOAPICID_VALUE */
-		io_apic_set_id(0, 2);
-		io_apic_id = 2;
-	}
-	IO_TO_ID(0) = io_apic_id;
-	ID_TO_IO(io_apic_id) = 0;
-
-	/* fill out bus entries */
-	switch (type) {
-	case 1:
-	case 2:
-	case 3:
-	case 4:
-	case 5:
-	case 6:
-	case 7:
-		bus_data[0].bus_id = default_data[type - 1][1];
-		bus_data[0].bus_type = default_data[type - 1][2];
-		bus_data[1].bus_id = default_data[type - 1][3];
-		bus_data[1].bus_type = default_data[type - 1][4];
-		break;
-
-	/* case 4: case 7:		   MCA NOT supported */
-	default:		/* illegal/reserved */
-		panic("BAD default MP config: %d", type);
-		/* NOTREACHED */
-	}
-
-	/* general cases from MP v1.4, table 5-2 */
-	for (pin = 0; pin < 16; ++pin) {
-		io_apic_ints[pin].int_type = 0;
-		io_apic_ints[pin].int_flags = 0x05;	/* edge/active-hi */
-		io_apic_ints[pin].src_bus_id = 0;
-		io_apic_ints[pin].src_bus_irq = pin;	/* IRQ2 caught below */
-		io_apic_ints[pin].dst_apic_id = io_apic_id;
-		io_apic_ints[pin].dst_apic_int = pin;	/* 1-to-1 */
-	}
-
-	/* special cases from MP v1.4, table 5-2 */
-	if (type == 2) {
-		io_apic_ints[2].int_type = 0xff;	/* N/C */
-		io_apic_ints[13].int_type = 0xff;	/* N/C */
-#if !defined(APIC_MIXED_MODE)
-		/** FIXME: ??? */
-		panic("sorry, can't support type 2 default yet");
-#endif	/* APIC_MIXED_MODE */
-	}
-	else
-		io_apic_ints[2].src_bus_irq = 0;	/* ISA IRQ0 is on APIC INT 2 */
-
-	if (type == 7)
-		io_apic_ints[0].int_type = 0xff;	/* N/C */
-	else
-		io_apic_ints[0].int_type = 3;	/* vectored 8259 */
-}
-
 /*
  * Map a physical memory address representing I/O into KVA.  The I/O
  * block is assumed not to cross a page boundary.
@@ -3598,6 +2802,7 @@ mptable_ioapic_int_callback(void *xarg, const void *pos, int type)
 	const struct mptable_ioapic *ioapic;
 	const struct mptable_bus *bus;
 	const struct INTENTRY *ent;
+	int gsi;
 
 	if (type != 3)
 		return 0;
@@ -3626,32 +2831,20 @@ mptable_ioapic_int_callback(void *xarg, const void *pos, int type)
 		return 0;
 	}
 
-	if (!ioapic_use_old) {
-		int gsi;
-
-		if (ent->dst_apic_int >= ioapic->mio_npin) {
-			panic("mptable_ioapic_enumerate: invalid I/O APIC "
-			      "pin %d, should be < %d",
-			      ent->dst_apic_int, ioapic->mio_npin);
-		}
-		gsi = ioapic->mio_gsi_base + ent->dst_apic_int;
+	if (ent->dst_apic_int >= ioapic->mio_npin) {
+		panic("mptable_ioapic_enumerate: invalid I/O APIC "
+		      "pin %d, should be < %d",
+		      ent->dst_apic_int, ioapic->mio_npin);
+	}
+	gsi = ioapic->mio_gsi_base + ent->dst_apic_int;
 
-		if (ent->src_bus_irq != gsi) {
-			if (bootverbose) {
-				kprintf("MPTABLE: INTSRC irq %d -> GSI %d\n",
-					ent->src_bus_irq, gsi);
-			}
-			ioapic_intsrc(ent->src_bus_irq, gsi,
-			    INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
-		}
-	} else {
-		/* XXX rough estimation */
-		if (ent->src_bus_irq != ent->dst_apic_int) {
-			if (bootverbose) {
-				kprintf("MPTABLE: INTSRC irq %d -> GSI %d\n",
-					ent->src_bus_irq, ent->dst_apic_int);
-			}
+	if (ent->src_bus_irq != gsi) {
+		if (bootverbose) {
+			kprintf("MPTABLE: INTSRC irq %d -> GSI %d\n",
+				ent->src_bus_irq, gsi);
 		}
+		ioapic_intsrc(ent->src_bus_irq, gsi,
+		    INTR_TRIGGER_EDGE, INTR_POLARITY_HIGH);
 	}
 	return 0;
 }
@@ -3669,29 +2862,28 @@ mptable_ioapic_enumerate(struct ioapic_enumerator *e)
 	KKASSERT(!TAILQ_EMPTY(&mptable_ioapic_list));
 
 	TAILQ_FOREACH(ioapic, &mptable_ioapic_list, mio_link) {
-		if (!ioapic_use_old) {
-			const struct mptable_ioapic *prev_ioapic;
-			uint32_t ver;
-			void *addr;
+		const struct mptable_ioapic *prev_ioapic;
+		uint32_t ver;
+		void *addr;
 
-			addr = ioapic_map(ioapic->mio_addr);
+		addr = ioapic_map(ioapic->mio_addr);
 
-			ver = ioapic_read(addr, IOAPIC_VER);
-			ioapic->mio_npin = ((ver & IOART_VER_MAXREDIR)
-					    >> MAXREDIRSHIFT) + 1;
+		ver = ioapic_read(addr, IOAPIC_VER);
+		ioapic->mio_npin = ((ver & IOART_VER_MAXREDIR)
+				    >> MAXREDIRSHIFT) + 1;
 
-			prev_ioapic = TAILQ_PREV(ioapic,
-					mptable_ioapic_list, mio_link);
-			if (prev_ioapic == NULL) {
-				ioapic->mio_gsi_base = 0;
-			} else {
-				ioapic->mio_gsi_base =
-					prev_ioapic->mio_gsi_base +
-					prev_ioapic->mio_npin;
-			}
-			ioapic_add(addr, ioapic->mio_gsi_base,
-			    ioapic->mio_npin);
+		prev_ioapic = TAILQ_PREV(ioapic,
+				mptable_ioapic_list, mio_link);
+		if (prev_ioapic == NULL) {
+			ioapic->mio_gsi_base = 0;
+		} else {
+			ioapic->mio_gsi_base =
+				prev_ioapic->mio_gsi_base +
+				prev_ioapic->mio_npin;
 		}
+		ioapic_add(addr, ioapic->mio_gsi_base,
+		    ioapic->mio_npin);
+
 		if (bootverbose) {
 			kprintf("MPTABLE: IOAPIC addr 0x%08x, "
 				"apic id %d, idx %d, gsi base %d, npin %d\n",
diff --git a/sys/platform/pc32/include/smp.h b/sys/platform/pc32/include/smp.h
index 0ffcb39121..9ad4c10e6d 100644
--- a/sys/platform/pc32/include/smp.h
+++ b/sys/platform/pc32/include/smp.h
@@ -177,7 +177,6 @@ int	ioapic_extpin_gsi(void);
 int	ioapic_gsi(int, int);
 
 extern int apic_io_enable;
-extern int ioapic_use_old;
 
 #if defined(READY)
 void	clr_io_apic_mask24	(int, u_int32_t);
diff --git a/sys/platform/pc32/isa/clock.c b/sys/platform/pc32/isa/clock.c
index f85e1e400f..54daae8870 100644
--- a/sys/platform/pc32/isa/clock.c
+++ b/sys/platform/pc32/isa/clock.c
@@ -92,10 +92,6 @@
 
 #include <machine/intr_machdep.h>
 
-#ifdef SMP /* APIC-IO */
-/* The interrupt triggered by the 8254 (timer) chip */
-static void setup_8254_mixed_mode (void);
-#endif
 static void i8254_restore(void);
 static void resettodr_on_shutdown(void *arg __unused);
 
@@ -1048,7 +1044,6 @@ static void
 i8254_intr_initclock(struct cputimer_intr *cti, boolean_t selected)
 {
 #ifdef SMP /* APIC-IO */
-	int apic_8254_trial = 0;
 	void *clkdesc = NULL;
 	int irq = 0, mixed_mode = 0, error;
 #endif
@@ -1068,30 +1063,7 @@ i8254_intr_initclock(struct cputimer_intr *cti, boolean_t selected)
 
 	/* Finish initializing 8253 timer 0. */
 #ifdef SMP /* APIC-IO */
-if (apic_io_enable) {
-	if (ioapic_use_old) {
-		irq = isa_apic_irq(0);
-		if (irq >= 0 ) {
-			if (apic_int_type(0, 0) == 3)
-				apic_8254_trial = 1;
-		} else {
-			/* look for ExtInt on pin 0 */
-			if (apic_int_type(0, 0) == 3) {
-				irq = apic_irq(0, 0);
-				setup_8254_mixed_mode();
-			} else {
-				panic("APIC_IO: Cannot route 8254 "
-				      "interrupt to CPU");
-			}
-		}
-
-		clkdesc = register_int(irq, clkintr, NULL, "clk",
-				       NULL,
-				       INTR_EXCL | INTR_CLOCK |
-				       INTR_NOPOLL | INTR_MPSAFE | 
-				       INTR_NOENTROPY);
-		machintr_intren(irq);
-	} else {
+	if (apic_io_enable) {
 		irq = ioapic_abi_find_irq(0, INTR_TRIGGER_EDGE,
 			INTR_POLARITY_HIGH);
 		if (irq < 0) {
@@ -1122,8 +1094,7 @@ mixed_mode_setup:
 				       INTR_NOPOLL | INTR_MPSAFE |
 				       INTR_NOENTROPY);
 		machintr_intren(irq);
-	}
-} else {
+	} else {
 #endif
 	register_int(0, clkintr, NULL, "clk", NULL,
 		     INTR_EXCL | INTR_CLOCK |
@@ -1131,7 +1102,7 @@ mixed_mode_setup:
 		     INTR_NOENTROPY);
 	machintr_intren(0);
 #ifdef SMP /* APIC-IO */
-}
+	}
 #endif
 
 	/* Initialize RTC. */
@@ -1139,97 +1110,28 @@ mixed_mode_setup:
 	writertc(RTC_STATUSB, RTCSB_24HR);
 
 #ifdef SMP /* APIC-IO */
-if (apic_io_enable) {
-if (ioapic_use_old) {
-	if (apic_8254_trial) {
-		sysclock_t base;
-		long lastcnt;
-
-		/*
-		 * Following code assumes the 8254 is the cpu timer,
-		 * so make sure it is.
-		 */
-		KKASSERT(sys_cputimer == &i8254_cputimer);
-		KKASSERT(cti == &i8254_cputimer_intr);
-
-		lastcnt = get_interrupt_counter(irq);
-
-		/*
-		 * Force an 8254 Timer0 interrupt and wait 1/100s for
-		 * it to happen, then see if we got it.
-		 */
-		kprintf("APIC_IO: Testing 8254 interrupt delivery\n");
-		i8254_intr_reload(cti, 2);
-		base = sys_cputimer->count();
-		while (sys_cputimer->count() - base < sys_cputimer->freq / 100)
-			;	/* nothing */
-		if (get_interrupt_counter(irq) - lastcnt == 0) {
-			/* 
-			 * The MP table is broken.
-			 * The 8254 was not connected to the specified pin
-			 * on the IO APIC.
-			 * Workaround: Limited variant of mixed mode.
-			 */
-			machintr_intrdis(irq);
-			unregister_int(clkdesc);
-			kprintf("APIC_IO: Broken MP table detected: "
-			       "8254 is not connected to "
-			       "IOAPIC #%d intpin %d\n",
-			       int_to_apicintpin[irq].ioapic,
-			       int_to_apicintpin[irq].int_pin);
-			/* 
-			 * Revoke current ISA IRQ 0 assignment and 
-			 * configure a fallback interrupt routing from
-			 * the 8254 Timer via the 8259 PIC to the
-			 * an ExtInt interrupt line on IOAPIC #0 intpin 0.
-			 * We reuse the low level interrupt handler number.
-			 */
-			if (apic_irq(0, 0) < 0) {
-				revoke_apic_irq(irq);
-				assign_apic_irq(0, 0, irq);
-			}
-			irq = apic_irq(0, 0);
-			setup_8254_mixed_mode();
-			register_int(irq, clkintr, NULL, "clk",
-				     NULL,
-				     INTR_EXCL | INTR_CLOCK |
-				     INTR_NOPOLL | INTR_MPSAFE |
-				     INTR_NOENTROPY);
-			machintr_intren(irq);
-		}
-	}
-	if (apic_int_type(0, 0) != 3 ||
-	    int_to_apicintpin[irq].ioapic != 0 ||
-	    int_to_apicintpin[irq].int_pin != 0) {
-		kprintf("APIC_IO: routing 8254 via IOAPIC #%d intpin %d\n",
-		       int_to_apicintpin[irq].ioapic,
-		       int_to_apicintpin[irq].int_pin);
-	} else {
-		kprintf("APIC_IO: "
-		       "routing 8254 via 8259 and IOAPIC #0 intpin 0\n");
-	}
-} else {	/* !ioapic_use_old */
-	error = i8254_ioapic_trial(irq, cti);
-	if (error) {
-		if (mixed_mode) {
-			if (!selected) {
-				kprintf("IOAPIC: mixed mode for irq %d "
-					"trial failed: %d\n", irq, error);
-				goto nointr;
+	if (apic_io_enable) {
+		error = i8254_ioapic_trial(irq, cti);
+		if (error) {
+			if (mixed_mode) {
+				if (!selected) {
+					kprintf("IOAPIC: mixed mode for irq %d "
+						"trial failed: %d\n",
+						irq, error);
+					goto nointr;
+				} else {
+					panic("IOAPIC: mixed mode for irq %d "
+					      "trial failed: %d\n", irq, error);
+				}
 			} else {
-				panic("IOAPIC: mixed mode for irq %d "
-				      "trial failed: %d\n", irq, error);
+				kprintf("IOAPIC: warning 8254 is not connected "
+					"to the correct pin, try mixed mode\n");
+				machintr_intrdis(irq);
+				unregister_int(clkdesc);
+				goto mixed_mode_setup;
 			}
-		} else {
-			kprintf("IOAPIC: warning 8254 is not connected "
-				"to the correct pin, try mixed mode\n");
-			machintr_intrdis(irq);
-			unregister_int(clkdesc);
-			goto mixed_mode_setup;
 		}
 	}
-}		/* ioapic_use_old */
-}
 #endif
 	return;
 
@@ -1238,28 +1140,6 @@ nointr:
 	cputimer_intr_deregister(cti);
 }
 
-#ifdef SMP /* APIC-IO */
-
-static void 
-setup_8254_mixed_mode(void)
-{
-	/*
-	 * Allow 8254 timer to INTerrupt 8259:
-	 *  re-initialize master 8259:
-	 *   reset; prog 4 bytes, single ICU, edge triggered
-	 */
-	outb(IO_ICU1, 0x13);
-	outb(IO_ICU1 + 1, IDT_OFFSET);	/* start vector (unused) */
-	outb(IO_ICU1 + 1, 0x00);	/* ignore slave */
-	outb(IO_ICU1 + 1, 0x03);	/* auto EOI, 8086 */
-	outb(IO_ICU1 + 1, 0xfe);	/* unmask INT0 */
-	
-	/* program IO APIC for type 3 INT on INT0 */
-	if (ext_int_setup(0, 0) < 0)
-		panic("8254 redirect via APIC pin0 impossible!");
-}
-#endif
-
 void
 setstatclockrate(int newhz)
 {