drm/radeon: Sync to Linux 3.11
[dragonfly.git] / sys / dev / drm / radeon / radeon_object.h
CommitLineData
926deccb
FT
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 *
28 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_object.h 254885 2013-08-25 19:37:15Z dumbbell $
29 */
30
31#ifndef __RADEON_OBJECT_H__
32#define __RADEON_OBJECT_H__
33
34#include <uapi_drm/radeon_drm.h>
35#include "radeon.h"
36
37/*
38 * Undefine max_offset (defined in vm/vm_map.h), because it conflicts
39 * with an argument of the function radeon_bo_pin_restricted().
40 */
41#undef max_offset
42
43/**
44 * radeon_mem_type_to_domain - return domain corresponding to mem_type
45 * @mem_type: ttm memory type
46 *
47 * Returns corresponding domain of the ttm mem_type
48 */
49static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
50{
51 switch (mem_type) {
52 case TTM_PL_VRAM:
53 return RADEON_GEM_DOMAIN_VRAM;
54 case TTM_PL_TT:
55 return RADEON_GEM_DOMAIN_GTT;
56 case TTM_PL_SYSTEM:
57 return RADEON_GEM_DOMAIN_CPU;
58 default:
59 break;
60 }
61 return 0;
62}
63
64int radeon_bo_reserve(struct radeon_bo *bo, bool no_intr);
65
66static inline void radeon_bo_unreserve(struct radeon_bo *bo)
67{
68 ttm_bo_unreserve(&bo->tbo);
69}
70
71/**
72 * radeon_bo_gpu_offset - return GPU offset of bo
73 * @bo: radeon object for which we query the offset
74 *
75 * Returns current GPU offset of the object.
76 *
77 * Note: object should either be pinned or reserved when calling this
78 * function, it might be useful to add check for this for debugging.
79 */
80static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
81{
82 return bo->tbo.offset;
83}
84
85static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
86{
87 return bo->tbo.num_pages << PAGE_SHIFT;
88}
89
90static inline bool radeon_bo_is_reserved(struct radeon_bo *bo)
91{
92 return ttm_bo_is_reserved(&bo->tbo);
93}
94
95static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo)
96{
97 return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
98}
99
100static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
101{
102 return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
103}
104
105/**
106 * radeon_bo_mmap_offset - return mmap offset of bo
107 * @bo: radeon object for which we query the offset
108 *
109 * Returns mmap offset of the object.
110 *
111 * Note: addr_space_offset is constant after ttm bo init thus isn't protected
112 * by any lock.
113 */
114static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
115{
116 return bo->tbo.addr_space_offset;
117}
118
119extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
120 bool no_wait);
121
122extern int radeon_bo_create(struct radeon_device *rdev,
123 unsigned long size, int byte_align,
124 bool kernel, u32 domain,
125 struct sg_table *sg,
126 struct radeon_bo **bo_ptr);
127extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
128extern void radeon_bo_kunmap(struct radeon_bo *bo);
129extern void radeon_bo_unref(struct radeon_bo **bo);
130extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
131extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
132 u64 max_offset, u64 *gpu_addr);
133extern int radeon_bo_unpin(struct radeon_bo *bo);
134extern int radeon_bo_evict_vram(struct radeon_device *rdev);
135extern void radeon_bo_force_delete(struct radeon_device *rdev);
136extern int radeon_bo_init(struct radeon_device *rdev);
137extern void radeon_bo_fini(struct radeon_device *rdev);
138extern void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
139 struct list_head *head);
f43cf1b1 140extern int radeon_bo_list_validate(struct list_head *head, int ring);
926deccb
FT
141#ifdef DUMBBELL_WIP
142extern int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
143 struct vm_area_struct *vma);
144#endif /* DUMBBELL_WIP */
145extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
146 u32 tiling_flags, u32 pitch);
147extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
148 u32 *tiling_flags, u32 *pitch);
149extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
150 bool force_drop);
151extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
152 struct ttm_mem_reg *mem);
153extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
154extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
155
156/*
157 * sub allocation
158 */
159
160static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
161{
162 return sa_bo->manager->gpu_addr + sa_bo->soffset;
163}
164
165static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
166{
167 return (char *)sa_bo->manager->cpu_ptr + sa_bo->soffset;
168}
169
170extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
171 struct radeon_sa_manager *sa_manager,
57e252bf 172 unsigned size, u32 align, u32 domain);
926deccb
FT
173extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
174 struct radeon_sa_manager *sa_manager);
175extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
176 struct radeon_sa_manager *sa_manager);
177extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
178 struct radeon_sa_manager *sa_manager);
179extern int radeon_sa_bo_new(struct radeon_device *rdev,
180 struct radeon_sa_manager *sa_manager,
181 struct radeon_sa_bo **sa_bo,
182 unsigned size, unsigned align, bool block);
183extern void radeon_sa_bo_free(struct radeon_device *rdev,
184 struct radeon_sa_bo **sa_bo,
185 struct radeon_fence *fence);
186#if defined(CONFIG_DEBUG_FS)
187extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
188 struct seq_file *m);
189#endif
190
191
192#endif