Merge branch 'vendor/GCC44'
[dragonfly.git] / contrib / gcc-4.4 / gcc / caller-save.c
CommitLineData
c251ad9e
SS
1/* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 3, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
21
22#include "config.h"
23#include "system.h"
24#include "coretypes.h"
25#include "tm.h"
26#include "rtl.h"
27#include "regs.h"
28#include "insn-config.h"
29#include "flags.h"
30#include "hard-reg-set.h"
31#include "recog.h"
32#include "basic-block.h"
33#include "reload.h"
34#include "function.h"
35#include "expr.h"
36#include "toplev.h"
37#include "tm_p.h"
38#include "addresses.h"
39#include "output.h"
40#include "df.h"
41#include "ggc.h"
42
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SW
43/* True if caller-save has been initialized. */
44bool caller_save_initialized_p;
45
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SS
46/* Call used hard registers which can not be saved because there is no
47 insn for this. */
48HARD_REG_SET no_caller_save_reg_set;
49
50#ifndef MAX_MOVE_MAX
51#define MAX_MOVE_MAX MOVE_MAX
52#endif
53
54#ifndef MIN_UNITS_PER_WORD
55#define MIN_UNITS_PER_WORD UNITS_PER_WORD
56#endif
57
58#define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
59
60/* Modes for each hard register that we can save. The smallest mode is wide
61 enough to save the entire contents of the register. When saving the
62 register because it is live we first try to save in multi-register modes.
63 If that is not possible the save is done one register at a time. */
64
65static enum machine_mode
66 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
67
68/* For each hard register, a place on the stack where it can be saved,
69 if needed. */
70
71static rtx
72 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
73
74/* The number of elements in the subsequent array. */
75static int save_slots_num;
76
77/* Allocated slots so far. */
78static rtx save_slots[FIRST_PSEUDO_REGISTER];
79
80/* We will only make a register eligible for caller-save if it can be
81 saved in its widest mode with a simple SET insn as long as the memory
82 address is valid. We record the INSN_CODE is those insns here since
83 when we emit them, the addresses might not be valid, so they might not
84 be recognized. */
85
86static int
87 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
88static int
89 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
90
91/* Set of hard regs currently residing in save area (during insn scan). */
92
93static HARD_REG_SET hard_regs_saved;
94
95/* Number of registers currently in hard_regs_saved. */
96
97static int n_regs_saved;
98
99/* Computed by mark_referenced_regs, all regs referenced in a given
100 insn. */
101static HARD_REG_SET referenced_regs;
102
103
104static int reg_save_code (int, enum machine_mode);
105static int reg_restore_code (int, enum machine_mode);
106
107struct saved_hard_reg;
108static void initiate_saved_hard_regs (void);
109static struct saved_hard_reg *new_saved_hard_reg (int, int);
110static void finish_saved_hard_regs (void);
111static int saved_hard_reg_compare_func (const void *, const void *);
112
113static void mark_set_regs (rtx, const_rtx, void *);
114static void add_stored_regs (rtx, const_rtx, void *);
115static void mark_referenced_regs (rtx);
116static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
117 enum machine_mode *);
118static int insert_restore (struct insn_chain *, int, int, int,
119 enum machine_mode *);
120static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
121 rtx);
122static void add_stored_regs (rtx, const_rtx, void *);
123
124\f
125
126static GTY(()) rtx savepat;
127static GTY(()) rtx restpat;
128static GTY(()) rtx test_reg;
129static GTY(()) rtx test_mem;
130static GTY(()) rtx saveinsn;
131static GTY(()) rtx restinsn;
132
133/* Return the INSN_CODE used to save register REG in mode MODE. */
134static int
135reg_save_code (int reg, enum machine_mode mode)
136{
137 bool ok;
138 if (cached_reg_save_code[reg][mode])
139 return cached_reg_save_code[reg][mode];
140 if (!HARD_REGNO_MODE_OK (reg, mode))
141 {
142 cached_reg_save_code[reg][mode] = -1;
143 cached_reg_restore_code[reg][mode] = -1;
144 return -1;
145 }
146
147 /* Update the register number and modes of the register
148 and memory operand. */
149 SET_REGNO (test_reg, reg);
150 PUT_MODE (test_reg, mode);
151 PUT_MODE (test_mem, mode);
152
153 /* Force re-recognition of the modified insns. */
154 INSN_CODE (saveinsn) = -1;
155 INSN_CODE (restinsn) = -1;
156
157 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
158 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
159
160 /* Now extract both insns and see if we can meet their
161 constraints. */
162 ok = (cached_reg_save_code[reg][mode] != -1
163 && cached_reg_restore_code[reg][mode] != -1);
164 if (ok)
165 {
166 extract_insn (saveinsn);
167 ok = constrain_operands (1);
168 extract_insn (restinsn);
169 ok &= constrain_operands (1);
170 }
171
172 if (! ok)
173 {
174 cached_reg_save_code[reg][mode] = -1;
175 cached_reg_restore_code[reg][mode] = -1;
176 }
177 gcc_assert (cached_reg_save_code[reg][mode]);
178 return cached_reg_save_code[reg][mode];
179}
180
181/* Return the INSN_CODE used to restore register REG in mode MODE. */
182static int
183reg_restore_code (int reg, enum machine_mode mode)
184{
185 if (cached_reg_restore_code[reg][mode])
186 return cached_reg_restore_code[reg][mode];
187 /* Populate our cache. */
188 reg_save_code (reg, mode);
189 return cached_reg_restore_code[reg][mode];
190}
191\f
192/* Initialize for caller-save.
193
194 Look at all the hard registers that are used by a call and for which
195 reginfo.c has not already excluded from being used across a call.
196
197 Ensure that we can find a mode to save the register and that there is a
198 simple insn to save and restore the register. This latter check avoids
199 problems that would occur if we tried to save the MQ register of some
200 machines directly into memory. */
201
202void
203init_caller_save (void)
204{
205 rtx addr_reg;
206 int offset;
207 rtx address;
208 int i, j;
209
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SW
210 if (caller_save_initialized_p)
211 return;
212
213 caller_save_initialized_p = true;
214
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215 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
216 /* First find all the registers that we need to deal with and all
217 the modes that they can have. If we can't find a mode to use,
218 we can't have the register live over calls. */
219
220 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
221 {
222 if (call_used_regs[i] && ! call_fixed_regs[i])
223 {
224 for (j = 1; j <= MOVE_MAX_WORDS; j++)
225 {
226 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
227 VOIDmode);
228 if (regno_save_mode[i][j] == VOIDmode && j == 1)
229 {
230 call_fixed_regs[i] = 1;
231 SET_HARD_REG_BIT (call_fixed_reg_set, i);
232 }
233 }
234 }
235 else
236 regno_save_mode[i][1] = VOIDmode;
237 }
238
239 /* The following code tries to approximate the conditions under which
240 we can easily save and restore a register without scratch registers or
241 other complexities. It will usually work, except under conditions where
242 the validity of an insn operand is dependent on the address offset.
243 No such cases are currently known.
244
245 We first find a typical offset from some BASE_REG_CLASS register.
246 This address is chosen by finding the first register in the class
247 and by finding the smallest power of two that is a valid offset from
248 that register in every mode we will use to save registers. */
249
250 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
251 if (TEST_HARD_REG_BIT
252 (reg_class_contents
253 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i))
254 break;
255
256 gcc_assert (i < FIRST_PSEUDO_REGISTER);
257
258 addr_reg = gen_rtx_REG (Pmode, i);
259
260 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
261 {
262 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
263
264 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
265 if (regno_save_mode[i][1] != VOIDmode
266 && ! strict_memory_address_p (regno_save_mode[i][1], address))
267 break;
268
269 if (i == FIRST_PSEUDO_REGISTER)
270 break;
271 }
272
273 /* If we didn't find a valid address, we must use register indirect. */
274 if (offset == 0)
275 address = addr_reg;
276
277 /* Next we try to form an insn to save and restore the register. We
278 see if such an insn is recognized and meets its constraints.
279
280 To avoid lots of unnecessary RTL allocation, we construct all the RTL
281 once, then modify the memory and register operands in-place. */
282
283 test_reg = gen_rtx_REG (VOIDmode, 0);
284 test_mem = gen_rtx_MEM (VOIDmode, address);
285 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
286 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
287
288 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0);
289 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0);
290
291 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
292 for (j = 1; j <= MOVE_MAX_WORDS; j++)
293 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
294 {
295 regno_save_mode[i][j] = VOIDmode;
296 if (j == 1)
297 {
298 call_fixed_regs[i] = 1;
299 SET_HARD_REG_BIT (call_fixed_reg_set, i);
300 if (call_used_regs[i])
301 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
302 }
303 }
304}
305
306\f
307
308/* Initialize save areas by showing that we haven't allocated any yet. */
309
310void
311init_save_areas (void)
312{
313 int i, j;
314
315 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
316 for (j = 1; j <= MOVE_MAX_WORDS; j++)
317 regno_save_mem[i][j] = 0;
318 save_slots_num = 0;
319
320}
321
322/* The structure represents a hard register which should be saved
323 through the call. It is used when the integrated register
324 allocator (IRA) is used and sharing save slots is on. */
325struct saved_hard_reg
326{
327 /* Order number starting with 0. */
328 int num;
329 /* The hard regno. */
330 int hard_regno;
331 /* Execution frequency of all calls through which given hard
332 register should be saved. */
333 int call_freq;
334 /* Stack slot reserved to save the hard register through calls. */
335 rtx slot;
336 /* True if it is first hard register in the chain of hard registers
337 sharing the same stack slot. */
338 int first_p;
339 /* Order number of the next hard register structure with the same
340 slot in the chain. -1 represents end of the chain. */
341 int next;
342};
343
344/* Map: hard register number to the corresponding structure. */
345static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
346
347/* The number of all structures representing hard registers should be
348 saved, in order words, the number of used elements in the following
349 array. */
350static int saved_regs_num;
351
352/* Pointers to all the structures. Index is the order number of the
353 corresponding structure. */
354static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
355
356/* First called function for work with saved hard registers. */
357static void
358initiate_saved_hard_regs (void)
359{
360 int i;
361
362 saved_regs_num = 0;
363 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
364 hard_reg_map[i] = NULL;
365}
366
367/* Allocate and return new saved hard register with given REGNO and
368 CALL_FREQ. */
369static struct saved_hard_reg *
370new_saved_hard_reg (int regno, int call_freq)
371{
372 struct saved_hard_reg *saved_reg;
373
374 saved_reg
375 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
376 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
377 saved_reg->num = saved_regs_num++;
378 saved_reg->hard_regno = regno;
379 saved_reg->call_freq = call_freq;
380 saved_reg->first_p = FALSE;
381 saved_reg->next = -1;
382 return saved_reg;
383}
384
385/* Free memory allocated for the saved hard registers. */
386static void
387finish_saved_hard_regs (void)
388{
389 int i;
390
391 for (i = 0; i < saved_regs_num; i++)
392 free (all_saved_regs[i]);
393}
394
395/* The function is used to sort the saved hard register structures
396 according their frequency. */
397static int
398saved_hard_reg_compare_func (const void *v1p, const void *v2p)
399{
400 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
401 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
402
403 if (flag_omit_frame_pointer)
404 {
405 if (p1->call_freq - p2->call_freq != 0)
406 return p1->call_freq - p2->call_freq;
407 }
408 else if (p2->call_freq - p1->call_freq != 0)
409 return p2->call_freq - p1->call_freq;
410
411 return p1->num - p2->num;
412}
413
414/* Allocate save areas for any hard registers that might need saving.
415 We take a conservative approach here and look for call-clobbered hard
416 registers that are assigned to pseudos that cross calls. This may
417 overestimate slightly (especially if some of these registers are later
418 used as spill registers), but it should not be significant.
419
420 For IRA we use priority coloring to decrease stack slots needed for
421 saving hard registers through calls. We build conflicts for them
422 to do coloring.
423
424 Future work:
425
426 In the fallback case we should iterate backwards across all possible
427 modes for the save, choosing the largest available one instead of
428 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
429
430 We do not try to use "move multiple" instructions that exist
431 on some machines (such as the 68k moveml). It could be a win to try
432 and use them when possible. The hard part is doing it in a way that is
433 machine independent since they might be saving non-consecutive
434 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
435
436void
437setup_save_areas (void)
438{
439 int i, j, k;
440 unsigned int r;
441 HARD_REG_SET hard_regs_used;
442
443 /* Allocate space in the save area for the largest multi-register
444 pseudos first, then work backwards to single register
445 pseudos. */
446
447 /* Find and record all call-used hard-registers in this function. */
448 CLEAR_HARD_REG_SET (hard_regs_used);
449 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
450 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
451 {
452 unsigned int regno = reg_renumber[i];
453 unsigned int endregno
454 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
455 for (r = regno; r < endregno; r++)
456 if (call_used_regs[r])
457 SET_HARD_REG_BIT (hard_regs_used, r);
458 }
459
460 if (optimize && flag_ira_share_save_slots)
461 {
462 rtx insn, slot;
463 struct insn_chain *chain, *next;
464 char *saved_reg_conflicts;
465 unsigned int regno;
466 int next_k, freq;
467 struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3;
468 int call_saved_regs_num;
469 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
470 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
471 reg_set_iterator rsi;
472 int best_slot_num;
473 int prev_save_slots_num;
474 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
475
476 initiate_saved_hard_regs ();
477 /* Create hard reg saved regs. */
478 for (chain = reload_insn_chain; chain != 0; chain = next)
479 {
480 insn = chain->insn;
481 next = chain->next;
482 if (GET_CODE (insn) != CALL_INSN
483 || find_reg_note (insn, REG_NORETURN, NULL))
484 continue;
485 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
486 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
487 &chain->live_throughout);
488 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
489
490 /* Record all registers set in this call insn. These don't
491 need to be saved. N.B. the call insn might set a subreg
492 of a multi-hard-reg pseudo; then the pseudo is considered
493 live during the call, but the subreg that is set
494 isn't. */
495 CLEAR_HARD_REG_SET (this_insn_sets);
496 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
497 /* Sibcalls are considered to set the return value. */
498 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
499 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
500
501 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
502 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
503 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
504 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
505 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
506 {
507 if (hard_reg_map[regno] != NULL)
508 hard_reg_map[regno]->call_freq += freq;
509 else
510 saved_reg = new_saved_hard_reg (regno, freq);
511 }
512 /* Look through all live pseudos, mark their hard registers. */
513 EXECUTE_IF_SET_IN_REG_SET
514 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
515 {
516 int r = reg_renumber[regno];
517 int bound;
518
519 if (r < 0)
520 continue;
521
522 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
523 for (; r < bound; r++)
524 if (TEST_HARD_REG_BIT (used_regs, r))
525 {
526 if (hard_reg_map[r] != NULL)
527 hard_reg_map[r]->call_freq += freq;
528 else
529 saved_reg = new_saved_hard_reg (r, freq);
530 SET_HARD_REG_BIT (hard_regs_to_save, r);
531 }
532 }
533 }
534 /* Find saved hard register conflicts. */
535 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
536 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
537 for (chain = reload_insn_chain; chain != 0; chain = next)
538 {
539 call_saved_regs_num = 0;
540 insn = chain->insn;
541 next = chain->next;
542 if (GET_CODE (insn) != CALL_INSN
543 || find_reg_note (insn, REG_NORETURN, NULL))
544 continue;
545 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
546 &chain->live_throughout);
547 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
548
549 /* Record all registers set in this call insn. These don't
550 need to be saved. N.B. the call insn might set a subreg
551 of a multi-hard-reg pseudo; then the pseudo is considered
552 live during the call, but the subreg that is set
553 isn't. */
554 CLEAR_HARD_REG_SET (this_insn_sets);
555 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
556 /* Sibcalls are considered to set the return value,
557 compare flow.c:propagate_one_insn. */
558 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
559 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
560
561 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
562 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
563 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
564 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
565 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
566 {
567 gcc_assert (hard_reg_map[regno] != NULL);
568 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
569 }
570 /* Look through all live pseudos, mark their hard registers. */
571 EXECUTE_IF_SET_IN_REG_SET
572 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
573 {
574 int r = reg_renumber[regno];
575 int bound;
576
577 if (r < 0)
578 continue;
579
580 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
581 for (; r < bound; r++)
582 if (TEST_HARD_REG_BIT (used_regs, r))
583 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
584 }
585 for (i = 0; i < call_saved_regs_num; i++)
586 {
587 saved_reg = call_saved_regs[i];
588 for (j = 0; j < call_saved_regs_num; j++)
589 if (i != j)
590 {
591 saved_reg2 = call_saved_regs[j];
592 saved_reg_conflicts[saved_reg->num * saved_regs_num
593 + saved_reg2->num]
594 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
595 + saved_reg->num]
596 = TRUE;
597 }
598 }
599 }
600 /* Sort saved hard regs. */
601 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
602 saved_hard_reg_compare_func);
603 /* Initiate slots available from the previous reload
604 iteration. */
605 prev_save_slots_num = save_slots_num;
606 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
607 save_slots_num = 0;
608 /* Allocate stack slots for the saved hard registers. */
609 for (i = 0; i < saved_regs_num; i++)
610 {
611 saved_reg = all_saved_regs[i];
612 regno = saved_reg->hard_regno;
613 for (j = 0; j < i; j++)
614 {
615 saved_reg2 = all_saved_regs[j];
616 if (! saved_reg2->first_p)
617 continue;
618 slot = saved_reg2->slot;
619 for (k = j; k >= 0; k = next_k)
620 {
621 saved_reg3 = all_saved_regs[k];
622 next_k = saved_reg3->next;
623 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
624 + saved_reg3->num])
625 break;
626 }
627 if (k < 0
628 && (GET_MODE_SIZE (regno_save_mode[regno][1])
629 <= GET_MODE_SIZE (regno_save_mode
630 [saved_reg2->hard_regno][1])))
631 {
632 saved_reg->slot
633 = adjust_address_nv
634 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
635 regno_save_mem[regno][1] = saved_reg->slot;
636 saved_reg->next = saved_reg2->next;
637 saved_reg2->next = i;
638 if (dump_file != NULL)
639 fprintf (dump_file, "%d uses slot of %d\n",
640 regno, saved_reg2->hard_regno);
641 break;
642 }
643 }
644 if (j == i)
645 {
646 saved_reg->first_p = TRUE;
647 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
648 {
649 slot = prev_save_slots[j];
650 if (slot == NULL_RTX)
651 continue;
652 if (GET_MODE_SIZE (regno_save_mode[regno][1])
653 <= GET_MODE_SIZE (GET_MODE (slot))
654 && best_slot_num < 0)
655 best_slot_num = j;
656 if (GET_MODE (slot) == regno_save_mode[regno][1])
657 break;
658 }
659 if (best_slot_num >= 0)
660 {
661 saved_reg->slot = prev_save_slots[best_slot_num];
662 saved_reg->slot
663 = adjust_address_nv
664 (saved_reg->slot,
665 regno_save_mode[saved_reg->hard_regno][1], 0);
666 if (dump_file != NULL)
667 fprintf (dump_file,
668 "%d uses a slot from prev iteration\n", regno);
669 prev_save_slots[best_slot_num] = NULL_RTX;
670 if (best_slot_num + 1 == prev_save_slots_num)
671 prev_save_slots_num--;
672 }
673 else
674 {
675 saved_reg->slot
676 = assign_stack_local_1
677 (regno_save_mode[regno][1],
678 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true);
679 if (dump_file != NULL)
680 fprintf (dump_file, "%d uses a new slot\n", regno);
681 }
682 regno_save_mem[regno][1] = saved_reg->slot;
683 save_slots[save_slots_num++] = saved_reg->slot;
684 }
685 }
686 free (saved_reg_conflicts);
687 finish_saved_hard_regs ();
688 }
689 else
690 {
691 /* Now run through all the call-used hard-registers and allocate
692 space for them in the caller-save area. Try to allocate space
693 in a manner which allows multi-register saves/restores to be done. */
694
695 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
696 for (j = MOVE_MAX_WORDS; j > 0; j--)
697 {
698 int do_save = 1;
699
700 /* If no mode exists for this size, try another. Also break out
701 if we have already saved this hard register. */
702 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
703 continue;
704
705 /* See if any register in this group has been saved. */
706 for (k = 0; k < j; k++)
707 if (regno_save_mem[i + k][1])
708 {
709 do_save = 0;
710 break;
711 }
712 if (! do_save)
713 continue;
714
715 for (k = 0; k < j; k++)
716 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
717 {
718 do_save = 0;
719 break;
720 }
721 if (! do_save)
722 continue;
723
724 /* We have found an acceptable mode to store in. Since
725 hard register is always saved in the widest mode
726 available, the mode may be wider than necessary, it is
727 OK to reduce the alignment of spill space. We will
728 verify that it is equal to or greater than required
729 when we restore and save the hard register in
730 insert_restore and insert_save. */
731 regno_save_mem[i][j]
732 = assign_stack_local_1 (regno_save_mode[i][j],
733 GET_MODE_SIZE (regno_save_mode[i][j]),
734 0, true);
735
736 /* Setup single word save area just in case... */
737 for (k = 0; k < j; k++)
738 /* This should not depend on WORDS_BIG_ENDIAN.
739 The order of words in regs is the same as in memory. */
740 regno_save_mem[i + k][1]
741 = adjust_address_nv (regno_save_mem[i][j],
742 regno_save_mode[i + k][1],
743 k * UNITS_PER_WORD);
744 }
745 }
746
747 /* Now loop again and set the alias set of any save areas we made to
748 the alias set used to represent frame objects. */
749 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
750 for (j = MOVE_MAX_WORDS; j > 0; j--)
751 if (regno_save_mem[i][j] != 0)
752 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
753}
754
755\f
756
757/* Find the places where hard regs are live across calls and save them. */
758
759void
760save_call_clobbered_regs (void)
761{
762 struct insn_chain *chain, *next;
763 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
764
765 /* Computed in mark_set_regs, holds all registers set by the current
766 instruction. */
767 HARD_REG_SET this_insn_sets;
768
769 CLEAR_HARD_REG_SET (hard_regs_saved);
770 n_regs_saved = 0;
771
772 for (chain = reload_insn_chain; chain != 0; chain = next)
773 {
774 rtx insn = chain->insn;
775 enum rtx_code code = GET_CODE (insn);
776
777 next = chain->next;
778
779 gcc_assert (!chain->is_caller_save_insn);
780
781 if (INSN_P (insn))
782 {
783 /* If some registers have been saved, see if INSN references
784 any of them. We must restore them before the insn if so. */
785
786 if (n_regs_saved)
787 {
788 int regno;
789
790 if (code == JUMP_INSN)
791 /* Restore all registers if this is a JUMP_INSN. */
792 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
793 else
794 {
795 CLEAR_HARD_REG_SET (referenced_regs);
796 mark_referenced_regs (PATTERN (insn));
797 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
798 }
799
800 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
801 if (TEST_HARD_REG_BIT (referenced_regs, regno))
802 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode);
803 }
804
805 if (code == CALL_INSN
806 && ! SIBLING_CALL_P (insn)
807 && ! find_reg_note (insn, REG_NORETURN, NULL))
808 {
809 unsigned regno;
810 HARD_REG_SET hard_regs_to_save;
811 reg_set_iterator rsi;
812
813 /* Use the register life information in CHAIN to compute which
814 regs are live during the call. */
815 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
816 &chain->live_throughout);
817 /* Save hard registers always in the widest mode available. */
818 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
819 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
820 save_mode [regno] = regno_save_mode [regno][1];
821 else
822 save_mode [regno] = VOIDmode;
823
824 /* Look through all live pseudos, mark their hard registers
825 and choose proper mode for saving. */
826 EXECUTE_IF_SET_IN_REG_SET
827 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
828 {
829 int r = reg_renumber[regno];
830 int nregs;
831 enum machine_mode mode;
832
833 if (r < 0)
834 continue;
835 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
836 mode = HARD_REGNO_CALLER_SAVE_MODE
837 (r, nregs, PSEUDO_REGNO_MODE (regno));
838 if (GET_MODE_BITSIZE (mode)
839 > GET_MODE_BITSIZE (save_mode[r]))
840 save_mode[r] = mode;
841 while (nregs-- > 0)
842 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
843 }
844
845 /* Record all registers set in this call insn. These don't need
846 to be saved. N.B. the call insn might set a subreg of a
847 multi-hard-reg pseudo; then the pseudo is considered live
848 during the call, but the subreg that is set isn't. */
849 CLEAR_HARD_REG_SET (this_insn_sets);
850 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
851
852 /* Compute which hard regs must be saved before this call. */
853 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
854 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
855 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
856 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
857
858 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
859 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
860 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
861
862 /* Must recompute n_regs_saved. */
863 n_regs_saved = 0;
864 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
865 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
866 n_regs_saved++;
867 }
868 }
869
870 if (chain->next == 0 || chain->next->block != chain->block)
871 {
872 int regno;
873 /* At the end of the basic block, we must restore any registers that
874 remain saved. If the last insn in the block is a JUMP_INSN, put
875 the restore before the insn, otherwise, put it after the insn. */
876
877 if (n_regs_saved)
878 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
879 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
880 regno += insert_restore (chain, JUMP_P (insn),
881 regno, MOVE_MAX_WORDS, save_mode);
882 }
883 }
884}
885
886/* Here from note_stores, or directly from save_call_clobbered_regs, when
887 an insn stores a value in a register.
888 Set the proper bit or bits in this_insn_sets. All pseudos that have
889 been assigned hard regs have had their register number changed already,
890 so we can ignore pseudos. */
891static void
892mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
893{
894 int regno, endregno, i;
895 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
896
897 if (GET_CODE (reg) == SUBREG)
898 {
899 rtx inner = SUBREG_REG (reg);
900 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
901 return;
902 regno = subreg_regno (reg);
903 endregno = regno + subreg_nregs (reg);
904 }
905 else if (REG_P (reg)
906 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
907 {
908 regno = REGNO (reg);
909 endregno = END_HARD_REGNO (reg);
910 }
911 else
912 return;
913
914 for (i = regno; i < endregno; i++)
915 SET_HARD_REG_BIT (*this_insn_sets, i);
916}
917
918/* Here from note_stores when an insn stores a value in a register.
919 Set the proper bit or bits in the passed regset. All pseudos that have
920 been assigned hard regs have had their register number changed already,
921 so we can ignore pseudos. */
922static void
923add_stored_regs (rtx reg, const_rtx setter, void *data)
924{
925 int regno, endregno, i;
926 enum machine_mode mode = GET_MODE (reg);
927 int offset = 0;
928
929 if (GET_CODE (setter) == CLOBBER)
930 return;
931
932 if (GET_CODE (reg) == SUBREG
933 && REG_P (SUBREG_REG (reg))
934 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
935 {
936 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
937 GET_MODE (SUBREG_REG (reg)),
938 SUBREG_BYTE (reg),
939 GET_MODE (reg));
940 regno = REGNO (SUBREG_REG (reg)) + offset;
941 endregno = regno + subreg_nregs (reg);
942 }
943 else
944 {
945 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
946 return;
947
948 regno = REGNO (reg) + offset;
949 endregno = end_hard_regno (mode, regno);
950 }
951
952 for (i = regno; i < endregno; i++)
953 SET_REGNO_REG_SET ((regset) data, i);
954}
955
956/* Walk X and record all referenced registers in REFERENCED_REGS. */
957static void
958mark_referenced_regs (rtx x)
959{
960 enum rtx_code code = GET_CODE (x);
961 const char *fmt;
962 int i, j;
963
964 if (code == SET)
965 mark_referenced_regs (SET_SRC (x));
966 if (code == SET || code == CLOBBER)
967 {
968 x = SET_DEST (x);
969 code = GET_CODE (x);
970 if ((code == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
971 || code == PC || code == CC0
972 || (code == SUBREG && REG_P (SUBREG_REG (x))
973 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
974 /* If we're setting only part of a multi-word register,
975 we shall mark it as referenced, because the words
976 that are not being set should be restored. */
977 && ((GET_MODE_SIZE (GET_MODE (x))
978 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
979 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
980 <= UNITS_PER_WORD))))
981 return;
982 }
983 if (code == MEM || code == SUBREG)
984 {
985 x = XEXP (x, 0);
986 code = GET_CODE (x);
987 }
988
989 if (code == REG)
990 {
991 int regno = REGNO (x);
992 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
993 : reg_renumber[regno]);
994
995 if (hardregno >= 0)
996 add_to_hard_reg_set (&referenced_regs, GET_MODE (x), hardregno);
997 /* If this is a pseudo that did not get a hard register, scan its
998 memory location, since it might involve the use of another
999 register, which might be saved. */
1000 else if (reg_equiv_mem[regno] != 0)
1001 mark_referenced_regs (XEXP (reg_equiv_mem[regno], 0));
1002 else if (reg_equiv_address[regno] != 0)
1003 mark_referenced_regs (reg_equiv_address[regno]);
1004 return;
1005 }
1006
1007 fmt = GET_RTX_FORMAT (code);
1008 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1009 {
1010 if (fmt[i] == 'e')
1011 mark_referenced_regs (XEXP (x, i));
1012 else if (fmt[i] == 'E')
1013 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1014 mark_referenced_regs (XVECEXP (x, i, j));
1015 }
1016}
1017\f
1018/* Insert a sequence of insns to restore. Place these insns in front of
1019 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1020 the maximum number of registers which should be restored during this call.
1021 It should never be less than 1 since we only work with entire registers.
1022
1023 Note that we have verified in init_caller_save that we can do this
1024 with a simple SET, so use it. Set INSN_CODE to what we save there
1025 since the address might not be valid so the insn might not be recognized.
1026 These insns will be reloaded and have register elimination done by
1027 find_reload, so we need not worry about that here.
1028
1029 Return the extra number of registers saved. */
1030
1031static int
1032insert_restore (struct insn_chain *chain, int before_p, int regno,
1033 int maxrestore, enum machine_mode *save_mode)
1034{
1035 int i, k;
1036 rtx pat = NULL_RTX;
1037 int code;
1038 unsigned int numregs = 0;
1039 struct insn_chain *new_chain;
1040 rtx mem;
1041
1042 /* A common failure mode if register status is not correct in the
1043 RTL is for this routine to be called with a REGNO we didn't
1044 expect to save. That will cause us to write an insn with a (nil)
1045 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1046 later, check for this common case here instead. This will remove
1047 one step in debugging such problems. */
1048 gcc_assert (regno_save_mem[regno][1]);
1049
1050 /* Get the pattern to emit and update our status.
1051
1052 See if we can restore `maxrestore' registers at once. Work
1053 backwards to the single register case. */
1054 for (i = maxrestore; i > 0; i--)
1055 {
1056 int j;
1057 int ok = 1;
1058
1059 if (regno_save_mem[regno][i] == 0)
1060 continue;
1061
1062 for (j = 0; j < i; j++)
1063 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1064 {
1065 ok = 0;
1066 break;
1067 }
1068 /* Must do this one restore at a time. */
1069 if (! ok)
1070 continue;
1071
1072 numregs = i;
1073 break;
1074 }
1075
1076 mem = regno_save_mem [regno][numregs];
1077 if (save_mode [regno] != VOIDmode
1078 && save_mode [regno] != GET_MODE (mem)
1079 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1080 /* Check that insn to restore REGNO in save_mode[regno] is
1081 correct. */
1082 && reg_save_code (regno, save_mode[regno]) >= 0)
1083 mem = adjust_address (mem, save_mode[regno], 0);
1084 else
1085 mem = copy_rtx (mem);
1086
1087 /* Verify that the alignment of spill space is equal to or greater
1088 than required. */
1089 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1090 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1091
1092 pat = gen_rtx_SET (VOIDmode,
1093 gen_rtx_REG (GET_MODE (mem),
1094 regno), mem);
1095 code = reg_restore_code (regno, GET_MODE (mem));
1096 new_chain = insert_one_insn (chain, before_p, code, pat);
1097
1098 /* Clear status for all registers we restored. */
1099 for (k = 0; k < i; k++)
1100 {
1101 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
1102 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1103 n_regs_saved--;
1104 }
1105
1106 /* Tell our callers how many extra registers we saved/restored. */
1107 return numregs - 1;
1108}
1109
1110/* Like insert_restore above, but save registers instead. */
1111
1112static int
1113insert_save (struct insn_chain *chain, int before_p, int regno,
1114 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
1115{
1116 int i;
1117 unsigned int k;
1118 rtx pat = NULL_RTX;
1119 int code;
1120 unsigned int numregs = 0;
1121 struct insn_chain *new_chain;
1122 rtx mem;
1123
1124 /* A common failure mode if register status is not correct in the
1125 RTL is for this routine to be called with a REGNO we didn't
1126 expect to save. That will cause us to write an insn with a (nil)
1127 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1128 later, check for this common case here. This will remove one
1129 step in debugging such problems. */
1130 gcc_assert (regno_save_mem[regno][1]);
1131
1132 /* Get the pattern to emit and update our status.
1133
1134 See if we can save several registers with a single instruction.
1135 Work backwards to the single register case. */
1136 for (i = MOVE_MAX_WORDS; i > 0; i--)
1137 {
1138 int j;
1139 int ok = 1;
1140 if (regno_save_mem[regno][i] == 0)
1141 continue;
1142
1143 for (j = 0; j < i; j++)
1144 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1145 {
1146 ok = 0;
1147 break;
1148 }
1149 /* Must do this one save at a time. */
1150 if (! ok)
1151 continue;
1152
1153 numregs = i;
1154 break;
1155 }
1156
1157 mem = regno_save_mem [regno][numregs];
1158 if (save_mode [regno] != VOIDmode
1159 && save_mode [regno] != GET_MODE (mem)
1160 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1161 /* Check that insn to save REGNO in save_mode[regno] is
1162 correct. */
1163 && reg_save_code (regno, save_mode[regno]) >= 0)
1164 mem = adjust_address (mem, save_mode[regno], 0);
1165 else
1166 mem = copy_rtx (mem);
1167
1168 /* Verify that the alignment of spill space is equal to or greater
1169 than required. */
1170 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1171 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1172
1173 pat = gen_rtx_SET (VOIDmode, mem,
1174 gen_rtx_REG (GET_MODE (mem),
1175 regno));
1176 code = reg_save_code (regno, GET_MODE (mem));
1177 new_chain = insert_one_insn (chain, before_p, code, pat);
1178
1179 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1180 for (k = 0; k < numregs; k++)
1181 {
1182 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
1183 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1184 n_regs_saved++;
1185 }
1186
1187 /* Tell our callers how many extra registers we saved/restored. */
1188 return numregs - 1;
1189}
1190
1191/* A for_each_rtx callback used by add_used_regs. Add the hard-register
1192 equivalent of each REG to regset DATA. */
1193
1194static int
1195add_used_regs_1 (rtx *loc, void *data)
1196{
1197 int regno, i;
1198 regset live;
1199 rtx x;
1200
1201 x = *loc;
1202 live = (regset) data;
1203 if (REG_P (x))
1204 {
1205 regno = REGNO (x);
1206 if (!HARD_REGISTER_NUM_P (regno))
1207 regno = reg_renumber[regno];
1208 if (regno >= 0)
1209 for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--)
1210 SET_REGNO_REG_SET (live, regno + i);
1211 }
1212 return 0;
1213}
1214
1215/* A note_uses callback used by insert_one_insn. Add the hard-register
1216 equivalent of each REG to regset DATA. */
1217
1218static void
1219add_used_regs (rtx *loc, void *data)
1220{
1221 for_each_rtx (loc, add_used_regs_1, data);
1222}
1223
1224/* Emit a new caller-save insn and set the code. */
1225static struct insn_chain *
1226insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
1227{
1228 rtx insn = chain->insn;
1229 struct insn_chain *new_chain;
1230
1231#ifdef HAVE_cc0
1232 /* If INSN references CC0, put our insns in front of the insn that sets
1233 CC0. This is always safe, since the only way we could be passed an
1234 insn that references CC0 is for a restore, and doing a restore earlier
1235 isn't a problem. We do, however, assume here that CALL_INSNs don't
1236 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1237
1238 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
1239 && before_p
1240 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
1241 chain = chain->prev, insn = chain->insn;
1242#endif
1243
1244 new_chain = new_insn_chain ();
1245 if (before_p)
1246 {
1247 rtx link;
1248
1249 new_chain->prev = chain->prev;
1250 if (new_chain->prev != 0)
1251 new_chain->prev->next = new_chain;
1252 else
1253 reload_insn_chain = new_chain;
1254
1255 chain->prev = new_chain;
1256 new_chain->next = chain;
1257 new_chain->insn = emit_insn_before (pat, insn);
1258 /* ??? It would be nice if we could exclude the already / still saved
1259 registers from the live sets. */
1260 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1261 note_uses (&PATTERN (chain->insn), add_used_regs,
1262 &new_chain->live_throughout);
1263 /* If CHAIN->INSN is a call, then the registers which contain
1264 the arguments to the function are live in the new insn. */
1265 if (CALL_P (chain->insn))
1266 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1267 link != NULL_RTX;
1268 link = XEXP (link, 1))
1269 note_uses (&XEXP (link, 0), add_used_regs,
1270 &new_chain->live_throughout);
1271
1272 CLEAR_REG_SET (&new_chain->dead_or_set);
1273 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
1274 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn;
1275 }
1276 else
1277 {
1278 new_chain->next = chain->next;
1279 if (new_chain->next != 0)
1280 new_chain->next->prev = new_chain;
1281 chain->next = new_chain;
1282 new_chain->prev = chain;
1283 new_chain->insn = emit_insn_after (pat, insn);
1284 /* ??? It would be nice if we could exclude the already / still saved
1285 registers from the live sets, and observe REG_UNUSED notes. */
1286 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1287 /* Registers that are set in CHAIN->INSN live in the new insn.
1288 (Unless there is a REG_UNUSED note for them, but we don't
1289 look for them here.) */
1290 note_stores (PATTERN (chain->insn), add_stored_regs,
1291 &new_chain->live_throughout);
1292 CLEAR_REG_SET (&new_chain->dead_or_set);
1293 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
1294 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn;
1295 }
1296 new_chain->block = chain->block;
1297 new_chain->is_caller_save_insn = 1;
1298
1299 INSN_CODE (new_chain->insn) = code;
1300 return new_chain;
1301}
1302#include "gt-caller-save.h"