Merge branch 'vendor/GCC44'
[dragonfly.git] / contrib / gcc-4.4 / gcc / reginfo.c
CommitLineData
c251ad9e
SS
1/* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
5
6This file is part of GCC.
7
8GCC is free software; you can redistribute it and/or modify it under
9the terms of the GNU General Public License as published by the Free
10Software Foundation; either version 3, or (at your option) any later
11version.
12
13GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14WARRANTY; without even the implied warranty of MERCHANTABILITY or
15FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16for more details.
17
18You should have received a copy of the GNU General Public License
19along with GCC; see the file COPYING3. If not see
20<http://www.gnu.org/licenses/>. */
21
22
23/* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
29
30#include "config.h"
31#include "system.h"
32#include "coretypes.h"
33#include "tm.h"
34#include "hard-reg-set.h"
35#include "rtl.h"
36#include "expr.h"
37#include "tm_p.h"
38#include "flags.h"
39#include "basic-block.h"
40#include "regs.h"
41#include "addresses.h"
42#include "function.h"
43#include "insn-config.h"
44#include "recog.h"
45#include "reload.h"
46#include "real.h"
47#include "toplev.h"
48#include "output.h"
49#include "ggc.h"
50#include "timevar.h"
51#include "hashtab.h"
52#include "target.h"
53#include "tree-pass.h"
54#include "df.h"
55#include "ira.h"
56
57/* Maximum register number used in this function, plus one. */
58
59int max_regno;
60
61\f
62/* Register tables used by many passes. */
63
64/* Indexed by hard register number, contains 1 for registers
65 that are fixed use (stack pointer, pc, frame pointer, etc.).
66 These are the registers that cannot be used to allocate
67 a pseudo reg for general use. */
68char fixed_regs[FIRST_PSEUDO_REGISTER];
69
70/* Same info as a HARD_REG_SET. */
71HARD_REG_SET fixed_reg_set;
72
73/* Data for initializing the above. */
74static const char initial_fixed_regs[] = FIXED_REGISTERS;
75
76/* Indexed by hard register number, contains 1 for registers
77 that are fixed use or are clobbered by function calls.
78 These are the registers that cannot be used to allocate
79 a pseudo reg whose life crosses calls unless we are able
80 to save/restore them across the calls. */
81char call_used_regs[FIRST_PSEUDO_REGISTER];
82
83/* Same info as a HARD_REG_SET. */
84HARD_REG_SET call_used_reg_set;
85
86/* Data for initializing the above. */
87static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
88
89/* This is much like call_used_regs, except it doesn't have to
90 be a superset of FIXED_REGISTERS. This vector indicates
91 what is really call clobbered, and is used when defining
92 regs_invalidated_by_call. */
93#ifdef CALL_REALLY_USED_REGISTERS
94char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
95#endif
96
97#ifdef CALL_REALLY_USED_REGISTERS
98#define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
99#else
100#define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
101#endif
102
103
104/* Indexed by hard register number, contains 1 for registers that are
105 fixed use or call used registers that cannot hold quantities across
106 calls even if we are willing to save and restore them. call fixed
107 registers are a subset of call used registers. */
108char call_fixed_regs[FIRST_PSEUDO_REGISTER];
109
110/* The same info as a HARD_REG_SET. */
111HARD_REG_SET call_fixed_reg_set;
112
113/* Indexed by hard register number, contains 1 for registers
114 that are being used for global register decls.
115 These must be exempt from ordinary flow analysis
116 and are also considered fixed. */
117char global_regs[FIRST_PSEUDO_REGISTER];
118
119/* Contains 1 for registers that are set or clobbered by calls. */
120/* ??? Ideally, this would be just call_used_regs plus global_regs, but
121 for someone's bright idea to have call_used_regs strictly include
122 fixed_regs. Which leaves us guessing as to the set of fixed_regs
123 that are actually preserved. We know for sure that those associated
124 with the local stack frame are safe, but scant others. */
125HARD_REG_SET regs_invalidated_by_call;
126
127/* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
128 in dataflow more conveniently. */
129regset regs_invalidated_by_call_regset;
130
131/* The bitmap_obstack is used to hold some static variables that
132 should not be reset after each function is compiled. */
133static bitmap_obstack persistent_obstack;
134
135/* Table of register numbers in the order in which to try to use them. */
136#ifdef REG_ALLOC_ORDER
137int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
138
139/* The inverse of reg_alloc_order. */
140int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
141#endif
142
143/* For each reg class, a HARD_REG_SET saying which registers are in it. */
144HARD_REG_SET reg_class_contents[N_REG_CLASSES];
145
146/* The same information, but as an array of unsigned ints. We copy from
147 these unsigned ints to the table above. We do this so the tm.h files
148 do not have to be aware of the wordsize for machines with <= 64 regs.
149 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
150#define N_REG_INTS \
151 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
152
153static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
154 = REG_CLASS_CONTENTS;
155
156/* For each reg class, number of regs it contains. */
157unsigned int reg_class_size[N_REG_CLASSES];
158
159/* For each reg class, table listing all the classes contained in it. */
160enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
161
162/* For each pair of reg classes,
163 a largest reg class contained in their union. */
164enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
165
166/* For each pair of reg classes,
167 the smallest reg class containing their union. */
168enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
169
170/* Array containing all of the register names. */
171const char * reg_names[] = REGISTER_NAMES;
172
173/* Array containing all of the register class names. */
174const char * reg_class_names[] = REG_CLASS_NAMES;
175
176/* For each hard register, the widest mode object that it can contain.
177 This will be a MODE_INT mode if the register can hold integers. Otherwise
178 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
179 register. */
180enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
181
182/* 1 if there is a register of given mode. */
183bool have_regs_of_mode [MAX_MACHINE_MODE];
184
185/* 1 if class does contain register of given mode. */
186char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
187
188/* Maximum cost of moving from a register in one class to a register in
189 another class. Based on REGISTER_MOVE_COST. */
190move_table *move_cost[MAX_MACHINE_MODE];
191
192/* Similar, but here we don't have to move if the first index is a subset
193 of the second so in that case the cost is zero. */
194move_table *may_move_in_cost[MAX_MACHINE_MODE];
195
196/* Similar, but here we don't have to move if the first index is a superset
197 of the second so in that case the cost is zero. */
198move_table *may_move_out_cost[MAX_MACHINE_MODE];
199
200/* Keep track of the last mode we initialized move costs for. */
201static int last_mode_for_init_move_cost;
202
203/* Sample MEM values for use by memory_move_secondary_cost. */
204static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
205
206/* No more global register variables may be declared; true once
207 reginfo has been initialized. */
208static int no_global_reg_vars = 0;
209
210/* Specify number of hard registers given machine mode occupy. */
211unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
212
213/* Given a register bitmap, turn on the bits in a HARD_REG_SET that
214 correspond to the hard registers, if any, set in that map. This
215 could be done far more efficiently by having all sorts of special-cases
216 with moving single words, but probably isn't worth the trouble. */
217void
218reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
219{
220 unsigned i;
221 bitmap_iterator bi;
222
223 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
224 {
225 if (i >= FIRST_PSEUDO_REGISTER)
226 return;
227 SET_HARD_REG_BIT (*to, i);
228 }
229}
230
231/* Function called only once to initialize the above data on reg usage.
232 Once this is done, various switches may override. */
233void
234init_reg_sets (void)
235{
236 int i, j;
237
238 /* First copy the register information from the initial int form into
239 the regsets. */
240
241 for (i = 0; i < N_REG_CLASSES; i++)
242 {
243 CLEAR_HARD_REG_SET (reg_class_contents[i]);
244
245 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
246 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
247 if (int_reg_class_contents[i][j / 32]
248 & ((unsigned) 1 << (j % 32)))
249 SET_HARD_REG_BIT (reg_class_contents[i], j);
250 }
251
252 /* Sanity check: make sure the target macros FIXED_REGISTERS and
253 CALL_USED_REGISTERS had the right number of initializers. */
254 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
255 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
256
257 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
258 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
259 memset (global_regs, 0, sizeof global_regs);
260}
261
262/* Initialize may_move_cost and friends for mode M. */
263void
264init_move_cost (enum machine_mode m)
265{
266 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
267 bool all_match = true;
268 unsigned int i, j;
269
270 gcc_assert (have_regs_of_mode[m]);
271 for (i = 0; i < N_REG_CLASSES; i++)
272 if (contains_reg_of_mode[i][m])
273 for (j = 0; j < N_REG_CLASSES; j++)
274 {
275 int cost;
276 if (!contains_reg_of_mode[j][m])
277 cost = 65535;
278 else
279 {
280 cost = REGISTER_MOVE_COST (m, i, j);
281 gcc_assert (cost < 65535);
282 }
283 all_match &= (last_move_cost[i][j] == cost);
284 last_move_cost[i][j] = cost;
285 }
286 if (all_match && last_mode_for_init_move_cost != -1)
287 {
288 move_cost[m] = move_cost[last_mode_for_init_move_cost];
289 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
290 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
291 return;
292 }
293 last_mode_for_init_move_cost = m;
294 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
295 * N_REG_CLASSES);
296 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
297 * N_REG_CLASSES);
298 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
299 * N_REG_CLASSES);
300 for (i = 0; i < N_REG_CLASSES; i++)
301 if (contains_reg_of_mode[i][m])
302 for (j = 0; j < N_REG_CLASSES; j++)
303 {
304 int cost;
305 enum reg_class *p1, *p2;
306
307 if (last_move_cost[i][j] == 65535)
308 {
309 move_cost[m][i][j] = 65535;
310 may_move_in_cost[m][i][j] = 65535;
311 may_move_out_cost[m][i][j] = 65535;
312 }
313 else
314 {
315 cost = last_move_cost[i][j];
316
317 for (p2 = &reg_class_subclasses[j][0];
318 *p2 != LIM_REG_CLASSES; p2++)
319 if (*p2 != i && contains_reg_of_mode[*p2][m])
320 cost = MAX (cost, move_cost[m][i][*p2]);
321
322 for (p1 = &reg_class_subclasses[i][0];
323 *p1 != LIM_REG_CLASSES; p1++)
324 if (*p1 != j && contains_reg_of_mode[*p1][m])
325 cost = MAX (cost, move_cost[m][*p1][j]);
326
327 gcc_assert (cost <= 65535);
328 move_cost[m][i][j] = cost;
329
330 if (reg_class_subset_p (i, j))
331 may_move_in_cost[m][i][j] = 0;
332 else
333 may_move_in_cost[m][i][j] = cost;
334
335 if (reg_class_subset_p (j, i))
336 may_move_out_cost[m][i][j] = 0;
337 else
338 may_move_out_cost[m][i][j] = cost;
339 }
340 }
341 else
342 for (j = 0; j < N_REG_CLASSES; j++)
343 {
344 move_cost[m][i][j] = 65535;
345 may_move_in_cost[m][i][j] = 65535;
346 may_move_out_cost[m][i][j] = 65535;
347 }
348}
349
350/* We need to save copies of some of the register information which
351 can be munged by command-line switches so we can restore it during
352 subsequent back-end reinitialization. */
353static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
354static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
355#ifdef CALL_REALLY_USED_REGISTERS
356static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
357#endif
358static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
359
360/* Save the register information. */
361void
362save_register_info (void)
363{
364 /* Sanity check: make sure the target macros FIXED_REGISTERS and
365 CALL_USED_REGISTERS had the right number of initializers. */
366 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
367 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
368 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
369 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
370
371 /* Likewise for call_really_used_regs. */
372#ifdef CALL_REALLY_USED_REGISTERS
373 gcc_assert (sizeof call_really_used_regs
374 == sizeof saved_call_really_used_regs);
375 memcpy (saved_call_really_used_regs, call_really_used_regs,
376 sizeof call_really_used_regs);
377#endif
378
379 /* And similarly for reg_names. */
380 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
381 memcpy (saved_reg_names, reg_names, sizeof reg_names);
382}
383
384/* Restore the register information. */
385static void
386restore_register_info (void)
387{
388 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
389 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
390
391#ifdef CALL_REALLY_USED_REGISTERS
392 memcpy (call_really_used_regs, saved_call_really_used_regs,
393 sizeof call_really_used_regs);
394#endif
395
396 memcpy (reg_names, saved_reg_names, sizeof reg_names);
397}
398
399/* After switches have been processed, which perhaps alter
400 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
401static void
402init_reg_sets_1 (void)
403{
404 unsigned int i, j;
405 unsigned int /* enum machine_mode */ m;
406
407 restore_register_info ();
408
409#ifdef REG_ALLOC_ORDER
410 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
411 inv_reg_alloc_order[reg_alloc_order[i]] = i;
412#endif
413
414 /* This macro allows the fixed or call-used registers
415 and the register classes to depend on target flags. */
416
417#ifdef CONDITIONAL_REGISTER_USAGE
418 CONDITIONAL_REGISTER_USAGE;
419#endif
420
421 /* Compute number of hard regs in each class. */
422
423 memset (reg_class_size, 0, sizeof reg_class_size);
424 for (i = 0; i < N_REG_CLASSES; i++)
425 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
426 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
427 reg_class_size[i]++;
428
429 /* Initialize the table of subunions.
430 reg_class_subunion[I][J] gets the largest-numbered reg-class
431 that is contained in the union of classes I and J. */
432
433 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
434 for (i = 0; i < N_REG_CLASSES; i++)
435 {
436 for (j = 0; j < N_REG_CLASSES; j++)
437 {
438 HARD_REG_SET c;
439 int k;
440
441 COPY_HARD_REG_SET (c, reg_class_contents[i]);
442 IOR_HARD_REG_SET (c, reg_class_contents[j]);
443 for (k = 0; k < N_REG_CLASSES; k++)
444 if (hard_reg_set_subset_p (reg_class_contents[k], c)
445 && !hard_reg_set_subset_p (reg_class_contents[k],
446 reg_class_contents
447 [(int) reg_class_subunion[i][j]]))
448 reg_class_subunion[i][j] = (enum reg_class) k;
449 }
450 }
451
452 /* Initialize the table of superunions.
453 reg_class_superunion[I][J] gets the smallest-numbered reg-class
454 containing the union of classes I and J. */
455
456 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
457 for (i = 0; i < N_REG_CLASSES; i++)
458 {
459 for (j = 0; j < N_REG_CLASSES; j++)
460 {
461 HARD_REG_SET c;
462 int k;
463
464 COPY_HARD_REG_SET (c, reg_class_contents[i]);
465 IOR_HARD_REG_SET (c, reg_class_contents[j]);
466 for (k = 0; k < N_REG_CLASSES; k++)
467 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
468 break;
469
470 reg_class_superunion[i][j] = (enum reg_class) k;
471 }
472 }
473
474 /* Initialize the tables of subclasses and superclasses of each reg class.
475 First clear the whole table, then add the elements as they are found. */
476
477 for (i = 0; i < N_REG_CLASSES; i++)
478 {
479 for (j = 0; j < N_REG_CLASSES; j++)
480 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
481 }
482
483 for (i = 0; i < N_REG_CLASSES; i++)
484 {
485 if (i == (int) NO_REGS)
486 continue;
487
488 for (j = i + 1; j < N_REG_CLASSES; j++)
489 if (hard_reg_set_subset_p (reg_class_contents[i],
490 reg_class_contents[j]))
491 {
492 /* Reg class I is a subclass of J.
493 Add J to the table of superclasses of I. */
494 enum reg_class *p;
495
496 /* Add I to the table of superclasses of J. */
497 p = &reg_class_subclasses[j][0];
498 while (*p != LIM_REG_CLASSES) p++;
499 *p = (enum reg_class) i;
500 }
501 }
502
503 /* Initialize "constant" tables. */
504
505 CLEAR_HARD_REG_SET (fixed_reg_set);
506 CLEAR_HARD_REG_SET (call_used_reg_set);
507 CLEAR_HARD_REG_SET (call_fixed_reg_set);
508 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
509 if (!regs_invalidated_by_call_regset)
510 {
511 bitmap_obstack_initialize (&persistent_obstack);
512 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
513 }
514 else
515 CLEAR_REG_SET (regs_invalidated_by_call_regset);
516
517 memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs);
518
519 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
520 {
521 /* call_used_regs must include fixed_regs. */
522 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
523#ifdef CALL_REALLY_USED_REGISTERS
524 /* call_used_regs must include call_really_used_regs. */
525 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
526#endif
527
528 if (fixed_regs[i])
529 SET_HARD_REG_BIT (fixed_reg_set, i);
530
531 if (call_used_regs[i])
532 SET_HARD_REG_BIT (call_used_reg_set, i);
533 if (call_fixed_regs[i])
534 SET_HARD_REG_BIT (call_fixed_reg_set, i);
535
536 /* There are a couple of fixed registers that we know are safe to
537 exclude from being clobbered by calls:
538
539 The frame pointer is always preserved across calls. The arg pointer
540 is if it is fixed. The stack pointer usually is, unless
541 RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
542 If we are generating PIC code, the PIC offset table register is
543 preserved across calls, though the target can override that. */
544
545 if (i == STACK_POINTER_REGNUM)
546 ;
547 else if (global_regs[i])
548 {
549 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
550 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
551 }
552 else if (i == FRAME_POINTER_REGNUM)
553 ;
554#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
555 else if (i == HARD_FRAME_POINTER_REGNUM)
556 ;
557#endif
558#if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
559 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
560 ;
561#endif
562#ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
563 else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
564 ;
565#endif
566 else if (CALL_REALLY_USED_REGNO_P (i))
567 {
568 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
569 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
570 }
571 }
572
573 /* Preserve global registers if called more than once. */
574 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
575 {
576 if (global_regs[i])
577 {
578 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
579 SET_HARD_REG_BIT (fixed_reg_set, i);
580 SET_HARD_REG_BIT (call_used_reg_set, i);
581 SET_HARD_REG_BIT (call_fixed_reg_set, i);
582 }
583 }
584
585 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
586 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
587 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
588 {
589 HARD_REG_SET ok_regs;
590 CLEAR_HARD_REG_SET (ok_regs);
591 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
592 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, m))
593 SET_HARD_REG_BIT (ok_regs, j);
594
595 for (i = 0; i < N_REG_CLASSES; i++)
596 if ((unsigned) CLASS_MAX_NREGS (i, m) <= reg_class_size[i]
597 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
598 {
599 contains_reg_of_mode [i][m] = 1;
600 have_regs_of_mode [m] = 1;
601 }
602 }
603
604 /* Reset move_cost and friends, making sure we only free shared
605 table entries once. */
606 for (i = 0; i < MAX_MACHINE_MODE; i++)
607 if (move_cost[i])
608 {
609 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
610 ;
611 if (i == j)
612 {
613 free (move_cost[i]);
614 free (may_move_in_cost[i]);
615 free (may_move_out_cost[i]);
616 }
617 }
618 memset (move_cost, 0, sizeof move_cost);
619 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
620 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
621 last_mode_for_init_move_cost = -1;
622}
623
624/* Compute the table of register modes.
625 These values are used to record death information for individual registers
626 (as opposed to a multi-register mode).
627 This function might be invoked more than once, if the target has support
628 for changing register usage conventions on a per-function basis.
629*/
630void
631init_reg_modes_target (void)
632{
633 int i, j;
634
635 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
636 for (j = 0; j < MAX_MACHINE_MODE; j++)
637 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
638
639 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
640 {
641 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
642
643 /* If we couldn't find a valid mode, just use the previous mode.
644 ??? One situation in which we need to do this is on the mips where
645 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
646 to use DF mode for the even registers and VOIDmode for the odd
647 (for the cpu models where the odd ones are inaccessible). */
648 if (reg_raw_mode[i] == VOIDmode)
649 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
650 }
651}
652
653/* Finish initializing the register sets and initialize the register modes.
654 This function might be invoked more than once, if the target has support
655 for changing register usage conventions on a per-function basis.
656*/
657void
658init_regs (void)
659{
660 /* This finishes what was started by init_reg_sets, but couldn't be done
661 until after register usage was specified. */
662 init_reg_sets_1 ();
663}
664
665/* The same as previous function plus initializing IRA. */
666void
667reinit_regs (void)
668{
669 init_regs ();
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670 /* caller_save needs to be re-initialized. */
671 caller_save_initialized_p = false;
c251ad9e
SS
672 ira_init ();
673}
674
675/* Initialize some fake stack-frame MEM references for use in
676 memory_move_secondary_cost. */
677void
678init_fake_stack_mems (void)
679{
680 int i;
681
682 for (i = 0; i < MAX_MACHINE_MODE; i++)
683 top_of_stack[i] = gen_rtx_MEM (i, stack_pointer_rtx);
684}
685
686
687/* Compute extra cost of moving registers to/from memory due to reloads.
688 Only needed if secondary reloads are required for memory moves. */
689int
690memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass,
691 int in)
692{
693 enum reg_class altclass;
694 int partial_cost = 0;
695 /* We need a memory reference to feed to SECONDARY... macros. */
696 /* mem may be unused even if the SECONDARY_ macros are defined. */
697 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
698
699 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
700
701 if (altclass == NO_REGS)
702 return 0;
703
704 if (in)
705 partial_cost = REGISTER_MOVE_COST (mode, altclass, rclass);
706 else
707 partial_cost = REGISTER_MOVE_COST (mode, rclass, altclass);
708
709 if (rclass == altclass)
710 /* This isn't simply a copy-to-temporary situation. Can't guess
711 what it is, so MEMORY_MOVE_COST really ought not to be calling
712 here in that case.
713
714 I'm tempted to put in an assert here, but returning this will
715 probably only give poor estimates, which is what we would've
716 had before this code anyways. */
717 return partial_cost;
718
719 /* Check if the secondary reload register will also need a
720 secondary reload. */
721 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
722}
723
724/* Return a machine mode that is legitimate for hard reg REGNO and large
725 enough to save nregs. If we can't find one, return VOIDmode.
726 If CALL_SAVED is true, only consider modes that are call saved. */
727enum machine_mode
728choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
729 unsigned int nregs, bool call_saved)
730{
731 unsigned int /* enum machine_mode */ m;
732 enum machine_mode found_mode = VOIDmode, mode;
733
734 /* We first look for the largest integer mode that can be validly
735 held in REGNO. If none, we look for the largest floating-point mode.
736 If we still didn't find a valid mode, try CCmode. */
737
738 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
739 mode != VOIDmode;
740 mode = GET_MODE_WIDER_MODE (mode))
741 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
742 && HARD_REGNO_MODE_OK (regno, mode)
743 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
744 found_mode = mode;
745
746 if (found_mode != VOIDmode)
747 return found_mode;
748
749 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
750 mode != VOIDmode;
751 mode = GET_MODE_WIDER_MODE (mode))
752 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
753 && HARD_REGNO_MODE_OK (regno, mode)
754 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
755 found_mode = mode;
756
757 if (found_mode != VOIDmode)
758 return found_mode;
759
760 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
761 mode != VOIDmode;
762 mode = GET_MODE_WIDER_MODE (mode))
763 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
764 && HARD_REGNO_MODE_OK (regno, mode)
765 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
766 found_mode = mode;
767
768 if (found_mode != VOIDmode)
769 return found_mode;
770
771 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
772 mode != VOIDmode;
773 mode = GET_MODE_WIDER_MODE (mode))
774 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
775 && HARD_REGNO_MODE_OK (regno, mode)
776 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
777 found_mode = mode;
778
779 if (found_mode != VOIDmode)
780 return found_mode;
781
782 /* Iterate over all of the CCmodes. */
783 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
784 {
785 mode = (enum machine_mode) m;
786 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
787 && HARD_REGNO_MODE_OK (regno, mode)
788 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
789 return mode;
790 }
791
792 /* We can't find a mode valid for this register. */
793 return VOIDmode;
794}
795
796/* Specify the usage characteristics of the register named NAME.
797 It should be a fixed register if FIXED and a
798 call-used register if CALL_USED. */
799void
800fix_register (const char *name, int fixed, int call_used)
801{
802 int i;
803
804 /* Decode the name and update the primary form of
805 the register info. */
806
807 if ((i = decode_reg_name (name)) >= 0)
808 {
809 if ((i == STACK_POINTER_REGNUM
810#ifdef HARD_FRAME_POINTER_REGNUM
811 || i == HARD_FRAME_POINTER_REGNUM
812#else
813 || i == FRAME_POINTER_REGNUM
814#endif
815 )
816 && (fixed == 0 || call_used == 0))
817 {
818 static const char * const what_option[2][2] = {
819 { "call-saved", "call-used" },
820 { "no-such-option", "fixed" }};
821
822 error ("can't use '%s' as a %s register", name,
823 what_option[fixed][call_used]);
824 }
825 else
826 {
827 fixed_regs[i] = fixed;
828 call_used_regs[i] = call_used;
829#ifdef CALL_REALLY_USED_REGISTERS
830 if (fixed == 0)
831 call_really_used_regs[i] = call_used;
832#endif
833 }
834 }
835 else
836 {
837 warning (0, "unknown register name: %s", name);
838 }
839}
840
841/* Mark register number I as global. */
842void
843globalize_reg (int i)
844{
4b1e227d
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845#ifdef STACK_REGS
846 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
847 {
848 error ("stack register used for global register variable");
849 return;
850 }
851#endif
852
c251ad9e
SS
853 if (fixed_regs[i] == 0 && no_global_reg_vars)
854 error ("global register variable follows a function definition");
855
856 if (global_regs[i])
857 {
858 warning (0, "register used for two global register variables");
859 return;
860 }
861
862 if (call_used_regs[i] && ! fixed_regs[i])
863 warning (0, "call-clobbered register used for global register variable");
864
865 global_regs[i] = 1;
866
867 /* If we're globalizing the frame pointer, we need to set the
868 appropriate regs_invalidated_by_call bit, even if it's already
869 set in fixed_regs. */
870 if (i != STACK_POINTER_REGNUM)
871 {
872 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
873 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
874 }
875
876 /* If already fixed, nothing else to do. */
877 if (fixed_regs[i])
878 return;
879
880 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
881#ifdef CALL_REALLY_USED_REGISTERS
882 call_really_used_regs[i] = 1;
883#endif
884
885 SET_HARD_REG_BIT (fixed_reg_set, i);
886 SET_HARD_REG_BIT (call_used_reg_set, i);
887 SET_HARD_REG_BIT (call_fixed_reg_set, i);
888
889 reinit_regs ();
890}
891\f
892
893/* Structure used to record preferences of given pseudo. */
894struct reg_pref
895{
896 /* (enum reg_class) prefclass is the preferred class. May be
897 NO_REGS if no class is better than memory. */
898 char prefclass;
899
900 /* altclass is a register class that we should use for allocating
901 pseudo if no register in the preferred class is available.
902 If no register in this class is available, memory is preferred.
903
904 It might appear to be more general to have a bitmask of classes here,
905 but since it is recommended that there be a class corresponding to the
906 union of most major pair of classes, that generality is not required. */
907 char altclass;
908};
909
910/* Record preferences of each pseudo. This is available after RA is
911 run. */
912static struct reg_pref *reg_pref;
913
914/* Return the reg_class in which pseudo reg number REGNO is best allocated.
915 This function is sometimes called before the info has been computed.
916 When that happens, just return GENERAL_REGS, which is innocuous. */
917enum reg_class
918reg_preferred_class (int regno)
919{
920 if (reg_pref == 0)
921 return GENERAL_REGS;
922
923 return (enum reg_class) reg_pref[regno].prefclass;
924}
925
926enum reg_class
927reg_alternate_class (int regno)
928{
929 if (reg_pref == 0)
930 return ALL_REGS;
931
932 return (enum reg_class) reg_pref[regno].altclass;
933}
934
935/* Initialize some global data for this pass. */
936static unsigned int
937reginfo_init (void)
938{
939 if (df)
940 df_compute_regs_ever_live (true);
941
942 /* This prevents dump_flow_info from losing if called
943 before reginfo is run. */
944 reg_pref = NULL;
945
946 /* No more global register variables may be declared. */
947 no_global_reg_vars = 1;
948 return 1;
949}
950
951struct rtl_opt_pass pass_reginfo_init =
952{
953 {
954 RTL_PASS,
955 "reginfo", /* name */
956 NULL, /* gate */
957 reginfo_init, /* execute */
958 NULL, /* sub */
959 NULL, /* next */
960 0, /* static_pass_number */
961 0, /* tv_id */
962 0, /* properties_required */
963 0, /* properties_provided */
964 0, /* properties_destroyed */
965 0, /* todo_flags_start */
966 0 /* todo_flags_finish */
967 }
968};
969
970\f
971
972/* Allocate space for reg info. */
973void
974allocate_reg_info (void)
975{
976 int size = max_reg_num ();
977
978 gcc_assert (! reg_pref && ! reg_renumber);
979 reg_renumber = XNEWVEC (short, size);
980 reg_pref = XCNEWVEC (struct reg_pref, size);
981 memset (reg_renumber, -1, size * sizeof (short));
982}
983
984
985/* Resize reg info. The new elements will be uninitialized. */
986void
987resize_reg_info (void)
988{
989 int size = max_reg_num ();
990
991 gcc_assert (reg_pref && reg_renumber);
992 reg_renumber = XRESIZEVEC (short, reg_renumber, size);
993 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, size);
994}
995
996
997/* Free up the space allocated by allocate_reg_info. */
998void
999free_reg_info (void)
1000{
1001 if (reg_pref)
1002 {
1003 free (reg_pref);
1004 reg_pref = NULL;
1005 }
1006
1007 if (reg_renumber)
1008 {
1009 free (reg_renumber);
1010 reg_renumber = NULL;
1011 }
1012}
1013
1014
1015\f
1016
1017/* Set up preferred and alternate classes for REGNO as PREFCLASS and
1018 ALTCLASS. */
1019void
1020setup_reg_classes (int regno,
1021 enum reg_class prefclass, enum reg_class altclass)
1022{
1023 if (reg_pref == NULL)
1024 return;
1025 reg_pref[regno].prefclass = prefclass;
1026 reg_pref[regno].altclass = altclass;
1027}
1028
1029\f
1030/* This is the `regscan' pass of the compiler, run just before cse and
1031 again just before loop. It finds the first and last use of each
1032 pseudo-register. */
1033
1034static void reg_scan_mark_refs (rtx, rtx);
1035
1036void
1037reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1038{
1039 rtx insn;
1040
1041 timevar_push (TV_REG_SCAN);
1042
1043 for (insn = f; insn; insn = NEXT_INSN (insn))
1044 if (INSN_P (insn))
1045 {
1046 reg_scan_mark_refs (PATTERN (insn), insn);
1047 if (REG_NOTES (insn))
1048 reg_scan_mark_refs (REG_NOTES (insn), insn);
1049 }
1050
1051 timevar_pop (TV_REG_SCAN);
1052}
1053
1054
1055/* X is the expression to scan. INSN is the insn it appears in.
1056 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1057 We should only record information for REGs with numbers
1058 greater than or equal to MIN_REGNO. */
1059static void
1060reg_scan_mark_refs (rtx x, rtx insn)
1061{
1062 enum rtx_code code;
1063 rtx dest;
1064 rtx note;
1065
1066 if (!x)
1067 return;
1068 code = GET_CODE (x);
1069 switch (code)
1070 {
1071 case CONST:
1072 case CONST_INT:
1073 case CONST_DOUBLE:
1074 case CONST_FIXED:
1075 case CONST_VECTOR:
1076 case CC0:
1077 case PC:
1078 case SYMBOL_REF:
1079 case LABEL_REF:
1080 case ADDR_VEC:
1081 case ADDR_DIFF_VEC:
1082 case REG:
1083 return;
1084
1085 case EXPR_LIST:
1086 if (XEXP (x, 0))
1087 reg_scan_mark_refs (XEXP (x, 0), insn);
1088 if (XEXP (x, 1))
1089 reg_scan_mark_refs (XEXP (x, 1), insn);
1090 break;
1091
1092 case INSN_LIST:
1093 if (XEXP (x, 1))
1094 reg_scan_mark_refs (XEXP (x, 1), insn);
1095 break;
1096
1097 case CLOBBER:
1098 if (MEM_P (XEXP (x, 0)))
1099 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1100 break;
1101
1102 case SET:
1103 /* Count a set of the destination if it is a register. */
1104 for (dest = SET_DEST (x);
1105 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1106 || GET_CODE (dest) == ZERO_EXTEND;
1107 dest = XEXP (dest, 0))
1108 ;
1109
1110 /* If this is setting a pseudo from another pseudo or the sum of a
1111 pseudo and a constant integer and the other pseudo is known to be
1112 a pointer, set the destination to be a pointer as well.
1113
1114 Likewise if it is setting the destination from an address or from a
1115 value equivalent to an address or to the sum of an address and
1116 something else.
1117
1118 But don't do any of this if the pseudo corresponds to a user
1119 variable since it should have already been set as a pointer based
1120 on the type. */
1121
1122 if (REG_P (SET_DEST (x))
1123 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1124 /* If the destination pseudo is set more than once, then other
1125 sets might not be to a pointer value (consider access to a
1126 union in two threads of control in the presence of global
1127 optimizations). So only set REG_POINTER on the destination
1128 pseudo if this is the only set of that pseudo. */
1129 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1130 && ! REG_USERVAR_P (SET_DEST (x))
1131 && ! REG_POINTER (SET_DEST (x))
1132 && ((REG_P (SET_SRC (x))
1133 && REG_POINTER (SET_SRC (x)))
1134 || ((GET_CODE (SET_SRC (x)) == PLUS
1135 || GET_CODE (SET_SRC (x)) == LO_SUM)
1136 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
1137 && REG_P (XEXP (SET_SRC (x), 0))
1138 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1139 || GET_CODE (SET_SRC (x)) == CONST
1140 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1141 || GET_CODE (SET_SRC (x)) == LABEL_REF
1142 || (GET_CODE (SET_SRC (x)) == HIGH
1143 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1144 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1145 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1146 || ((GET_CODE (SET_SRC (x)) == PLUS
1147 || GET_CODE (SET_SRC (x)) == LO_SUM)
1148 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1149 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1150 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1151 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1152 && (GET_CODE (XEXP (note, 0)) == CONST
1153 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1154 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1155 REG_POINTER (SET_DEST (x)) = 1;
1156
1157 /* If this is setting a register from a register or from a simple
1158 conversion of a register, propagate REG_EXPR. */
1159 if (REG_P (dest) && !REG_ATTRS (dest))
1160 {
1161 rtx src = SET_SRC (x);
1162
1163 while (GET_CODE (src) == SIGN_EXTEND
1164 || GET_CODE (src) == ZERO_EXTEND
1165 || GET_CODE (src) == TRUNCATE
1166 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1167 src = XEXP (src, 0);
1168
1169 set_reg_attrs_from_value (dest, src);
1170 }
1171
1172 /* ... fall through ... */
1173
1174 default:
1175 {
1176 const char *fmt = GET_RTX_FORMAT (code);
1177 int i;
1178 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1179 {
1180 if (fmt[i] == 'e')
1181 reg_scan_mark_refs (XEXP (x, i), insn);
1182 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1183 {
1184 int j;
1185 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1186 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1187 }
1188 }
1189 }
1190 }
1191}
1192\f
1193
1194/* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1195 is also in C2. */
1196int
1197reg_class_subset_p (enum reg_class c1, enum reg_class c2)
1198{
1199 return (c1 == c2
1200 || c2 == ALL_REGS
1201 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1202 reg_class_contents[(int) c2]));
1203}
1204
1205/* Return nonzero if there is a register that is in both C1 and C2. */
1206int
1207reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
1208{
1209 return (c1 == c2
1210 || c1 == ALL_REGS
1211 || c2 == ALL_REGS
1212 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1213 reg_class_contents[(int) c2]));
1214}
1215
1216\f
1217
1218/* Passes for keeping and updating info about modes of registers
1219 inside subregisters. */
1220
1221#ifdef CANNOT_CHANGE_MODE_CLASS
1222
1223struct subregs_of_mode_node
1224{
1225 unsigned int block;
1226 unsigned char modes[MAX_MACHINE_MODE];
1227};
1228
1229static htab_t subregs_of_mode;
1230
1231static hashval_t
1232som_hash (const void *x)
1233{
1234 const struct subregs_of_mode_node *const a =
1235 (const struct subregs_of_mode_node *) x;
1236 return a->block;
1237}
1238
1239static int
1240som_eq (const void *x, const void *y)
1241{
1242 const struct subregs_of_mode_node *const a =
1243 (const struct subregs_of_mode_node *) x;
1244 const struct subregs_of_mode_node *const b =
1245 (const struct subregs_of_mode_node *) y;
1246 return a->block == b->block;
1247}
1248
1249static void
1250record_subregs_of_mode (rtx subreg)
1251{
1252 struct subregs_of_mode_node dummy, *node;
1253 enum machine_mode mode;
1254 unsigned int regno;
1255 void **slot;
1256
1257 if (!REG_P (SUBREG_REG (subreg)))
1258 return;
1259
1260 regno = REGNO (SUBREG_REG (subreg));
1261 mode = GET_MODE (subreg);
1262
1263 if (regno < FIRST_PSEUDO_REGISTER)
1264 return;
1265
1266 dummy.block = regno & -8;
1267 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1268 dummy.block, INSERT);
1269 node = (struct subregs_of_mode_node *) *slot;
1270 if (node == NULL)
1271 {
1272 node = XCNEW (struct subregs_of_mode_node);
1273 node->block = regno & -8;
1274 *slot = node;
1275 }
1276
1277 node->modes[mode] |= 1 << (regno & 7);
1278}
1279
1280/* Call record_subregs_of_mode for all the subregs in X. */
1281static void
1282find_subregs_of_mode (rtx x)
1283{
1284 enum rtx_code code = GET_CODE (x);
1285 const char * const fmt = GET_RTX_FORMAT (code);
1286 int i;
1287
1288 if (code == SUBREG)
1289 record_subregs_of_mode (x);
1290
1291 /* Time for some deep diving. */
1292 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1293 {
1294 if (fmt[i] == 'e')
1295 find_subregs_of_mode (XEXP (x, i));
1296 else if (fmt[i] == 'E')
1297 {
1298 int j;
1299 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1300 find_subregs_of_mode (XVECEXP (x, i, j));
1301 }
1302 }
1303}
1304
1305static unsigned int
1306init_subregs_of_mode (void)
1307{
1308 basic_block bb;
1309 rtx insn;
1310
1311 if (subregs_of_mode)
1312 htab_empty (subregs_of_mode);
1313 else
1314 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1315
1316 FOR_EACH_BB (bb)
1317 FOR_BB_INSNS (bb, insn)
1318 if (INSN_P (insn))
1319 find_subregs_of_mode (PATTERN (insn));
1320
1321 return 0;
1322}
1323
1324/* Set bits in *USED which correspond to registers which can't change
1325 their mode from FROM to any mode in which REGNO was
1326 encountered. */
1327void
1328cannot_change_mode_set_regs (HARD_REG_SET *used, enum machine_mode from,
1329 unsigned int regno)
1330{
1331 struct subregs_of_mode_node dummy, *node;
1332 enum machine_mode to;
1333 unsigned char mask;
1334 unsigned int i;
1335
1336 gcc_assert (subregs_of_mode);
1337 dummy.block = regno & -8;
1338 node = (struct subregs_of_mode_node *)
1339 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1340 if (node == NULL)
1341 return;
1342
1343 mask = 1 << (regno & 7);
1344 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1345 if (node->modes[to] & mask)
1346 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1347 if (!TEST_HARD_REG_BIT (*used, i)
1348 && REG_CANNOT_CHANGE_MODE_P (i, from, to))
1349 SET_HARD_REG_BIT (*used, i);
1350}
1351
1352/* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1353 mode. */
1354bool
1355invalid_mode_change_p (unsigned int regno,
1356 enum reg_class rclass ATTRIBUTE_UNUSED,
1357 enum machine_mode from)
1358{
1359 struct subregs_of_mode_node dummy, *node;
1360 enum machine_mode to;
1361 unsigned char mask;
1362
1363 gcc_assert (subregs_of_mode);
1364 dummy.block = regno & -8;
1365 node = (struct subregs_of_mode_node *)
1366 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1367 if (node == NULL)
1368 return false;
1369
1370 mask = 1 << (regno & 7);
1371 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1372 if (node->modes[to] & mask)
1373 if (CANNOT_CHANGE_MODE_CLASS (from, to, rclass))
1374 return true;
1375
1376 return false;
1377}
1378
1379static unsigned int
1380finish_subregs_of_mode (void)
1381{
1382 htab_delete (subregs_of_mode);
1383 subregs_of_mode = 0;
1384 return 0;
1385}
1386#else
1387static unsigned int
1388init_subregs_of_mode (void)
1389{
1390 return 0;
1391}
1392static unsigned int
1393finish_subregs_of_mode (void)
1394{
1395 return 0;
1396}
1397
1398#endif /* CANNOT_CHANGE_MODE_CLASS */
1399
1400static bool
1401gate_subregs_of_mode_init (void)
1402{
1403#ifdef CANNOT_CHANGE_MODE_CLASS
1404 return true;
1405#else
1406 return false;
1407#endif
1408}
1409
1410struct rtl_opt_pass pass_subregs_of_mode_init =
1411{
1412 {
1413 RTL_PASS,
1414 "subregs_of_mode_init", /* name */
1415 gate_subregs_of_mode_init, /* gate */
1416 init_subregs_of_mode, /* execute */
1417 NULL, /* sub */
1418 NULL, /* next */
1419 0, /* static_pass_number */
1420 0, /* tv_id */
1421 0, /* properties_required */
1422 0, /* properties_provided */
1423 0, /* properties_destroyed */
1424 0, /* todo_flags_start */
1425 0 /* todo_flags_finish */
1426 }
1427};
1428
1429struct rtl_opt_pass pass_subregs_of_mode_finish =
1430{
1431 {
1432 RTL_PASS,
1433 "subregs_of_mode_finish", /* name */
1434 gate_subregs_of_mode_init, /* gate */
1435 finish_subregs_of_mode, /* execute */
1436 NULL, /* sub */
1437 NULL, /* next */
1438 0, /* static_pass_number */
1439 0, /* tv_id */
1440 0, /* properties_required */
1441 0, /* properties_provided */
1442 0, /* properties_destroyed */
1443 0, /* todo_flags_start */
1444 0 /* todo_flags_finish */
1445 }
1446};
1447
1448
1449#include "gt-reginfo.h"