Merge branch 'master' of ssh://crater.dragonflybsd.org/repository/git/dragonfly
[dragonfly.git] / contrib / gcc-3.4 / gcc / reload.c
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MD
1/* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5This file is part of GCC.
6
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
11
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
16
17You should have received a copy of the GNU General Public License
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
21
22/* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
28
29 Before processing the first insn of the function, call `init_reload'.
30
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
37
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
44
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
53
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
56
57NOTE SIDE EFFECTS:
58
59 find_reloads can alter the operands of the instruction it is called on.
60
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
64 better that way.
65
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
68
691 happens every time find_reloads is called.
702 happens only when REPLACE is 1, which is only when
71actually doing the reloads, not when just counting them.
72
73Using a reload register for several reloads in one insn:
74
75When an insn has reloads, it is considered as having three parts:
76the input reloads, the insn itself after reloading, and the output reloads.
77Reloads of values used in memory addresses are often needed for only one part.
78
79When this is so, reload_when_needed records which part needs the reload.
80Two reloads for different parts of the insn can share the same reload
81register.
82
83When a reload is used for addresses in multiple parts, or when it is
84an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85a register with any other reload. */
86
87#define REG_OK_STRICT
88
89#include "config.h"
90#include "system.h"
91#include "coretypes.h"
92#include "tm.h"
93#include "rtl.h"
94#include "tm_p.h"
95#include "insn-config.h"
96#include "expr.h"
97#include "optabs.h"
98#include "recog.h"
99#include "reload.h"
100#include "regs.h"
101#include "hard-reg-set.h"
102#include "flags.h"
103#include "real.h"
104#include "output.h"
105#include "function.h"
106#include "toplev.h"
107#include "params.h"
108
109#ifndef REGNO_MODE_OK_FOR_BASE_P
110#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
111#endif
112
113#ifndef REG_MODE_OK_FOR_BASE_P
114#define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
115#endif
116\f
117/* All reloads of the current insn are recorded here. See reload.h for
118 comments. */
119int n_reloads;
120struct reload rld[MAX_RELOADS];
121
122/* All the "earlyclobber" operands of the current insn
123 are recorded here. */
124int n_earlyclobbers;
125rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
126
127int reload_n_operands;
128
129/* Replacing reloads.
130
131 If `replace_reloads' is nonzero, then as each reload is recorded
132 an entry is made for it in the table `replacements'.
133 Then later `subst_reloads' can look through that table and
134 perform all the replacements needed. */
135
136/* Nonzero means record the places to replace. */
137static int replace_reloads;
138
139/* Each replacement is recorded with a structure like this. */
140struct replacement
141{
142 rtx *where; /* Location to store in */
143 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
144 a SUBREG; 0 otherwise. */
145 int what; /* which reload this is for */
146 enum machine_mode mode; /* mode it must have */
147};
148
149static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
150
151/* Number of replacements currently recorded. */
152static int n_replacements;
153
154/* Used to track what is modified by an operand. */
155struct decomposition
156{
157 int reg_flag; /* Nonzero if referencing a register. */
158 int safe; /* Nonzero if this can't conflict with anything. */
159 rtx base; /* Base address for MEM. */
160 HOST_WIDE_INT start; /* Starting offset or register number. */
161 HOST_WIDE_INT end; /* Ending offset or register number. */
162};
163
164#ifdef SECONDARY_MEMORY_NEEDED
165
166/* Save MEMs needed to copy from one class of registers to another. One MEM
167 is used per mode, but normally only one or two modes are ever used.
168
169 We keep two versions, before and after register elimination. The one
170 after register elimination is record separately for each operand. This
171 is done in case the address is not valid to be sure that we separately
172 reload each. */
173
174static rtx secondary_memlocs[NUM_MACHINE_MODES];
175static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
176static int secondary_memlocs_elim_used = 0;
177#endif
178
179/* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181static rtx this_insn;
182
183/* Nonzero if this instruction is a user-specified asm with operands. */
184static int this_insn_is_asm;
185
186/* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189static int hard_regs_live_known;
190
191/* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195static short *static_reload_reg_p;
196
197/* Set to 1 in subst_reg_equivs if it changes anything. */
198static int subst_reg_equivs_changed;
199
200/* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202static int output_reloadnum;
203
204 /* Compare two RTX's. */
205#define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
209
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212#define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
220
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222#define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
228
229 /* If we are going to reload an address, compute the reload type to
230 use. */
231#define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
236 : (type)))
237
238#ifdef HAVE_SECONDARY_RELOADS
239static int push_secondary_reload (int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
241 enum insn_code *);
242#endif
243static enum reg_class find_valid_class (enum machine_mode, int, unsigned int);
244static int reload_inner_reg_of_subreg (rtx, enum machine_mode, int);
245static void push_replacement (rtx *, int, enum machine_mode);
246static void dup_replacements (rtx *, rtx *);
247static void combine_reloads (void);
248static int find_reusable_reload (rtx *, rtx, enum reg_class,
249 enum reload_type, int, int);
250static rtx find_dummy_reload (rtx, rtx, rtx *, rtx *, enum machine_mode,
251 enum machine_mode, enum reg_class, int, int);
252static int hard_reg_set_here_p (unsigned int, unsigned int, rtx);
253static struct decomposition decompose (rtx);
254static int immune_p (rtx, rtx, struct decomposition);
255static int alternative_allows_memconst (const char *, int);
256static rtx find_reloads_toplev (rtx, int, enum reload_type, int, int, rtx,
257 int *);
258static rtx make_memloc (rtx, int);
259static int maybe_memory_address_p (enum machine_mode, rtx, rtx *);
260static int find_reloads_address (enum machine_mode, rtx *, rtx, rtx *,
261 int, enum reload_type, int, rtx);
262static rtx subst_reg_equivs (rtx, rtx);
263static rtx subst_indexed_address (rtx);
264static void update_auto_inc_notes (rtx, int, int);
265static int find_reloads_address_1 (enum machine_mode, rtx, int, rtx *,
266 int, enum reload_type,int, rtx);
267static void find_reloads_address_part (rtx, rtx *, enum reg_class,
268 enum machine_mode, int,
269 enum reload_type, int);
270static rtx find_reloads_subreg_address (rtx, int, int, enum reload_type,
271 int, rtx);
272static void copy_replacements_1 (rtx *, rtx *, int);
273static int find_inc_amount (rtx, rtx);
274\f
275#ifdef HAVE_SECONDARY_RELOADS
276
277/* Determine if any secondary reloads are needed for loading (if IN_P is
278 nonzero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
281
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
285
286static int
287push_secondary_reload (int in_p, rtx x, int opnum, int optional,
288 enum reg_class reload_class,
289 enum machine_mode reload_mode, enum reload_type type,
290 enum insn_code *picode)
291{
292 enum reg_class class = NO_REGS;
293 enum machine_mode mode = reload_mode;
294 enum insn_code icode = CODE_FOR_nothing;
295 enum reg_class t_class = NO_REGS;
296 enum machine_mode t_mode = VOIDmode;
297 enum insn_code t_icode = CODE_FOR_nothing;
298 enum reload_type secondary_type;
299 int s_reload, t_reload = -1;
300
301 if (type == RELOAD_FOR_INPUT_ADDRESS
302 || type == RELOAD_FOR_OUTPUT_ADDRESS
303 || type == RELOAD_FOR_INPADDR_ADDRESS
304 || type == RELOAD_FOR_OUTADDR_ADDRESS)
305 secondary_type = type;
306 else
307 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
308
309 *picode = CODE_FOR_nothing;
310
311 /* If X is a paradoxical SUBREG, use the inner value to determine both the
312 mode and object being reloaded. */
313 if (GET_CODE (x) == SUBREG
314 && (GET_MODE_SIZE (GET_MODE (x))
315 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
316 {
317 x = SUBREG_REG (x);
318 reload_mode = GET_MODE (x);
319 }
320
321 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
322 is still a pseudo-register by now, it *must* have an equivalent MEM
323 but we don't want to assume that), use that equivalent when seeing if
324 a secondary reload is needed since whether or not a reload is needed
325 might be sensitive to the form of the MEM. */
326
327 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
328 && reg_equiv_mem[REGNO (x)] != 0)
329 x = reg_equiv_mem[REGNO (x)];
330
331#ifdef SECONDARY_INPUT_RELOAD_CLASS
332 if (in_p)
333 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
334#endif
335
336#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
337 if (! in_p)
338 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
339#endif
340
341 /* If we don't need any secondary registers, done. */
342 if (class == NO_REGS)
343 return -1;
344
345 /* Get a possible insn to use. If the predicate doesn't accept X, don't
346 use the insn. */
347
348 icode = (in_p ? reload_in_optab[(int) reload_mode]
349 : reload_out_optab[(int) reload_mode]);
350
351 if (icode != CODE_FOR_nothing
352 && insn_data[(int) icode].operand[in_p].predicate
353 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
354 icode = CODE_FOR_nothing;
355
356 /* If we will be using an insn, see if it can directly handle the reload
357 register we will be using. If it can, the secondary reload is for a
358 scratch register. If it can't, we will use the secondary reload for
359 an intermediate register and require a tertiary reload for the scratch
360 register. */
361
362 if (icode != CODE_FOR_nothing)
363 {
364 /* If IN_P is nonzero, the reload register will be the output in
365 operand 0. If IN_P is zero, the reload register will be the input
366 in operand 1. Outputs should have an initial "=", which we must
367 skip. */
368
369 enum reg_class insn_class;
370
371 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
372 insn_class = ALL_REGS;
373 else
374 {
375 const char *insn_constraint
376 = &insn_data[(int) icode].operand[!in_p].constraint[in_p];
377 char insn_letter = *insn_constraint;
378 insn_class
379 = (insn_letter == 'r' ? GENERAL_REGS
380 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter,
381 insn_constraint));
382
383 if (insn_class == NO_REGS)
384 abort ();
385 if (in_p
386 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
387 abort ();
388 }
389
390 /* The scratch register's constraint must start with "=&". */
391 if (insn_data[(int) icode].operand[2].constraint[0] != '='
392 || insn_data[(int) icode].operand[2].constraint[1] != '&')
393 abort ();
394
395 if (reg_class_subset_p (reload_class, insn_class))
396 mode = insn_data[(int) icode].operand[2].mode;
397 else
398 {
399 const char *t_constraint
400 = &insn_data[(int) icode].operand[2].constraint[2];
401 char t_letter = *t_constraint;
402 class = insn_class;
403 t_mode = insn_data[(int) icode].operand[2].mode;
404 t_class = (t_letter == 'r' ? GENERAL_REGS
405 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter,
406 t_constraint));
407 t_icode = icode;
408 icode = CODE_FOR_nothing;
409 }
410 }
411
412 /* This case isn't valid, so fail. Reload is allowed to use the same
413 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
414 in the case of a secondary register, we actually need two different
415 registers for correct code. We fail here to prevent the possibility of
416 silently generating incorrect code later.
417
418 The convention is that secondary input reloads are valid only if the
419 secondary_class is different from class. If you have such a case, you
420 can not use secondary reloads, you must work around the problem some
421 other way.
422
423 Allow this when a reload_in/out pattern is being used. I.e. assume
424 that the generated code handles this case. */
425
426 if (in_p && class == reload_class && icode == CODE_FOR_nothing
427 && t_icode == CODE_FOR_nothing)
428 abort ();
429
430 /* If we need a tertiary reload, see if we have one we can reuse or else
431 make a new one. */
432
433 if (t_class != NO_REGS)
434 {
435 for (t_reload = 0; t_reload < n_reloads; t_reload++)
436 if (rld[t_reload].secondary_p
437 && (reg_class_subset_p (t_class, rld[t_reload].class)
438 || reg_class_subset_p (rld[t_reload].class, t_class))
439 && ((in_p && rld[t_reload].inmode == t_mode)
440 || (! in_p && rld[t_reload].outmode == t_mode))
441 && ((in_p && (rld[t_reload].secondary_in_icode
442 == CODE_FOR_nothing))
443 || (! in_p &&(rld[t_reload].secondary_out_icode
444 == CODE_FOR_nothing)))
445 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
446 && MERGABLE_RELOADS (secondary_type,
447 rld[t_reload].when_needed,
448 opnum, rld[t_reload].opnum))
449 {
450 if (in_p)
451 rld[t_reload].inmode = t_mode;
452 if (! in_p)
453 rld[t_reload].outmode = t_mode;
454
455 if (reg_class_subset_p (t_class, rld[t_reload].class))
456 rld[t_reload].class = t_class;
457
458 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
459 rld[t_reload].optional &= optional;
460 rld[t_reload].secondary_p = 1;
461 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
462 opnum, rld[t_reload].opnum))
463 rld[t_reload].when_needed = RELOAD_OTHER;
464 }
465
466 if (t_reload == n_reloads)
467 {
468 /* We need to make a new tertiary reload for this register class. */
469 rld[t_reload].in = rld[t_reload].out = 0;
470 rld[t_reload].class = t_class;
471 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
472 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
473 rld[t_reload].reg_rtx = 0;
474 rld[t_reload].optional = optional;
475 rld[t_reload].inc = 0;
476 /* Maybe we could combine these, but it seems too tricky. */
477 rld[t_reload].nocombine = 1;
478 rld[t_reload].in_reg = 0;
479 rld[t_reload].out_reg = 0;
480 rld[t_reload].opnum = opnum;
481 rld[t_reload].when_needed = secondary_type;
482 rld[t_reload].secondary_in_reload = -1;
483 rld[t_reload].secondary_out_reload = -1;
484 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
485 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
486 rld[t_reload].secondary_p = 1;
487
488 n_reloads++;
489 }
490 }
491
492 /* See if we can reuse an existing secondary reload. */
493 for (s_reload = 0; s_reload < n_reloads; s_reload++)
494 if (rld[s_reload].secondary_p
495 && (reg_class_subset_p (class, rld[s_reload].class)
496 || reg_class_subset_p (rld[s_reload].class, class))
497 && ((in_p && rld[s_reload].inmode == mode)
498 || (! in_p && rld[s_reload].outmode == mode))
499 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
500 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
501 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
502 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
503 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
504 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
505 opnum, rld[s_reload].opnum))
506 {
507 if (in_p)
508 rld[s_reload].inmode = mode;
509 if (! in_p)
510 rld[s_reload].outmode = mode;
511
512 if (reg_class_subset_p (class, rld[s_reload].class))
513 rld[s_reload].class = class;
514
515 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
516 rld[s_reload].optional &= optional;
517 rld[s_reload].secondary_p = 1;
518 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
519 opnum, rld[s_reload].opnum))
520 rld[s_reload].when_needed = RELOAD_OTHER;
521 }
522
523 if (s_reload == n_reloads)
524 {
525#ifdef SECONDARY_MEMORY_NEEDED
526 /* If we need a memory location to copy between the two reload regs,
527 set it up now. Note that we do the input case before making
528 the reload and the output case after. This is due to the
529 way reloads are output. */
530
531 if (in_p && icode == CODE_FOR_nothing
532 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
533 {
534 get_secondary_mem (x, reload_mode, opnum, type);
535
536 /* We may have just added new reloads. Make sure we add
537 the new reload at the end. */
538 s_reload = n_reloads;
539 }
540#endif
541
542 /* We need to make a new secondary reload for this register class. */
543 rld[s_reload].in = rld[s_reload].out = 0;
544 rld[s_reload].class = class;
545
546 rld[s_reload].inmode = in_p ? mode : VOIDmode;
547 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
548 rld[s_reload].reg_rtx = 0;
549 rld[s_reload].optional = optional;
550 rld[s_reload].inc = 0;
551 /* Maybe we could combine these, but it seems too tricky. */
552 rld[s_reload].nocombine = 1;
553 rld[s_reload].in_reg = 0;
554 rld[s_reload].out_reg = 0;
555 rld[s_reload].opnum = opnum;
556 rld[s_reload].when_needed = secondary_type;
557 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
558 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
559 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
560 rld[s_reload].secondary_out_icode
561 = ! in_p ? t_icode : CODE_FOR_nothing;
562 rld[s_reload].secondary_p = 1;
563
564 n_reloads++;
565
566#ifdef SECONDARY_MEMORY_NEEDED
567 if (! in_p && icode == CODE_FOR_nothing
568 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
569 get_secondary_mem (x, mode, opnum, type);
570#endif
571 }
572
573 *picode = icode;
574 return s_reload;
575}
576#endif /* HAVE_SECONDARY_RELOADS */
577\f
578#ifdef SECONDARY_MEMORY_NEEDED
579
580/* Return a memory location that will be used to copy X in mode MODE.
581 If we haven't already made a location for this mode in this insn,
582 call find_reloads_address on the location being returned. */
583
584rtx
585get_secondary_mem (rtx x ATTRIBUTE_UNUSED, enum machine_mode mode,
586 int opnum, enum reload_type type)
587{
588 rtx loc;
589 int mem_valid;
590
591 /* By default, if MODE is narrower than a word, widen it to a word.
592 This is required because most machines that require these memory
593 locations do not support short load and stores from all registers
594 (e.g., FP registers). */
595
596#ifdef SECONDARY_MEMORY_NEEDED_MODE
597 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
598#else
599 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
600 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
601#endif
602
603 /* If we already have made a MEM for this operand in MODE, return it. */
604 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
605 return secondary_memlocs_elim[(int) mode][opnum];
606
607 /* If this is the first time we've tried to get a MEM for this mode,
608 allocate a new one. `something_changed' in reload will get set
609 by noticing that the frame size has changed. */
610
611 if (secondary_memlocs[(int) mode] == 0)
612 {
613#ifdef SECONDARY_MEMORY_NEEDED_RTX
614 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
615#else
616 secondary_memlocs[(int) mode]
617 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
618#endif
619 }
620
621 /* Get a version of the address doing any eliminations needed. If that
622 didn't give us a new MEM, make a new one if it isn't valid. */
623
624 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
625 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
626
627 if (! mem_valid && loc == secondary_memlocs[(int) mode])
628 loc = copy_rtx (loc);
629
630 /* The only time the call below will do anything is if the stack
631 offset is too large. In that case IND_LEVELS doesn't matter, so we
632 can just pass a zero. Adjust the type to be the address of the
633 corresponding object. If the address was valid, save the eliminated
634 address. If it wasn't valid, we need to make a reload each time, so
635 don't save it. */
636
637 if (! mem_valid)
638 {
639 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
640 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
641 : RELOAD_OTHER);
642
643 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
644 opnum, type, 0, 0);
645 }
646
647 secondary_memlocs_elim[(int) mode][opnum] = loc;
648 if (secondary_memlocs_elim_used <= (int)mode)
649 secondary_memlocs_elim_used = (int)mode + 1;
650 return loc;
651}
652
653/* Clear any secondary memory locations we've made. */
654
655void
656clear_secondary_mem (void)
657{
658 memset (secondary_memlocs, 0, sizeof secondary_memlocs);
659}
660#endif /* SECONDARY_MEMORY_NEEDED */
661\f
662/* Find the largest class for which every register number plus N is valid in
663 M1 (if in range) and is cheap to move into REGNO.
664 Abort if no such class exists. */
665
666static enum reg_class
667find_valid_class (enum machine_mode m1 ATTRIBUTE_UNUSED, int n,
668 unsigned int dest_regno ATTRIBUTE_UNUSED)
669{
670 int best_cost = -1;
671 int class;
672 int regno;
673 enum reg_class best_class = NO_REGS;
674 enum reg_class dest_class ATTRIBUTE_UNUSED = REGNO_REG_CLASS (dest_regno);
675 unsigned int best_size = 0;
676 int cost;
677
678 for (class = 1; class < N_REG_CLASSES; class++)
679 {
680 int bad = 0;
681 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
682 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
683 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
684 && ! HARD_REGNO_MODE_OK (regno + n, m1))
685 bad = 1;
686
687 if (bad)
688 continue;
689 cost = REGISTER_MOVE_COST (m1, class, dest_class);
690
691 if ((reg_class_size[class] > best_size
692 && (best_cost < 0 || best_cost >= cost))
693 || best_cost > cost)
694 {
695 best_class = class;
696 best_size = reg_class_size[class];
697 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
698 }
699 }
700
701 if (best_size == 0)
702 abort ();
703
704 return best_class;
705}
706\f
707/* Return the number of a previously made reload that can be combined with
708 a new one, or n_reloads if none of the existing reloads can be used.
709 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
710 push_reload, they determine the kind of the new reload that we try to
711 combine. P_IN points to the corresponding value of IN, which can be
712 modified by this function.
713 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
714
715static int
716find_reusable_reload (rtx *p_in, rtx out, enum reg_class class,
717 enum reload_type type, int opnum, int dont_share)
718{
719 rtx in = *p_in;
720 int i;
721 /* We can't merge two reloads if the output of either one is
722 earlyclobbered. */
723
724 if (earlyclobber_operand_p (out))
725 return n_reloads;
726
727 /* We can use an existing reload if the class is right
728 and at least one of IN and OUT is a match
729 and the other is at worst neutral.
730 (A zero compared against anything is neutral.)
731
732 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
733 for the same thing since that can cause us to need more reload registers
734 than we otherwise would. */
735
736 for (i = 0; i < n_reloads; i++)
737 if ((reg_class_subset_p (class, rld[i].class)
738 || reg_class_subset_p (rld[i].class, class))
739 /* If the existing reload has a register, it must fit our class. */
740 && (rld[i].reg_rtx == 0
741 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
742 true_regnum (rld[i].reg_rtx)))
743 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
744 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
745 || (out != 0 && MATCHES (rld[i].out, out)
746 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
747 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
748 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
749 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
750 return i;
751
752 /* Reloading a plain reg for input can match a reload to postincrement
753 that reg, since the postincrement's value is the right value.
754 Likewise, it can match a preincrement reload, since we regard
755 the preincrementation as happening before any ref in this insn
756 to that register. */
757 for (i = 0; i < n_reloads; i++)
758 if ((reg_class_subset_p (class, rld[i].class)
759 || reg_class_subset_p (rld[i].class, class))
760 /* If the existing reload has a register, it must fit our
761 class. */
762 && (rld[i].reg_rtx == 0
763 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
764 true_regnum (rld[i].reg_rtx)))
765 && out == 0 && rld[i].out == 0 && rld[i].in != 0
766 && ((GET_CODE (in) == REG
767 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
768 && MATCHES (XEXP (rld[i].in, 0), in))
769 || (GET_CODE (rld[i].in) == REG
770 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
771 && MATCHES (XEXP (in, 0), rld[i].in)))
772 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
773 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
774 && MERGABLE_RELOADS (type, rld[i].when_needed,
775 opnum, rld[i].opnum))
776 {
777 /* Make sure reload_in ultimately has the increment,
778 not the plain register. */
779 if (GET_CODE (in) == REG)
780 *p_in = rld[i].in;
781 return i;
782 }
783 return n_reloads;
784}
785
786/* Return nonzero if X is a SUBREG which will require reloading of its
787 SUBREG_REG expression. */
788
789static int
790reload_inner_reg_of_subreg (rtx x, enum machine_mode mode, int output)
791{
792 rtx inner;
793
794 /* Only SUBREGs are problematical. */
795 if (GET_CODE (x) != SUBREG)
796 return 0;
797
798 inner = SUBREG_REG (x);
799
800 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
801 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
802 return 1;
803
804 /* If INNER is not a hard register, then INNER will not need to
805 be reloaded. */
806 if (GET_CODE (inner) != REG
807 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
808 return 0;
809
810 /* If INNER is not ok for MODE, then INNER will need reloading. */
811 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
812 return 1;
813
814 /* If the outer part is a word or smaller, INNER larger than a
815 word and the number of regs for INNER is not the same as the
816 number of words in INNER, then INNER will need reloading. */
817 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
818 && output
819 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
820 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
821 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
822}
823
824/* Return nonzero if IN can be reloaded into REGNO with mode MODE without
825 requiring an extra reload register. The caller has already found that
826 IN contains some reference to REGNO, so check that we can produce the
827 new value in a single step. E.g. if we have
828 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
829 instruction that adds one to a register, this should succeed.
830 However, if we have something like
831 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
832 needs to be loaded into a register first, we need a separate reload
833 register.
834 Such PLUS reloads are generated by find_reload_address_part.
835 The out-of-range PLUS expressions are usually introduced in the instruction
836 patterns by register elimination and substituting pseudos without a home
837 by their function-invariant equivalences. */
838static int
839can_reload_into (rtx in, int regno, enum machine_mode mode)
840{
841 rtx dst, test_insn;
842 int r = 0;
843 struct recog_data save_recog_data;
844
845 /* For matching constraints, we often get notional input reloads where
846 we want to use the original register as the reload register. I.e.
847 technically this is a non-optional input-output reload, but IN is
848 already a valid register, and has been chosen as the reload register.
849 Speed this up, since it trivially works. */
850 if (GET_CODE (in) == REG)
851 return 1;
852
853 /* To test MEMs properly, we'd have to take into account all the reloads
854 that are already scheduled, which can become quite complicated.
855 And since we've already handled address reloads for this MEM, it
856 should always succeed anyway. */
857 if (GET_CODE (in) == MEM)
858 return 1;
859
860 /* If we can make a simple SET insn that does the job, everything should
861 be fine. */
862 dst = gen_rtx_REG (mode, regno);
863 test_insn = make_insn_raw (gen_rtx_SET (VOIDmode, dst, in));
864 save_recog_data = recog_data;
865 if (recog_memoized (test_insn) >= 0)
866 {
867 extract_insn (test_insn);
868 r = constrain_operands (1);
869 }
870 recog_data = save_recog_data;
871 return r;
872}
873
874/* Record one reload that needs to be performed.
875 IN is an rtx saying where the data are to be found before this instruction.
876 OUT says where they must be stored after the instruction.
877 (IN is zero for data not read, and OUT is zero for data not written.)
878 INLOC and OUTLOC point to the places in the instructions where
879 IN and OUT were found.
880 If IN and OUT are both nonzero, it means the same register must be used
881 to reload both IN and OUT.
882
883 CLASS is a register class required for the reloaded data.
884 INMODE is the machine mode that the instruction requires
885 for the reg that replaces IN and OUTMODE is likewise for OUT.
886
887 If IN is zero, then OUT's location and mode should be passed as
888 INLOC and INMODE.
889
890 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
891
892 OPTIONAL nonzero means this reload does not need to be performed:
893 it can be discarded if that is more convenient.
894
895 OPNUM and TYPE say what the purpose of this reload is.
896
897 The return value is the reload-number for this reload.
898
899 If both IN and OUT are nonzero, in some rare cases we might
900 want to make two separate reloads. (Actually we never do this now.)
901 Therefore, the reload-number for OUT is stored in
902 output_reloadnum when we return; the return value applies to IN.
903 Usually (presently always), when IN and OUT are nonzero,
904 the two reload-numbers are equal, but the caller should be careful to
905 distinguish them. */
906
907int
908push_reload (rtx in, rtx out, rtx *inloc, rtx *outloc,
909 enum reg_class class, enum machine_mode inmode,
910 enum machine_mode outmode, int strict_low, int optional,
911 int opnum, enum reload_type type)
912{
913 int i;
914 int dont_share = 0;
915 int dont_remove_subreg = 0;
916 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
917 int secondary_in_reload = -1, secondary_out_reload = -1;
918 enum insn_code secondary_in_icode = CODE_FOR_nothing;
919 enum insn_code secondary_out_icode = CODE_FOR_nothing;
920
921 /* INMODE and/or OUTMODE could be VOIDmode if no mode
922 has been specified for the operand. In that case,
923 use the operand's mode as the mode to reload. */
924 if (inmode == VOIDmode && in != 0)
925 inmode = GET_MODE (in);
926 if (outmode == VOIDmode && out != 0)
927 outmode = GET_MODE (out);
928
929 /* If IN is a pseudo register everywhere-equivalent to a constant, and
930 it is not in a hard register, reload straight from the constant,
931 since we want to get rid of such pseudo registers.
932 Often this is done earlier, but not always in find_reloads_address. */
933 if (in != 0 && GET_CODE (in) == REG)
934 {
935 int regno = REGNO (in);
936
937 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
938 && reg_equiv_constant[regno] != 0)
939 in = reg_equiv_constant[regno];
940 }
941
942 /* Likewise for OUT. Of course, OUT will never be equivalent to
943 an actual constant, but it might be equivalent to a memory location
944 (in the case of a parameter). */
945 if (out != 0 && GET_CODE (out) == REG)
946 {
947 int regno = REGNO (out);
948
949 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
950 && reg_equiv_constant[regno] != 0)
951 out = reg_equiv_constant[regno];
952 }
953
954 /* If we have a read-write operand with an address side-effect,
955 change either IN or OUT so the side-effect happens only once. */
956 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
957 switch (GET_CODE (XEXP (in, 0)))
958 {
959 case POST_INC: case POST_DEC: case POST_MODIFY:
960 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
961 break;
962
963 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
964 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
965 break;
966
967 default:
968 break;
969 }
970
971 /* If we are reloading a (SUBREG constant ...), really reload just the
972 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
973 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
974 a pseudo and hence will become a MEM) with M1 wider than M2 and the
975 register is a pseudo, also reload the inside expression.
976 For machines that extend byte loads, do this for any SUBREG of a pseudo
977 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
978 M2 is an integral mode that gets extended when loaded.
979 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
980 either M1 is not valid for R or M2 is wider than a word but we only
981 need one word to store an M2-sized quantity in R.
982 (However, if OUT is nonzero, we need to reload the reg *and*
983 the subreg, so do nothing here, and let following statement handle it.)
984
985 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
986 we can't handle it here because CONST_INT does not indicate a mode.
987
988 Similarly, we must reload the inside expression if we have a
989 STRICT_LOW_PART (presumably, in == out in the cas).
990
991 Also reload the inner expression if it does not require a secondary
992 reload but the SUBREG does.
993
994 Finally, reload the inner expression if it is a register that is in
995 the class whose registers cannot be referenced in a different size
996 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
997 cannot reload just the inside since we might end up with the wrong
998 register class. But if it is inside a STRICT_LOW_PART, we have
999 no choice, so we hope we do get the right register class there. */
1000
1001 if (in != 0 && GET_CODE (in) == SUBREG
1002 && (subreg_lowpart_p (in) || strict_low)
1003#ifdef CANNOT_CHANGE_MODE_CLASS
1004 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
1005#endif
1006 && (CONSTANT_P (SUBREG_REG (in))
1007 || GET_CODE (SUBREG_REG (in)) == PLUS
1008 || strict_low
1009 || (((GET_CODE (SUBREG_REG (in)) == REG
1010 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
1011 || GET_CODE (SUBREG_REG (in)) == MEM)
1012 && ((GET_MODE_SIZE (inmode)
1013 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1014#ifdef LOAD_EXTEND_OP
1015 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1016 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1017 <= UNITS_PER_WORD)
1018 && (GET_MODE_SIZE (inmode)
1019 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1020 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
1021 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
1022#endif
1023#ifdef WORD_REGISTER_OPERATIONS
1024 || ((GET_MODE_SIZE (inmode)
1025 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1026 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1027 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1028 / UNITS_PER_WORD)))
1029#endif
1030 ))
1031 || (GET_CODE (SUBREG_REG (in)) == REG
1032 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1033 /* The case where out is nonzero
1034 is handled differently in the following statement. */
1035 && (out == 0 || subreg_lowpart_p (in))
1036 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1037 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1038 > UNITS_PER_WORD)
1039 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1040 / UNITS_PER_WORD)
1041 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1042 GET_MODE (SUBREG_REG (in)))))
1043 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1044#ifdef SECONDARY_INPUT_RELOAD_CLASS
1045 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1046 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1047 GET_MODE (SUBREG_REG (in)),
1048 SUBREG_REG (in))
1049 == NO_REGS))
1050#endif
1051#ifdef CANNOT_CHANGE_MODE_CLASS
1052 || (GET_CODE (SUBREG_REG (in)) == REG
1053 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1054 && REG_CANNOT_CHANGE_MODE_P
1055 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1056#endif
1057 ))
1058 {
1059 in_subreg_loc = inloc;
1060 inloc = &SUBREG_REG (in);
1061 in = *inloc;
1062#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1063 if (GET_CODE (in) == MEM)
1064 /* This is supposed to happen only for paradoxical subregs made by
1065 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1066 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1067 abort ();
1068#endif
1069 inmode = GET_MODE (in);
1070 }
1071
1072 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1073 either M1 is not valid for R or M2 is wider than a word but we only
1074 need one word to store an M2-sized quantity in R.
1075
1076 However, we must reload the inner reg *as well as* the subreg in
1077 that case. */
1078
1079 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1080 code above. This can happen if SUBREG_BYTE != 0. */
1081
1082 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1083 {
1084 enum reg_class in_class = class;
1085
1086 if (GET_CODE (SUBREG_REG (in)) == REG)
1087 in_class
1088 = find_valid_class (inmode,
1089 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1090 GET_MODE (SUBREG_REG (in)),
1091 SUBREG_BYTE (in),
1092 GET_MODE (in)),
1093 REGNO (SUBREG_REG (in)));
1094
1095 /* This relies on the fact that emit_reload_insns outputs the
1096 instructions for input reloads of type RELOAD_OTHER in the same
1097 order as the reloads. Thus if the outer reload is also of type
1098 RELOAD_OTHER, we are guaranteed that this inner reload will be
1099 output before the outer reload. */
1100 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1101 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1102 dont_remove_subreg = 1;
1103 }
1104
1105 /* Similarly for paradoxical and problematical SUBREGs on the output.
1106 Note that there is no reason we need worry about the previous value
1107 of SUBREG_REG (out); even if wider than out,
1108 storing in a subreg is entitled to clobber it all
1109 (except in the case of STRICT_LOW_PART,
1110 and in that case the constraint should label it input-output.) */
1111 if (out != 0 && GET_CODE (out) == SUBREG
1112 && (subreg_lowpart_p (out) || strict_low)
1113#ifdef CANNOT_CHANGE_MODE_CLASS
1114 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1115#endif
1116 && (CONSTANT_P (SUBREG_REG (out))
1117 || strict_low
1118 || (((GET_CODE (SUBREG_REG (out)) == REG
1119 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1120 || GET_CODE (SUBREG_REG (out)) == MEM)
1121 && ((GET_MODE_SIZE (outmode)
1122 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1123#ifdef WORD_REGISTER_OPERATIONS
1124 || ((GET_MODE_SIZE (outmode)
1125 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1126 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1127 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1128 / UNITS_PER_WORD)))
1129#endif
1130 ))
1131 || (GET_CODE (SUBREG_REG (out)) == REG
1132 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1133 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1134 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1135 > UNITS_PER_WORD)
1136 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1137 / UNITS_PER_WORD)
1138 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1139 GET_MODE (SUBREG_REG (out)))))
1140 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1141#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1142 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1143 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1144 GET_MODE (SUBREG_REG (out)),
1145 SUBREG_REG (out))
1146 == NO_REGS))
1147#endif
1148#ifdef CANNOT_CHANGE_MODE_CLASS
1149 || (GET_CODE (SUBREG_REG (out)) == REG
1150 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1151 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1152 GET_MODE (SUBREG_REG (out)),
1153 outmode))
1154#endif
1155 ))
1156 {
1157 out_subreg_loc = outloc;
1158 outloc = &SUBREG_REG (out);
1159 out = *outloc;
1160#if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1161 if (GET_CODE (out) == MEM
1162 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1163 abort ();
1164#endif
1165 outmode = GET_MODE (out);
1166 }
1167
1168 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1169 either M1 is not valid for R or M2 is wider than a word but we only
1170 need one word to store an M2-sized quantity in R.
1171
1172 However, we must reload the inner reg *as well as* the subreg in
1173 that case. In this case, the inner reg is an in-out reload. */
1174
1175 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1176 {
1177 /* This relies on the fact that emit_reload_insns outputs the
1178 instructions for output reloads of type RELOAD_OTHER in reverse
1179 order of the reloads. Thus if the outer reload is also of type
1180 RELOAD_OTHER, we are guaranteed that this inner reload will be
1181 output after the outer reload. */
1182 dont_remove_subreg = 1;
1183 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1184 &SUBREG_REG (out),
1185 find_valid_class (outmode,
1186 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1187 GET_MODE (SUBREG_REG (out)),
1188 SUBREG_BYTE (out),
1189 GET_MODE (out)),
1190 REGNO (SUBREG_REG (out))),
1191 VOIDmode, VOIDmode, 0, 0,
1192 opnum, RELOAD_OTHER);
1193 }
1194
1195 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1196 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1197 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1198 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1199 dont_share = 1;
1200
1201 /* If IN is a SUBREG of a hard register, make a new REG. This
1202 simplifies some of the cases below. */
1203
1204 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1205 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1206 && ! dont_remove_subreg)
1207 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1208
1209 /* Similarly for OUT. */
1210 if (out != 0 && GET_CODE (out) == SUBREG
1211 && GET_CODE (SUBREG_REG (out)) == REG
1212 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1213 && ! dont_remove_subreg)
1214 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1215
1216 /* Narrow down the class of register wanted if that is
1217 desirable on this machine for efficiency. */
1218 if (in != 0)
1219 class = PREFERRED_RELOAD_CLASS (in, class);
1220
1221 /* Output reloads may need analogous treatment, different in detail. */
1222#ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1223 if (out != 0)
1224 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1225#endif
1226
1227 /* Make sure we use a class that can handle the actual pseudo
1228 inside any subreg. For example, on the 386, QImode regs
1229 can appear within SImode subregs. Although GENERAL_REGS
1230 can handle SImode, QImode needs a smaller class. */
1231#ifdef LIMIT_RELOAD_CLASS
1232 if (in_subreg_loc)
1233 class = LIMIT_RELOAD_CLASS (inmode, class);
1234 else if (in != 0 && GET_CODE (in) == SUBREG)
1235 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1236
1237 if (out_subreg_loc)
1238 class = LIMIT_RELOAD_CLASS (outmode, class);
1239 if (out != 0 && GET_CODE (out) == SUBREG)
1240 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1241#endif
1242
1243 /* Verify that this class is at least possible for the mode that
1244 is specified. */
1245 if (this_insn_is_asm)
1246 {
1247 enum machine_mode mode;
1248 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1249 mode = inmode;
1250 else
1251 mode = outmode;
1252 if (mode == VOIDmode)
1253 {
1254 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1255 mode = word_mode;
1256 if (in != 0)
1257 inmode = word_mode;
1258 if (out != 0)
1259 outmode = word_mode;
1260 }
1261 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1262 if (HARD_REGNO_MODE_OK (i, mode)
1263 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1264 {
1265 int nregs = HARD_REGNO_NREGS (i, mode);
1266
1267 int j;
1268 for (j = 1; j < nregs; j++)
1269 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1270 break;
1271 if (j == nregs)
1272 break;
1273 }
1274 if (i == FIRST_PSEUDO_REGISTER)
1275 {
1276 error_for_asm (this_insn, "impossible register constraint in `asm'");
1277 class = ALL_REGS;
1278 }
1279 }
1280
1281 /* Optional output reloads are always OK even if we have no register class,
1282 since the function of these reloads is only to have spill_reg_store etc.
1283 set, so that the storing insn can be deleted later. */
1284 if (class == NO_REGS
1285 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1286 abort ();
1287
1288 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1289
1290 if (i == n_reloads)
1291 {
1292 /* See if we need a secondary reload register to move between CLASS
1293 and IN or CLASS and OUT. Get the icode and push any required reloads
1294 needed for each of them if so. */
1295
1296#ifdef SECONDARY_INPUT_RELOAD_CLASS
1297 if (in != 0)
1298 secondary_in_reload
1299 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1300 &secondary_in_icode);
1301#endif
1302
1303#ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1304 if (out != 0 && GET_CODE (out) != SCRATCH)
1305 secondary_out_reload
1306 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1307 type, &secondary_out_icode);
1308#endif
1309
1310 /* We found no existing reload suitable for re-use.
1311 So add an additional reload. */
1312
1313#ifdef SECONDARY_MEMORY_NEEDED
1314 /* If a memory location is needed for the copy, make one. */
1315 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1316 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1317 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1318 class, inmode))
1319 get_secondary_mem (in, inmode, opnum, type);
1320#endif
1321
1322 i = n_reloads;
1323 rld[i].in = in;
1324 rld[i].out = out;
1325 rld[i].class = class;
1326 rld[i].inmode = inmode;
1327 rld[i].outmode = outmode;
1328 rld[i].reg_rtx = 0;
1329 rld[i].optional = optional;
1330 rld[i].inc = 0;
1331 rld[i].nocombine = 0;
1332 rld[i].in_reg = inloc ? *inloc : 0;
1333 rld[i].out_reg = outloc ? *outloc : 0;
1334 rld[i].opnum = opnum;
1335 rld[i].when_needed = type;
1336 rld[i].secondary_in_reload = secondary_in_reload;
1337 rld[i].secondary_out_reload = secondary_out_reload;
1338 rld[i].secondary_in_icode = secondary_in_icode;
1339 rld[i].secondary_out_icode = secondary_out_icode;
1340 rld[i].secondary_p = 0;
1341
1342 n_reloads++;
1343
1344#ifdef SECONDARY_MEMORY_NEEDED
1345 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1346 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1347 && SECONDARY_MEMORY_NEEDED (class,
1348 REGNO_REG_CLASS (reg_or_subregno (out)),
1349 outmode))
1350 get_secondary_mem (out, outmode, opnum, type);
1351#endif
1352 }
1353 else
1354 {
1355 /* We are reusing an existing reload,
1356 but we may have additional information for it.
1357 For example, we may now have both IN and OUT
1358 while the old one may have just one of them. */
1359
1360 /* The modes can be different. If they are, we want to reload in
1361 the larger mode, so that the value is valid for both modes. */
1362 if (inmode != VOIDmode
1363 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1364 rld[i].inmode = inmode;
1365 if (outmode != VOIDmode
1366 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1367 rld[i].outmode = outmode;
1368 if (in != 0)
1369 {
1370 rtx in_reg = inloc ? *inloc : 0;
1371 /* If we merge reloads for two distinct rtl expressions that
1372 are identical in content, there might be duplicate address
1373 reloads. Remove the extra set now, so that if we later find
1374 that we can inherit this reload, we can get rid of the
1375 address reloads altogether.
1376
1377 Do not do this if both reloads are optional since the result
1378 would be an optional reload which could potentially leave
1379 unresolved address replacements.
1380
1381 It is not sufficient to call transfer_replacements since
1382 choose_reload_regs will remove the replacements for address
1383 reloads of inherited reloads which results in the same
1384 problem. */
1385 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1386 && ! (rld[i].optional && optional))
1387 {
1388 /* We must keep the address reload with the lower operand
1389 number alive. */
1390 if (opnum > rld[i].opnum)
1391 {
1392 remove_address_replacements (in);
1393 in = rld[i].in;
1394 in_reg = rld[i].in_reg;
1395 }
1396 else
1397 remove_address_replacements (rld[i].in);
1398 }
1399 rld[i].in = in;
1400 rld[i].in_reg = in_reg;
1401 }
1402 if (out != 0)
1403 {
1404 rld[i].out = out;
1405 rld[i].out_reg = outloc ? *outloc : 0;
1406 }
1407 if (reg_class_subset_p (class, rld[i].class))
1408 rld[i].class = class;
1409 rld[i].optional &= optional;
1410 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1411 opnum, rld[i].opnum))
1412 rld[i].when_needed = RELOAD_OTHER;
1413 rld[i].opnum = MIN (rld[i].opnum, opnum);
1414 }
1415
1416 /* If the ostensible rtx being reloaded differs from the rtx found
1417 in the location to substitute, this reload is not safe to combine
1418 because we cannot reliably tell whether it appears in the insn. */
1419
1420 if (in != 0 && in != *inloc)
1421 rld[i].nocombine = 1;
1422
1423#if 0
1424 /* This was replaced by changes in find_reloads_address_1 and the new
1425 function inc_for_reload, which go with a new meaning of reload_inc. */
1426
1427 /* If this is an IN/OUT reload in an insn that sets the CC,
1428 it must be for an autoincrement. It doesn't work to store
1429 the incremented value after the insn because that would clobber the CC.
1430 So we must do the increment of the value reloaded from,
1431 increment it, store it back, then decrement again. */
1432 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1433 {
1434 out = 0;
1435 rld[i].out = 0;
1436 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1437 /* If we did not find a nonzero amount-to-increment-by,
1438 that contradicts the belief that IN is being incremented
1439 in an address in this insn. */
1440 if (rld[i].inc == 0)
1441 abort ();
1442 }
1443#endif
1444
1445 /* If we will replace IN and OUT with the reload-reg,
1446 record where they are located so that substitution need
1447 not do a tree walk. */
1448
1449 if (replace_reloads)
1450 {
1451 if (inloc != 0)
1452 {
1453 struct replacement *r = &replacements[n_replacements++];
1454 r->what = i;
1455 r->subreg_loc = in_subreg_loc;
1456 r->where = inloc;
1457 r->mode = inmode;
1458 }
1459 if (outloc != 0 && outloc != inloc)
1460 {
1461 struct replacement *r = &replacements[n_replacements++];
1462 r->what = i;
1463 r->where = outloc;
1464 r->subreg_loc = out_subreg_loc;
1465 r->mode = outmode;
1466 }
1467 }
1468
1469 /* If this reload is just being introduced and it has both
1470 an incoming quantity and an outgoing quantity that are
1471 supposed to be made to match, see if either one of the two
1472 can serve as the place to reload into.
1473
1474 If one of them is acceptable, set rld[i].reg_rtx
1475 to that one. */
1476
1477 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1478 {
1479 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1480 inmode, outmode,
1481 rld[i].class, i,
1482 earlyclobber_operand_p (out));
1483
1484 /* If the outgoing register already contains the same value
1485 as the incoming one, we can dispense with loading it.
1486 The easiest way to tell the caller that is to give a phony
1487 value for the incoming operand (same as outgoing one). */
1488 if (rld[i].reg_rtx == out
1489 && (GET_CODE (in) == REG || CONSTANT_P (in))
1490 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1491 static_reload_reg_p, i, inmode))
1492 rld[i].in = out;
1493 }
1494
1495 /* If this is an input reload and the operand contains a register that
1496 dies in this insn and is used nowhere else, see if it is the right class
1497 to be used for this reload. Use it if so. (This occurs most commonly
1498 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1499 this if it is also an output reload that mentions the register unless
1500 the output is a SUBREG that clobbers an entire register.
1501
1502 Note that the operand might be one of the spill regs, if it is a
1503 pseudo reg and we are in a block where spilling has not taken place.
1504 But if there is no spilling in this block, that is OK.
1505 An explicitly used hard reg cannot be a spill reg. */
1506
1507 if (rld[i].reg_rtx == 0 && in != 0)
1508 {
1509 rtx note;
1510 int regno;
1511 enum machine_mode rel_mode = inmode;
1512
1513 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1514 rel_mode = outmode;
1515
1516 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1517 if (REG_NOTE_KIND (note) == REG_DEAD
1518 && GET_CODE (XEXP (note, 0)) == REG
1519 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1520 && reg_mentioned_p (XEXP (note, 0), in)
1521 && ! refers_to_regno_for_reload_p (regno,
1522 (regno
1523 + HARD_REGNO_NREGS (regno,
1524 rel_mode)),
1525 PATTERN (this_insn), inloc)
1526 /* If this is also an output reload, IN cannot be used as
1527 the reload register if it is set in this insn unless IN
1528 is also OUT. */
1529 && (out == 0 || in == out
1530 || ! hard_reg_set_here_p (regno,
1531 (regno
1532 + HARD_REGNO_NREGS (regno,
1533 rel_mode)),
1534 PATTERN (this_insn)))
1535 /* ??? Why is this code so different from the previous?
1536 Is there any simple coherent way to describe the two together?
1537 What's going on here. */
1538 && (in != out
1539 || (GET_CODE (in) == SUBREG
1540 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1541 / UNITS_PER_WORD)
1542 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1543 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1544 /* Make sure the operand fits in the reg that dies. */
1545 && (GET_MODE_SIZE (rel_mode)
1546 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1547 && HARD_REGNO_MODE_OK (regno, inmode)
1548 && HARD_REGNO_MODE_OK (regno, outmode))
1549 {
1550 unsigned int offs;
1551 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1552 HARD_REGNO_NREGS (regno, outmode));
1553
1554 for (offs = 0; offs < nregs; offs++)
1555 if (fixed_regs[regno + offs]
1556 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1557 regno + offs))
1558 break;
1559
1560 if (offs == nregs
1561 && (! (refers_to_regno_for_reload_p
1562 (regno, (regno + HARD_REGNO_NREGS (regno, inmode)),
1563 in, (rtx *)0))
1564 || can_reload_into (in, regno, inmode)))
1565 {
1566 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1567 break;
1568 }
1569 }
1570 }
1571
1572 if (out)
1573 output_reloadnum = i;
1574
1575 return i;
1576}
1577
1578/* Record an additional place we must replace a value
1579 for which we have already recorded a reload.
1580 RELOADNUM is the value returned by push_reload
1581 when the reload was recorded.
1582 This is used in insn patterns that use match_dup. */
1583
1584static void
1585push_replacement (rtx *loc, int reloadnum, enum machine_mode mode)
1586{
1587 if (replace_reloads)
1588 {
1589 struct replacement *r = &replacements[n_replacements++];
1590 r->what = reloadnum;
1591 r->where = loc;
1592 r->subreg_loc = 0;
1593 r->mode = mode;
1594 }
1595}
1596
1597/* Duplicate any replacement we have recorded to apply at
1598 location ORIG_LOC to also be performed at DUP_LOC.
1599 This is used in insn patterns that use match_dup. */
1600
1601static void
1602dup_replacements (rtx *dup_loc, rtx *orig_loc)
1603{
1604 int i, n = n_replacements;
1605
1606 for (i = 0; i < n; i++)
1607 {
1608 struct replacement *r = &replacements[i];
1609 if (r->where == orig_loc)
1610 push_replacement (dup_loc, r->what, r->mode);
1611 }
1612}
1613\f
1614/* Transfer all replacements that used to be in reload FROM to be in
1615 reload TO. */
1616
1617void
1618transfer_replacements (int to, int from)
1619{
1620 int i;
1621
1622 for (i = 0; i < n_replacements; i++)
1623 if (replacements[i].what == from)
1624 replacements[i].what = to;
1625}
1626\f
1627/* IN_RTX is the value loaded by a reload that we now decided to inherit,
1628 or a subpart of it. If we have any replacements registered for IN_RTX,
1629 cancel the reloads that were supposed to load them.
1630 Return nonzero if we canceled any reloads. */
1631int
1632remove_address_replacements (rtx in_rtx)
1633{
1634 int i, j;
1635 char reload_flags[MAX_RELOADS];
1636 int something_changed = 0;
1637
1638 memset (reload_flags, 0, sizeof reload_flags);
1639 for (i = 0, j = 0; i < n_replacements; i++)
1640 {
1641 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1642 reload_flags[replacements[i].what] |= 1;
1643 else
1644 {
1645 replacements[j++] = replacements[i];
1646 reload_flags[replacements[i].what] |= 2;
1647 }
1648 }
1649 /* Note that the following store must be done before the recursive calls. */
1650 n_replacements = j;
1651
1652 for (i = n_reloads - 1; i >= 0; i--)
1653 {
1654 if (reload_flags[i] == 1)
1655 {
1656 deallocate_reload_reg (i);
1657 remove_address_replacements (rld[i].in);
1658 rld[i].in = 0;
1659 something_changed = 1;
1660 }
1661 }
1662 return something_changed;
1663}
1664\f
1665/* If there is only one output reload, and it is not for an earlyclobber
1666 operand, try to combine it with a (logically unrelated) input reload
1667 to reduce the number of reload registers needed.
1668
1669 This is safe if the input reload does not appear in
1670 the value being output-reloaded, because this implies
1671 it is not needed any more once the original insn completes.
1672
1673 If that doesn't work, see we can use any of the registers that
1674 die in this insn as a reload register. We can if it is of the right
1675 class and does not appear in the value being output-reloaded. */
1676
1677static void
1678combine_reloads (void)
1679{
1680 int i;
1681 int output_reload = -1;
1682 int secondary_out = -1;
1683 rtx note;
1684
1685 /* Find the output reload; return unless there is exactly one
1686 and that one is mandatory. */
1687
1688 for (i = 0; i < n_reloads; i++)
1689 if (rld[i].out != 0)
1690 {
1691 if (output_reload >= 0)
1692 return;
1693 output_reload = i;
1694 }
1695
1696 if (output_reload < 0 || rld[output_reload].optional)
1697 return;
1698
1699 /* An input-output reload isn't combinable. */
1700
1701 if (rld[output_reload].in != 0)
1702 return;
1703
1704 /* If this reload is for an earlyclobber operand, we can't do anything. */
1705 if (earlyclobber_operand_p (rld[output_reload].out))
1706 return;
1707
1708 /* If there is a reload for part of the address of this operand, we would
1709 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1710 its life to the point where doing this combine would not lower the
1711 number of spill registers needed. */
1712 for (i = 0; i < n_reloads; i++)
1713 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1714 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1715 && rld[i].opnum == rld[output_reload].opnum)
1716 return;
1717
1718 /* Check each input reload; can we combine it? */
1719
1720 for (i = 0; i < n_reloads; i++)
1721 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1722 /* Life span of this reload must not extend past main insn. */
1723 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1724 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1725 && rld[i].when_needed != RELOAD_OTHER
1726 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1727 == CLASS_MAX_NREGS (rld[output_reload].class,
1728 rld[output_reload].outmode))
1729 && rld[i].inc == 0
1730 && rld[i].reg_rtx == 0
1731#ifdef SECONDARY_MEMORY_NEEDED
1732 /* Don't combine two reloads with different secondary
1733 memory locations. */
1734 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1735 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1736 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1737 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1738#endif
1739 && (SMALL_REGISTER_CLASSES
1740 ? (rld[i].class == rld[output_reload].class)
1741 : (reg_class_subset_p (rld[i].class,
1742 rld[output_reload].class)
1743 || reg_class_subset_p (rld[output_reload].class,
1744 rld[i].class)))
1745 && (MATCHES (rld[i].in, rld[output_reload].out)
1746 /* Args reversed because the first arg seems to be
1747 the one that we imagine being modified
1748 while the second is the one that might be affected. */
1749 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1750 rld[i].in)
1751 /* However, if the input is a register that appears inside
1752 the output, then we also can't share.
1753 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1754 If the same reload reg is used for both reg 69 and the
1755 result to be stored in memory, then that result
1756 will clobber the address of the memory ref. */
1757 && ! (GET_CODE (rld[i].in) == REG
1758 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1759 rld[output_reload].out))))
1760 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1761 rld[i].when_needed != RELOAD_FOR_INPUT)
1762 && (reg_class_size[(int) rld[i].class]
1763 || SMALL_REGISTER_CLASSES)
1764 /* We will allow making things slightly worse by combining an
1765 input and an output, but no worse than that. */
1766 && (rld[i].when_needed == RELOAD_FOR_INPUT
1767 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1768 {
1769 int j;
1770
1771 /* We have found a reload to combine with! */
1772 rld[i].out = rld[output_reload].out;
1773 rld[i].out_reg = rld[output_reload].out_reg;
1774 rld[i].outmode = rld[output_reload].outmode;
1775 /* Mark the old output reload as inoperative. */
1776 rld[output_reload].out = 0;
1777 /* The combined reload is needed for the entire insn. */
1778 rld[i].when_needed = RELOAD_OTHER;
1779 /* If the output reload had a secondary reload, copy it. */
1780 if (rld[output_reload].secondary_out_reload != -1)
1781 {
1782 rld[i].secondary_out_reload
1783 = rld[output_reload].secondary_out_reload;
1784 rld[i].secondary_out_icode
1785 = rld[output_reload].secondary_out_icode;
1786 }
1787
1788#ifdef SECONDARY_MEMORY_NEEDED
1789 /* Copy any secondary MEM. */
1790 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1791 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1792 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1793#endif
1794 /* If required, minimize the register class. */
1795 if (reg_class_subset_p (rld[output_reload].class,
1796 rld[i].class))
1797 rld[i].class = rld[output_reload].class;
1798
1799 /* Transfer all replacements from the old reload to the combined. */
1800 for (j = 0; j < n_replacements; j++)
1801 if (replacements[j].what == output_reload)
1802 replacements[j].what = i;
1803
1804 return;
1805 }
1806
1807 /* If this insn has only one operand that is modified or written (assumed
1808 to be the first), it must be the one corresponding to this reload. It
1809 is safe to use anything that dies in this insn for that output provided
1810 that it does not occur in the output (we already know it isn't an
1811 earlyclobber. If this is an asm insn, give up. */
1812
1813 if (INSN_CODE (this_insn) == -1)
1814 return;
1815
1816 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1817 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1818 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1819 return;
1820
1821 /* See if some hard register that dies in this insn and is not used in
1822 the output is the right class. Only works if the register we pick
1823 up can fully hold our output reload. */
1824 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1825 if (REG_NOTE_KIND (note) == REG_DEAD
1826 && GET_CODE (XEXP (note, 0)) == REG
1827 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1828 rld[output_reload].out)
1829 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1830 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1831 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1832 REGNO (XEXP (note, 0)))
1833 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1834 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1835 /* Ensure that a secondary or tertiary reload for this output
1836 won't want this register. */
1837 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1838 || (! (TEST_HARD_REG_BIT
1839 (reg_class_contents[(int) rld[secondary_out].class],
1840 REGNO (XEXP (note, 0))))
1841 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1842 || ! (TEST_HARD_REG_BIT
1843 (reg_class_contents[(int) rld[secondary_out].class],
1844 REGNO (XEXP (note, 0)))))))
1845 && ! fixed_regs[REGNO (XEXP (note, 0))])
1846 {
1847 rld[output_reload].reg_rtx
1848 = gen_rtx_REG (rld[output_reload].outmode,
1849 REGNO (XEXP (note, 0)));
1850 return;
1851 }
1852}
1853\f
1854/* Try to find a reload register for an in-out reload (expressions IN and OUT).
1855 See if one of IN and OUT is a register that may be used;
1856 this is desirable since a spill-register won't be needed.
1857 If so, return the register rtx that proves acceptable.
1858
1859 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1860 CLASS is the register class required for the reload.
1861
1862 If FOR_REAL is >= 0, it is the number of the reload,
1863 and in some cases when it can be discovered that OUT doesn't need
1864 to be computed, clear out rld[FOR_REAL].out.
1865
1866 If FOR_REAL is -1, this should not be done, because this call
1867 is just to see if a register can be found, not to find and install it.
1868
1869 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1870 puts an additional constraint on being able to use IN for OUT since
1871 IN must not appear elsewhere in the insn (it is assumed that IN itself
1872 is safe from the earlyclobber). */
1873
1874static rtx
1875find_dummy_reload (rtx real_in, rtx real_out, rtx *inloc, rtx *outloc,
1876 enum machine_mode inmode, enum machine_mode outmode,
1877 enum reg_class class, int for_real, int earlyclobber)
1878{
1879 rtx in = real_in;
1880 rtx out = real_out;
1881 int in_offset = 0;
1882 int out_offset = 0;
1883 rtx value = 0;
1884
1885 /* If operands exceed a word, we can't use either of them
1886 unless they have the same size. */
1887 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1888 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1889 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1890 return 0;
1891
1892 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1893 respectively refers to a hard register. */
1894
1895 /* Find the inside of any subregs. */
1896 while (GET_CODE (out) == SUBREG)
1897 {
1898 if (GET_CODE (SUBREG_REG (out)) == REG
1899 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1900 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1901 GET_MODE (SUBREG_REG (out)),
1902 SUBREG_BYTE (out),
1903 GET_MODE (out));
1904 out = SUBREG_REG (out);
1905 }
1906 while (GET_CODE (in) == SUBREG)
1907 {
1908 if (GET_CODE (SUBREG_REG (in)) == REG
1909 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1910 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1911 GET_MODE (SUBREG_REG (in)),
1912 SUBREG_BYTE (in),
1913 GET_MODE (in));
1914 in = SUBREG_REG (in);
1915 }
1916
1917 /* Narrow down the reg class, the same way push_reload will;
1918 otherwise we might find a dummy now, but push_reload won't. */
1919 class = PREFERRED_RELOAD_CLASS (in, class);
1920
1921 /* See if OUT will do. */
1922 if (GET_CODE (out) == REG
1923 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1924 {
1925 unsigned int regno = REGNO (out) + out_offset;
1926 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1927 rtx saved_rtx;
1928
1929 /* When we consider whether the insn uses OUT,
1930 ignore references within IN. They don't prevent us
1931 from copying IN into OUT, because those refs would
1932 move into the insn that reloads IN.
1933
1934 However, we only ignore IN in its role as this reload.
1935 If the insn uses IN elsewhere and it contains OUT,
1936 that counts. We can't be sure it's the "same" operand
1937 so it might not go through this reload. */
1938 saved_rtx = *inloc;
1939 *inloc = const0_rtx;
1940
1941 if (regno < FIRST_PSEUDO_REGISTER
1942 && HARD_REGNO_MODE_OK (regno, outmode)
1943 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1944 PATTERN (this_insn), outloc))
1945 {
1946 unsigned int i;
1947
1948 for (i = 0; i < nwords; i++)
1949 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1950 regno + i))
1951 break;
1952
1953 if (i == nwords)
1954 {
1955 if (GET_CODE (real_out) == REG)
1956 value = real_out;
1957 else
1958 value = gen_rtx_REG (outmode, regno);
1959 }
1960 }
1961
1962 *inloc = saved_rtx;
1963 }
1964
1965 /* Consider using IN if OUT was not acceptable
1966 or if OUT dies in this insn (like the quotient in a divmod insn).
1967 We can't use IN unless it is dies in this insn,
1968 which means we must know accurately which hard regs are live.
1969 Also, the result can't go in IN if IN is used within OUT,
1970 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1971 if (hard_regs_live_known
1972 && GET_CODE (in) == REG
1973 && REGNO (in) < FIRST_PSEUDO_REGISTER
1974 && (value == 0
1975 || find_reg_note (this_insn, REG_UNUSED, real_out))
1976 && find_reg_note (this_insn, REG_DEAD, real_in)
1977 && !fixed_regs[REGNO (in)]
1978 && HARD_REGNO_MODE_OK (REGNO (in),
1979 /* The only case where out and real_out might
1980 have different modes is where real_out
1981 is a subreg, and in that case, out
1982 has a real mode. */
1983 (GET_MODE (out) != VOIDmode
1984 ? GET_MODE (out) : outmode)))
1985 {
1986 unsigned int regno = REGNO (in) + in_offset;
1987 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1988
1989 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1990 && ! hard_reg_set_here_p (regno, regno + nwords,
1991 PATTERN (this_insn))
1992 && (! earlyclobber
1993 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1994 PATTERN (this_insn), inloc)))
1995 {
1996 unsigned int i;
1997
1998 for (i = 0; i < nwords; i++)
1999 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
2000 regno + i))
2001 break;
2002
2003 if (i == nwords)
2004 {
2005 /* If we were going to use OUT as the reload reg
2006 and changed our mind, it means OUT is a dummy that
2007 dies here. So don't bother copying value to it. */
2008 if (for_real >= 0 && value == real_out)
2009 rld[for_real].out = 0;
2010 if (GET_CODE (real_in) == REG)
2011 value = real_in;
2012 else
2013 value = gen_rtx_REG (inmode, regno);
2014 }
2015 }
2016 }
2017
2018 return value;
2019}
2020\f
2021/* This page contains subroutines used mainly for determining
2022 whether the IN or an OUT of a reload can serve as the
2023 reload register. */
2024
2025/* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2026
2027int
2028earlyclobber_operand_p (rtx x)
2029{
2030 int i;
2031
2032 for (i = 0; i < n_earlyclobbers; i++)
2033 if (reload_earlyclobbers[i] == x)
2034 return 1;
2035
2036 return 0;
2037}
2038
2039/* Return 1 if expression X alters a hard reg in the range
2040 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2041 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2042 X should be the body of an instruction. */
2043
2044static int
2045hard_reg_set_here_p (unsigned int beg_regno, unsigned int end_regno, rtx x)
2046{
2047 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2048 {
2049 rtx op0 = SET_DEST (x);
2050
2051 while (GET_CODE (op0) == SUBREG)
2052 op0 = SUBREG_REG (op0);
2053 if (GET_CODE (op0) == REG)
2054 {
2055 unsigned int r = REGNO (op0);
2056
2057 /* See if this reg overlaps range under consideration. */
2058 if (r < end_regno
2059 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2060 return 1;
2061 }
2062 }
2063 else if (GET_CODE (x) == PARALLEL)
2064 {
2065 int i = XVECLEN (x, 0) - 1;
2066
2067 for (; i >= 0; i--)
2068 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2069 return 1;
2070 }
2071
2072 return 0;
2073}
2074
2075/* Return 1 if ADDR is a valid memory address for mode MODE,
2076 and check that each pseudo reg has the proper kind of
2077 hard reg. */
2078
2079int
2080strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx addr)
2081{
2082 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2083 return 0;
2084
2085 win:
2086 return 1;
2087}
2088\f
2089/* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2090 if they are the same hard reg, and has special hacks for
2091 autoincrement and autodecrement.
2092 This is specifically intended for find_reloads to use
2093 in determining whether two operands match.
2094 X is the operand whose number is the lower of the two.
2095
2096 The value is 2 if Y contains a pre-increment that matches
2097 a non-incrementing address in X. */
2098
2099/* ??? To be completely correct, we should arrange to pass
2100 for X the output operand and for Y the input operand.
2101 For now, we assume that the output operand has the lower number
2102 because that is natural in (SET output (... input ...)). */
2103
2104int
2105operands_match_p (rtx x, rtx y)
2106{
2107 int i;
2108 RTX_CODE code = GET_CODE (x);
2109 const char *fmt;
2110 int success_2;
2111
2112 if (x == y)
2113 return 1;
2114 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2115 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2116 && GET_CODE (SUBREG_REG (y)) == REG)))
2117 {
2118 int j;
2119
2120 if (code == SUBREG)
2121 {
2122 i = REGNO (SUBREG_REG (x));
2123 if (i >= FIRST_PSEUDO_REGISTER)
2124 goto slow;
2125 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2126 GET_MODE (SUBREG_REG (x)),
2127 SUBREG_BYTE (x),
2128 GET_MODE (x));
2129 }
2130 else
2131 i = REGNO (x);
2132
2133 if (GET_CODE (y) == SUBREG)
2134 {
2135 j = REGNO (SUBREG_REG (y));
2136 if (j >= FIRST_PSEUDO_REGISTER)
2137 goto slow;
2138 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2139 GET_MODE (SUBREG_REG (y)),
2140 SUBREG_BYTE (y),
2141 GET_MODE (y));
2142 }
2143 else
2144 j = REGNO (y);
2145
2146 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1c1138ce
JS
2147 multiple hard register group of scalar integer registers, so that
2148 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2149 register. */
003757ed 2150 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
1c1138ce 2151 && SCALAR_INT_MODE_P (GET_MODE (x))
003757ed
MD
2152 && i < FIRST_PSEUDO_REGISTER)
2153 i += HARD_REGNO_NREGS (i, GET_MODE (x)) - 1;
2154 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
1c1138ce 2155 && SCALAR_INT_MODE_P (GET_MODE (y))
003757ed
MD
2156 && j < FIRST_PSEUDO_REGISTER)
2157 j += HARD_REGNO_NREGS (j, GET_MODE (y)) - 1;
2158
2159 return i == j;
2160 }
2161 /* If two operands must match, because they are really a single
2162 operand of an assembler insn, then two postincrements are invalid
2163 because the assembler insn would increment only once.
2164 On the other hand, a postincrement matches ordinary indexing
2165 if the postincrement is the output operand. */
2166 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2167 return operands_match_p (XEXP (x, 0), y);
2168 /* Two preincrements are invalid
2169 because the assembler insn would increment only once.
2170 On the other hand, a preincrement matches ordinary indexing
2171 if the preincrement is the input operand.
2172 In this case, return 2, since some callers need to do special
2173 things when this happens. */
2174 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2175 || GET_CODE (y) == PRE_MODIFY)
2176 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2177
2178 slow:
2179
2180 /* Now we have disposed of all the cases
2181 in which different rtx codes can match. */
2182 if (code != GET_CODE (y))
2183 return 0;
2184 if (code == LABEL_REF)
2185 return XEXP (x, 0) == XEXP (y, 0);
2186 if (code == SYMBOL_REF)
2187 return XSTR (x, 0) == XSTR (y, 0);
2188
2189 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2190
2191 if (GET_MODE (x) != GET_MODE (y))
2192 return 0;
2193
2194 /* Compare the elements. If any pair of corresponding elements
2195 fail to match, return 0 for the whole things. */
2196
2197 success_2 = 0;
2198 fmt = GET_RTX_FORMAT (code);
2199 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2200 {
2201 int val, j;
2202 switch (fmt[i])
2203 {
2204 case 'w':
2205 if (XWINT (x, i) != XWINT (y, i))
2206 return 0;
2207 break;
2208
2209 case 'i':
2210 if (XINT (x, i) != XINT (y, i))
2211 return 0;
2212 break;
2213
2214 case 'e':
2215 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2216 if (val == 0)
2217 return 0;
2218 /* If any subexpression returns 2,
2219 we should return 2 if we are successful. */
2220 if (val == 2)
2221 success_2 = 1;
2222 break;
2223
2224 case '0':
2225 break;
2226
2227 case 'E':
2228 if (XVECLEN (x, i) != XVECLEN (y, i))
2229 return 0;
2230 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2231 {
2232 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2233 if (val == 0)
2234 return 0;
2235 if (val == 2)
2236 success_2 = 1;
2237 }
2238 break;
2239
2240 /* It is believed that rtx's at this level will never
2241 contain anything but integers and other rtx's,
2242 except for within LABEL_REFs and SYMBOL_REFs. */
2243 default:
2244 abort ();
2245 }
2246 }
2247 return 1 + success_2;
2248}
2249\f
2250/* Describe the range of registers or memory referenced by X.
2251 If X is a register, set REG_FLAG and put the first register
2252 number into START and the last plus one into END.
2253 If X is a memory reference, put a base address into BASE
2254 and a range of integer offsets into START and END.
2255 If X is pushing on the stack, we can assume it causes no trouble,
2256 so we set the SAFE field. */
2257
2258static struct decomposition
2259decompose (rtx x)
2260{
2261 struct decomposition val;
2262 int all_const = 0;
2263
2264 val.reg_flag = 0;
2265 val.safe = 0;
2266 val.base = 0;
2267 if (GET_CODE (x) == MEM)
2268 {
2269 rtx base = NULL_RTX, offset = 0;
2270 rtx addr = XEXP (x, 0);
2271
2272 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2273 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2274 {
2275 val.base = XEXP (addr, 0);
2276 val.start = -GET_MODE_SIZE (GET_MODE (x));
2277 val.end = GET_MODE_SIZE (GET_MODE (x));
2278 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2279 return val;
2280 }
2281
2282 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2283 {
2284 if (GET_CODE (XEXP (addr, 1)) == PLUS
2285 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2286 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2287 {
2288 val.base = XEXP (addr, 0);
2289 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2290 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2291 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2292 return val;
2293 }
2294 }
2295
2296 if (GET_CODE (addr) == CONST)
2297 {
2298 addr = XEXP (addr, 0);
2299 all_const = 1;
2300 }
2301 if (GET_CODE (addr) == PLUS)
2302 {
2303 if (CONSTANT_P (XEXP (addr, 0)))
2304 {
2305 base = XEXP (addr, 1);
2306 offset = XEXP (addr, 0);
2307 }
2308 else if (CONSTANT_P (XEXP (addr, 1)))
2309 {
2310 base = XEXP (addr, 0);
2311 offset = XEXP (addr, 1);
2312 }
2313 }
2314
2315 if (offset == 0)
2316 {
2317 base = addr;
2318 offset = const0_rtx;
2319 }
2320 if (GET_CODE (offset) == CONST)
2321 offset = XEXP (offset, 0);
2322 if (GET_CODE (offset) == PLUS)
2323 {
2324 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2325 {
2326 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2327 offset = XEXP (offset, 0);
2328 }
2329 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2330 {
2331 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2332 offset = XEXP (offset, 1);
2333 }
2334 else
2335 {
2336 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2337 offset = const0_rtx;
2338 }
2339 }
2340 else if (GET_CODE (offset) != CONST_INT)
2341 {
2342 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2343 offset = const0_rtx;
2344 }
2345
2346 if (all_const && GET_CODE (base) == PLUS)
2347 base = gen_rtx_CONST (GET_MODE (base), base);
2348
2349 if (GET_CODE (offset) != CONST_INT)
2350 abort ();
2351
2352 val.start = INTVAL (offset);
2353 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2354 val.base = base;
2355 return val;
2356 }
2357 else if (GET_CODE (x) == REG)
2358 {
2359 val.reg_flag = 1;
2360 val.start = true_regnum (x);
2361 if (val.start < 0)
2362 {
2363 /* A pseudo with no hard reg. */
2364 val.start = REGNO (x);
2365 val.end = val.start + 1;
2366 }
2367 else
2368 /* A hard reg. */
2369 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2370 }
2371 else if (GET_CODE (x) == SUBREG)
2372 {
2373 if (GET_CODE (SUBREG_REG (x)) != REG)
2374 /* This could be more precise, but it's good enough. */
2375 return decompose (SUBREG_REG (x));
2376 val.reg_flag = 1;
2377 val.start = true_regnum (x);
2378 if (val.start < 0)
2379 return decompose (SUBREG_REG (x));
2380 else
2381 /* A hard reg. */
2382 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2383 }
2384 else if (CONSTANT_P (x)
2385 /* This hasn't been assigned yet, so it can't conflict yet. */
2386 || GET_CODE (x) == SCRATCH)
2387 val.safe = 1;
2388 else
2389 abort ();
2390 return val;
2391}
2392
2393/* Return 1 if altering Y will not modify the value of X.
2394 Y is also described by YDATA, which should be decompose (Y). */
2395
2396static int
2397immune_p (rtx x, rtx y, struct decomposition ydata)
2398{
2399 struct decomposition xdata;
2400
2401 if (ydata.reg_flag)
2402 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2403 if (ydata.safe)
2404 return 1;
2405
2406 if (GET_CODE (y) != MEM)
2407 abort ();
2408 /* If Y is memory and X is not, Y can't affect X. */
2409 if (GET_CODE (x) != MEM)
2410 return 1;
2411
2412 xdata = decompose (x);
2413
2414 if (! rtx_equal_p (xdata.base, ydata.base))
2415 {
2416 /* If bases are distinct symbolic constants, there is no overlap. */
2417 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2418 return 1;
2419 /* Constants and stack slots never overlap. */
2420 if (CONSTANT_P (xdata.base)
2421 && (ydata.base == frame_pointer_rtx
2422 || ydata.base == hard_frame_pointer_rtx
2423 || ydata.base == stack_pointer_rtx))
2424 return 1;
2425 if (CONSTANT_P (ydata.base)
2426 && (xdata.base == frame_pointer_rtx
2427 || xdata.base == hard_frame_pointer_rtx
2428 || xdata.base == stack_pointer_rtx))
2429 return 1;
2430 /* If either base is variable, we don't know anything. */
2431 return 0;
2432 }
2433
2434 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2435}
2436
2437/* Similar, but calls decompose. */
2438
2439int
2440safe_from_earlyclobber (rtx op, rtx clobber)
2441{
2442 struct decomposition early_data;
2443
2444 early_data = decompose (clobber);
2445 return immune_p (op, clobber, early_data);
2446}
2447\f
2448/* Main entry point of this file: search the body of INSN
2449 for values that need reloading and record them with push_reload.
2450 REPLACE nonzero means record also where the values occur
2451 so that subst_reloads can be used.
2452
2453 IND_LEVELS says how many levels of indirection are supported by this
2454 machine; a value of zero means that a memory reference is not a valid
2455 memory address.
2456
2457 LIVE_KNOWN says we have valid information about which hard
2458 regs are live at each point in the program; this is true when
2459 we are called from global_alloc but false when stupid register
2460 allocation has been done.
2461
2462 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2463 which is nonnegative if the reg has been commandeered for reloading into.
2464 It is copied into STATIC_RELOAD_REG_P and referenced from there
2465 by various subroutines.
2466
2467 Return TRUE if some operands need to be changed, because of swapping
2468 commutative operands, reg_equiv_address substitution, or whatever. */
2469
2470int
2471find_reloads (rtx insn, int replace, int ind_levels, int live_known,
2472 short *reload_reg_p)
2473{
2474 int insn_code_number;
2475 int i, j;
2476 int noperands;
2477 /* These start out as the constraints for the insn
2478 and they are chewed up as we consider alternatives. */
2479 char *constraints[MAX_RECOG_OPERANDS];
2480 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2481 a register. */
2482 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2483 char pref_or_nothing[MAX_RECOG_OPERANDS];
2484 /* Nonzero for a MEM operand whose entire address needs a reload. */
2485 int address_reloaded[MAX_RECOG_OPERANDS];
2486 /* Nonzero for an address operand that needs to be completely reloaded. */
2487 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2488 /* Value of enum reload_type to use for operand. */
2489 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2490 /* Value of enum reload_type to use within address of operand. */
2491 enum reload_type address_type[MAX_RECOG_OPERANDS];
2492 /* Save the usage of each operand. */
2493 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2494 int no_input_reloads = 0, no_output_reloads = 0;
2495 int n_alternatives;
2496 int this_alternative[MAX_RECOG_OPERANDS];
2497 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2498 char this_alternative_win[MAX_RECOG_OPERANDS];
2499 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2500 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2501 int this_alternative_matches[MAX_RECOG_OPERANDS];
2502 int swapped;
2503 int goal_alternative[MAX_RECOG_OPERANDS];
2504 int this_alternative_number;
2505 int goal_alternative_number = 0;
2506 int operand_reloadnum[MAX_RECOG_OPERANDS];
2507 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2508 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2509 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2510 char goal_alternative_win[MAX_RECOG_OPERANDS];
2511 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2512 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2513 int goal_alternative_swapped;
2514 int best;
2515 int commutative;
2516 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2517 rtx substed_operand[MAX_RECOG_OPERANDS];
2518 rtx body = PATTERN (insn);
2519 rtx set = single_set (insn);
2520 int goal_earlyclobber = 0, this_earlyclobber;
2521 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2522 int retval = 0;
2523
2524 this_insn = insn;
2525 n_reloads = 0;
2526 n_replacements = 0;
2527 n_earlyclobbers = 0;
2528 replace_reloads = replace;
2529 hard_regs_live_known = live_known;
2530 static_reload_reg_p = reload_reg_p;
2531
2532 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2533 neither are insns that SET cc0. Insns that use CC0 are not allowed
2534 to have any input reloads. */
2535 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2536 no_output_reloads = 1;
2537
2538#ifdef HAVE_cc0
2539 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2540 no_input_reloads = 1;
2541 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2542 no_output_reloads = 1;
2543#endif
2544
2545#ifdef SECONDARY_MEMORY_NEEDED
2546 /* The eliminated forms of any secondary memory locations are per-insn, so
2547 clear them out here. */
2548
2549 if (secondary_memlocs_elim_used)
2550 {
2551 memset (secondary_memlocs_elim, 0,
2552 sizeof (secondary_memlocs_elim[0]) * secondary_memlocs_elim_used);
2553 secondary_memlocs_elim_used = 0;
2554 }
2555#endif
2556
2557 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2558 is cheap to move between them. If it is not, there may not be an insn
2559 to do the copy, so we may need a reload. */
2560 if (GET_CODE (body) == SET
2561 && GET_CODE (SET_DEST (body)) == REG
2562 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2563 && GET_CODE (SET_SRC (body)) == REG
2564 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2565 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2566 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2567 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2568 return 0;
2569
2570 extract_insn (insn);
2571
2572 noperands = reload_n_operands = recog_data.n_operands;
2573 n_alternatives = recog_data.n_alternatives;
2574
2575 /* Just return "no reloads" if insn has no operands with constraints. */
2576 if (noperands == 0 || n_alternatives == 0)
2577 return 0;
2578
2579 insn_code_number = INSN_CODE (insn);
2580 this_insn_is_asm = insn_code_number < 0;
2581
2582 memcpy (operand_mode, recog_data.operand_mode,
2583 noperands * sizeof (enum machine_mode));
2584 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2585
2586 commutative = -1;
2587
2588 /* If we will need to know, later, whether some pair of operands
2589 are the same, we must compare them now and save the result.
2590 Reloading the base and index registers will clobber them
2591 and afterward they will fail to match. */
2592
2593 for (i = 0; i < noperands; i++)
2594 {
2595 char *p;
2596 int c;
2597
2598 substed_operand[i] = recog_data.operand[i];
2599 p = constraints[i];
2600
2601 modified[i] = RELOAD_READ;
2602
2603 /* Scan this operand's constraint to see if it is an output operand,
2604 an in-out operand, is commutative, or should match another. */
2605
2606 while ((c = *p))
2607 {
2608 p += CONSTRAINT_LEN (c, p);
2609 if (c == '=')
2610 modified[i] = RELOAD_WRITE;
2611 else if (c == '+')
2612 modified[i] = RELOAD_READ_WRITE;
2613 else if (c == '%')
2614 {
2615 /* The last operand should not be marked commutative. */
2616 if (i == noperands - 1)
2617 abort ();
2618
2619 /* We currently only support one commutative pair of
2620 operands. Some existing asm code currently uses more
2621 than one pair. Previously, that would usually work,
2622 but sometimes it would crash the compiler. We
2623 continue supporting that case as well as we can by
2624 silently ignoring all but the first pair. In the
2625 future we may handle it correctly. */
2626 if (commutative < 0)
2627 commutative = i;
2628 else if (!this_insn_is_asm)
2629 abort ();
2630 }
2631 else if (ISDIGIT (c))
2632 {
2633 c = strtoul (p - 1, &p, 10);
2634
2635 operands_match[c][i]
2636 = operands_match_p (recog_data.operand[c],
2637 recog_data.operand[i]);
2638
2639 /* An operand may not match itself. */
2640 if (c == i)
2641 abort ();
2642
2643 /* If C can be commuted with C+1, and C might need to match I,
2644 then C+1 might also need to match I. */
2645 if (commutative >= 0)
2646 {
2647 if (c == commutative || c == commutative + 1)
2648 {
2649 int other = c + (c == commutative ? 1 : -1);
2650 operands_match[other][i]
2651 = operands_match_p (recog_data.operand[other],
2652 recog_data.operand[i]);
2653 }
2654 if (i == commutative || i == commutative + 1)
2655 {
2656 int other = i + (i == commutative ? 1 : -1);
2657 operands_match[c][other]
2658 = operands_match_p (recog_data.operand[c],
2659 recog_data.operand[other]);
2660 }
2661 /* Note that C is supposed to be less than I.
2662 No need to consider altering both C and I because in
2663 that case we would alter one into the other. */
2664 }
2665 }
2666 }
2667 }
2668
2669 /* Examine each operand that is a memory reference or memory address
2670 and reload parts of the addresses into index registers.
2671 Also here any references to pseudo regs that didn't get hard regs
2672 but are equivalent to constants get replaced in the insn itself
2673 with those constants. Nobody will ever see them again.
2674
2675 Finally, set up the preferred classes of each operand. */
2676
2677 for (i = 0; i < noperands; i++)
2678 {
2679 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2680
2681 address_reloaded[i] = 0;
2682 address_operand_reloaded[i] = 0;
2683 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2684 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2685 : RELOAD_OTHER);
2686 address_type[i]
2687 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2688 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2689 : RELOAD_OTHER);
2690
2691 if (*constraints[i] == 0)
2692 /* Ignore things like match_operator operands. */
2693 ;
2694 else if (constraints[i][0] == 'p'
2695 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0], constraints[i]))
2696 {
2697 address_operand_reloaded[i]
2698 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2699 recog_data.operand[i],
2700 recog_data.operand_loc[i],
2701 i, operand_type[i], ind_levels, insn);
2702
2703 /* If we now have a simple operand where we used to have a
2704 PLUS or MULT, re-recognize and try again. */
2705 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2706 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2707 && (GET_CODE (recog_data.operand[i]) == MULT
2708 || GET_CODE (recog_data.operand[i]) == PLUS))
2709 {
2710 INSN_CODE (insn) = -1;
2711 retval = find_reloads (insn, replace, ind_levels, live_known,
2712 reload_reg_p);
2713 return retval;
2714 }
2715
2716 recog_data.operand[i] = *recog_data.operand_loc[i];
2717 substed_operand[i] = recog_data.operand[i];
2718
2719 /* Address operands are reloaded in their existing mode,
2720 no matter what is specified in the machine description. */
2721 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2722 }
2723 else if (code == MEM)
2724 {
2725 address_reloaded[i]
2726 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2727 recog_data.operand_loc[i],
2728 XEXP (recog_data.operand[i], 0),
2729 &XEXP (recog_data.operand[i], 0),
2730 i, address_type[i], ind_levels, insn);
2731 recog_data.operand[i] = *recog_data.operand_loc[i];
2732 substed_operand[i] = recog_data.operand[i];
2733 }
2734 else if (code == SUBREG)
2735 {
2736 rtx reg = SUBREG_REG (recog_data.operand[i]);
2737 rtx op
2738 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2739 ind_levels,
2740 set != 0
2741 && &SET_DEST (set) == recog_data.operand_loc[i],
2742 insn,
2743 &address_reloaded[i]);
2744
2745 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2746 that didn't get a hard register, emit a USE with a REG_EQUAL
2747 note in front so that we might inherit a previous, possibly
2748 wider reload. */
2749
2750 if (replace
2751 && GET_CODE (op) == MEM
2752 && GET_CODE (reg) == REG
2753 && (GET_MODE_SIZE (GET_MODE (reg))
2754 >= GET_MODE_SIZE (GET_MODE (op))))
2755 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2756 insn),
2757 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2758
2759 substed_operand[i] = recog_data.operand[i] = op;
2760 }
2761 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2762 /* We can get a PLUS as an "operand" as a result of register
2763 elimination. See eliminate_regs and gen_reload. We handle
2764 a unary operator by reloading the operand. */
2765 substed_operand[i] = recog_data.operand[i]
2766 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2767 ind_levels, 0, insn,
2768 &address_reloaded[i]);
2769 else if (code == REG)
2770 {
2771 /* This is equivalent to calling find_reloads_toplev.
2772 The code is duplicated for speed.
2773 When we find a pseudo always equivalent to a constant,
2774 we replace it by the constant. We must be sure, however,
2775 that we don't try to replace it in the insn in which it
2776 is being set. */
2777 int regno = REGNO (recog_data.operand[i]);
2778 if (reg_equiv_constant[regno] != 0
2779 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2780 {
2781 /* Record the existing mode so that the check if constants are
2782 allowed will work when operand_mode isn't specified. */
2783
2784 if (operand_mode[i] == VOIDmode)
2785 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2786
2787 substed_operand[i] = recog_data.operand[i]
2788 = reg_equiv_constant[regno];
2789 }
2790 if (reg_equiv_memory_loc[regno] != 0
2791 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2792 /* We need not give a valid is_set_dest argument since the case
2793 of a constant equivalence was checked above. */
2794 substed_operand[i] = recog_data.operand[i]
2795 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2796 ind_levels, 0, insn,
2797 &address_reloaded[i]);
2798 }
2799 /* If the operand is still a register (we didn't replace it with an
2800 equivalent), get the preferred class to reload it into. */
2801 code = GET_CODE (recog_data.operand[i]);
2802 preferred_class[i]
2803 = ((code == REG && REGNO (recog_data.operand[i])
2804 >= FIRST_PSEUDO_REGISTER)
2805 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2806 : NO_REGS);
2807 pref_or_nothing[i]
2808 = (code == REG
2809 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2810 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2811 }
2812
2813 /* If this is simply a copy from operand 1 to operand 0, merge the
2814 preferred classes for the operands. */
2815 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2816 && recog_data.operand[1] == SET_SRC (set))
2817 {
2818 preferred_class[0] = preferred_class[1]
2819 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2820 pref_or_nothing[0] |= pref_or_nothing[1];
2821 pref_or_nothing[1] |= pref_or_nothing[0];
2822 }
2823
2824 /* Now see what we need for pseudo-regs that didn't get hard regs
2825 or got the wrong kind of hard reg. For this, we must consider
2826 all the operands together against the register constraints. */
2827
2828 best = MAX_RECOG_OPERANDS * 2 + 600;
2829
2830 swapped = 0;
2831 goal_alternative_swapped = 0;
2832 try_swapped:
2833
2834 /* The constraints are made of several alternatives.
2835 Each operand's constraint looks like foo,bar,... with commas
2836 separating the alternatives. The first alternatives for all
2837 operands go together, the second alternatives go together, etc.
2838
2839 First loop over alternatives. */
2840
2841 for (this_alternative_number = 0;
2842 this_alternative_number < n_alternatives;
2843 this_alternative_number++)
2844 {
2845 /* Loop over operands for one constraint alternative. */
2846 /* LOSERS counts those that don't fit this alternative
2847 and would require loading. */
2848 int losers = 0;
2849 /* BAD is set to 1 if it some operand can't fit this alternative
2850 even after reloading. */
2851 int bad = 0;
2852 /* REJECT is a count of how undesirable this alternative says it is
2853 if any reloading is required. If the alternative matches exactly
2854 then REJECT is ignored, but otherwise it gets this much
2855 counted against it in addition to the reloading needed. Each
2856 ? counts three times here since we want the disparaging caused by
2857 a bad register class to only count 1/3 as much. */
2858 int reject = 0;
2859
2860 this_earlyclobber = 0;
2861
2862 for (i = 0; i < noperands; i++)
2863 {
2864 char *p = constraints[i];
2865 char *end;
2866 int len;
2867 int win = 0;
2868 int did_match = 0;
2869 /* 0 => this operand can be reloaded somehow for this alternative. */
2870 int badop = 1;
2871 /* 0 => this operand can be reloaded if the alternative allows regs. */
2872 int winreg = 0;
2873 int c;
2874 int m;
2875 rtx operand = recog_data.operand[i];
2876 int offset = 0;
2877 /* Nonzero means this is a MEM that must be reloaded into a reg
2878 regardless of what the constraint says. */
2879 int force_reload = 0;
2880 int offmemok = 0;
2881 /* Nonzero if a constant forced into memory would be OK for this
2882 operand. */
2883 int constmemok = 0;
2884 int earlyclobber = 0;
2885
2886 /* If the predicate accepts a unary operator, it means that
2887 we need to reload the operand, but do not do this for
2888 match_operator and friends. */
2889 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2890 operand = XEXP (operand, 0);
2891
2892 /* If the operand is a SUBREG, extract
2893 the REG or MEM (or maybe even a constant) within.
2894 (Constants can occur as a result of reg_equiv_constant.) */
2895
2896 while (GET_CODE (operand) == SUBREG)
2897 {
2898 /* Offset only matters when operand is a REG and
2899 it is a hard reg. This is because it is passed
2900 to reg_fits_class_p if it is a REG and all pseudos
2901 return 0 from that function. */
2902 if (GET_CODE (SUBREG_REG (operand)) == REG
2903 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2904 {
2905 if (!subreg_offset_representable_p
2906 (REGNO (SUBREG_REG (operand)),
2907 GET_MODE (SUBREG_REG (operand)),
2908 SUBREG_BYTE (operand),
2909 GET_MODE (operand)))
2910 force_reload = 1;
2911 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2912 GET_MODE (SUBREG_REG (operand)),
2913 SUBREG_BYTE (operand),
2914 GET_MODE (operand));
2915 }
2916 operand = SUBREG_REG (operand);
2917 /* Force reload if this is a constant or PLUS or if there may
2918 be a problem accessing OPERAND in the outer mode. */
2919 if (CONSTANT_P (operand)
2920 || GET_CODE (operand) == PLUS
2921 /* We must force a reload of paradoxical SUBREGs
2922 of a MEM because the alignment of the inner value
2923 may not be enough to do the outer reference. On
2924 big-endian machines, it may also reference outside
2925 the object.
2926
2927 On machines that extend byte operations and we have a
2928 SUBREG where both the inner and outer modes are no wider
2929 than a word and the inner mode is narrower, is integral,
2930 and gets extended when loaded from memory, combine.c has
2931 made assumptions about the behavior of the machine in such
2932 register access. If the data is, in fact, in memory we
2933 must always load using the size assumed to be in the
2934 register and let the insn do the different-sized
2935 accesses.
2936
2937 This is doubly true if WORD_REGISTER_OPERATIONS. In
2938 this case eliminate_regs has left non-paradoxical
2939 subregs for push_reload to see. Make sure it does
2940 by forcing the reload.
2941
2942 ??? When is it right at this stage to have a subreg
2943 of a mem that is _not_ to be handled specially? IMO
2944 those should have been reduced to just a mem. */
2945 || ((GET_CODE (operand) == MEM
2946 || (GET_CODE (operand)== REG
2947 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2948#ifndef WORD_REGISTER_OPERATIONS
2949 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2950 < BIGGEST_ALIGNMENT)
2951 && (GET_MODE_SIZE (operand_mode[i])
2952 > GET_MODE_SIZE (GET_MODE (operand))))
2953 || BYTES_BIG_ENDIAN
2954#ifdef LOAD_EXTEND_OP
2955 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2956 && (GET_MODE_SIZE (GET_MODE (operand))
2957 <= UNITS_PER_WORD)
2958 && (GET_MODE_SIZE (operand_mode[i])
2959 > GET_MODE_SIZE (GET_MODE (operand)))
2960 && INTEGRAL_MODE_P (GET_MODE (operand))
2961 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2962#endif
2963 )
2964#endif
2965 )
2966 )
2967 force_reload = 1;
2968 }
2969
2970 this_alternative[i] = (int) NO_REGS;
2971 this_alternative_win[i] = 0;
2972 this_alternative_match_win[i] = 0;
2973 this_alternative_offmemok[i] = 0;
2974 this_alternative_earlyclobber[i] = 0;
2975 this_alternative_matches[i] = -1;
2976
2977 /* An empty constraint or empty alternative
2978 allows anything which matched the pattern. */
2979 if (*p == 0 || *p == ',')
2980 win = 1, badop = 0;
2981
2982 /* Scan this alternative's specs for this operand;
2983 set WIN if the operand fits any letter in this alternative.
2984 Otherwise, clear BADOP if this operand could
2985 fit some letter after reloads,
2986 or set WINREG if this operand could fit after reloads
2987 provided the constraint allows some registers. */
2988
2989 do
2990 switch ((c = *p, len = CONSTRAINT_LEN (c, p)), c)
2991 {
2992 case '\0':
2993 len = 0;
2994 break;
2995 case ',':
2996 c = '\0';
2997 break;
2998
2999 case '=': case '+': case '*':
3000 break;
3001
3002 case '%':
3003 /* We only support one commutative marker, the first
3004 one. We already set commutative above. */
3005 break;
3006
3007 case '?':
3008 reject += 6;
3009 break;
3010
3011 case '!':
3012 reject = 600;
3013 break;
3014
3015 case '#':
3016 /* Ignore rest of this alternative as far as
3017 reloading is concerned. */
3018 do
3019 p++;
3020 while (*p && *p != ',');
3021 len = 0;
3022 break;
3023
3024 case '0': case '1': case '2': case '3': case '4':
3025 case '5': case '6': case '7': case '8': case '9':
3026 m = strtoul (p, &end, 10);
3027 p = end;
3028 len = 0;
3029
3030 this_alternative_matches[i] = m;
3031 /* We are supposed to match a previous operand.
3032 If we do, we win if that one did.
3033 If we do not, count both of the operands as losers.
3034 (This is too conservative, since most of the time
3035 only a single reload insn will be needed to make
3036 the two operands win. As a result, this alternative
3037 may be rejected when it is actually desirable.) */
3038 if ((swapped && (m != commutative || i != commutative + 1))
3039 /* If we are matching as if two operands were swapped,
3040 also pretend that operands_match had been computed
3041 with swapped.
3042 But if I is the second of those and C is the first,
3043 don't exchange them, because operands_match is valid
3044 only on one side of its diagonal. */
3045 ? (operands_match
3046 [(m == commutative || m == commutative + 1)
3047 ? 2 * commutative + 1 - m : m]
3048 [(i == commutative || i == commutative + 1)
3049 ? 2 * commutative + 1 - i : i])
3050 : operands_match[m][i])
3051 {
3052 /* If we are matching a non-offsettable address where an
3053 offsettable address was expected, then we must reject
3054 this combination, because we can't reload it. */
3055 if (this_alternative_offmemok[m]
3056 && GET_CODE (recog_data.operand[m]) == MEM
3057 && this_alternative[m] == (int) NO_REGS
3058 && ! this_alternative_win[m])
3059 bad = 1;
3060
3061 did_match = this_alternative_win[m];
3062 }
3063 else
3064 {
3065 /* Operands don't match. */
3066 rtx value;
3a327f56 3067 int loc1, loc2;
003757ed
MD
3068 /* Retroactively mark the operand we had to match
3069 as a loser, if it wasn't already. */
3070 if (this_alternative_win[m])
3071 losers++;
3072 this_alternative_win[m] = 0;
3073 if (this_alternative[m] == (int) NO_REGS)
3074 bad = 1;
3075 /* But count the pair only once in the total badness of
3a327f56
JS
3076 this alternative, if the pair can be a dummy reload.
3077 The pointers in operand_loc are not swapped; swap
3078 them by hand if necessary. */
3079 if (swapped && i == commutative)
3080 loc1 = commutative + 1;
3081 else if (swapped && i == commutative + 1)
3082 loc1 = commutative;
3083 else
3084 loc1 = i;
3085 if (swapped && m == commutative)
3086 loc2 = commutative + 1;
3087 else if (swapped && m == commutative + 1)
3088 loc2 = commutative;
3089 else
3090 loc2 = m;
003757ed
MD
3091 value
3092 = find_dummy_reload (recog_data.operand[i],
3093 recog_data.operand[m],
3a327f56
JS
3094 recog_data.operand_loc[loc1],
3095 recog_data.operand_loc[loc2],
003757ed
MD
3096 operand_mode[i], operand_mode[m],
3097 this_alternative[m], -1,
3098 this_alternative_earlyclobber[m]);
3099
3100 if (value != 0)
3101 losers--;
3102 }
3103 /* This can be fixed with reloads if the operand
3104 we are supposed to match can be fixed with reloads. */
3105 badop = 0;
3106 this_alternative[i] = this_alternative[m];
3107
3108 /* If we have to reload this operand and some previous
3109 operand also had to match the same thing as this
3110 operand, we don't know how to do that. So reject this
3111 alternative. */
3112 if (! did_match || force_reload)
3113 for (j = 0; j < i; j++)
3114 if (this_alternative_matches[j]
3115 == this_alternative_matches[i])
3116 badop = 1;
3117 break;
3118
3119 case 'p':
3120 /* All necessary reloads for an address_operand
3121 were handled in find_reloads_address. */
3122 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3123 win = 1;
3124 badop = 0;
3125 break;
3126
3127 case 'm':
3128 if (force_reload)
3129 break;
3130 if (GET_CODE (operand) == MEM
3131 || (GET_CODE (operand) == REG
3132 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3133 && reg_renumber[REGNO (operand)] < 0))
3134 win = 1;
3135 if (CONSTANT_P (operand)
3136 /* force_const_mem does not accept HIGH. */
3137 && GET_CODE (operand) != HIGH)
3138 badop = 0;
3139 constmemok = 1;
3140 break;
3141
3142 case '<':
3143 if (GET_CODE (operand) == MEM
3144 && ! address_reloaded[i]
3145 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3146 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3147 win = 1;
3148 break;
3149
3150 case '>':
3151 if (GET_CODE (operand) == MEM
3152 && ! address_reloaded[i]
3153 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3154 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3155 win = 1;
3156 break;
3157
3158 /* Memory operand whose address is not offsettable. */
3159 case 'V':
3160 if (force_reload)
3161 break;
3162 if (GET_CODE (operand) == MEM
3163 && ! (ind_levels ? offsettable_memref_p (operand)
3164 : offsettable_nonstrict_memref_p (operand))
3165 /* Certain mem addresses will become offsettable
3166 after they themselves are reloaded. This is important;
3167 we don't want our own handling of unoffsettables
3168 to override the handling of reg_equiv_address. */
3169 && !(GET_CODE (XEXP (operand, 0)) == REG
3170 && (ind_levels == 0
3171 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3172 win = 1;
3173 break;
3174
3175 /* Memory operand whose address is offsettable. */
3176 case 'o':
3177 if (force_reload)
3178 break;
3179 if ((GET_CODE (operand) == MEM
3180 /* If IND_LEVELS, find_reloads_address won't reload a
3181 pseudo that didn't get a hard reg, so we have to
3182 reject that case. */
3183 && ((ind_levels ? offsettable_memref_p (operand)
3184 : offsettable_nonstrict_memref_p (operand))
3185 /* A reloaded address is offsettable because it is now
3186 just a simple register indirect. */
3187 || address_reloaded[i]))
3188 || (GET_CODE (operand) == REG
3189 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3190 && reg_renumber[REGNO (operand)] < 0
3191 /* If reg_equiv_address is nonzero, we will be
3192 loading it into a register; hence it will be
3193 offsettable, but we cannot say that reg_equiv_mem
3194 is offsettable without checking. */
3195 && ((reg_equiv_mem[REGNO (operand)] != 0
3196 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3197 || (reg_equiv_address[REGNO (operand)] != 0))))
3198 win = 1;
3199 /* force_const_mem does not accept HIGH. */
3200 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3201 || GET_CODE (operand) == MEM)
3202 badop = 0;
3203 constmemok = 1;
3204 offmemok = 1;
3205 break;
3206
3207 case '&':
3208 /* Output operand that is stored before the need for the
3209 input operands (and their index registers) is over. */
3210 earlyclobber = 1, this_earlyclobber = 1;
3211 break;
3212
3213 case 'E':
3214 case 'F':
3215 if (GET_CODE (operand) == CONST_DOUBLE
3216 || (GET_CODE (operand) == CONST_VECTOR
3217 && (GET_MODE_CLASS (GET_MODE (operand))
3218 == MODE_VECTOR_FLOAT)))
3219 win = 1;
3220 break;
3221
3222 case 'G':
3223 case 'H':
3224 if (GET_CODE (operand) == CONST_DOUBLE
3225 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand, c, p))
3226 win = 1;
3227 break;
3228
3229 case 's':
3230 if (GET_CODE (operand) == CONST_INT
3231 || (GET_CODE (operand) == CONST_DOUBLE
3232 && GET_MODE (operand) == VOIDmode))
3233 break;
3234 case 'i':
3235 if (CONSTANT_P (operand)
3236#ifdef LEGITIMATE_PIC_OPERAND_P
3237 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3238#endif
3239 )
3240 win = 1;
3241 break;
3242
3243 case 'n':
3244 if (GET_CODE (operand) == CONST_INT
3245 || (GET_CODE (operand) == CONST_DOUBLE
3246 && GET_MODE (operand) == VOIDmode))
3247 win = 1;
3248 break;
3249
3250 case 'I':
3251 case 'J':
3252 case 'K':
3253 case 'L':
3254 case 'M':
3255 case 'N':
3256 case 'O':
3257 case 'P':
3258 if (GET_CODE (operand) == CONST_INT
3259 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand), c, p))
3260 win = 1;
3261 break;
3262
3263 case 'X':
3264 win = 1;
3265 break;
3266
3267 case 'g':
3268 if (! force_reload
3269 /* A PLUS is never a valid operand, but reload can make
3270 it from a register when eliminating registers. */
3271 && GET_CODE (operand) != PLUS
3272 /* A SCRATCH is not a valid operand. */
3273 && GET_CODE (operand) != SCRATCH
3274#ifdef LEGITIMATE_PIC_OPERAND_P
3275 && (! CONSTANT_P (operand)
3276 || ! flag_pic
3277 || LEGITIMATE_PIC_OPERAND_P (operand))
3278#endif
3279 && (GENERAL_REGS == ALL_REGS
3280 || GET_CODE (operand) != REG
3281 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3282 && reg_renumber[REGNO (operand)] < 0)))
3283 win = 1;
3284 /* Drop through into 'r' case. */
3285
3286 case 'r':
3287 this_alternative[i]
3288 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3289 goto reg;
3290
3291 default:
3292 if (REG_CLASS_FROM_CONSTRAINT (c, p) == NO_REGS)
3293 {
3294#ifdef EXTRA_CONSTRAINT_STR
3295 if (EXTRA_MEMORY_CONSTRAINT (c, p))
3296 {
3297 if (force_reload)
3298 break;
3299 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3300 win = 1;
3301 /* If the address was already reloaded,
3302 we win as well. */
3303 else if (GET_CODE (operand) == MEM
3304 && address_reloaded[i])
3305 win = 1;
3306 /* Likewise if the address will be reloaded because
3307 reg_equiv_address is nonzero. For reg_equiv_mem
3308 we have to check. */
3309 else if (GET_CODE (operand) == REG
3310 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3311 && reg_renumber[REGNO (operand)] < 0
3312 && ((reg_equiv_mem[REGNO (operand)] != 0
3313 && EXTRA_CONSTRAINT_STR (reg_equiv_mem[REGNO (operand)], c, p))
3314 || (reg_equiv_address[REGNO (operand)] != 0)))
3315 win = 1;
3316
3317 /* If we didn't already win, we can reload
3318 constants via force_const_mem, and other
3319 MEMs by reloading the address like for 'o'. */
3320 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3321 || GET_CODE (operand) == MEM)
3322 badop = 0;
3323 constmemok = 1;
3324 offmemok = 1;
3325 break;
3326 }
3327 if (EXTRA_ADDRESS_CONSTRAINT (c, p))
3328 {
3329 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3330 win = 1;
3331
3332 /* If we didn't already win, we can reload
3333 the address into a base register. */
3334 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3335 badop = 0;
3336 break;
3337 }
3338
3339 if (EXTRA_CONSTRAINT_STR (operand, c, p))
3340 win = 1;
3341#endif
3342 break;
3343 }
3344
3345 this_alternative[i]
3346 = (int) (reg_class_subunion
3347 [this_alternative[i]]
3348 [(int) REG_CLASS_FROM_CONSTRAINT (c, p)]);
3349 reg:
3350 if (GET_MODE (operand) == BLKmode)
3351 break;
3352 winreg = 1;
3353 if (GET_CODE (operand) == REG
3354 && reg_fits_class_p (operand, this_alternative[i],
3355 offset, GET_MODE (recog_data.operand[i])))
3356 win = 1;
3357 break;
3358 }
3359 while ((p += len), c);
3360
3361 constraints[i] = p;
3362
3363 /* If this operand could be handled with a reg,
3364 and some reg is allowed, then this operand can be handled. */
3365 if (winreg && this_alternative[i] != (int) NO_REGS)
3366 badop = 0;
3367
3368 /* Record which operands fit this alternative. */
3369 this_alternative_earlyclobber[i] = earlyclobber;
3370 if (win && ! force_reload)
3371 this_alternative_win[i] = 1;
3372 else if (did_match && ! force_reload)
3373 this_alternative_match_win[i] = 1;
3374 else
3375 {
3376 int const_to_mem = 0;
3377
3378 this_alternative_offmemok[i] = offmemok;
3379 losers++;
3380 if (badop)
3381 bad = 1;
3382 /* Alternative loses if it has no regs for a reg operand. */
3383 if (GET_CODE (operand) == REG
3384 && this_alternative[i] == (int) NO_REGS
3385 && this_alternative_matches[i] < 0)
3386 bad = 1;
3387
3388 /* If this is a constant that is reloaded into the desired
3389 class by copying it to memory first, count that as another
3390 reload. This is consistent with other code and is
3391 required to avoid choosing another alternative when
3392 the constant is moved into memory by this function on
3393 an early reload pass. Note that the test here is
3394 precisely the same as in the code below that calls
3395 force_const_mem. */
3396 if (CONSTANT_P (operand)
3397 /* force_const_mem does not accept HIGH. */
3398 && GET_CODE (operand) != HIGH
3399 && ((PREFERRED_RELOAD_CLASS (operand,
3400 (enum reg_class) this_alternative[i])
3401 == NO_REGS)
3402 || no_input_reloads)
3403 && operand_mode[i] != VOIDmode)
3404 {
3405 const_to_mem = 1;
3406 if (this_alternative[i] != (int) NO_REGS)
3407 losers++;
3408 }
3409
3410 /* If we can't reload this value at all, reject this
3411 alternative. Note that we could also lose due to
3412 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3413 here. */
3414
3415 if (! CONSTANT_P (operand)
3416 && (enum reg_class) this_alternative[i] != NO_REGS
3417 && (PREFERRED_RELOAD_CLASS (operand,
3418 (enum reg_class) this_alternative[i])
3419 == NO_REGS))
3420 bad = 1;
3421
3422 /* Alternative loses if it requires a type of reload not
3423 permitted for this insn. We can always reload SCRATCH
3424 and objects with a REG_UNUSED note. */
3425 else if (GET_CODE (operand) != SCRATCH
3426 && modified[i] != RELOAD_READ && no_output_reloads
3427 && ! find_reg_note (insn, REG_UNUSED, operand))
3428 bad = 1;
3429 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3430 && ! const_to_mem)
3431 bad = 1;
3432
3433#ifdef DISPARAGE_RELOAD_CLASS
3434 reject
3435 += DISPARAGE_RELOAD_CLASS (operand,
3436 (enum reg_class) this_alternative[i]);
3437#endif
3438
3439 /* We prefer to reload pseudos over reloading other things,
3440 since such reloads may be able to be eliminated later.
3441 If we are reloading a SCRATCH, we won't be generating any
3442 insns, just using a register, so it is also preferred.
3443 So bump REJECT in other cases. Don't do this in the
3444 case where we are forcing a constant into memory and
3445 it will then win since we don't want to have a different
3446 alternative match then. */
3447 if (! (GET_CODE (operand) == REG
3448 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3449 && GET_CODE (operand) != SCRATCH
3450 && ! (const_to_mem && constmemok))
3451 reject += 2;
3452
3453 /* Input reloads can be inherited more often than output
3454 reloads can be removed, so penalize output reloads. */
3455 if (operand_type[i] != RELOAD_FOR_INPUT
3456 && GET_CODE (operand) != SCRATCH)
3457 reject++;
3458 }
3459
3460 /* If this operand is a pseudo register that didn't get a hard
3461 reg and this alternative accepts some register, see if the
3462 class that we want is a subset of the preferred class for this
3463 register. If not, but it intersects that class, use the
3464 preferred class instead. If it does not intersect the preferred
3465 class, show that usage of this alternative should be discouraged;
3466 it will be discouraged more still if the register is `preferred
3467 or nothing'. We do this because it increases the chance of
3468 reusing our spill register in a later insn and avoiding a pair
3469 of memory stores and loads.
3470
3471 Don't bother with this if this alternative will accept this
3472 operand.
3473
3474 Don't do this for a multiword operand, since it is only a
3475 small win and has the risk of requiring more spill registers,
3476 which could cause a large loss.
3477
3478 Don't do this if the preferred class has only one register
3479 because we might otherwise exhaust the class. */
3480
3481 if (! win && ! did_match
3482 && this_alternative[i] != (int) NO_REGS
3483 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3484 && reg_class_size[(int) preferred_class[i]] > 1)
3485 {
3486 if (! reg_class_subset_p (this_alternative[i],
3487 preferred_class[i]))
3488 {
3489 /* Since we don't have a way of forming the intersection,
3490 we just do something special if the preferred class
3491 is a subset of the class we have; that's the most
3492 common case anyway. */
3493 if (reg_class_subset_p (preferred_class[i],
3494 this_alternative[i]))
3495 this_alternative[i] = (int) preferred_class[i];
3496 else
3497 reject += (2 + 2 * pref_or_nothing[i]);
3498 }
3499 }
3500 }
3501
3502 /* Now see if any output operands that are marked "earlyclobber"
3503 in this alternative conflict with any input operands
3504 or any memory addresses. */
3505
3506 for (i = 0; i < noperands; i++)
3507 if (this_alternative_earlyclobber[i]
3508 && (this_alternative_win[i] || this_alternative_match_win[i]))
3509 {
3510 struct decomposition early_data;
3511
3512 early_data = decompose (recog_data.operand[i]);
3513
3514 if (modified[i] == RELOAD_READ)
3515 abort ();
3516
3517 if (this_alternative[i] == NO_REGS)
3518 {
3519 this_alternative_earlyclobber[i] = 0;
3520 if (this_insn_is_asm)
3521 error_for_asm (this_insn,
3522 "`&' constraint used with no register class");
3523 else
3524 abort ();
3525 }
3526
3527 for (j = 0; j < noperands; j++)
3528 /* Is this an input operand or a memory ref? */
3529 if ((GET_CODE (recog_data.operand[j]) == MEM
3530 || modified[j] != RELOAD_WRITE)
3531 && j != i
3532 /* Ignore things like match_operator operands. */
3533 && *recog_data.constraints[j] != 0
3534 /* Don't count an input operand that is constrained to match
3535 the early clobber operand. */
3536 && ! (this_alternative_matches[j] == i
3537 && rtx_equal_p (recog_data.operand[i],
3538 recog_data.operand[j]))
3539 /* Is it altered by storing the earlyclobber operand? */
3540 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3541 early_data))
3542 {
3543 /* If the output is in a single-reg class,
3544 it's costly to reload it, so reload the input instead. */
3545 if (reg_class_size[this_alternative[i]] == 1
3546 && (GET_CODE (recog_data.operand[j]) == REG
3547 || GET_CODE (recog_data.operand[j]) == SUBREG))
3548 {
3549 losers++;
3550 this_alternative_win[j] = 0;
3551 this_alternative_match_win[j] = 0;
3552 }
3553 else
3554 break;
3555 }
3556 /* If an earlyclobber operand conflicts with something,
3557 it must be reloaded, so request this and count the cost. */
3558 if (j != noperands)
3559 {
3560 losers++;
3561 this_alternative_win[i] = 0;
3562 this_alternative_match_win[j] = 0;
3563 for (j = 0; j < noperands; j++)
3564 if (this_alternative_matches[j] == i
3565 && this_alternative_match_win[j])
3566 {
3567 this_alternative_win[j] = 0;
3568 this_alternative_match_win[j] = 0;
3569 losers++;
3570 }
3571 }
3572 }
3573
3574 /* If one alternative accepts all the operands, no reload required,
3575 choose that alternative; don't consider the remaining ones. */
3576 if (losers == 0)
3577 {
3578 /* Unswap these so that they are never swapped at `finish'. */
3579 if (commutative >= 0)
3580 {
3581 recog_data.operand[commutative] = substed_operand[commutative];
3582 recog_data.operand[commutative + 1]
3583 = substed_operand[commutative + 1];
3584 }
3585 for (i = 0; i < noperands; i++)
3586 {
3587 goal_alternative_win[i] = this_alternative_win[i];
3588 goal_alternative_match_win[i] = this_alternative_match_win[i];
3589 goal_alternative[i] = this_alternative[i];
3590 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3591 goal_alternative_matches[i] = this_alternative_matches[i];
3592 goal_alternative_earlyclobber[i]
3593 = this_alternative_earlyclobber[i];
3594 }
3595 goal_alternative_number = this_alternative_number;
3596 goal_alternative_swapped = swapped;
3597 goal_earlyclobber = this_earlyclobber;
3598 goto finish;
3599 }
3600
3601 /* REJECT, set by the ! and ? constraint characters and when a register
3602 would be reloaded into a non-preferred class, discourages the use of
3603 this alternative for a reload goal. REJECT is incremented by six
3604 for each ? and two for each non-preferred class. */
3605 losers = losers * 6 + reject;
3606
3607 /* If this alternative can be made to work by reloading,
3608 and it needs less reloading than the others checked so far,
3609 record it as the chosen goal for reloading. */
3610 if (! bad && best > losers)
3611 {
3612 for (i = 0; i < noperands; i++)
3613 {
3614 goal_alternative[i] = this_alternative[i];
3615 goal_alternative_win[i] = this_alternative_win[i];
3616 goal_alternative_match_win[i] = this_alternative_match_win[i];
3617 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3618 goal_alternative_matches[i] = this_alternative_matches[i];
3619 goal_alternative_earlyclobber[i]
3620 = this_alternative_earlyclobber[i];
3621 }
3622 goal_alternative_swapped = swapped;
3623 best = losers;
3624 goal_alternative_number = this_alternative_number;
3625 goal_earlyclobber = this_earlyclobber;
3626 }
3627 }
3628
3629 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3630 then we need to try each alternative twice,
3631 the second time matching those two operands
3632 as if we had exchanged them.
3633 To do this, really exchange them in operands.
3634
3635 If we have just tried the alternatives the second time,
3636 return operands to normal and drop through. */
3637
3638 if (commutative >= 0)
3639 {
3640 swapped = !swapped;
3641 if (swapped)
3642 {
3643 enum reg_class tclass;
3644 int t;
3645
3646 recog_data.operand[commutative] = substed_operand[commutative + 1];
3647 recog_data.operand[commutative + 1] = substed_operand[commutative];
3648 /* Swap the duplicates too. */
3649 for (i = 0; i < recog_data.n_dups; i++)
3650 if (recog_data.dup_num[i] == commutative
3651 || recog_data.dup_num[i] == commutative + 1)
3652 *recog_data.dup_loc[i]
3653 = recog_data.operand[(int) recog_data.dup_num[i]];
3654
3655 tclass = preferred_class[commutative];
3656 preferred_class[commutative] = preferred_class[commutative + 1];
3657 preferred_class[commutative + 1] = tclass;
3658
3659 t = pref_or_nothing[commutative];
3660 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3661 pref_or_nothing[commutative + 1] = t;
3662
3663 memcpy (constraints, recog_data.constraints,
3664 noperands * sizeof (char *));
3665 goto try_swapped;
3666 }
3667 else
3668 {
3669 recog_data.operand[commutative] = substed_operand[commutative];
3670 recog_data.operand[commutative + 1]
3671 = substed_operand[commutative + 1];
3672 /* Unswap the duplicates too. */
3673 for (i = 0; i < recog_data.n_dups; i++)
3674 if (recog_data.dup_num[i] == commutative
3675 || recog_data.dup_num[i] == commutative + 1)
3676 *recog_data.dup_loc[i]
3677 = recog_data.operand[(int) recog_data.dup_num[i]];
3678 }
3679 }
3680
3681 /* The operands don't meet the constraints.
3682 goal_alternative describes the alternative
3683 that we could reach by reloading the fewest operands.
3684 Reload so as to fit it. */
3685
3686 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3687 {
3688 /* No alternative works with reloads?? */
3689 if (insn_code_number >= 0)
3690 fatal_insn ("unable to generate reloads for:", insn);
3691 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3692 /* Avoid further trouble with this insn. */
3693 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3694 n_reloads = 0;
3695 return 0;
3696 }
3697
3698 /* Jump to `finish' from above if all operands are valid already.
3699 In that case, goal_alternative_win is all 1. */
3700 finish:
3701
3702 /* Right now, for any pair of operands I and J that are required to match,
3703 with I < J,
3704 goal_alternative_matches[J] is I.
3705 Set up goal_alternative_matched as the inverse function:
3706 goal_alternative_matched[I] = J. */
3707
3708 for (i = 0; i < noperands; i++)
3709 goal_alternative_matched[i] = -1;
3710
3711 for (i = 0; i < noperands; i++)
3712 if (! goal_alternative_win[i]
3713 && goal_alternative_matches[i] >= 0)
3714 goal_alternative_matched[goal_alternative_matches[i]] = i;
3715
3716 for (i = 0; i < noperands; i++)
3717 goal_alternative_win[i] |= goal_alternative_match_win[i];
3718
3719 /* If the best alternative is with operands 1 and 2 swapped,
3720 consider them swapped before reporting the reloads. Update the
3721 operand numbers of any reloads already pushed. */
3722
3723 if (goal_alternative_swapped)
3724 {
3725 rtx tem;
3726
3727 tem = substed_operand[commutative];
3728 substed_operand[commutative] = substed_operand[commutative + 1];
3729 substed_operand[commutative + 1] = tem;
3730 tem = recog_data.operand[commutative];
3731 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3732 recog_data.operand[commutative + 1] = tem;
3733 tem = *recog_data.operand_loc[commutative];
3734 *recog_data.operand_loc[commutative]
3735 = *recog_data.operand_loc[commutative + 1];
3736 *recog_data.operand_loc[commutative + 1] = tem;
3737
3738 for (i = 0; i < n_reloads; i++)
3739 {
3740 if (rld[i].opnum == commutative)
3741 rld[i].opnum = commutative + 1;
3742 else if (rld[i].opnum == commutative + 1)
3743 rld[i].opnum = commutative;
3744 }
3745 }
3746
3747 for (i = 0; i < noperands; i++)
3748 {
3749 operand_reloadnum[i] = -1;
3750
3751 /* If this is an earlyclobber operand, we need to widen the scope.
3752 The reload must remain valid from the start of the insn being
3753 reloaded until after the operand is stored into its destination.
3754 We approximate this with RELOAD_OTHER even though we know that we
3755 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3756
3757 One special case that is worth checking is when we have an
3758 output that is earlyclobber but isn't used past the insn (typically
3759 a SCRATCH). In this case, we only need have the reload live
3760 through the insn itself, but not for any of our input or output
3761 reloads.
3762 But we must not accidentally narrow the scope of an existing
3763 RELOAD_OTHER reload - leave these alone.
3764
3765 In any case, anything needed to address this operand can remain
3766 however they were previously categorized. */
3767
3768 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3769 operand_type[i]
3770 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3771 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3772 }
3773
3774 /* Any constants that aren't allowed and can't be reloaded
3775 into registers are here changed into memory references. */
3776 for (i = 0; i < noperands; i++)
3777 if (! goal_alternative_win[i]
3778 && CONSTANT_P (recog_data.operand[i])
3779 /* force_const_mem does not accept HIGH. */
3780 && GET_CODE (recog_data.operand[i]) != HIGH
3781 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3782 (enum reg_class) goal_alternative[i])
3783 == NO_REGS)
3784 || no_input_reloads)
3785 && operand_mode[i] != VOIDmode)
3786 {
3787 substed_operand[i] = recog_data.operand[i]
3788 = find_reloads_toplev (force_const_mem (operand_mode[i],
3789 recog_data.operand[i]),
3790 i, address_type[i], ind_levels, 0, insn,
3791 NULL);
3792 if (alternative_allows_memconst (recog_data.constraints[i],
3793 goal_alternative_number))
3794 goal_alternative_win[i] = 1;
3795 }
3796
3797 /* Record the values of the earlyclobber operands for the caller. */
3798 if (goal_earlyclobber)
3799 for (i = 0; i < noperands; i++)
3800 if (goal_alternative_earlyclobber[i])
3801 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3802
3803 /* Now record reloads for all the operands that need them. */
3804 for (i = 0; i < noperands; i++)
3805 if (! goal_alternative_win[i])
3806 {
3807 /* Operands that match previous ones have already been handled. */
3808 if (goal_alternative_matches[i] >= 0)
3809 ;
3810 /* Handle an operand with a nonoffsettable address
3811 appearing where an offsettable address will do
3812 by reloading the address into a base register.
3813