AMD64 - Sync AMD64 support from Jordan Gordeev's svn repository and
[dragonfly.git] / sys / platform / pc64 / apic / mpapic.h
CommitLineData
c8fe38ae
MD
1/*
2 * Copyright (c) 1996, by Steve Passe
3 * Copyright (c) 2008 The DragonFly Project.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. The name of the developer may NOT be used to endorse or promote products
12 * derived from this software without specific prior written permission.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 *
26 * $FreeBSD: src/sys/i386/include/mpapic.h,v 1.14.2.2 2000/09/30 02:49:34 ps Exp $
27 * $DragonFly: src/sys/platform/pc64/apic/mpapic.h,v 1.1 2008/08/29 17:07:12 dillon Exp $
28 */
29
30#ifndef _MACHINE_MPAPIC_H_
31#define _MACHINE_MPAPIC_H_
32
33#include "apicreg.h"
34
35#include <machine_base/icu/icu.h>
36
37/*
38 * Size of APIC ID list.
39 * Also used a MAX size of various other arrays.
40 */
41#define NAPICID 16
42
43/* these don't really belong in here... */
44enum busTypes {
45 CBUS = 1,
46 CBUSII = 2,
47 EISA = 3,
48 MCA = 4,
49 ISA = 6,
50 PCI = 13,
51 XPRESS = 18,
52 MAX_BUSTYPE = 18,
53 UNKNOWN_BUSTYPE = 0xff
54};
55
56
57/*
58 * the physical/logical APIC ID management macros
59 */
60#define CPU_TO_ID(CPU) (cpu_num_to_apic_id[CPU])
61#define ID_TO_CPU(ID) (apic_id_to_logical[ID])
62#ifdef APIC_IO
63#define IO_TO_ID(IO) (io_num_to_apic_id[IO])
64#define ID_TO_IO(ID) (apic_id_to_logical[ID])
65#endif
66
67#ifdef SMP
68
69/*
70 * send an IPI INTerrupt containing 'vector' to all CPUs EXCEPT myself
71 */
72static __inline int
73all_but_self_ipi(int vector)
74{
75 if (smp_active_mask == 1)
76 return 0;
77 return apic_ipi(APIC_DEST_ALLESELF, vector, APIC_DELMODE_FIXED);
78}
79
80#endif
81
82#endif /* _MACHINE_MPAPIC_H */