1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
40 #include "coretypes.h"
50 #include "hard-reg-set.h"
52 #include "insn-config.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
61 /* Commonly used modes. */
63 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
64 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
65 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
66 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static GTY(()) int label_num = 1;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_last_label_num was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these are unique; no other rtx-object will be equal to any
94 rtx global_rtl[GR_MAX];
96 /* Commonly used RTL for hard registers. These objects are not necessarily
97 unique, so we allocate them separately from global_rtl. They are
98 initialized once per compilation unit, then copied into regno_reg_rtx
99 at the beginning of each function. */
100 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
102 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
103 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
104 record a copy of const[012]_rtx. */
106 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
110 REAL_VALUE_TYPE dconst0;
111 REAL_VALUE_TYPE dconst1;
112 REAL_VALUE_TYPE dconst2;
113 REAL_VALUE_TYPE dconst3;
114 REAL_VALUE_TYPE dconst10;
115 REAL_VALUE_TYPE dconstm1;
116 REAL_VALUE_TYPE dconstm2;
117 REAL_VALUE_TYPE dconsthalf;
118 REAL_VALUE_TYPE dconstthird;
119 REAL_VALUE_TYPE dconstpi;
120 REAL_VALUE_TYPE dconste;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
141 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
142 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
144 /* This is used to implement __builtin_return_address for some machines.
145 See for instance the MIPS port. */
146 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
148 /* We make one copy of (const_int C) where C is in
149 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
150 to save space during the compilation and simplify comparisons of
153 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
155 /* A hash table storing CONST_INTs whose absolute value is greater
156 than MAX_SAVED_CONST_INT. */
158 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
159 htab_t const_int_htab;
161 /* A hash table storing memory attribute structures. */
162 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
163 htab_t mem_attrs_htab;
165 /* A hash table storing register attribute structures. */
166 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
167 htab_t reg_attrs_htab;
169 /* A hash table storing all CONST_DOUBLEs. */
170 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
171 htab_t const_double_htab;
173 #define first_insn (cfun->emit->x_first_insn)
174 #define last_insn (cfun->emit->x_last_insn)
175 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
176 #define last_location (cfun->emit->x_last_location)
177 #define first_label_num (cfun->emit->x_first_label_num)
179 static rtx make_jump_insn_raw (rtx);
180 static rtx make_call_insn_raw (rtx);
181 static rtx find_line_note (rtx);
182 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
183 static void unshare_all_decls (tree);
184 static void reset_used_decls (tree);
185 static void mark_label_nuses (rtx);
186 static hashval_t const_int_htab_hash (const void *);
187 static int const_int_htab_eq (const void *, const void *);
188 static hashval_t const_double_htab_hash (const void *);
189 static int const_double_htab_eq (const void *, const void *);
190 static rtx lookup_const_double (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (HOST_WIDE_INT, tree, rtx, rtx, unsigned int,
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static tree component_ref_for_mem_expr (tree);
199 static rtx gen_const_vector_0 (enum machine_mode);
200 static rtx gen_complex_constant_part (enum machine_mode, rtx, int);
201 static void copy_rtx_if_shared_1 (rtx *orig);
203 /* Probability of the conditional branch currently proceeded by try_split.
204 Set to -1 otherwise. */
205 int split_branch_probability = -1;
207 /* Returns a hash code for X (which is a really a CONST_INT). */
210 const_int_htab_hash (const void *x)
212 return (hashval_t) INTVAL ((rtx) x);
215 /* Returns nonzero if the value represented by X (which is really a
216 CONST_INT) is the same as that given by Y (which is really a
220 const_int_htab_eq (const void *x, const void *y)
222 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
227 const_double_htab_hash (const void *x)
232 if (GET_MODE (value) == VOIDmode)
233 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
236 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
237 /* MODE is used in the comparison, so it should be in the hash. */
238 h ^= GET_MODE (value);
243 /* Returns nonzero if the value represented by X (really a ...)
244 is the same as that represented by Y (really a ...) */
246 const_double_htab_eq (const void *x, const void *y)
248 rtx a = (rtx)x, b = (rtx)y;
250 if (GET_MODE (a) != GET_MODE (b))
252 if (GET_MODE (a) == VOIDmode)
253 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
254 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
256 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
257 CONST_DOUBLE_REAL_VALUE (b));
260 /* Returns a hash code for X (which is a really a mem_attrs *). */
263 mem_attrs_htab_hash (const void *x)
265 mem_attrs *p = (mem_attrs *) x;
267 return (p->alias ^ (p->align * 1000)
268 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
269 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
273 /* Returns nonzero if the value represented by X (which is really a
274 mem_attrs *) is the same as that given by Y (which is also really a
278 mem_attrs_htab_eq (const void *x, const void *y)
280 mem_attrs *p = (mem_attrs *) x;
281 mem_attrs *q = (mem_attrs *) y;
283 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
284 && p->size == q->size && p->align == q->align);
287 /* Allocate a new mem_attrs structure and insert it into the hash table if
288 one identical to it is not already in the table. We are doing this for
292 get_mem_attrs (HOST_WIDE_INT alias, tree expr, rtx offset, rtx size,
293 unsigned int align, enum machine_mode mode)
298 /* If everything is the default, we can just return zero.
299 This must match what the corresponding MEM_* macros return when the
300 field is not present. */
301 if (alias == 0 && expr == 0 && offset == 0
303 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
304 && (STRICT_ALIGNMENT && mode != BLKmode
305 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
310 attrs.offset = offset;
314 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
317 *slot = ggc_alloc (sizeof (mem_attrs));
318 memcpy (*slot, &attrs, sizeof (mem_attrs));
324 /* Returns a hash code for X (which is a really a reg_attrs *). */
327 reg_attrs_htab_hash (const void *x)
329 reg_attrs *p = (reg_attrs *) x;
331 return ((p->offset * 1000) ^ (long) p->decl);
334 /* Returns nonzero if the value represented by X (which is really a
335 reg_attrs *) is the same as that given by Y (which is also really a
339 reg_attrs_htab_eq (const void *x, const void *y)
341 reg_attrs *p = (reg_attrs *) x;
342 reg_attrs *q = (reg_attrs *) y;
344 return (p->decl == q->decl && p->offset == q->offset);
346 /* Allocate a new reg_attrs structure and insert it into the hash table if
347 one identical to it is not already in the table. We are doing this for
351 get_reg_attrs (tree decl, int offset)
356 /* If everything is the default, we can just return zero. */
357 if (decl == 0 && offset == 0)
361 attrs.offset = offset;
363 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
366 *slot = ggc_alloc (sizeof (reg_attrs));
367 memcpy (*slot, &attrs, sizeof (reg_attrs));
373 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
374 don't attempt to share with the various global pieces of rtl (such as
375 frame_pointer_rtx). */
378 gen_raw_REG (enum machine_mode mode, int regno)
380 rtx x = gen_rtx_raw_REG (mode, regno);
381 ORIGINAL_REGNO (x) = regno;
385 /* There are some RTL codes that require special attention; the generation
386 functions do the raw handling. If you add to this list, modify
387 special_rtx in gengenrtl.c as well. */
390 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
394 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
395 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
397 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
398 if (const_true_rtx && arg == STORE_FLAG_VALUE)
399 return const_true_rtx;
402 /* Look up the CONST_INT in the hash table. */
403 slot = htab_find_slot_with_hash (const_int_htab, &arg,
404 (hashval_t) arg, INSERT);
406 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
412 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
414 return GEN_INT (trunc_int_for_mode (c, mode));
417 /* CONST_DOUBLEs might be created from pairs of integers, or from
418 REAL_VALUE_TYPEs. Also, their length is known only at run time,
419 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
421 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
422 hash table. If so, return its counterpart; otherwise add it
423 to the hash table and return it. */
425 lookup_const_double (rtx real)
427 void **slot = htab_find_slot (const_double_htab, real, INSERT);
434 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
435 VALUE in mode MODE. */
437 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
439 rtx real = rtx_alloc (CONST_DOUBLE);
440 PUT_MODE (real, mode);
442 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
444 return lookup_const_double (real);
447 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
448 of ints: I0 is the low-order word and I1 is the high-order word.
449 Do not use this routine for non-integer modes; convert to
450 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
453 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
458 if (mode != VOIDmode)
461 if (GET_MODE_CLASS (mode) != MODE_INT
462 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT
463 /* We can get a 0 for an error mark. */
464 && GET_MODE_CLASS (mode) != MODE_VECTOR_INT
465 && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT)
468 /* We clear out all bits that don't belong in MODE, unless they and
469 our sign bit are all one. So we get either a reasonable negative
470 value or a reasonable unsigned value for this mode. */
471 width = GET_MODE_BITSIZE (mode);
472 if (width < HOST_BITS_PER_WIDE_INT
473 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
474 != ((HOST_WIDE_INT) (-1) << (width - 1))))
475 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
476 else if (width == HOST_BITS_PER_WIDE_INT
477 && ! (i1 == ~0 && i0 < 0))
479 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
480 /* We cannot represent this value as a constant. */
483 /* If this would be an entire word for the target, but is not for
484 the host, then sign-extend on the host so that the number will
485 look the same way on the host that it would on the target.
487 For example, when building a 64 bit alpha hosted 32 bit sparc
488 targeted compiler, then we want the 32 bit unsigned value -1 to be
489 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
490 The latter confuses the sparc backend. */
492 if (width < HOST_BITS_PER_WIDE_INT
493 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
494 i0 |= ((HOST_WIDE_INT) (-1) << width);
496 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
499 ??? Strictly speaking, this is wrong if we create a CONST_INT for
500 a large unsigned constant with the size of MODE being
501 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
502 in a wider mode. In that case we will mis-interpret it as a
505 Unfortunately, the only alternative is to make a CONST_DOUBLE for
506 any constant in any mode if it is an unsigned constant larger
507 than the maximum signed integer in an int on the host. However,
508 doing this will break everyone that always expects to see a
509 CONST_INT for SImode and smaller.
511 We have always been making CONST_INTs in this case, so nothing
512 new is being broken. */
514 if (width <= HOST_BITS_PER_WIDE_INT)
515 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
518 /* If this integer fits in one word, return a CONST_INT. */
519 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
522 /* We use VOIDmode for integers. */
523 value = rtx_alloc (CONST_DOUBLE);
524 PUT_MODE (value, VOIDmode);
526 CONST_DOUBLE_LOW (value) = i0;
527 CONST_DOUBLE_HIGH (value) = i1;
529 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
530 XWINT (value, i) = 0;
532 return lookup_const_double (value);
536 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
538 /* In case the MD file explicitly references the frame pointer, have
539 all such references point to the same frame pointer. This is
540 used during frame pointer elimination to distinguish the explicit
541 references to these registers from pseudos that happened to be
544 If we have eliminated the frame pointer or arg pointer, we will
545 be using it as a normal register, for example as a spill
546 register. In such cases, we might be accessing it in a mode that
547 is not Pmode and therefore cannot use the pre-allocated rtx.
549 Also don't do this when we are making new REGs in reload, since
550 we don't want to get confused with the real pointers. */
552 if (mode == Pmode && !reload_in_progress)
554 if (regno == FRAME_POINTER_REGNUM
555 && (!reload_completed || frame_pointer_needed))
556 return frame_pointer_rtx;
557 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
558 if (regno == HARD_FRAME_POINTER_REGNUM
559 && (!reload_completed || frame_pointer_needed))
560 return hard_frame_pointer_rtx;
562 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
563 if (regno == ARG_POINTER_REGNUM)
564 return arg_pointer_rtx;
566 #ifdef RETURN_ADDRESS_POINTER_REGNUM
567 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
568 return return_address_pointer_rtx;
570 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
571 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
572 return pic_offset_table_rtx;
573 if (regno == STACK_POINTER_REGNUM)
574 return stack_pointer_rtx;
578 /* If the per-function register table has been set up, try to re-use
579 an existing entry in that table to avoid useless generation of RTL.
581 This code is disabled for now until we can fix the various backends
582 which depend on having non-shared hard registers in some cases. Long
583 term we want to re-enable this code as it can significantly cut down
584 on the amount of useless RTL that gets generated.
586 We'll also need to fix some code that runs after reload that wants to
587 set ORIGINAL_REGNO. */
592 && regno < FIRST_PSEUDO_REGISTER
593 && reg_raw_mode[regno] == mode)
594 return regno_reg_rtx[regno];
597 return gen_raw_REG (mode, regno);
601 gen_rtx_MEM (enum machine_mode mode, rtx addr)
603 rtx rt = gen_rtx_raw_MEM (mode, addr);
605 /* This field is not cleared by the mere allocation of the rtx, so
613 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
615 /* This is the most common failure type.
616 Catch it early so we can see who does it. */
617 if ((offset % GET_MODE_SIZE (mode)) != 0)
620 /* This check isn't usable right now because combine will
621 throw arbitrary crap like a CALL into a SUBREG in
622 gen_lowpart_for_combine so we must just eat it. */
624 /* Check for this too. */
625 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
628 return gen_rtx_raw_SUBREG (mode, reg, offset);
631 /* Generate a SUBREG representing the least-significant part of REG if MODE
632 is smaller than mode of REG, otherwise paradoxical SUBREG. */
635 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
637 enum machine_mode inmode;
639 inmode = GET_MODE (reg);
640 if (inmode == VOIDmode)
642 return gen_rtx_SUBREG (mode, reg,
643 subreg_lowpart_offset (mode, inmode));
646 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
648 ** This routine generates an RTX of the size specified by
649 ** <code>, which is an RTX code. The RTX structure is initialized
650 ** from the arguments <element1> through <elementn>, which are
651 ** interpreted according to the specific RTX type's format. The
652 ** special machine mode associated with the rtx (if any) is specified
655 ** gen_rtx can be invoked in a way which resembles the lisp-like
656 ** rtx it will generate. For example, the following rtx structure:
658 ** (plus:QI (mem:QI (reg:SI 1))
659 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
661 ** ...would be generated by the following C code:
663 ** gen_rtx (PLUS, QImode,
664 ** gen_rtx (MEM, QImode,
665 ** gen_rtx (REG, SImode, 1)),
666 ** gen_rtx (MEM, QImode,
667 ** gen_rtx (PLUS, SImode,
668 ** gen_rtx (REG, SImode, 2),
669 ** gen_rtx (REG, SImode, 3)))),
674 gen_rtx (enum rtx_code code, enum machine_mode mode, ...)
676 int i; /* Array indices... */
677 const char *fmt; /* Current rtx's format... */
678 rtx rt_val; /* RTX to return to caller... */
686 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
691 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
692 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
694 rt_val = immed_double_const (arg0, arg1, mode);
699 rt_val = gen_rtx_REG (mode, va_arg (p, int));
703 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
707 rt_val = rtx_alloc (code); /* Allocate the storage space. */
708 rt_val->mode = mode; /* Store the machine mode... */
710 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
711 for (i = 0; i < GET_RTX_LENGTH (code); i++)
715 case '0': /* Field with unknown use. Zero it. */
716 X0EXP (rt_val, i) = NULL_RTX;
719 case 'i': /* An integer? */
720 XINT (rt_val, i) = va_arg (p, int);
723 case 'w': /* A wide integer? */
724 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
727 case 's': /* A string? */
728 XSTR (rt_val, i) = va_arg (p, char *);
731 case 'e': /* An expression? */
732 case 'u': /* An insn? Same except when printing. */
733 XEXP (rt_val, i) = va_arg (p, rtx);
736 case 'E': /* An RTX vector? */
737 XVEC (rt_val, i) = va_arg (p, rtvec);
740 case 'b': /* A bitmap? */
741 XBITMAP (rt_val, i) = va_arg (p, bitmap);
744 case 't': /* A tree? */
745 XTREE (rt_val, i) = va_arg (p, tree);
759 /* gen_rtvec (n, [rt1, ..., rtn])
761 ** This routine creates an rtvec and stores within it the
762 ** pointers to rtx's which are its arguments.
767 gen_rtvec (int n, ...)
776 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
778 vector = alloca (n * sizeof (rtx));
780 for (i = 0; i < n; i++)
781 vector[i] = va_arg (p, rtx);
783 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
787 return gen_rtvec_v (save_n, vector);
791 gen_rtvec_v (int n, rtx *argp)
797 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
799 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
801 for (i = 0; i < n; i++)
802 rt_val->elem[i] = *argp++;
807 /* Generate a REG rtx for a new pseudo register of mode MODE.
808 This pseudo is assigned the next sequential register number. */
811 gen_reg_rtx (enum machine_mode mode)
813 struct function *f = cfun;
816 /* Don't let anything called after initial flow analysis create new
821 if (generating_concat_p
822 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
823 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
825 /* For complex modes, don't make a single pseudo.
826 Instead, make a CONCAT of two pseudos.
827 This allows noncontiguous allocation of the real and imaginary parts,
828 which makes much better code. Besides, allocating DCmode
829 pseudos overstrains reload on some machines like the 386. */
830 rtx realpart, imagpart;
831 enum machine_mode partmode = GET_MODE_INNER (mode);
833 realpart = gen_reg_rtx (partmode);
834 imagpart = gen_reg_rtx (partmode);
835 return gen_rtx_CONCAT (mode, realpart, imagpart);
838 /* Make sure regno_pointer_align, and regno_reg_rtx are large
839 enough to have an element for this pseudo reg number. */
841 if (reg_rtx_no == f->emit->regno_pointer_align_length)
843 int old_size = f->emit->regno_pointer_align_length;
847 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
848 memset (new + old_size, 0, old_size);
849 f->emit->regno_pointer_align = (unsigned char *) new;
851 new1 = ggc_realloc (f->emit->x_regno_reg_rtx,
852 old_size * 2 * sizeof (rtx));
853 memset (new1 + old_size, 0, old_size * sizeof (rtx));
854 regno_reg_rtx = new1;
856 f->emit->regno_pointer_align_length = old_size * 2;
859 val = gen_raw_REG (mode, reg_rtx_no);
860 regno_reg_rtx[reg_rtx_no++] = val;
864 /* Generate a register with same attributes as REG,
865 but offsetted by OFFSET. */
868 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno, int offset)
870 rtx new = gen_rtx_REG (mode, regno);
871 REG_ATTRS (new) = get_reg_attrs (REG_EXPR (reg),
872 REG_OFFSET (reg) + offset);
876 /* Set the decl for MEM to DECL. */
879 set_reg_attrs_from_mem (rtx reg, rtx mem)
881 if (MEM_OFFSET (mem) && GET_CODE (MEM_OFFSET (mem)) == CONST_INT)
883 = get_reg_attrs (MEM_EXPR (mem), INTVAL (MEM_OFFSET (mem)));
886 /* Set the register attributes for registers contained in PARM_RTX.
887 Use needed values from memory attributes of MEM. */
890 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
892 if (GET_CODE (parm_rtx) == REG)
893 set_reg_attrs_from_mem (parm_rtx, mem);
894 else if (GET_CODE (parm_rtx) == PARALLEL)
896 /* Check for a NULL entry in the first slot, used to indicate that the
897 parameter goes both on the stack and in registers. */
898 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
899 for (; i < XVECLEN (parm_rtx, 0); i++)
901 rtx x = XVECEXP (parm_rtx, 0, i);
902 if (GET_CODE (XEXP (x, 0)) == REG)
903 REG_ATTRS (XEXP (x, 0))
904 = get_reg_attrs (MEM_EXPR (mem),
905 INTVAL (XEXP (x, 1)));
910 /* Assign the RTX X to declaration T. */
912 set_decl_rtl (tree t, rtx x)
914 DECL_CHECK (t)->decl.rtl = x;
918 /* For register, we maintain the reverse information too. */
919 if (GET_CODE (x) == REG)
920 REG_ATTRS (x) = get_reg_attrs (t, 0);
921 else if (GET_CODE (x) == SUBREG)
922 REG_ATTRS (SUBREG_REG (x))
923 = get_reg_attrs (t, -SUBREG_BYTE (x));
924 if (GET_CODE (x) == CONCAT)
926 if (REG_P (XEXP (x, 0)))
927 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
928 if (REG_P (XEXP (x, 1)))
929 REG_ATTRS (XEXP (x, 1))
930 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
932 if (GET_CODE (x) == PARALLEL)
935 for (i = 0; i < XVECLEN (x, 0); i++)
937 rtx y = XVECEXP (x, 0, i);
938 if (REG_P (XEXP (y, 0)))
939 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
944 /* Identify REG (which may be a CONCAT) as a user register. */
947 mark_user_reg (rtx reg)
949 if (GET_CODE (reg) == CONCAT)
951 REG_USERVAR_P (XEXP (reg, 0)) = 1;
952 REG_USERVAR_P (XEXP (reg, 1)) = 1;
954 else if (GET_CODE (reg) == REG)
955 REG_USERVAR_P (reg) = 1;
960 /* Identify REG as a probable pointer register and show its alignment
961 as ALIGN, if nonzero. */
964 mark_reg_pointer (rtx reg, int align)
966 if (! REG_POINTER (reg))
968 REG_POINTER (reg) = 1;
971 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
973 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
974 /* We can no-longer be sure just how aligned this pointer is. */
975 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
978 /* Return 1 plus largest pseudo reg number used in the current function. */
986 /* Return 1 + the largest label number used so far in the current function. */
991 if (last_label_num && label_num == base_label_num)
992 return last_label_num;
996 /* Return first label number used in this function (if any were used). */
999 get_first_label_num (void)
1001 return first_label_num;
1004 /* Return the final regno of X, which is a SUBREG of a hard
1007 subreg_hard_regno (rtx x, int check_mode)
1009 enum machine_mode mode = GET_MODE (x);
1010 unsigned int byte_offset, base_regno, final_regno;
1011 rtx reg = SUBREG_REG (x);
1013 /* This is where we attempt to catch illegal subregs
1014 created by the compiler. */
1015 if (GET_CODE (x) != SUBREG
1016 || GET_CODE (reg) != REG)
1018 base_regno = REGNO (reg);
1019 if (base_regno >= FIRST_PSEUDO_REGISTER)
1021 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
1023 #ifdef ENABLE_CHECKING
1024 if (!subreg_offset_representable_p (REGNO (reg), GET_MODE (reg),
1025 SUBREG_BYTE (x), mode))
1028 /* Catch non-congruent offsets too. */
1029 byte_offset = SUBREG_BYTE (x);
1030 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
1033 final_regno = subreg_regno (x);
1038 /* Return a value representing some low-order bits of X, where the number
1039 of low-order bits is given by MODE. Note that no conversion is done
1040 between floating-point and fixed-point values, rather, the bit
1041 representation is returned.
1043 This function handles the cases in common between gen_lowpart, below,
1044 and two variants in cse.c and combine.c. These are the cases that can
1045 be safely handled at all points in the compilation.
1047 If this is not a case we can handle, return 0. */
1050 gen_lowpart_common (enum machine_mode mode, rtx x)
1052 int msize = GET_MODE_SIZE (mode);
1055 enum machine_mode innermode;
1057 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1058 so we have to make one up. Yuk. */
1059 innermode = GET_MODE (x);
1060 if (GET_CODE (x) == CONST_INT && msize <= HOST_BITS_PER_WIDE_INT)
1061 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1062 else if (innermode == VOIDmode)
1063 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1065 xsize = GET_MODE_SIZE (innermode);
1067 if (innermode == VOIDmode || innermode == BLKmode)
1070 if (innermode == mode)
1073 /* MODE must occupy no more words than the mode of X. */
1074 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1075 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1078 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1079 if (GET_MODE_CLASS (mode) == MODE_FLOAT && msize > xsize)
1082 offset = subreg_lowpart_offset (mode, innermode);
1084 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1085 && (GET_MODE_CLASS (mode) == MODE_INT
1086 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1088 /* If we are getting the low-order part of something that has been
1089 sign- or zero-extended, we can either just use the object being
1090 extended or make a narrower extension. If we want an even smaller
1091 piece than the size of the object being extended, call ourselves
1094 This case is used mostly by combine and cse. */
1096 if (GET_MODE (XEXP (x, 0)) == mode)
1098 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1099 return gen_lowpart_common (mode, XEXP (x, 0));
1100 else if (msize < xsize)
1101 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1103 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
1104 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1105 || GET_CODE (x) == CONST_DOUBLE || GET_CODE (x) == CONST_INT)
1106 return simplify_gen_subreg (mode, x, innermode, offset);
1108 /* Otherwise, we can't do this. */
1112 /* Return the constant real or imaginary part (which has mode MODE)
1113 of a complex value X. The IMAGPART_P argument determines whether
1114 the real or complex component should be returned. This function
1115 returns NULL_RTX if the component isn't a constant. */
1118 gen_complex_constant_part (enum machine_mode mode, rtx x, int imagpart_p)
1122 if (GET_CODE (x) == MEM
1123 && GET_CODE (XEXP (x, 0)) == SYMBOL_REF)
1125 decl = SYMBOL_REF_DECL (XEXP (x, 0));
1126 if (decl != NULL_TREE && TREE_CODE (decl) == COMPLEX_CST)
1128 part = imagpart_p ? TREE_IMAGPART (decl) : TREE_REALPART (decl);
1129 if (TREE_CODE (part) == REAL_CST
1130 || TREE_CODE (part) == INTEGER_CST)
1131 return expand_expr (part, NULL_RTX, mode, 0);
1137 /* Return the real part (which has mode MODE) of a complex value X.
1138 This always comes at the low address in memory. */
1141 gen_realpart (enum machine_mode mode, rtx x)
1145 /* Handle complex constants. */
1146 part = gen_complex_constant_part (mode, x, 0);
1147 if (part != NULL_RTX)
1150 if (WORDS_BIG_ENDIAN
1151 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1153 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1155 ("can't access real part of complex value in hard register");
1156 else if (WORDS_BIG_ENDIAN)
1157 return gen_highpart (mode, x);
1159 return gen_lowpart (mode, x);
1162 /* Return the imaginary part (which has mode MODE) of a complex value X.
1163 This always comes at the high address in memory. */
1166 gen_imagpart (enum machine_mode mode, rtx x)
1170 /* Handle complex constants. */
1171 part = gen_complex_constant_part (mode, x, 1);
1172 if (part != NULL_RTX)
1175 if (WORDS_BIG_ENDIAN)
1176 return gen_lowpart (mode, x);
1177 else if (! WORDS_BIG_ENDIAN
1178 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1180 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1182 ("can't access imaginary part of complex value in hard register");
1184 return gen_highpart (mode, x);
1187 /* Return 1 iff X, assumed to be a SUBREG,
1188 refers to the real part of the complex value in its containing reg.
1189 Complex values are always stored with the real part in the first word,
1190 regardless of WORDS_BIG_ENDIAN. */
1193 subreg_realpart_p (rtx x)
1195 if (GET_CODE (x) != SUBREG)
1198 return ((unsigned int) SUBREG_BYTE (x)
1199 < (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1202 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1203 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1204 least-significant part of X.
1205 MODE specifies how big a part of X to return;
1206 it usually should not be larger than a word.
1207 If X is a MEM whose address is a QUEUED, the value may be so also. */
1210 gen_lowpart (enum machine_mode mode, rtx x)
1212 rtx result = gen_lowpart_common (mode, x);
1216 else if (GET_CODE (x) == REG)
1218 /* Must be a hard reg that's not valid in MODE. */
1219 result = gen_lowpart_common (mode, copy_to_reg (x));
1224 else if (GET_CODE (x) == MEM)
1226 /* The only additional case we can do is MEM. */
1229 /* The following exposes the use of "x" to CSE. */
1230 if (GET_MODE_SIZE (GET_MODE (x)) <= UNITS_PER_WORD
1231 && SCALAR_INT_MODE_P (GET_MODE (x))
1232 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode),
1233 GET_MODE_BITSIZE (GET_MODE (x)))
1234 && ! no_new_pseudos)
1235 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1237 if (WORDS_BIG_ENDIAN)
1238 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1239 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1241 if (BYTES_BIG_ENDIAN)
1242 /* Adjust the address so that the address-after-the-data
1244 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1245 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1247 return adjust_address (x, mode, offset);
1249 else if (GET_CODE (x) == ADDRESSOF)
1250 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1255 /* Like `gen_lowpart', but refer to the most significant part.
1256 This is used to access the imaginary part of a complex number. */
1259 gen_highpart (enum machine_mode mode, rtx x)
1261 unsigned int msize = GET_MODE_SIZE (mode);
1264 /* This case loses if X is a subreg. To catch bugs early,
1265 complain if an invalid MODE is used even in other cases. */
1266 if (msize > UNITS_PER_WORD
1267 && msize != (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)))
1270 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1271 subreg_highpart_offset (mode, GET_MODE (x)));
1273 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1274 the target if we have a MEM. gen_highpart must return a valid operand,
1275 emitting code if necessary to do so. */
1276 if (result != NULL_RTX && GET_CODE (result) == MEM)
1277 result = validize_mem (result);
1284 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1285 be VOIDmode constant. */
1287 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1289 if (GET_MODE (exp) != VOIDmode)
1291 if (GET_MODE (exp) != innermode)
1293 return gen_highpart (outermode, exp);
1295 return simplify_gen_subreg (outermode, exp, innermode,
1296 subreg_highpart_offset (outermode, innermode));
1299 /* Return offset in bytes to get OUTERMODE low part
1300 of the value in mode INNERMODE stored in memory in target format. */
1303 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1305 unsigned int offset = 0;
1306 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1310 if (WORDS_BIG_ENDIAN)
1311 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1312 if (BYTES_BIG_ENDIAN)
1313 offset += difference % UNITS_PER_WORD;
1319 /* Return offset in bytes to get OUTERMODE high part
1320 of the value in mode INNERMODE stored in memory in target format. */
1322 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1324 unsigned int offset = 0;
1325 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1327 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1332 if (! WORDS_BIG_ENDIAN)
1333 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1334 if (! BYTES_BIG_ENDIAN)
1335 offset += difference % UNITS_PER_WORD;
1341 /* Return 1 iff X, assumed to be a SUBREG,
1342 refers to the least significant part of its containing reg.
1343 If X is not a SUBREG, always return 1 (it is its own low part!). */
1346 subreg_lowpart_p (rtx x)
1348 if (GET_CODE (x) != SUBREG)
1350 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1353 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1354 == SUBREG_BYTE (x));
1357 /* Return subword OFFSET of operand OP.
1358 The word number, OFFSET, is interpreted as the word number starting
1359 at the low-order address. OFFSET 0 is the low-order word if not
1360 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1362 If we cannot extract the required word, we return zero. Otherwise,
1363 an rtx corresponding to the requested word will be returned.
1365 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1366 reload has completed, a valid address will always be returned. After
1367 reload, if a valid address cannot be returned, we return zero.
1369 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1370 it is the responsibility of the caller.
1372 MODE is the mode of OP in case it is a CONST_INT.
1374 ??? This is still rather broken for some cases. The problem for the
1375 moment is that all callers of this thing provide no 'goal mode' to
1376 tell us to work with. This exists because all callers were written
1377 in a word based SUBREG world.
1378 Now use of this function can be deprecated by simplify_subreg in most
1383 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1385 if (mode == VOIDmode)
1386 mode = GET_MODE (op);
1388 if (mode == VOIDmode)
1391 /* If OP is narrower than a word, fail. */
1393 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1396 /* If we want a word outside OP, return zero. */
1398 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1401 /* Form a new MEM at the requested address. */
1402 if (GET_CODE (op) == MEM)
1404 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1406 if (! validate_address)
1409 else if (reload_completed)
1411 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1415 return replace_equiv_address (new, XEXP (new, 0));
1418 /* Rest can be handled by simplify_subreg. */
1419 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1422 /* Similar to `operand_subword', but never return 0. If we can't extract
1423 the required subword, put OP into a register and try again. If that fails,
1424 abort. We always validate the address in this case.
1426 MODE is the mode of OP, in case it is CONST_INT. */
1429 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1431 rtx result = operand_subword (op, offset, 1, mode);
1436 if (mode != BLKmode && mode != VOIDmode)
1438 /* If this is a register which can not be accessed by words, copy it
1439 to a pseudo register. */
1440 if (GET_CODE (op) == REG)
1441 op = copy_to_reg (op);
1443 op = force_reg (mode, op);
1446 result = operand_subword (op, offset, 1, mode);
1453 /* Given a compare instruction, swap the operands.
1454 A test instruction is changed into a compare of 0 against the operand. */
1457 reverse_comparison (rtx insn)
1459 rtx body = PATTERN (insn);
1462 if (GET_CODE (body) == SET)
1463 comp = SET_SRC (body);
1465 comp = SET_SRC (XVECEXP (body, 0, 0));
1467 if (GET_CODE (comp) == COMPARE)
1469 rtx op0 = XEXP (comp, 0);
1470 rtx op1 = XEXP (comp, 1);
1471 XEXP (comp, 0) = op1;
1472 XEXP (comp, 1) = op0;
1476 rtx new = gen_rtx_COMPARE (VOIDmode,
1477 CONST0_RTX (GET_MODE (comp)), comp);
1478 if (GET_CODE (body) == SET)
1479 SET_SRC (body) = new;
1481 SET_SRC (XVECEXP (body, 0, 0)) = new;
1485 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1486 or (2) a component ref of something variable. Represent the later with
1487 a NULL expression. */
1490 component_ref_for_mem_expr (tree ref)
1492 tree inner = TREE_OPERAND (ref, 0);
1494 if (TREE_CODE (inner) == COMPONENT_REF)
1495 inner = component_ref_for_mem_expr (inner);
1498 tree placeholder_ptr = 0;
1500 /* Now remove any conversions: they don't change what the underlying
1501 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1502 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1503 || TREE_CODE (inner) == NON_LVALUE_EXPR
1504 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1505 || TREE_CODE (inner) == SAVE_EXPR
1506 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1507 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1508 inner = find_placeholder (inner, &placeholder_ptr);
1510 inner = TREE_OPERAND (inner, 0);
1512 if (! DECL_P (inner))
1516 if (inner == TREE_OPERAND (ref, 0))
1519 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1520 TREE_OPERAND (ref, 1));
1523 /* Returns 1 if both MEM_EXPR can be considered equal
1527 mem_expr_equal_p (tree expr1, tree expr2)
1532 if (! expr1 || ! expr2)
1535 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1538 if (TREE_CODE (expr1) == COMPONENT_REF)
1540 mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1541 TREE_OPERAND (expr2, 0))
1542 && mem_expr_equal_p (TREE_OPERAND (expr1, 1), /* field decl */
1543 TREE_OPERAND (expr2, 1));
1545 if (TREE_CODE (expr1) == INDIRECT_REF)
1546 return mem_expr_equal_p (TREE_OPERAND (expr1, 0),
1547 TREE_OPERAND (expr2, 0));
1549 /* Decls with different pointers can't be equal. */
1553 abort(); /* ARRAY_REFs, ARRAY_RANGE_REFs and BIT_FIELD_REFs should already
1554 have been resolved here. */
1557 /* Given REF, a MEM, and T, either the type of X or the expression
1558 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1559 if we are making a new object of this type. BITPOS is nonzero if
1560 there is an offset outstanding on T that will be applied later. */
1563 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1564 HOST_WIDE_INT bitpos)
1566 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1567 tree expr = MEM_EXPR (ref);
1568 rtx offset = MEM_OFFSET (ref);
1569 rtx size = MEM_SIZE (ref);
1570 unsigned int align = MEM_ALIGN (ref);
1571 HOST_WIDE_INT apply_bitpos = 0;
1574 /* It can happen that type_for_mode was given a mode for which there
1575 is no language-level type. In which case it returns NULL, which
1580 type = TYPE_P (t) ? t : TREE_TYPE (t);
1581 if (type == error_mark_node)
1584 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1585 wrong answer, as it assumes that DECL_RTL already has the right alias
1586 info. Callers should not set DECL_RTL until after the call to
1587 set_mem_attributes. */
1588 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1591 /* Get the alias set from the expression or type (perhaps using a
1592 front-end routine) and use it. */
1593 alias = get_alias_set (t);
1595 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1596 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1597 RTX_UNCHANGING_P (ref)
1598 |= ((lang_hooks.honor_readonly
1599 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1600 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1602 /* If we are making an object of this type, or if this is a DECL, we know
1603 that it is a scalar if the type is not an aggregate. */
1604 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1605 MEM_SCALAR_P (ref) = 1;
1607 /* We can set the alignment from the type if we are making an object,
1608 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1609 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1610 align = MAX (align, TYPE_ALIGN (type));
1612 /* If the size is known, we can set that. */
1613 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1614 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1616 /* If T is not a type, we may be able to deduce some more information about
1620 maybe_set_unchanging (ref, t);
1621 if (TREE_THIS_VOLATILE (t))
1622 MEM_VOLATILE_P (ref) = 1;
1624 /* Now remove any conversions: they don't change what the underlying
1625 object is. Likewise for SAVE_EXPR. */
1626 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1627 || TREE_CODE (t) == NON_LVALUE_EXPR
1628 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1629 || TREE_CODE (t) == SAVE_EXPR)
1630 t = TREE_OPERAND (t, 0);
1632 /* If this expression can't be addressed (e.g., it contains a reference
1633 to a non-addressable field), show we don't change its alias set. */
1634 if (! can_address_p (t))
1635 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1637 /* If this is a decl, set the attributes of the MEM from it. */
1641 offset = const0_rtx;
1642 apply_bitpos = bitpos;
1643 size = (DECL_SIZE_UNIT (t)
1644 && host_integerp (DECL_SIZE_UNIT (t), 1)
1645 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1646 align = DECL_ALIGN (t);
1649 /* If this is a constant, we know the alignment. */
1650 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1652 align = TYPE_ALIGN (type);
1653 #ifdef CONSTANT_ALIGNMENT
1654 align = CONSTANT_ALIGNMENT (t, align);
1658 /* If this is a field reference and not a bit-field, record it. */
1659 /* ??? There is some information that can be gleened from bit-fields,
1660 such as the word offset in the structure that might be modified.
1661 But skip it for now. */
1662 else if (TREE_CODE (t) == COMPONENT_REF
1663 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1665 expr = component_ref_for_mem_expr (t);
1666 offset = const0_rtx;
1667 apply_bitpos = bitpos;
1668 /* ??? Any reason the field size would be different than
1669 the size we got from the type? */
1672 /* If this is an array reference, look for an outer field reference. */
1673 else if (TREE_CODE (t) == ARRAY_REF)
1675 tree off_tree = size_zero_node;
1676 /* We can't modify t, because we use it at the end of the
1682 tree index = TREE_OPERAND (t2, 1);
1683 tree array = TREE_OPERAND (t2, 0);
1684 tree domain = TYPE_DOMAIN (TREE_TYPE (array));
1685 tree low_bound = (domain ? TYPE_MIN_VALUE (domain) : 0);
1686 tree unit_size = TYPE_SIZE_UNIT (TREE_TYPE (TREE_TYPE (array)));
1688 /* We assume all arrays have sizes that are a multiple of a byte.
1689 First subtract the lower bound, if any, in the type of the
1690 index, then convert to sizetype and multiply by the size of the
1692 if (low_bound != 0 && ! integer_zerop (low_bound))
1693 index = fold (build (MINUS_EXPR, TREE_TYPE (index),
1696 /* If the index has a self-referential type, pass it to a
1697 WITH_RECORD_EXPR; if the component size is, pass our
1698 component to one. */
1699 if (CONTAINS_PLACEHOLDER_P (index))
1700 index = build (WITH_RECORD_EXPR, TREE_TYPE (index), index, t2);
1701 if (CONTAINS_PLACEHOLDER_P (unit_size))
1702 unit_size = build (WITH_RECORD_EXPR, sizetype,
1706 = fold (build (PLUS_EXPR, sizetype,
1707 fold (build (MULT_EXPR, sizetype,
1711 t2 = TREE_OPERAND (t2, 0);
1713 while (TREE_CODE (t2) == ARRAY_REF);
1719 if (host_integerp (off_tree, 1))
1721 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1722 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1723 align = DECL_ALIGN (t2);
1724 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1726 offset = GEN_INT (ioff);
1727 apply_bitpos = bitpos;
1730 else if (TREE_CODE (t2) == COMPONENT_REF)
1732 expr = component_ref_for_mem_expr (t2);
1733 if (host_integerp (off_tree, 1))
1735 offset = GEN_INT (tree_low_cst (off_tree, 1));
1736 apply_bitpos = bitpos;
1738 /* ??? Any reason the field size would be different than
1739 the size we got from the type? */
1741 else if (flag_argument_noalias > 1
1742 && TREE_CODE (t2) == INDIRECT_REF
1743 && TREE_CODE (TREE_OPERAND (t2, 0)) == PARM_DECL)
1750 /* If this is a Fortran indirect argument reference, record the
1752 else if (flag_argument_noalias > 1
1753 && TREE_CODE (t) == INDIRECT_REF
1754 && TREE_CODE (TREE_OPERAND (t, 0)) == PARM_DECL)
1761 /* If we modified OFFSET based on T, then subtract the outstanding
1762 bit position offset. Similarly, increase the size of the accessed
1763 object to contain the negative offset. */
1766 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1768 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1771 /* Now set the attributes we computed above. */
1773 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1775 /* If this is already known to be a scalar or aggregate, we are done. */
1776 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1779 /* If it is a reference into an aggregate, this is part of an aggregate.
1780 Otherwise we don't know. */
1781 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1782 || TREE_CODE (t) == ARRAY_RANGE_REF
1783 || TREE_CODE (t) == BIT_FIELD_REF)
1784 MEM_IN_STRUCT_P (ref) = 1;
1788 set_mem_attributes (rtx ref, tree t, int objectp)
1790 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1793 /* Set the decl for MEM to DECL. */
1796 set_mem_attrs_from_reg (rtx mem, rtx reg)
1799 = get_mem_attrs (MEM_ALIAS_SET (mem), REG_EXPR (reg),
1800 GEN_INT (REG_OFFSET (reg)),
1801 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1804 /* Set the alias set of MEM to SET. */
1807 set_mem_alias_set (rtx mem, HOST_WIDE_INT set)
1809 #ifdef ENABLE_CHECKING
1810 /* If the new and old alias sets don't conflict, something is wrong. */
1811 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1815 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1816 MEM_SIZE (mem), MEM_ALIGN (mem),
1820 /* Set the alignment of MEM to ALIGN bits. */
1823 set_mem_align (rtx mem, unsigned int align)
1825 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1826 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1830 /* Set the expr for MEM to EXPR. */
1833 set_mem_expr (rtx mem, tree expr)
1836 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1837 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1840 /* Set the offset of MEM to OFFSET. */
1843 set_mem_offset (rtx mem, rtx offset)
1845 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1846 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1850 /* Set the size of MEM to SIZE. */
1853 set_mem_size (rtx mem, rtx size)
1855 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1856 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1860 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1861 and its address changed to ADDR. (VOIDmode means don't change the mode.
1862 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1863 returned memory location is required to be valid. The memory
1864 attributes are not changed. */
1867 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1871 if (GET_CODE (memref) != MEM)
1873 if (mode == VOIDmode)
1874 mode = GET_MODE (memref);
1876 addr = XEXP (memref, 0);
1877 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1878 && (!validate || memory_address_p (mode, addr)))
1883 if (reload_in_progress || reload_completed)
1885 if (! memory_address_p (mode, addr))
1889 addr = memory_address (mode, addr);
1892 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1895 new = gen_rtx_MEM (mode, addr);
1896 MEM_COPY_ATTRIBUTES (new, memref);
1900 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1901 way we are changing MEMREF, so we only preserve the alias set. */
1904 change_address (rtx memref, enum machine_mode mode, rtx addr)
1906 rtx new = change_address_1 (memref, mode, addr, 1), size;
1907 enum machine_mode mmode = GET_MODE (new);
1910 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1911 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1913 /* If there are no changes, just return the original memory reference. */
1916 if (MEM_ATTRS (memref) == 0
1917 || (MEM_EXPR (memref) == NULL
1918 && MEM_OFFSET (memref) == NULL
1919 && MEM_SIZE (memref) == size
1920 && MEM_ALIGN (memref) == align))
1923 new = gen_rtx_MEM (mmode, XEXP (memref, 0));
1924 MEM_COPY_ATTRIBUTES (new, memref);
1928 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align, mmode);
1933 /* Return a memory reference like MEMREF, but with its mode changed
1934 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1935 nonzero, the memory address is forced to be valid.
1936 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1937 and caller is responsible for adjusting MEMREF base register. */
1940 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1941 int validate, int adjust)
1943 rtx addr = XEXP (memref, 0);
1945 rtx memoffset = MEM_OFFSET (memref);
1947 unsigned int memalign = MEM_ALIGN (memref);
1949 /* If there are no changes, just return the original memory reference. */
1950 if (mode == GET_MODE (memref) && !offset
1951 && (!validate || memory_address_p (mode, addr)))
1954 /* ??? Prefer to create garbage instead of creating shared rtl.
1955 This may happen even if offset is nonzero -- consider
1956 (plus (plus reg reg) const_int) -- so do this always. */
1957 addr = copy_rtx (addr);
1961 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1962 object, we can merge it into the LO_SUM. */
1963 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1965 && (unsigned HOST_WIDE_INT) offset
1966 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1967 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1968 plus_constant (XEXP (addr, 1), offset));
1970 addr = plus_constant (addr, offset);
1973 new = change_address_1 (memref, mode, addr, validate);
1975 /* Compute the new values of the memory attributes due to this adjustment.
1976 We add the offsets and update the alignment. */
1978 memoffset = GEN_INT (offset + INTVAL (memoffset));
1980 /* Compute the new alignment by taking the MIN of the alignment and the
1981 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1986 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1988 /* We can compute the size in a number of ways. */
1989 if (GET_MODE (new) != BLKmode)
1990 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1991 else if (MEM_SIZE (memref))
1992 size = plus_constant (MEM_SIZE (memref), -offset);
1994 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1995 memoffset, size, memalign, GET_MODE (new));
1997 /* At some point, we should validate that this offset is within the object,
1998 if all the appropriate values are known. */
2002 /* Return a memory reference like MEMREF, but with its mode changed
2003 to MODE and its address changed to ADDR, which is assumed to be
2004 MEMREF offseted by OFFSET bytes. If VALIDATE is
2005 nonzero, the memory address is forced to be valid. */
2008 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2009 HOST_WIDE_INT offset, int validate)
2011 memref = change_address_1 (memref, VOIDmode, addr, validate);
2012 return adjust_address_1 (memref, mode, offset, validate, 0);
2015 /* Return a memory reference like MEMREF, but whose address is changed by
2016 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2017 known to be in OFFSET (possibly 1). */
2020 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2022 rtx new, addr = XEXP (memref, 0);
2024 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2026 /* At this point we don't know _why_ the address is invalid. It
2027 could have secondary memory references, multiplies or anything.
2029 However, if we did go and rearrange things, we can wind up not
2030 being able to recognize the magic around pic_offset_table_rtx.
2031 This stuff is fragile, and is yet another example of why it is
2032 bad to expose PIC machinery too early. */
2033 if (! memory_address_p (GET_MODE (memref), new)
2034 && GET_CODE (addr) == PLUS
2035 && XEXP (addr, 0) == pic_offset_table_rtx)
2037 addr = force_reg (GET_MODE (addr), addr);
2038 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2041 update_temp_slot_address (XEXP (memref, 0), new);
2042 new = change_address_1 (memref, VOIDmode, new, 1);
2044 /* If there are no changes, just return the original memory reference. */
2048 /* Update the alignment to reflect the offset. Reset the offset, which
2051 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2052 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2057 /* Return a memory reference like MEMREF, but with its address changed to
2058 ADDR. The caller is asserting that the actual piece of memory pointed
2059 to is the same, just the form of the address is being changed, such as
2060 by putting something into a register. */
2063 replace_equiv_address (rtx memref, rtx addr)
2065 /* change_address_1 copies the memory attribute structure without change
2066 and that's exactly what we want here. */
2067 update_temp_slot_address (XEXP (memref, 0), addr);
2068 return change_address_1 (memref, VOIDmode, addr, 1);
2071 /* Likewise, but the reference is not required to be valid. */
2074 replace_equiv_address_nv (rtx memref, rtx addr)
2076 return change_address_1 (memref, VOIDmode, addr, 0);
2079 /* Return a memory reference like MEMREF, but with its mode widened to
2080 MODE and offset by OFFSET. This would be used by targets that e.g.
2081 cannot issue QImode memory operations and have to use SImode memory
2082 operations plus masking logic. */
2085 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2087 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2088 tree expr = MEM_EXPR (new);
2089 rtx memoffset = MEM_OFFSET (new);
2090 unsigned int size = GET_MODE_SIZE (mode);
2092 /* If there are no changes, just return the original memory reference. */
2096 /* If we don't know what offset we were at within the expression, then
2097 we can't know if we've overstepped the bounds. */
2103 if (TREE_CODE (expr) == COMPONENT_REF)
2105 tree field = TREE_OPERAND (expr, 1);
2107 if (! DECL_SIZE_UNIT (field))
2113 /* Is the field at least as large as the access? If so, ok,
2114 otherwise strip back to the containing structure. */
2115 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2116 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2117 && INTVAL (memoffset) >= 0)
2120 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2126 expr = TREE_OPERAND (expr, 0);
2127 memoffset = (GEN_INT (INTVAL (memoffset)
2128 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2129 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2132 /* Similarly for the decl. */
2133 else if (DECL_P (expr)
2134 && DECL_SIZE_UNIT (expr)
2135 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2136 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2137 && (! memoffset || INTVAL (memoffset) >= 0))
2141 /* The widened memory access overflows the expression, which means
2142 that it could alias another expression. Zap it. */
2149 memoffset = NULL_RTX;
2151 /* The widened memory may alias other stuff, so zap the alias set. */
2152 /* ??? Maybe use get_alias_set on any remaining expression. */
2154 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2155 MEM_ALIGN (new), mode);
2160 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2163 gen_label_rtx (void)
2165 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2166 NULL, label_num++, NULL);
2169 /* For procedure integration. */
2171 /* Install new pointers to the first and last insns in the chain.
2172 Also, set cur_insn_uid to one higher than the last in use.
2173 Used for an inline-procedure after copying the insn chain. */
2176 set_new_first_and_last_insn (rtx first, rtx last)
2184 for (insn = first; insn; insn = NEXT_INSN (insn))
2185 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2190 /* Set the last label number found in the current function.
2191 This is used when belatedly compiling an inline function. */
2194 set_new_last_label_num (int last)
2196 base_label_num = label_num;
2197 last_label_num = last;
2200 /* Restore all variables describing the current status from the structure *P.
2201 This is used after a nested function. */
2204 restore_emit_status (struct function *p ATTRIBUTE_UNUSED)
2209 /* Go through all the RTL insn bodies and copy any invalid shared
2210 structure. This routine should only be called once. */
2213 unshare_all_rtl (tree fndecl, rtx insn)
2217 /* Make sure that virtual parameters are not shared. */
2218 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2219 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2221 /* Make sure that virtual stack slots are not shared. */
2222 unshare_all_decls (DECL_INITIAL (fndecl));
2224 /* Unshare just about everything else. */
2225 unshare_all_rtl_in_chain (insn);
2227 /* Make sure the addresses of stack slots found outside the insn chain
2228 (such as, in DECL_RTL of a variable) are not shared
2229 with the insn chain.
2231 This special care is necessary when the stack slot MEM does not
2232 actually appear in the insn chain. If it does appear, its address
2233 is unshared from all else at that point. */
2234 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2237 /* Go through all the RTL insn bodies and copy any invalid shared
2238 structure, again. This is a fairly expensive thing to do so it
2239 should be done sparingly. */
2242 unshare_all_rtl_again (rtx insn)
2247 for (p = insn; p; p = NEXT_INSN (p))
2250 reset_used_flags (PATTERN (p));
2251 reset_used_flags (REG_NOTES (p));
2252 reset_used_flags (LOG_LINKS (p));
2255 /* Make sure that virtual stack slots are not shared. */
2256 reset_used_decls (DECL_INITIAL (cfun->decl));
2258 /* Make sure that virtual parameters are not shared. */
2259 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2260 reset_used_flags (DECL_RTL (decl));
2262 reset_used_flags (stack_slot_list);
2264 unshare_all_rtl (cfun->decl, insn);
2267 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2268 Recursively does the same for subexpressions. */
2271 verify_rtx_sharing (rtx orig, rtx insn)
2276 const char *format_ptr;
2281 code = GET_CODE (x);
2283 /* These types may be freely shared. */
2298 /* SCRATCH must be shared because they represent distinct values. */
2302 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2303 a LABEL_REF, it isn't sharable. */
2304 if (GET_CODE (XEXP (x, 0)) == PLUS
2305 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2306 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2311 /* A MEM is allowed to be shared if its address is constant. */
2312 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2313 || reload_completed || reload_in_progress)
2322 /* This rtx may not be shared. If it has already been seen,
2323 replace it with a copy of itself. */
2325 if (RTX_FLAG (x, used))
2327 error ("Invalid rtl sharing found in the insn");
2329 error ("Shared rtx");
2333 RTX_FLAG (x, used) = 1;
2335 /* Now scan the subexpressions recursively. */
2337 format_ptr = GET_RTX_FORMAT (code);
2339 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2341 switch (*format_ptr++)
2344 verify_rtx_sharing (XEXP (x, i), insn);
2348 if (XVEC (x, i) != NULL)
2351 int len = XVECLEN (x, i);
2353 for (j = 0; j < len; j++)
2355 /* We allow sharing of ASM_OPERANDS inside single instruction. */
2356 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2357 && GET_CODE (SET_SRC (XVECEXP (x, i, j))) == ASM_OPERANDS)
2358 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2360 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2369 /* Go through all the RTL insn bodies and check that there is no unexpected
2370 sharing in between the subexpressions. */
2373 verify_rtl_sharing (void)
2377 for (p = get_insns (); p; p = NEXT_INSN (p))
2380 reset_used_flags (PATTERN (p));
2381 reset_used_flags (REG_NOTES (p));
2382 reset_used_flags (LOG_LINKS (p));
2385 for (p = get_insns (); p; p = NEXT_INSN (p))
2388 verify_rtx_sharing (PATTERN (p), p);
2389 verify_rtx_sharing (REG_NOTES (p), p);
2390 verify_rtx_sharing (LOG_LINKS (p), p);
2394 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2395 Assumes the mark bits are cleared at entry. */
2398 unshare_all_rtl_in_chain (rtx insn)
2400 for (; insn; insn = NEXT_INSN (insn))
2403 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2404 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2405 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2409 /* Go through all virtual stack slots of a function and copy any
2410 shared structure. */
2412 unshare_all_decls (tree blk)
2416 /* Copy shared decls. */
2417 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2418 if (DECL_RTL_SET_P (t))
2419 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2421 /* Now process sub-blocks. */
2422 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2423 unshare_all_decls (t);
2426 /* Go through all virtual stack slots of a function and mark them as
2429 reset_used_decls (tree blk)
2434 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2435 if (DECL_RTL_SET_P (t))
2436 reset_used_flags (DECL_RTL (t));
2438 /* Now process sub-blocks. */
2439 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2440 reset_used_decls (t);
2443 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2444 placed in the result directly, rather than being copied. MAY_SHARE is
2445 either a MEM of an EXPR_LIST of MEMs. */
2448 copy_most_rtx (rtx orig, rtx may_share)
2453 const char *format_ptr;
2455 if (orig == may_share
2456 || (GET_CODE (may_share) == EXPR_LIST
2457 && in_expr_list_p (may_share, orig)))
2460 code = GET_CODE (orig);
2478 copy = rtx_alloc (code);
2479 PUT_MODE (copy, GET_MODE (orig));
2480 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2481 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2482 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2483 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2484 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2486 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2488 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2490 switch (*format_ptr++)
2493 XEXP (copy, i) = XEXP (orig, i);
2494 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2495 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2499 XEXP (copy, i) = XEXP (orig, i);
2504 XVEC (copy, i) = XVEC (orig, i);
2505 if (XVEC (orig, i) != NULL)
2507 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2508 for (j = 0; j < XVECLEN (copy, i); j++)
2509 XVECEXP (copy, i, j)
2510 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2515 XWINT (copy, i) = XWINT (orig, i);
2520 XINT (copy, i) = XINT (orig, i);
2524 XTREE (copy, i) = XTREE (orig, i);
2529 XSTR (copy, i) = XSTR (orig, i);
2533 X0ANY (copy, i) = X0ANY (orig, i);
2543 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2544 Recursively does the same for subexpressions. Uses
2545 copy_rtx_if_shared_1 to reduce stack space. */
2548 copy_rtx_if_shared (rtx orig)
2550 copy_rtx_if_shared_1 (&orig);
2554 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2555 use. Recursively does the same for subexpressions. */
2558 copy_rtx_if_shared_1 (rtx *orig1)
2564 const char *format_ptr;
2568 /* Repeat is used to turn tail-recursion into iteration. */
2575 code = GET_CODE (x);
2577 /* These types may be freely shared. */
2592 /* SCRATCH must be shared because they represent distinct values. */
2596 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2597 a LABEL_REF, it isn't sharable. */
2598 if (GET_CODE (XEXP (x, 0)) == PLUS
2599 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2600 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2609 /* The chain of insns is not being copied. */
2616 /* This rtx may not be shared. If it has already been seen,
2617 replace it with a copy of itself. */
2619 if (RTX_FLAG (x, used))
2623 copy = rtx_alloc (code);
2624 memcpy (copy, x, RTX_SIZE (code));
2628 RTX_FLAG (x, used) = 1;
2630 /* Now scan the subexpressions recursively.
2631 We can store any replaced subexpressions directly into X
2632 since we know X is not shared! Any vectors in X
2633 must be copied if X was copied. */
2635 format_ptr = GET_RTX_FORMAT (code);
2636 length = GET_RTX_LENGTH (code);
2639 for (i = 0; i < length; i++)
2641 switch (*format_ptr++)
2645 copy_rtx_if_shared_1 (last_ptr);
2646 last_ptr = &XEXP (x, i);
2650 if (XVEC (x, i) != NULL)
2653 int len = XVECLEN (x, i);
2655 /* Copy the vector iff I copied the rtx and the length
2657 if (copied && len > 0)
2658 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2660 /* Call recursively on all inside the vector. */
2661 for (j = 0; j < len; j++)
2664 copy_rtx_if_shared_1 (last_ptr);
2665 last_ptr = &XVECEXP (x, i, j);
2680 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2681 to look for shared sub-parts. */
2684 reset_used_flags (rtx x)
2688 const char *format_ptr;
2691 /* Repeat is used to turn tail-recursion into iteration. */
2696 code = GET_CODE (x);
2698 /* These types may be freely shared so we needn't do any resetting
2720 /* The chain of insns is not being copied. */
2727 RTX_FLAG (x, used) = 0;
2729 format_ptr = GET_RTX_FORMAT (code);
2730 length = GET_RTX_LENGTH (code);
2732 for (i = 0; i < length; i++)
2734 switch (*format_ptr++)
2742 reset_used_flags (XEXP (x, i));
2746 for (j = 0; j < XVECLEN (x, i); j++)
2747 reset_used_flags (XVECEXP (x, i, j));
2753 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2754 to look for shared sub-parts. */
2757 set_used_flags (rtx x)
2761 const char *format_ptr;
2766 code = GET_CODE (x);
2768 /* These types may be freely shared so we needn't do any resetting
2790 /* The chain of insns is not being copied. */
2797 RTX_FLAG (x, used) = 1;
2799 format_ptr = GET_RTX_FORMAT (code);
2800 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2802 switch (*format_ptr++)
2805 set_used_flags (XEXP (x, i));
2809 for (j = 0; j < XVECLEN (x, i); j++)
2810 set_used_flags (XVECEXP (x, i, j));
2816 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2817 Return X or the rtx for the pseudo reg the value of X was copied into.
2818 OTHER must be valid as a SET_DEST. */
2821 make_safe_from (rtx x, rtx other)
2824 switch (GET_CODE (other))
2827 other = SUBREG_REG (other);
2829 case STRICT_LOW_PART:
2832 other = XEXP (other, 0);
2838 if ((GET_CODE (other) == MEM
2840 && GET_CODE (x) != REG
2841 && GET_CODE (x) != SUBREG)
2842 || (GET_CODE (other) == REG
2843 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2844 || reg_mentioned_p (other, x))))
2846 rtx temp = gen_reg_rtx (GET_MODE (x));
2847 emit_move_insn (temp, x);
2853 /* Emission of insns (adding them to the doubly-linked list). */
2855 /* Return the first insn of the current sequence or current function. */
2863 /* Specify a new insn as the first in the chain. */
2866 set_first_insn (rtx insn)
2868 if (PREV_INSN (insn) != 0)
2873 /* Return the last insn emitted in current sequence or current function. */
2876 get_last_insn (void)
2881 /* Specify a new insn as the last in the chain. */
2884 set_last_insn (rtx insn)
2886 if (NEXT_INSN (insn) != 0)
2891 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2894 get_last_insn_anywhere (void)
2896 struct sequence_stack *stack;
2899 for (stack = seq_stack; stack; stack = stack->next)
2900 if (stack->last != 0)
2905 /* Return the first nonnote insn emitted in current sequence or current
2906 function. This routine looks inside SEQUENCEs. */
2909 get_first_nonnote_insn (void)
2911 rtx insn = first_insn;
2915 insn = next_insn (insn);
2916 if (insn == 0 || GET_CODE (insn) != NOTE)
2923 /* Return the last nonnote insn emitted in current sequence or current
2924 function. This routine looks inside SEQUENCEs. */
2927 get_last_nonnote_insn (void)
2929 rtx insn = last_insn;
2933 insn = previous_insn (insn);
2934 if (insn == 0 || GET_CODE (insn) != NOTE)
2941 /* Return a number larger than any instruction's uid in this function. */
2946 return cur_insn_uid;
2949 /* Renumber instructions so that no instruction UIDs are wasted. */
2952 renumber_insns (FILE *stream)
2956 /* If we're not supposed to renumber instructions, don't. */
2957 if (!flag_renumber_insns)
2960 /* If there aren't that many instructions, then it's not really
2961 worth renumbering them. */
2962 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2967 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2970 fprintf (stream, "Renumbering insn %d to %d\n",
2971 INSN_UID (insn), cur_insn_uid);
2972 INSN_UID (insn) = cur_insn_uid++;
2976 /* Return the next insn. If it is a SEQUENCE, return the first insn
2980 next_insn (rtx insn)
2984 insn = NEXT_INSN (insn);
2985 if (insn && GET_CODE (insn) == INSN
2986 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2987 insn = XVECEXP (PATTERN (insn), 0, 0);
2993 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2997 previous_insn (rtx insn)
3001 insn = PREV_INSN (insn);
3002 if (insn && GET_CODE (insn) == INSN
3003 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3004 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3010 /* Return the next insn after INSN that is not a NOTE. This routine does not
3011 look inside SEQUENCEs. */
3014 next_nonnote_insn (rtx insn)
3018 insn = NEXT_INSN (insn);
3019 if (insn == 0 || GET_CODE (insn) != NOTE)
3026 /* Return the previous insn before INSN that is not a NOTE. This routine does
3027 not look inside SEQUENCEs. */
3030 prev_nonnote_insn (rtx insn)
3034 insn = PREV_INSN (insn);
3035 if (insn == 0 || GET_CODE (insn) != NOTE)
3042 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3043 or 0, if there is none. This routine does not look inside
3047 next_real_insn (rtx insn)
3051 insn = NEXT_INSN (insn);
3052 if (insn == 0 || GET_CODE (insn) == INSN
3053 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
3060 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3061 or 0, if there is none. This routine does not look inside
3065 prev_real_insn (rtx insn)
3069 insn = PREV_INSN (insn);
3070 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
3071 || GET_CODE (insn) == JUMP_INSN)
3078 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3079 This routine does not look inside SEQUENCEs. */
3082 last_call_insn (void)
3086 for (insn = get_last_insn ();
3087 insn && GET_CODE (insn) != CALL_INSN;
3088 insn = PREV_INSN (insn))
3094 /* Find the next insn after INSN that really does something. This routine
3095 does not look inside SEQUENCEs. Until reload has completed, this is the
3096 same as next_real_insn. */
3099 active_insn_p (rtx insn)
3101 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
3102 || (GET_CODE (insn) == INSN
3103 && (! reload_completed
3104 || (GET_CODE (PATTERN (insn)) != USE
3105 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3109 next_active_insn (rtx insn)
3113 insn = NEXT_INSN (insn);
3114 if (insn == 0 || active_insn_p (insn))
3121 /* Find the last insn before INSN that really does something. This routine
3122 does not look inside SEQUENCEs. Until reload has completed, this is the
3123 same as prev_real_insn. */
3126 prev_active_insn (rtx insn)
3130 insn = PREV_INSN (insn);
3131 if (insn == 0 || active_insn_p (insn))
3138 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3141 next_label (rtx insn)
3145 insn = NEXT_INSN (insn);
3146 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3153 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3156 prev_label (rtx insn)
3160 insn = PREV_INSN (insn);
3161 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
3169 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3170 and REG_CC_USER notes so we can find it. */
3173 link_cc0_insns (rtx insn)
3175 rtx user = next_nonnote_insn (insn);
3177 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
3178 user = XVECEXP (PATTERN (user), 0, 0);
3180 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
3182 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
3185 /* Return the next insn that uses CC0 after INSN, which is assumed to
3186 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3187 applied to the result of this function should yield INSN).
3189 Normally, this is simply the next insn. However, if a REG_CC_USER note
3190 is present, it contains the insn that uses CC0.
3192 Return 0 if we can't find the insn. */
3195 next_cc0_user (rtx insn)
3197 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3200 return XEXP (note, 0);
3202 insn = next_nonnote_insn (insn);
3203 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3204 insn = XVECEXP (PATTERN (insn), 0, 0);
3206 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3212 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3213 note, it is the previous insn. */
3216 prev_cc0_setter (rtx insn)
3218 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3221 return XEXP (note, 0);
3223 insn = prev_nonnote_insn (insn);
3224 if (! sets_cc0_p (PATTERN (insn)))
3231 /* Increment the label uses for all labels present in rtx. */
3234 mark_label_nuses (rtx x)
3240 code = GET_CODE (x);
3241 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3242 LABEL_NUSES (XEXP (x, 0))++;
3244 fmt = GET_RTX_FORMAT (code);
3245 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3248 mark_label_nuses (XEXP (x, i));
3249 else if (fmt[i] == 'E')
3250 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3251 mark_label_nuses (XVECEXP (x, i, j));
3256 /* Try splitting insns that can be split for better scheduling.
3257 PAT is the pattern which might split.
3258 TRIAL is the insn providing PAT.
3259 LAST is nonzero if we should return the last insn of the sequence produced.
3261 If this routine succeeds in splitting, it returns the first or last
3262 replacement insn depending on the value of LAST. Otherwise, it
3263 returns TRIAL. If the insn to be returned can be split, it will be. */
3266 try_split (rtx pat, rtx trial, int last)
3268 rtx before = PREV_INSN (trial);
3269 rtx after = NEXT_INSN (trial);
3270 int has_barrier = 0;
3274 rtx insn_last, insn;
3277 if (any_condjump_p (trial)
3278 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3279 split_branch_probability = INTVAL (XEXP (note, 0));
3280 probability = split_branch_probability;
3282 seq = split_insns (pat, trial);
3284 split_branch_probability = -1;
3286 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3287 We may need to handle this specially. */
3288 if (after && GET_CODE (after) == BARRIER)
3291 after = NEXT_INSN (after);
3297 /* Avoid infinite loop if any insn of the result matches
3298 the original pattern. */
3302 if (INSN_P (insn_last)
3303 && rtx_equal_p (PATTERN (insn_last), pat))
3305 if (!NEXT_INSN (insn_last))
3307 insn_last = NEXT_INSN (insn_last);
3311 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3313 if (GET_CODE (insn) == JUMP_INSN)
3315 mark_jump_label (PATTERN (insn), insn, 0);
3317 if (probability != -1
3318 && any_condjump_p (insn)
3319 && !find_reg_note (insn, REG_BR_PROB, 0))
3321 /* We can preserve the REG_BR_PROB notes only if exactly
3322 one jump is created, otherwise the machine description
3323 is responsible for this step using
3324 split_branch_probability variable. */
3328 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3329 GEN_INT (probability),
3335 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3336 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3337 if (GET_CODE (trial) == CALL_INSN)
3339 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3340 if (GET_CODE (insn) == CALL_INSN)
3342 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3345 *p = CALL_INSN_FUNCTION_USAGE (trial);
3346 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3350 /* Copy notes, particularly those related to the CFG. */
3351 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3353 switch (REG_NOTE_KIND (note))
3357 while (insn != NULL_RTX)
3359 if (GET_CODE (insn) == CALL_INSN
3360 || (flag_non_call_exceptions
3361 && may_trap_p (PATTERN (insn))))
3363 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3366 insn = PREV_INSN (insn);
3372 case REG_ALWAYS_RETURN:
3374 while (insn != NULL_RTX)
3376 if (GET_CODE (insn) == CALL_INSN)
3378 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3381 insn = PREV_INSN (insn);
3385 case REG_NON_LOCAL_GOTO:
3387 while (insn != NULL_RTX)
3389 if (GET_CODE (insn) == JUMP_INSN)
3391 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3394 insn = PREV_INSN (insn);
3403 /* If there are LABELS inside the split insns increment the
3404 usage count so we don't delete the label. */
3405 if (GET_CODE (trial) == INSN)
3408 while (insn != NULL_RTX)
3410 if (GET_CODE (insn) == INSN)
3411 mark_label_nuses (PATTERN (insn));
3413 insn = PREV_INSN (insn);
3417 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3419 delete_insn (trial);
3421 emit_barrier_after (tem);
3423 /* Recursively call try_split for each new insn created; by the
3424 time control returns here that insn will be fully split, so
3425 set LAST and continue from the insn after the one returned.
3426 We can't use next_active_insn here since AFTER may be a note.
3427 Ignore deleted insns, which can be occur if not optimizing. */
3428 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3429 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3430 tem = try_split (PATTERN (tem), tem, 1);
3432 /* Return either the first or the last insn, depending on which was
3435 ? (after ? PREV_INSN (after) : last_insn)
3436 : NEXT_INSN (before);
3439 /* Make and return an INSN rtx, initializing all its slots.
3440 Store PATTERN in the pattern slots. */
3443 make_insn_raw (rtx pattern)
3447 insn = rtx_alloc (INSN);
3449 INSN_UID (insn) = cur_insn_uid++;
3450 PATTERN (insn) = pattern;
3451 INSN_CODE (insn) = -1;
3452 LOG_LINKS (insn) = NULL;
3453 REG_NOTES (insn) = NULL;
3454 INSN_LOCATOR (insn) = 0;
3455 BLOCK_FOR_INSN (insn) = NULL;
3457 #ifdef ENABLE_RTL_CHECKING
3460 && (returnjump_p (insn)
3461 || (GET_CODE (insn) == SET
3462 && SET_DEST (insn) == pc_rtx)))
3464 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3472 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3475 make_jump_insn_raw (rtx pattern)
3479 insn = rtx_alloc (JUMP_INSN);
3480 INSN_UID (insn) = cur_insn_uid++;
3482 PATTERN (insn) = pattern;
3483 INSN_CODE (insn) = -1;
3484 LOG_LINKS (insn) = NULL;
3485 REG_NOTES (insn) = NULL;
3486 JUMP_LABEL (insn) = NULL;
3487 INSN_LOCATOR (insn) = 0;
3488 BLOCK_FOR_INSN (insn) = NULL;
3493 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3496 make_call_insn_raw (rtx pattern)
3500 insn = rtx_alloc (CALL_INSN);
3501 INSN_UID (insn) = cur_insn_uid++;
3503 PATTERN (insn) = pattern;
3504 INSN_CODE (insn) = -1;
3505 LOG_LINKS (insn) = NULL;
3506 REG_NOTES (insn) = NULL;
3507 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3508 INSN_LOCATOR (insn) = 0;
3509 BLOCK_FOR_INSN (insn) = NULL;
3514 /* Add INSN to the end of the doubly-linked list.
3515 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3520 PREV_INSN (insn) = last_insn;
3521 NEXT_INSN (insn) = 0;
3523 if (NULL != last_insn)
3524 NEXT_INSN (last_insn) = insn;
3526 if (NULL == first_insn)
3532 /* Add INSN into the doubly-linked list after insn AFTER. This and
3533 the next should be the only functions called to insert an insn once
3534 delay slots have been filled since only they know how to update a
3538 add_insn_after (rtx insn, rtx after)
3540 rtx next = NEXT_INSN (after);
3543 if (optimize && INSN_DELETED_P (after))
3546 NEXT_INSN (insn) = next;
3547 PREV_INSN (insn) = after;
3551 PREV_INSN (next) = insn;
3552 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3553 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3555 else if (last_insn == after)
3559 struct sequence_stack *stack = seq_stack;
3560 /* Scan all pending sequences too. */
3561 for (; stack; stack = stack->next)
3562 if (after == stack->last)
3572 if (GET_CODE (after) != BARRIER
3573 && GET_CODE (insn) != BARRIER
3574 && (bb = BLOCK_FOR_INSN (after)))
3576 set_block_for_insn (insn, bb);
3578 bb->flags |= BB_DIRTY;
3579 /* Should not happen as first in the BB is always
3580 either NOTE or LABEL. */
3581 if (BB_END (bb) == after
3582 /* Avoid clobbering of structure when creating new BB. */
3583 && GET_CODE (insn) != BARRIER
3584 && (GET_CODE (insn) != NOTE
3585 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3589 NEXT_INSN (after) = insn;
3590 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3592 rtx sequence = PATTERN (after);
3593 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3597 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3598 the previous should be the only functions called to insert an insn once
3599 delay slots have been filled since only they know how to update a
3603 add_insn_before (rtx insn, rtx before)
3605 rtx prev = PREV_INSN (before);
3608 if (optimize && INSN_DELETED_P (before))
3611 PREV_INSN (insn) = prev;
3612 NEXT_INSN (insn) = before;
3616 NEXT_INSN (prev) = insn;
3617 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3619 rtx sequence = PATTERN (prev);
3620 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3623 else if (first_insn == before)
3627 struct sequence_stack *stack = seq_stack;
3628 /* Scan all pending sequences too. */
3629 for (; stack; stack = stack->next)
3630 if (before == stack->first)
3632 stack->first = insn;
3640 if (GET_CODE (before) != BARRIER
3641 && GET_CODE (insn) != BARRIER
3642 && (bb = BLOCK_FOR_INSN (before)))
3644 set_block_for_insn (insn, bb);
3646 bb->flags |= BB_DIRTY;
3647 /* Should not happen as first in the BB is always
3648 either NOTE or LABEl. */
3649 if (BB_HEAD (bb) == insn
3650 /* Avoid clobbering of structure when creating new BB. */
3651 && GET_CODE (insn) != BARRIER
3652 && (GET_CODE (insn) != NOTE
3653 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3657 PREV_INSN (before) = insn;
3658 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3659 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3662 /* Remove an insn from its doubly-linked list. This function knows how
3663 to handle sequences. */
3665 remove_insn (rtx insn)
3667 rtx next = NEXT_INSN (insn);
3668 rtx prev = PREV_INSN (insn);
3673 NEXT_INSN (prev) = next;
3674 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3676 rtx sequence = PATTERN (prev);
3677 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3680 else if (first_insn == insn)
3684 struct sequence_stack *stack = seq_stack;
3685 /* Scan all pending sequences too. */
3686 for (; stack; stack = stack->next)
3687 if (insn == stack->first)
3689 stack->first = next;
3699 PREV_INSN (next) = prev;
3700 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3701 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3703 else if (last_insn == insn)
3707 struct sequence_stack *stack = seq_stack;
3708 /* Scan all pending sequences too. */
3709 for (; stack; stack = stack->next)
3710 if (insn == stack->last)
3719 if (GET_CODE (insn) != BARRIER
3720 && (bb = BLOCK_FOR_INSN (insn)))
3723 bb->flags |= BB_DIRTY;
3724 if (BB_HEAD (bb) == insn)
3726 /* Never ever delete the basic block note without deleting whole
3728 if (GET_CODE (insn) == NOTE)
3730 BB_HEAD (bb) = next;
3732 if (BB_END (bb) == insn)
3737 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3740 add_function_usage_to (rtx call_insn, rtx call_fusage)
3742 if (! call_insn || GET_CODE (call_insn) != CALL_INSN)
3745 /* Put the register usage information on the CALL. If there is already
3746 some usage information, put ours at the end. */
3747 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3751 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3752 link = XEXP (link, 1))
3755 XEXP (link, 1) = call_fusage;
3758 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3761 /* Delete all insns made since FROM.
3762 FROM becomes the new last instruction. */
3765 delete_insns_since (rtx from)
3770 NEXT_INSN (from) = 0;
3774 /* This function is deprecated, please use sequences instead.
3776 Move a consecutive bunch of insns to a different place in the chain.
3777 The insns to be moved are those between FROM and TO.
3778 They are moved to a new position after the insn AFTER.
3779 AFTER must not be FROM or TO or any insn in between.
3781 This function does not know about SEQUENCEs and hence should not be
3782 called after delay-slot filling has been done. */
3785 reorder_insns_nobb (rtx from, rtx to, rtx after)
3787 /* Splice this bunch out of where it is now. */
3788 if (PREV_INSN (from))
3789 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3791 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3792 if (last_insn == to)
3793 last_insn = PREV_INSN (from);
3794 if (first_insn == from)
3795 first_insn = NEXT_INSN (to);
3797 /* Make the new neighbors point to it and it to them. */
3798 if (NEXT_INSN (after))
3799 PREV_INSN (NEXT_INSN (after)) = to;
3801 NEXT_INSN (to) = NEXT_INSN (after);
3802 PREV_INSN (from) = after;
3803 NEXT_INSN (after) = from;
3804 if (after == last_insn)
3808 /* Same as function above, but take care to update BB boundaries. */
3810 reorder_insns (rtx from, rtx to, rtx after)
3812 rtx prev = PREV_INSN (from);
3813 basic_block bb, bb2;
3815 reorder_insns_nobb (from, to, after);
3817 if (GET_CODE (after) != BARRIER
3818 && (bb = BLOCK_FOR_INSN (after)))
3821 bb->flags |= BB_DIRTY;
3823 if (GET_CODE (from) != BARRIER
3824 && (bb2 = BLOCK_FOR_INSN (from)))
3826 if (BB_END (bb2) == to)
3827 BB_END (bb2) = prev;
3828 bb2->flags |= BB_DIRTY;
3831 if (BB_END (bb) == after)
3834 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3835 set_block_for_insn (x, bb);
3839 /* Return the line note insn preceding INSN. */
3842 find_line_note (rtx insn)
3844 if (no_line_numbers)
3847 for (; insn; insn = PREV_INSN (insn))
3848 if (GET_CODE (insn) == NOTE
3849 && NOTE_LINE_NUMBER (insn) >= 0)
3855 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3856 of the moved insns when debugging. This may insert a note between AFTER
3857 and FROM, and another one after TO. */
3860 reorder_insns_with_line_notes (rtx from, rtx to, rtx after)
3862 rtx from_line = find_line_note (from);
3863 rtx after_line = find_line_note (after);
3865 reorder_insns (from, to, after);
3867 if (from_line == after_line)
3871 emit_note_copy_after (from_line, after);
3873 emit_note_copy_after (after_line, to);
3876 /* Remove unnecessary notes from the instruction stream. */
3879 remove_unnecessary_notes (void)
3881 rtx block_stack = NULL_RTX;
3882 rtx eh_stack = NULL_RTX;
3887 /* We must not remove the first instruction in the function because
3888 the compiler depends on the first instruction being a note. */
3889 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3891 /* Remember what's next. */
3892 next = NEXT_INSN (insn);
3894 /* We're only interested in notes. */
3895 if (GET_CODE (insn) != NOTE)
3898 switch (NOTE_LINE_NUMBER (insn))
3900 case NOTE_INSN_DELETED:
3901 case NOTE_INSN_LOOP_END_TOP_COND:
3905 case NOTE_INSN_EH_REGION_BEG:
3906 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3909 case NOTE_INSN_EH_REGION_END:
3910 /* Too many end notes. */
3911 if (eh_stack == NULL_RTX)
3913 /* Mismatched nesting. */
3914 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3917 eh_stack = XEXP (eh_stack, 1);
3918 free_INSN_LIST_node (tmp);
3921 case NOTE_INSN_BLOCK_BEG:
3922 /* By now, all notes indicating lexical blocks should have
3923 NOTE_BLOCK filled in. */
3924 if (NOTE_BLOCK (insn) == NULL_TREE)
3926 block_stack = alloc_INSN_LIST (insn, block_stack);
3929 case NOTE_INSN_BLOCK_END:
3930 /* Too many end notes. */
3931 if (block_stack == NULL_RTX)
3933 /* Mismatched nesting. */
3934 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3937 block_stack = XEXP (block_stack, 1);
3938 free_INSN_LIST_node (tmp);
3940 /* Scan back to see if there are any non-note instructions
3941 between INSN and the beginning of this block. If not,
3942 then there is no PC range in the generated code that will
3943 actually be in this block, so there's no point in
3944 remembering the existence of the block. */
3945 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3947 /* This block contains a real instruction. Note that we
3948 don't include labels; if the only thing in the block
3949 is a label, then there are still no PC values that
3950 lie within the block. */
3954 /* We're only interested in NOTEs. */
3955 if (GET_CODE (tmp) != NOTE)
3958 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3960 /* We just verified that this BLOCK matches us with
3961 the block_stack check above. Never delete the
3962 BLOCK for the outermost scope of the function; we
3963 can refer to names from that scope even if the
3964 block notes are messed up. */
3965 if (! is_body_block (NOTE_BLOCK (insn))
3966 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3973 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3974 /* There's a nested block. We need to leave the
3975 current block in place since otherwise the debugger
3976 wouldn't be able to show symbols from our block in
3977 the nested block. */
3983 /* Too many begin notes. */
3984 if (block_stack || eh_stack)
3989 /* Emit insn(s) of given code and pattern
3990 at a specified place within the doubly-linked list.
3992 All of the emit_foo global entry points accept an object
3993 X which is either an insn list or a PATTERN of a single
3996 There are thus a few canonical ways to generate code and
3997 emit it at a specific place in the instruction stream. For
3998 example, consider the instruction named SPOT and the fact that
3999 we would like to emit some instructions before SPOT. We might
4003 ... emit the new instructions ...
4004 insns_head = get_insns ();
4007 emit_insn_before (insns_head, SPOT);
4009 It used to be common to generate SEQUENCE rtl instead, but that
4010 is a relic of the past which no longer occurs. The reason is that
4011 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4012 generated would almost certainly die right after it was created. */
4014 /* Make X be output before the instruction BEFORE. */
4017 emit_insn_before_noloc (rtx x, rtx before)
4022 #ifdef ENABLE_RTL_CHECKING
4023 if (before == NULL_RTX)
4030 switch (GET_CODE (x))
4041 rtx next = NEXT_INSN (insn);
4042 add_insn_before (insn, before);
4048 #ifdef ENABLE_RTL_CHECKING
4055 last = make_insn_raw (x);
4056 add_insn_before (last, before);
4063 /* Make an instruction with body X and code JUMP_INSN
4064 and output it before the instruction BEFORE. */
4067 emit_jump_insn_before_noloc (rtx x, rtx before)
4069 rtx insn, last = NULL_RTX;
4071 #ifdef ENABLE_RTL_CHECKING
4072 if (before == NULL_RTX)
4076 switch (GET_CODE (x))
4087 rtx next = NEXT_INSN (insn);
4088 add_insn_before (insn, before);
4094 #ifdef ENABLE_RTL_CHECKING
4101 last = make_jump_insn_raw (x);
4102 add_insn_before (last, before);
4109 /* Make an instruction with body X and code CALL_INSN
4110 and output it before the instruction BEFORE. */
4113 emit_call_insn_before_noloc (rtx x, rtx before)
4115 rtx last = NULL_RTX, insn;
4117 #ifdef ENABLE_RTL_CHECKING
4118 if (before == NULL_RTX)
4122 switch (GET_CODE (x))
4133 rtx next = NEXT_INSN (insn);
4134 add_insn_before (insn, before);
4140 #ifdef ENABLE_RTL_CHECKING
4147 last = make_call_insn_raw (x);
4148 add_insn_before (last, before);
4155 /* Make an insn of code BARRIER
4156 and output it before the insn BEFORE. */
4159 emit_barrier_before (rtx before)
4161 rtx insn = rtx_alloc (BARRIER);
4163 INSN_UID (insn) = cur_insn_uid++;
4165 add_insn_before (insn, before);
4169 /* Emit the label LABEL before the insn BEFORE. */
4172 emit_label_before (rtx label, rtx before)
4174 /* This can be called twice for the same label as a result of the
4175 confusion that follows a syntax error! So make it harmless. */
4176 if (INSN_UID (label) == 0)
4178 INSN_UID (label) = cur_insn_uid++;
4179 add_insn_before (label, before);
4185 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4188 emit_note_before (int subtype, rtx before)
4190 rtx note = rtx_alloc (NOTE);
4191 INSN_UID (note) = cur_insn_uid++;
4192 NOTE_SOURCE_FILE (note) = 0;
4193 NOTE_LINE_NUMBER (note) = subtype;
4194 BLOCK_FOR_INSN (note) = NULL;
4196 add_insn_before (note, before);
4200 /* Helper for emit_insn_after, handles lists of instructions
4203 static rtx emit_insn_after_1 (rtx, rtx);
4206 emit_insn_after_1 (rtx first, rtx after)
4212 if (GET_CODE (after) != BARRIER
4213 && (bb = BLOCK_FOR_INSN (after)))
4215 bb->flags |= BB_DIRTY;
4216 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4217 if (GET_CODE (last) != BARRIER)
4218 set_block_for_insn (last, bb);
4219 if (GET_CODE (last) != BARRIER)
4220 set_block_for_insn (last, bb);
4221 if (BB_END (bb) == after)
4225 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4228 after_after = NEXT_INSN (after);
4230 NEXT_INSN (after) = first;
4231 PREV_INSN (first) = after;
4232 NEXT_INSN (last) = after_after;
4234 PREV_INSN (after_after) = last;
4236 if (after == last_insn)
4241 /* Make X be output after the insn AFTER. */
4244 emit_insn_after_noloc (rtx x, rtx after)
4248 #ifdef ENABLE_RTL_CHECKING
4249 if (after == NULL_RTX)
4256 switch (GET_CODE (x))
4264 last = emit_insn_after_1 (x, after);
4267 #ifdef ENABLE_RTL_CHECKING
4274 last = make_insn_raw (x);
4275 add_insn_after (last, after);
4282 /* Similar to emit_insn_after, except that line notes are to be inserted so
4283 as to act as if this insn were at FROM. */
4286 emit_insn_after_with_line_notes (rtx x, rtx after, rtx from)
4288 rtx from_line = find_line_note (from);
4289 rtx after_line = find_line_note (after);
4290 rtx insn = emit_insn_after (x, after);
4293 emit_note_copy_after (from_line, after);
4296 emit_note_copy_after (after_line, insn);
4299 /* Make an insn of code JUMP_INSN with body X
4300 and output it after the insn AFTER. */
4303 emit_jump_insn_after_noloc (rtx x, rtx after)
4307 #ifdef ENABLE_RTL_CHECKING
4308 if (after == NULL_RTX)
4312 switch (GET_CODE (x))
4320 last = emit_insn_after_1 (x, after);
4323 #ifdef ENABLE_RTL_CHECKING
4330 last = make_jump_insn_raw (x);
4331 add_insn_after (last, after);
4338 /* Make an instruction with body X and code CALL_INSN
4339 and output it after the instruction AFTER. */
4342 emit_call_insn_after_noloc (rtx x, rtx after)
4346 #ifdef ENABLE_RTL_CHECKING
4347 if (after == NULL_RTX)
4351 switch (GET_CODE (x))
4359 last = emit_insn_after_1 (x, after);
4362 #ifdef ENABLE_RTL_CHECKING
4369 last = make_call_insn_raw (x);
4370 add_insn_after (last, after);
4377 /* Make an insn of code BARRIER
4378 and output it after the insn AFTER. */
4381 emit_barrier_after (rtx after)
4383 rtx insn = rtx_alloc (BARRIER);
4385 INSN_UID (insn) = cur_insn_uid++;
4387 add_insn_after (insn, after);
4391 /* Emit the label LABEL after the insn AFTER. */
4394 emit_label_after (rtx label, rtx after)
4396 /* This can be called twice for the same label
4397 as a result of the confusion that follows a syntax error!
4398 So make it harmless. */
4399 if (INSN_UID (label) == 0)
4401 INSN_UID (label) = cur_insn_uid++;
4402 add_insn_after (label, after);
4408 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4411 emit_note_after (int subtype, rtx after)
4413 rtx note = rtx_alloc (NOTE);
4414 INSN_UID (note) = cur_insn_uid++;
4415 NOTE_SOURCE_FILE (note) = 0;
4416 NOTE_LINE_NUMBER (note) = subtype;
4417 BLOCK_FOR_INSN (note) = NULL;
4418 add_insn_after (note, after);
4422 /* Emit a copy of note ORIG after the insn AFTER. */
4425 emit_note_copy_after (rtx orig, rtx after)
4429 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4435 note = rtx_alloc (NOTE);
4436 INSN_UID (note) = cur_insn_uid++;
4437 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4438 NOTE_DATA (note) = NOTE_DATA (orig);
4439 BLOCK_FOR_INSN (note) = NULL;
4440 add_insn_after (note, after);
4444 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4446 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4448 rtx last = emit_insn_after_noloc (pattern, after);
4450 if (pattern == NULL_RTX || !loc)
4453 after = NEXT_INSN (after);
4456 if (active_insn_p (after) && !INSN_LOCATOR (after))
4457 INSN_LOCATOR (after) = loc;
4460 after = NEXT_INSN (after);
4465 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4467 emit_insn_after (rtx pattern, rtx after)
4470 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4472 return emit_insn_after_noloc (pattern, after);
4475 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4477 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4479 rtx last = emit_jump_insn_after_noloc (pattern, after);
4481 if (pattern == NULL_RTX || !loc)
4484 after = NEXT_INSN (after);
4487 if (active_insn_p (after) && !INSN_LOCATOR (after))
4488 INSN_LOCATOR (after) = loc;
4491 after = NEXT_INSN (after);
4496 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4498 emit_jump_insn_after (rtx pattern, rtx after)
4501 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4503 return emit_jump_insn_after_noloc (pattern, after);
4506 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4508 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4510 rtx last = emit_call_insn_after_noloc (pattern, after);
4512 if (pattern == NULL_RTX || !loc)
4515 after = NEXT_INSN (after);
4518 if (active_insn_p (after) && !INSN_LOCATOR (after))
4519 INSN_LOCATOR (after) = loc;
4522 after = NEXT_INSN (after);
4527 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4529 emit_call_insn_after (rtx pattern, rtx after)
4532 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4534 return emit_call_insn_after_noloc (pattern, after);
4537 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4539 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4541 rtx first = PREV_INSN (before);
4542 rtx last = emit_insn_before_noloc (pattern, before);
4544 if (pattern == NULL_RTX || !loc)
4547 first = NEXT_INSN (first);
4550 if (active_insn_p (first) && !INSN_LOCATOR (first))
4551 INSN_LOCATOR (first) = loc;
4554 first = NEXT_INSN (first);
4559 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4561 emit_insn_before (rtx pattern, rtx before)
4563 if (INSN_P (before))
4564 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4566 return emit_insn_before_noloc (pattern, before);
4569 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4571 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4573 rtx first = PREV_INSN (before);
4574 rtx last = emit_jump_insn_before_noloc (pattern, before);
4576 if (pattern == NULL_RTX)
4579 first = NEXT_INSN (first);
4582 if (active_insn_p (first) && !INSN_LOCATOR (first))
4583 INSN_LOCATOR (first) = loc;
4586 first = NEXT_INSN (first);
4591 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4593 emit_jump_insn_before (rtx pattern, rtx before)
4595 if (INSN_P (before))
4596 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4598 return emit_jump_insn_before_noloc (pattern, before);
4601 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4603 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4605 rtx first = PREV_INSN (before);
4606 rtx last = emit_call_insn_before_noloc (pattern, before);
4608 if (pattern == NULL_RTX)
4611 first = NEXT_INSN (first);
4614 if (active_insn_p (first) && !INSN_LOCATOR (first))
4615 INSN_LOCATOR (first) = loc;
4618 first = NEXT_INSN (first);
4623 /* like emit_call_insn_before_noloc,
4624 but set insn_locator according to before. */
4626 emit_call_insn_before (rtx pattern, rtx before)
4628 if (INSN_P (before))
4629 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4631 return emit_call_insn_before_noloc (pattern, before);
4634 /* Take X and emit it at the end of the doubly-linked
4637 Returns the last insn emitted. */
4642 rtx last = last_insn;
4648 switch (GET_CODE (x))
4659 rtx next = NEXT_INSN (insn);
4666 #ifdef ENABLE_RTL_CHECKING
4673 last = make_insn_raw (x);
4681 /* Make an insn of code JUMP_INSN with pattern X
4682 and add it to the end of the doubly-linked list. */
4685 emit_jump_insn (rtx x)
4687 rtx last = NULL_RTX, insn;
4689 switch (GET_CODE (x))
4700 rtx next = NEXT_INSN (insn);
4707 #ifdef ENABLE_RTL_CHECKING
4714 last = make_jump_insn_raw (x);
4722 /* Make an insn of code CALL_INSN with pattern X
4723 and add it to the end of the doubly-linked list. */
4726 emit_call_insn (rtx x)
4730 switch (GET_CODE (x))
4738 insn = emit_insn (x);
4741 #ifdef ENABLE_RTL_CHECKING
4748 insn = make_call_insn_raw (x);
4756 /* Add the label LABEL to the end of the doubly-linked list. */
4759 emit_label (rtx label)
4761 /* This can be called twice for the same label
4762 as a result of the confusion that follows a syntax error!
4763 So make it harmless. */
4764 if (INSN_UID (label) == 0)
4766 INSN_UID (label) = cur_insn_uid++;
4772 /* Make an insn of code BARRIER
4773 and add it to the end of the doubly-linked list. */
4778 rtx barrier = rtx_alloc (BARRIER);
4779 INSN_UID (barrier) = cur_insn_uid++;
4784 /* Make line numbering NOTE insn for LOCATION add it to the end
4785 of the doubly-linked list, but only if line-numbers are desired for
4786 debugging info and it doesn't match the previous one. */
4789 emit_line_note (location_t location)
4793 set_file_and_line_for_stmt (location);
4795 if (location.file && last_location.file
4796 && !strcmp (location.file, last_location.file)
4797 && location.line == last_location.line)
4799 last_location = location;
4801 if (no_line_numbers)
4807 note = emit_note (location.line);
4808 NOTE_SOURCE_FILE (note) = location.file;
4813 /* Emit a copy of note ORIG. */
4816 emit_note_copy (rtx orig)
4820 if (NOTE_LINE_NUMBER (orig) >= 0 && no_line_numbers)
4826 note = rtx_alloc (NOTE);
4828 INSN_UID (note) = cur_insn_uid++;
4829 NOTE_DATA (note) = NOTE_DATA (orig);
4830 NOTE_LINE_NUMBER (note) = NOTE_LINE_NUMBER (orig);
4831 BLOCK_FOR_INSN (note) = NULL;
4837 /* Make an insn of code NOTE or type NOTE_NO
4838 and add it to the end of the doubly-linked list. */
4841 emit_note (int note_no)
4845 note = rtx_alloc (NOTE);
4846 INSN_UID (note) = cur_insn_uid++;
4847 NOTE_LINE_NUMBER (note) = note_no;
4848 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4849 BLOCK_FOR_INSN (note) = NULL;
4854 /* Cause next statement to emit a line note even if the line number
4858 force_next_line_note (void)
4860 last_location.line = -1;
4863 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4864 note of this type already exists, remove it first. */
4867 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4869 rtx note = find_reg_note (insn, kind, NULL_RTX);
4875 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4876 has multiple sets (some callers assume single_set
4877 means the insn only has one set, when in fact it
4878 means the insn only has one * useful * set). */
4879 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4886 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4887 It serves no useful purpose and breaks eliminate_regs. */
4888 if (GET_CODE (datum) == ASM_OPERANDS)
4898 XEXP (note, 0) = datum;
4902 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4903 return REG_NOTES (insn);
4906 /* Return an indication of which type of insn should have X as a body.
4907 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4910 classify_insn (rtx x)
4912 if (GET_CODE (x) == CODE_LABEL)
4914 if (GET_CODE (x) == CALL)
4916 if (GET_CODE (x) == RETURN)
4918 if (GET_CODE (x) == SET)
4920 if (SET_DEST (x) == pc_rtx)
4922 else if (GET_CODE (SET_SRC (x)) == CALL)
4927 if (GET_CODE (x) == PARALLEL)
4930 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4931 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4933 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4934 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4936 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4937 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4943 /* Emit the rtl pattern X as an appropriate kind of insn.
4944 If X is a label, it is simply added into the insn chain. */
4949 enum rtx_code code = classify_insn (x);
4951 if (code == CODE_LABEL)
4952 return emit_label (x);
4953 else if (code == INSN)
4954 return emit_insn (x);
4955 else if (code == JUMP_INSN)
4957 rtx insn = emit_jump_insn (x);
4958 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4959 return emit_barrier ();
4962 else if (code == CALL_INSN)
4963 return emit_call_insn (x);
4968 /* Space for free sequence stack entries. */
4969 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4971 /* Begin emitting insns to a sequence which can be packaged in an
4972 RTL_EXPR. If this sequence will contain something that might cause
4973 the compiler to pop arguments to function calls (because those
4974 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4975 details), use do_pending_stack_adjust before calling this function.
4976 That will ensure that the deferred pops are not accidentally
4977 emitted in the middle of this sequence. */
4980 start_sequence (void)
4982 struct sequence_stack *tem;
4984 if (free_sequence_stack != NULL)
4986 tem = free_sequence_stack;
4987 free_sequence_stack = tem->next;
4990 tem = ggc_alloc (sizeof (struct sequence_stack));
4992 tem->next = seq_stack;
4993 tem->first = first_insn;
4994 tem->last = last_insn;
4995 tem->sequence_rtl_expr = seq_rtl_expr;
5003 /* Similarly, but indicate that this sequence will be placed in T, an
5004 RTL_EXPR. See the documentation for start_sequence for more
5005 information about how to use this function. */
5008 start_sequence_for_rtl_expr (tree t)
5015 /* Set up the insn chain starting with FIRST as the current sequence,
5016 saving the previously current one. See the documentation for
5017 start_sequence for more information about how to use this function. */
5020 push_to_sequence (rtx first)
5026 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5032 /* Set up the insn chain from a chain stort in FIRST to LAST. */
5035 push_to_full_sequence (rtx first, rtx last)
5040 /* We really should have the end of the insn chain here. */
5041 if (last && NEXT_INSN (last))
5045 /* Set up the outer-level insn chain
5046 as the current sequence, saving the previously current one. */
5049 push_topmost_sequence (void)
5051 struct sequence_stack *stack, *top = NULL;
5055 for (stack = seq_stack; stack; stack = stack->next)
5058 first_insn = top->first;
5059 last_insn = top->last;
5060 seq_rtl_expr = top->sequence_rtl_expr;
5063 /* After emitting to the outer-level insn chain, update the outer-level
5064 insn chain, and restore the previous saved state. */
5067 pop_topmost_sequence (void)
5069 struct sequence_stack *stack, *top = NULL;
5071 for (stack = seq_stack; stack; stack = stack->next)
5074 top->first = first_insn;
5075 top->last = last_insn;
5076 /* ??? Why don't we save seq_rtl_expr here? */
5081 /* After emitting to a sequence, restore previous saved state.
5083 To get the contents of the sequence just made, you must call
5084 `get_insns' *before* calling here.
5086 If the compiler might have deferred popping arguments while
5087 generating this sequence, and this sequence will not be immediately
5088 inserted into the instruction stream, use do_pending_stack_adjust
5089 before calling get_insns. That will ensure that the deferred
5090 pops are inserted into this sequence, and not into some random
5091 location in the instruction stream. See INHIBIT_DEFER_POP for more
5092 information about deferred popping of arguments. */
5097 struct sequence_stack *tem = seq_stack;
5099 first_insn = tem->first;
5100 last_insn = tem->last;
5101 seq_rtl_expr = tem->sequence_rtl_expr;
5102 seq_stack = tem->next;
5104 memset (tem, 0, sizeof (*tem));
5105 tem->next = free_sequence_stack;
5106 free_sequence_stack = tem;
5109 /* This works like end_sequence, but records the old sequence in FIRST
5113 end_full_sequence (rtx *first, rtx *last)
5115 *first = first_insn;
5120 /* Return 1 if currently emitting into a sequence. */
5123 in_sequence_p (void)
5125 return seq_stack != 0;
5128 /* Put the various virtual registers into REGNO_REG_RTX. */
5131 init_virtual_regs (struct emit_status *es)
5133 rtx *ptr = es->x_regno_reg_rtx;
5134 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5135 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5136 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5137 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5138 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5142 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5143 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5144 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5145 static int copy_insn_n_scratches;
5147 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5148 copied an ASM_OPERANDS.
5149 In that case, it is the original input-operand vector. */
5150 static rtvec orig_asm_operands_vector;
5152 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5153 copied an ASM_OPERANDS.
5154 In that case, it is the copied input-operand vector. */
5155 static rtvec copy_asm_operands_vector;
5157 /* Likewise for the constraints vector. */
5158 static rtvec orig_asm_constraints_vector;
5159 static rtvec copy_asm_constraints_vector;
5161 /* Recursively create a new copy of an rtx for copy_insn.
5162 This function differs from copy_rtx in that it handles SCRATCHes and
5163 ASM_OPERANDs properly.
5164 Normally, this function is not used directly; use copy_insn as front end.
5165 However, you could first copy an insn pattern with copy_insn and then use
5166 this function afterwards to properly copy any REG_NOTEs containing
5170 copy_insn_1 (rtx orig)
5175 const char *format_ptr;
5177 code = GET_CODE (orig);
5194 for (i = 0; i < copy_insn_n_scratches; i++)
5195 if (copy_insn_scratch_in[i] == orig)
5196 return copy_insn_scratch_out[i];
5200 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
5201 a LABEL_REF, it isn't sharable. */
5202 if (GET_CODE (XEXP (orig, 0)) == PLUS
5203 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
5204 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
5208 /* A MEM with a constant address is not sharable. The problem is that
5209 the constant address may need to be reloaded. If the mem is shared,
5210 then reloading one copy of this mem will cause all copies to appear
5211 to have been reloaded. */
5217 copy = rtx_alloc (code);
5219 /* Copy the various flags, and other information. We assume that
5220 all fields need copying, and then clear the fields that should
5221 not be copied. That is the sensible default behavior, and forces
5222 us to explicitly document why we are *not* copying a flag. */
5223 memcpy (copy, orig, RTX_HDR_SIZE);
5225 /* We do not copy the USED flag, which is used as a mark bit during
5226 walks over the RTL. */
5227 RTX_FLAG (copy, used) = 0;
5229 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5230 if (GET_RTX_CLASS (code) == 'i')
5232 RTX_FLAG (copy, jump) = 0;
5233 RTX_FLAG (copy, call) = 0;
5234 RTX_FLAG (copy, frame_related) = 0;
5237 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5239 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5241 copy->u.fld[i] = orig->u.fld[i];
5242 switch (*format_ptr++)
5245 if (XEXP (orig, i) != NULL)
5246 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5251 if (XVEC (orig, i) == orig_asm_constraints_vector)
5252 XVEC (copy, i) = copy_asm_constraints_vector;
5253 else if (XVEC (orig, i) == orig_asm_operands_vector)
5254 XVEC (copy, i) = copy_asm_operands_vector;
5255 else if (XVEC (orig, i) != NULL)
5257 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5258 for (j = 0; j < XVECLEN (copy, i); j++)
5259 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5270 /* These are left unchanged. */
5278 if (code == SCRATCH)
5280 i = copy_insn_n_scratches++;
5281 if (i >= MAX_RECOG_OPERANDS)
5283 copy_insn_scratch_in[i] = orig;
5284 copy_insn_scratch_out[i] = copy;
5286 else if (code == ASM_OPERANDS)
5288 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5289 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5290 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5291 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5297 /* Create a new copy of an rtx.
5298 This function differs from copy_rtx in that it handles SCRATCHes and
5299 ASM_OPERANDs properly.
5300 INSN doesn't really have to be a full INSN; it could be just the
5303 copy_insn (rtx insn)
5305 copy_insn_n_scratches = 0;
5306 orig_asm_operands_vector = 0;
5307 orig_asm_constraints_vector = 0;
5308 copy_asm_operands_vector = 0;
5309 copy_asm_constraints_vector = 0;
5310 return copy_insn_1 (insn);
5313 /* Initialize data structures and variables in this file
5314 before generating rtl for each function. */
5319 struct function *f = cfun;
5321 f->emit = ggc_alloc (sizeof (struct emit_status));
5324 seq_rtl_expr = NULL;
5326 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5327 last_location.line = 0;
5328 last_location.file = 0;
5329 first_label_num = label_num;
5333 /* Init the tables that describe all the pseudo regs. */
5335 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5337 f->emit->regno_pointer_align
5338 = ggc_alloc_cleared (f->emit->regno_pointer_align_length
5339 * sizeof (unsigned char));
5342 = ggc_alloc (f->emit->regno_pointer_align_length * sizeof (rtx));
5344 /* Put copies of all the hard registers into regno_reg_rtx. */
5345 memcpy (regno_reg_rtx,
5346 static_regno_reg_rtx,
5347 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5349 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5350 init_virtual_regs (f->emit);
5352 /* Indicate that the virtual registers and stack locations are
5354 REG_POINTER (stack_pointer_rtx) = 1;
5355 REG_POINTER (frame_pointer_rtx) = 1;
5356 REG_POINTER (hard_frame_pointer_rtx) = 1;
5357 REG_POINTER (arg_pointer_rtx) = 1;
5359 REG_POINTER (virtual_incoming_args_rtx) = 1;
5360 REG_POINTER (virtual_stack_vars_rtx) = 1;
5361 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5362 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5363 REG_POINTER (virtual_cfa_rtx) = 1;
5365 #ifdef STACK_BOUNDARY
5366 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5367 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5368 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5369 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5371 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5372 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5373 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5374 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5375 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5378 #ifdef INIT_EXPANDERS
5383 /* Generate the constant 0. */
5386 gen_const_vector_0 (enum machine_mode mode)
5391 enum machine_mode inner;
5393 units = GET_MODE_NUNITS (mode);
5394 inner = GET_MODE_INNER (mode);
5396 v = rtvec_alloc (units);
5398 /* We need to call this function after we to set CONST0_RTX first. */
5399 if (!CONST0_RTX (inner))
5402 for (i = 0; i < units; ++i)
5403 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5405 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5409 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5410 all elements are zero. */
5412 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5414 rtx inner_zero = CONST0_RTX (GET_MODE_INNER (mode));
5417 for (i = GET_MODE_NUNITS (mode) - 1; i >= 0; i--)
5418 if (RTVEC_ELT (v, i) != inner_zero)
5419 return gen_rtx_raw_CONST_VECTOR (mode, v);
5420 return CONST0_RTX (mode);
5423 /* Create some permanent unique rtl objects shared between all functions.
5424 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5427 init_emit_once (int line_numbers)
5430 enum machine_mode mode;
5431 enum machine_mode double_mode;
5433 /* We need reg_raw_mode, so initialize the modes now. */
5434 init_reg_modes_once ();
5436 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5438 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5439 const_int_htab_eq, NULL);
5441 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5442 const_double_htab_eq, NULL);
5444 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5445 mem_attrs_htab_eq, NULL);
5446 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5447 reg_attrs_htab_eq, NULL);
5449 no_line_numbers = ! line_numbers;
5451 /* Compute the word and byte modes. */
5453 byte_mode = VOIDmode;
5454 word_mode = VOIDmode;
5455 double_mode = VOIDmode;
5457 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5458 mode = GET_MODE_WIDER_MODE (mode))
5460 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5461 && byte_mode == VOIDmode)
5464 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5465 && word_mode == VOIDmode)
5469 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5470 mode = GET_MODE_WIDER_MODE (mode))
5472 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5473 && double_mode == VOIDmode)
5477 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5479 /* Assign register numbers to the globally defined register rtx.
5480 This must be done at runtime because the register number field
5481 is in a union and some compilers can't initialize unions. */
5483 pc_rtx = gen_rtx (PC, VOIDmode);
5484 cc0_rtx = gen_rtx (CC0, VOIDmode);
5485 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5486 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5487 if (hard_frame_pointer_rtx == 0)
5488 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5489 HARD_FRAME_POINTER_REGNUM);
5490 if (arg_pointer_rtx == 0)
5491 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5492 virtual_incoming_args_rtx =
5493 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5494 virtual_stack_vars_rtx =
5495 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5496 virtual_stack_dynamic_rtx =
5497 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5498 virtual_outgoing_args_rtx =
5499 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5500 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5502 /* Initialize RTL for commonly used hard registers. These are
5503 copied into regno_reg_rtx as we begin to compile each function. */
5504 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5505 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5507 #ifdef INIT_EXPANDERS
5508 /* This is to initialize {init|mark|free}_machine_status before the first
5509 call to push_function_context_to. This is needed by the Chill front
5510 end which calls push_function_context_to before the first call to
5511 init_function_start. */
5515 /* Create the unique rtx's for certain rtx codes and operand values. */
5517 /* Don't use gen_rtx here since gen_rtx in this case
5518 tries to use these variables. */
5519 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5520 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5521 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5523 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5524 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5525 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5527 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5529 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5530 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5531 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5532 REAL_VALUE_FROM_INT (dconst3, 3, 0, double_mode);
5533 REAL_VALUE_FROM_INT (dconst10, 10, 0, double_mode);
5534 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5535 REAL_VALUE_FROM_INT (dconstm2, -2, -1, double_mode);
5537 dconsthalf = dconst1;
5540 real_arithmetic (&dconstthird, RDIV_EXPR, &dconst1, &dconst3);
5542 /* Initialize mathematical constants for constant folding builtins.
5543 These constants need to be given to at least 160 bits precision. */
5544 real_from_string (&dconstpi,
5545 "3.1415926535897932384626433832795028841971693993751058209749445923078");
5546 real_from_string (&dconste,
5547 "2.7182818284590452353602874713526624977572470936999595749669676277241");
5549 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5551 REAL_VALUE_TYPE *r =
5552 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5554 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5555 mode = GET_MODE_WIDER_MODE (mode))
5556 const_tiny_rtx[i][(int) mode] =
5557 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5559 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5561 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5562 mode = GET_MODE_WIDER_MODE (mode))
5563 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5565 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5567 mode = GET_MODE_WIDER_MODE (mode))
5568 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5571 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5573 mode = GET_MODE_WIDER_MODE (mode))
5574 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5576 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5578 mode = GET_MODE_WIDER_MODE (mode))
5579 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5581 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5582 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5583 const_tiny_rtx[0][i] = const0_rtx;
5585 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5586 if (STORE_FLAG_VALUE == 1)
5587 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5589 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5590 return_address_pointer_rtx
5591 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5594 #ifdef STATIC_CHAIN_REGNUM
5595 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5597 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5598 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5599 static_chain_incoming_rtx
5600 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5603 static_chain_incoming_rtx = static_chain_rtx;
5607 static_chain_rtx = STATIC_CHAIN;
5609 #ifdef STATIC_CHAIN_INCOMING
5610 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5612 static_chain_incoming_rtx = static_chain_rtx;
5616 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5617 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5620 /* Query and clear/ restore no_line_numbers. This is used by the
5621 switch / case handling in stmt.c to give proper line numbers in
5622 warnings about unreachable code. */
5625 force_line_numbers (void)
5627 int old = no_line_numbers;
5629 no_line_numbers = 0;
5631 force_next_line_note ();
5636 restore_line_number_status (int old_value)
5638 no_line_numbers = old_value;
5641 /* Produce exact duplicate of insn INSN after AFTER.
5642 Care updating of libcall regions if present. */
5645 emit_copy_of_insn_after (rtx insn, rtx after)
5648 rtx note1, note2, link;
5650 switch (GET_CODE (insn))
5653 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5657 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5661 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5662 if (CALL_INSN_FUNCTION_USAGE (insn))
5663 CALL_INSN_FUNCTION_USAGE (new)
5664 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5665 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5666 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5673 /* Update LABEL_NUSES. */
5674 mark_jump_label (PATTERN (new), new, 0);
5676 INSN_LOCATOR (new) = INSN_LOCATOR (insn);
5678 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5680 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5681 if (REG_NOTE_KIND (link) != REG_LABEL)
5683 if (GET_CODE (link) == EXPR_LIST)
5685 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5690 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5695 /* Fix the libcall sequences. */
5696 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5699 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5701 XEXP (note1, 0) = p;
5702 XEXP (note2, 0) = new;
5704 INSN_CODE (new) = INSN_CODE (insn);
5708 #include "gt-emit-rtl.h"