sys/dev/sound/pci/hda/hdac.c

   1 /*-
   2  * Copyright (c) 2006 Stephane E. Potvin <sepotvin@videotron.ca>
   3  * Copyright (c) 2006 Ariff Abdullah <ariff@FreeBSD.org>
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  25  * SUCH DAMAGE.
  26  *
  27  * $FreeBSD: src/sys/dev/sound/pci/hda/hdac.c,v 1.36.2.8 2007/11/30 15:11:42 ariff Exp $
  28  * $DragonFly: src/sys/dev/sound/pci/hda/hdac.c,v 1.14 2007/12/01 08:32:11 hasso Exp $
  29  */
  30
  31 /*
  32  * Intel High Definition Audio (Controller) driver for FreeBSD. Be advised
  33  * that this driver still in its early stage, and possible of rewrite are
  34  * pretty much guaranteed. There are supposedly several distinct parent/child
  35  * busses to make this "perfect", but as for now and for the sake of
  36  * simplicity, everything is gobble up within single source.
  37  *
  38  * List of subsys:
  39  *     1) HDA Controller support
  40  *     2) HDA Codecs support, which may include
  41  *        - HDA
  42  *        - Modem
  43  *        - HDMI
  44  *     3) Widget parser - the real magic of why this driver works on so
  45  *        many hardwares with minimal vendor specific quirk. The original
  46  *        parser was written using Ruby and can be found at
  47  *        http://people.freebsd.org/~ariff/HDA/parser.rb . This crude
  48  *        ruby parser take the verbose dmesg dump as its input. Refer to
  49  *        http://www.microsoft.com/whdc/device/audio/default.mspx for various
  50  *        interesting documents, especially UAA (Universal Audio Architecture).
  51  *     4) Possible vendor specific support.
  52  *        (snd_hda_intel, snd_hda_ati, etc..)
  53  *
  54  * Thanks to Ahmad Ubaidah Omar @ Defenxis Sdn. Bhd. for the
  55  * Compaq V3000 with Conexant HDA.
  56  *
  57  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  58  *    *                                                                 *
  59  *    *        This driver is a collaborative effort made by:           *
  60  *    *                                                                 *
  61  *    *          Stephane E. Potvin <sepotvin@videotron.ca>             *
  62  *    *               Andrea Bittau <a.bittau@cs.ucl.ac.uk>             *
  63  *    *               Wesley Morgan <morganw@chemikals.org>             *
  64  *    *              Daniel Eischen <deischen@FreeBSD.org>              *
  65  *    *             Maxime Guillaud <bsd-ports@mguillaud.net>           *
  66  *    *              Ariff Abdullah <ariff@FreeBSD.org>                 *
  67  *    *                                                                 *
  68  *    *   ....and various people from freebsd-multimedia@FreeBSD.org    *
  69  *    *                                                                 *
  70  *    * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
  71  */
  72
  73 #include <dev/sound/pcm/sound.h>
  74 #include <bus/pci/pcireg.h>
  75 #include <bus/pci/pcivar.h>
  76
  77 #include <sys/ctype.h>
  78 #include <sys/taskqueue.h>
  79
  80 #include <dev/sound/pci/hda/hdac_private.h>
  81 #include <dev/sound/pci/hda/hdac_reg.h>
  82 #include <dev/sound/pci/hda/hda_reg.h>
  83 #include <dev/sound/pci/hda/hdac.h>
  84
  85 #include "mixer_if.h"
  86
  87 #define HDA_DRV_TEST_REV        "20071129_0050"
  88 #define HDA_WIDGET_PARSER_REV   1
  89
  90 SND_DECLARE_FILE("$DragonFly: src/sys/dev/sound/pci/hda/hdac.c,v 1.14 2007/12/01 08:32:11 hasso Exp $");
  91
  92 #define HDA_BOOTVERBOSE(stmt)   do {                    \
  93         if (bootverbose != 0) {                         \
  94                 stmt                                    \
  95         }                                               \
  96 } while(0)
  97
  98 #if 1
  99 #undef HDAC_INTR_EXTRA
 100 #define HDAC_INTR_EXTRA         1
 101 #endif
 102
 103 #define hdac_lock(sc)           snd_mtxlock((sc)->lock)
 104 #define hdac_unlock(sc)         snd_mtxunlock((sc)->lock)
 105 #define hdac_lockassert(sc)     snd_mtxassert((sc)->lock)
 106 #define hdac_lockowned(sc)      (1)/* mtx_owned((sc)->lock) */
 107
 108 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
 109 #include <machine/specialreg.h>
 110 #define HDAC_DMA_ATTR(sc, v, s, attr)   do {                            \
 111         vm_offset_t va = (vm_offset_t)(v);                              \
 112         vm_size_t sz = (vm_size_t)(s);                                  \
 113         if ((sc) != NULL && ((sc)->flags & HDAC_F_DMA_NOCACHE) &&       \
 114             va != 0 && sz != 0)                                         \
 115                 (void)pmap_change_attr(va, sz, (attr));                 \
 116 } while(0)
 117 #else
 118 #define HDAC_DMA_ATTR(...)
 119 #endif
 120
 121 #define HDA_FLAG_MATCH(fl, v)   (((fl) & (v)) == (v))
 122 #define HDA_DEV_MATCH(fl, v)    ((fl) == (v) || \
 123                                 (fl) == 0xffffffff || \
 124                                 (((fl) & 0xffff0000) == 0xffff0000 && \
 125                                 ((fl) & 0x0000ffff) == ((v) & 0x0000ffff)) || \
 126                                 (((fl) & 0x0000ffff) == 0x0000ffff && \
 127                                 ((fl) & 0xffff0000) == ((v) & 0xffff0000)))
 128 #define HDA_MATCH_ALL           0xffffffff
 129 #define HDAC_INVALID            0xffffffff
 130
 131 /* Default controller / jack sense poll: 250ms */
 132 #define HDAC_POLL_INTERVAL      max(hz >> 2, 1)
 133
 134 /*
 135  * Make room for possible 4096 playback/record channels, in 100 years to come.
 136  */
 137 #define HDAC_TRIGGER_NONE       0x00000000
 138 #define HDAC_TRIGGER_PLAY       0x00000fff
 139 #define HDAC_TRIGGER_REC        0x00fff000
 140 #define HDAC_TRIGGER_UNSOL      0x80000000
 141
 142 #define HDA_MODEL_CONSTRUCT(vendor, model)      \
 143                 (((uint32_t)(model) << 16) | ((vendor##_VENDORID) & 0xffff))
 144
 145 /* Controller models */
 146
 147 /* Intel */
 148 #define INTEL_VENDORID          0x8086
 149 #define HDA_INTEL_82801F        HDA_MODEL_CONSTRUCT(INTEL, 0x2668)
 150 #define HDA_INTEL_63XXESB       HDA_MODEL_CONSTRUCT(INTEL, 0x269a)
 151 #define HDA_INTEL_82801G        HDA_MODEL_CONSTRUCT(INTEL, 0x27d8)
 152 #define HDA_INTEL_82801H        HDA_MODEL_CONSTRUCT(INTEL, 0x284b)
 153 #define HDA_INTEL_82801I        HDA_MODEL_CONSTRUCT(INTEL, 0x293e)
 154 #define HDA_INTEL_ALL           HDA_MODEL_CONSTRUCT(INTEL, 0xffff)
 155
 156 /* Nvidia */
 157 #define NVIDIA_VENDORID         0x10de
 158 #define HDA_NVIDIA_MCP51        HDA_MODEL_CONSTRUCT(NVIDIA, 0x026c)
 159 #define HDA_NVIDIA_MCP55        HDA_MODEL_CONSTRUCT(NVIDIA, 0x0371)
 160 #define HDA_NVIDIA_MCP61_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03e4)
 161 #define HDA_NVIDIA_MCP61_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x03f0)
 162 #define HDA_NVIDIA_MCP65_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044a)
 163 #define HDA_NVIDIA_MCP65_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x044b)
 164 #define HDA_NVIDIA_MCP67_1      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055c)
 165 #define HDA_NVIDIA_MCP67_2      HDA_MODEL_CONSTRUCT(NVIDIA, 0x055d)
 166 #define HDA_NVIDIA_ALL          HDA_MODEL_CONSTRUCT(NVIDIA, 0xffff)
 167
 168 /* ATI */
 169 #define ATI_VENDORID            0x1002
 170 #define HDA_ATI_SB450           HDA_MODEL_CONSTRUCT(ATI, 0x437b)
 171 #define HDA_ATI_SB600           HDA_MODEL_CONSTRUCT(ATI, 0x4383)
 172 #define HDA_ATI_ALL             HDA_MODEL_CONSTRUCT(ATI, 0xffff)
 173
 174 /* VIA */
 175 #define VIA_VENDORID            0x1106
 176 #define HDA_VIA_VT82XX          HDA_MODEL_CONSTRUCT(VIA, 0x3288)
 177 #define HDA_VIA_ALL             HDA_MODEL_CONSTRUCT(VIA, 0xffff)
 178
 179 /* SiS */
 180 #define SIS_VENDORID            0x1039
 181 #define HDA_SIS_966             HDA_MODEL_CONSTRUCT(SIS, 0x7502)
 182 #define HDA_SIS_ALL             HDA_MODEL_CONSTRUCT(SIS, 0xffff)
 183
 184 /* OEM/subvendors */
 185
 186 /* Intel */
 187 #define INTEL_D101GGC_SUBVENDOR HDA_MODEL_CONSTRUCT(INTEL, 0xd600)
 188
 189 /* HP/Compaq */
 190 #define HP_VENDORID             0x103c
 191 #define HP_V3000_SUBVENDOR      HDA_MODEL_CONSTRUCT(HP, 0x30b5)
 192 #define HP_NX7400_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a2)
 193 #define HP_NX6310_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30aa)
 194 #define HP_NX6325_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30b0)
 195 #define HP_XW4300_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x3013)
 196 #define HP_3010_SUBVENDOR       HDA_MODEL_CONSTRUCT(HP, 0x3010)
 197 #define HP_DV5000_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x30a5)
 198 #define HP_DC7700_SUBVENDOR     HDA_MODEL_CONSTRUCT(HP, 0x2802)
 199 #define HP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(HP, 0xffff)
 200 /* What is wrong with XN 2563 anyway? (Got the picture ?) */
 201 #define HP_NX6325_SUBVENDORX    0x103c30b0
 202
 203 /* Dell */
 204 #define DELL_VENDORID           0x1028
 205 #define DELL_D820_SUBVENDOR     HDA_MODEL_CONSTRUCT(DELL, 0x01cc)
 206 #define DELL_I1300_SUBVENDOR    HDA_MODEL_CONSTRUCT(DELL, 0x01c9)
 207 #define DELL_XPSM1210_SUBVENDOR HDA_MODEL_CONSTRUCT(DELL, 0x01d7)
 208 #define DELL_OPLX745_SUBVENDOR  HDA_MODEL_CONSTRUCT(DELL, 0x01da)
 209 #define DELL_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(DELL, 0xffff)
 210
 211 /* Clevo */
 212 #define CLEVO_VENDORID          0x1558
 213 #define CLEVO_D900T_SUBVENDOR   HDA_MODEL_CONSTRUCT(CLEVO, 0x0900)
 214 #define CLEVO_ALL_SUBVENDOR     HDA_MODEL_CONSTRUCT(CLEVO, 0xffff)
 215
 216 /* Acer */
 217 #define ACER_VENDORID           0x1025
 218 #define ACER_A5050_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x010f)
 219 #define ACER_A4520_SUBVENDOR    HDA_MODEL_CONSTRUCT(ACER, 0x0127)
 220 #define ACER_3681WXM_SUBVENDOR  HDA_MODEL_CONSTRUCT(ACER, 0x0110)
 221 #define ACER_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ACER, 0xffff)
 222
 223 /* Asus */
 224 #define ASUS_VENDORID           0x1043
 225 #define ASUS_M5200_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x1993)
 226 #define ASUS_U5F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 227 #define ASUS_A8JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1153)
 228 #define ASUS_P1AH2_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 229 #define ASUS_A7M_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1323)
 230 #define ASUS_A7T_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x13c2)
 231 #define ASUS_W6F_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1263)
 232 #define ASUS_W2J_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x1971)
 233 #define ASUS_F3JC_SUBVENDOR     HDA_MODEL_CONSTRUCT(ASUS, 0x1338)
 234 #define ASUS_M2V_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x81e7)
 235 #define ASUS_M2N_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0x8234)
 236 #define ASUS_M2NPVMX_SUBVENDOR  HDA_MODEL_CONSTRUCT(ASUS, 0x81cb)
 237 #define ASUS_P5BWD_SUBVENDOR    HDA_MODEL_CONSTRUCT(ASUS, 0x81ec)
 238 #define ASUS_A8NVMCSM_SUBVENDOR HDA_MODEL_CONSTRUCT(NVIDIA, 0xcb84)
 239 #define ASUS_ALL_SUBVENDOR      HDA_MODEL_CONSTRUCT(ASUS, 0xffff)
 240
 241 /* IBM / Lenovo */
 242 #define IBM_VENDORID            0x1014
 243 #define IBM_M52_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0x02f6)
 244 #define IBM_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(IBM, 0xffff)
 245
 246 /* Lenovo */
 247 #define LENOVO_VENDORID         0x17aa
 248 #define LENOVO_3KN100_SUBVENDOR HDA_MODEL_CONSTRUCT(LENOVO, 0x2066)
 249 #define LENOVO_TCA55_SUBVENDOR  HDA_MODEL_CONSTRUCT(LENOVO, 0x1015)
 250 #define LENOVO_ALL_SUBVENDOR    HDA_MODEL_CONSTRUCT(LENOVO, 0xffff)
 251
 252 /* Samsung */
 253 #define SAMSUNG_VENDORID        0x144d
 254 #define SAMSUNG_Q1_SUBVENDOR    HDA_MODEL_CONSTRUCT(SAMSUNG, 0xc027)
 255 #define SAMSUNG_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(SAMSUNG, 0xffff)
 256
 257 /* Medion ? */
 258 #define MEDION_VENDORID                 0x161f
 259 #define MEDION_MD95257_SUBVENDOR        HDA_MODEL_CONSTRUCT(MEDION, 0x203d)
 260 #define MEDION_ALL_SUBVENDOR            HDA_MODEL_CONSTRUCT(MEDION, 0xffff)
 261
 262 /* Apple Computer Inc. */
 263 #define APPLE_VENDORID          0x106b
 264 #define APPLE_MB3_SUBVENDOR     HDA_MODEL_CONSTRUCT(APPLE, 0x00a1)
 265
 266 /*
 267  * Apple Intel MacXXXX seems using Sigmatel codec/vendor id
 268  * instead of their own, which is beyond my comprehension
 269  * (see HDA_CODEC_STAC9221 below).
 270  */
 271 #define APPLE_INTEL_MAC         0x76808384
 272
 273 /* LG Electronics */
 274 #define LG_VENDORID             0x1854
 275 #define LG_LW20_SUBVENDOR       HDA_MODEL_CONSTRUCT(LG, 0x0018)
 276 #define LG_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(LG, 0xffff)
 277
 278 /* Fujitsu Siemens */
 279 #define FS_VENDORID             0x1734
 280 #define FS_PA1510_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10b8)
 281 #define FS_SI1848_SUBVENDOR     HDA_MODEL_CONSTRUCT(FS, 0x10cd)
 282 #define FS_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FS, 0xffff)
 283
 284 /* Fujitsu Limited */
 285 #define FL_VENDORID             0x10cf
 286 #define FL_S7020D_SUBVENDOR     HDA_MODEL_CONSTRUCT(FL, 0x1326)
 287 #define FL_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(FL, 0xffff)
 288
 289 /* Toshiba */
 290 #define TOSHIBA_VENDORID        0x1179
 291 #define TOSHIBA_U200_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0x0001)
 292 #define TOSHIBA_A135_SUBVENDOR  HDA_MODEL_CONSTRUCT(TOSHIBA, 0xff01)
 293 #define TOSHIBA_ALL_SUBVENDOR   HDA_MODEL_CONSTRUCT(TOSHIBA, 0xffff)
 294
 295 /* Micro-Star International (MSI) */
 296 #define MSI_VENDORID            0x1462
 297 #define MSI_MS1034_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x0349)
 298 #define MSI_MS034A_SUBVENDOR    HDA_MODEL_CONSTRUCT(MSI, 0x034a)
 299 #define MSI_ALL_SUBVENDOR       HDA_MODEL_CONSTRUCT(MSI, 0xffff)
 300
 301 /* Giga-Byte Technology */
 302 #define GB_VENDORID             0x1458
 303 #define GB_G33S2H_SUBVENDOR     HDA_MODEL_CONSTRUCT(GB, 0xa022)
 304 #define GP_ALL_SUBVENDOR        HDA_MODEL_CONSTRUCT(GB, 0xffff)
 305
 306 /* Uniwill ? */
 307 #define UNIWILL_VENDORID        0x1584
 308 #define UNIWILL_9075_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9075)
 309 #define UNIWILL_9080_SUBVENDOR  HDA_MODEL_CONSTRUCT(UNIWILL, 0x9080)
 310
 311
 312 /* Misc constants.. */
 313 #define HDA_AMP_MUTE_DEFAULT    (0xffffffff)
 314 #define HDA_AMP_MUTE_NONE       (0)
 315 #define HDA_AMP_MUTE_LEFT       (1 << 0)
 316 #define HDA_AMP_MUTE_RIGHT      (1 << 1)
 317 #define HDA_AMP_MUTE_ALL        (HDA_AMP_MUTE_LEFT | HDA_AMP_MUTE_RIGHT)
 318
 319 #define HDA_AMP_LEFT_MUTED(v)   ((v) & (HDA_AMP_MUTE_LEFT))
 320 #define HDA_AMP_RIGHT_MUTED(v)  (((v) & HDA_AMP_MUTE_RIGHT) >> 1)
 321
 322 #define HDA_DAC_PATH    (1 << 0)
 323 #define HDA_ADC_PATH    (1 << 1)
 324 #define HDA_ADC_RECSEL  (1 << 2)
 325
 326 #define HDA_DAC_LOCKED  (1 << 3)
 327 #define HDA_ADC_LOCKED  (1 << 4)
 328
 329 #define HDA_CTL_OUT     (1 << 0)
 330 #define HDA_CTL_IN      (1 << 1)
 331 #define HDA_CTL_BOTH    (HDA_CTL_IN | HDA_CTL_OUT)
 332
 333 #define HDA_GPIO_MAX            8
 334 /* 0 - 7 = GPIO , 8 = Flush */
 335 #define HDA_QUIRK_GPIO0         (1 << 0)
 336 #define HDA_QUIRK_GPIO1         (1 << 1)
 337 #define HDA_QUIRK_GPIO2         (1 << 2)
 338 #define HDA_QUIRK_GPIO3         (1 << 3)
 339 #define HDA_QUIRK_GPIO4         (1 << 4)
 340 #define HDA_QUIRK_GPIO5         (1 << 5)
 341 #define HDA_QUIRK_GPIO6         (1 << 6)
 342 #define HDA_QUIRK_GPIO7         (1 << 7)
 343 #define HDA_QUIRK_GPIOFLUSH     (1 << 8)
 344
 345 /* 9 - 25 = anything else */
 346 #define HDA_QUIRK_SOFTPCMVOL    (1 << 9)
 347 #define HDA_QUIRK_FIXEDRATE     (1 << 10)
 348 #define HDA_QUIRK_FORCESTEREO   (1 << 11)
 349 #define HDA_QUIRK_EAPDINV       (1 << 12)
 350 #define HDA_QUIRK_DMAPOS        (1 << 13)
 351
 352 /* 26 - 31 = vrefs */
 353 #define HDA_QUIRK_IVREF50       (1 << 26)
 354 #define HDA_QUIRK_IVREF80       (1 << 27)
 355 #define HDA_QUIRK_IVREF100      (1 << 28)
 356 #define HDA_QUIRK_OVREF50       (1 << 29)
 357 #define HDA_QUIRK_OVREF80       (1 << 30)
 358 #define HDA_QUIRK_OVREF100      (1 << 31)
 359
 360 #define HDA_QUIRK_IVREF         (HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF80 | \
 361                                                         HDA_QUIRK_IVREF100)
 362 #define HDA_QUIRK_OVREF         (HDA_QUIRK_OVREF50 | HDA_QUIRK_OVREF80 | \
 363                                                         HDA_QUIRK_OVREF100)
 364 #define HDA_QUIRK_VREF          (HDA_QUIRK_IVREF | HDA_QUIRK_OVREF)
 365
 366 #define SOUND_MASK_SKIP         (1 << 30)
 367 #define SOUND_MASK_DISABLE      (1 << 31)
 368
 369 static const struct {
 370         char *key;
 371         uint32_t value;
 372 } hdac_quirks_tab[] = {
 373         { "gpio0", HDA_QUIRK_GPIO0 },
 374         { "gpio1", HDA_QUIRK_GPIO1 },
 375         { "gpio2", HDA_QUIRK_GPIO2 },
 376         { "gpio3", HDA_QUIRK_GPIO3 },
 377         { "gpio4", HDA_QUIRK_GPIO4 },
 378         { "gpio5", HDA_QUIRK_GPIO5 },
 379         { "gpio6", HDA_QUIRK_GPIO6 },
 380         { "gpio7", HDA_QUIRK_GPIO7 },
 381         { "gpioflush", HDA_QUIRK_GPIOFLUSH },
 382         { "softpcmvol", HDA_QUIRK_SOFTPCMVOL },
 383         { "fixedrate", HDA_QUIRK_FIXEDRATE },
 384         { "forcestereo", HDA_QUIRK_FORCESTEREO },
 385         { "eapdinv", HDA_QUIRK_EAPDINV },
 386         { "dmapos", HDA_QUIRK_DMAPOS },
 387         { "ivref50", HDA_QUIRK_IVREF50 },
 388         { "ivref80", HDA_QUIRK_IVREF80 },
 389         { "ivref100", HDA_QUIRK_IVREF100 },
 390         { "ovref50", HDA_QUIRK_OVREF50 },
 391         { "ovref80", HDA_QUIRK_OVREF80 },
 392         { "ovref100", HDA_QUIRK_OVREF100 },
 393         { "ivref", HDA_QUIRK_IVREF },
 394         { "ovref", HDA_QUIRK_OVREF },
 395         { "vref", HDA_QUIRK_VREF },
 396 };
 397 #define HDAC_QUIRKS_TAB_LEN     \
 398                 (sizeof(hdac_quirks_tab) / sizeof(hdac_quirks_tab[0]))
 399
 400 #define HDA_BDL_MIN     2
 401 #define HDA_BDL_MAX     256
 402 #define HDA_BDL_DEFAULT HDA_BDL_MIN
 403
 404 #define HDA_BLK_MIN     HDAC_DMA_ALIGNMENT
 405 #define HDA_BLK_ALIGN   (~(HDA_BLK_MIN - 1))
 406
 407 #define HDA_BUFSZ_MIN           4096
 408 #define HDA_BUFSZ_MAX           65536
 409 #define HDA_BUFSZ_DEFAULT       16384
 410
 411 #define HDA_PARSE_MAXDEPTH      10
 412
 413 #define HDAC_UNSOLTAG_EVENT_HP          0x00
 414 #define HDAC_UNSOLTAG_EVENT_TEST        0x01
 415
 416 MALLOC_DEFINE(M_HDAC, "hdac", "High Definition Audio Controller");
 417
 418 enum {
 419         HDA_PARSE_MIXER,
 420         HDA_PARSE_DIRECT
 421 };
 422
 423 /* Default */
 424 static uint32_t hdac_fmt[] = {
 425         AFMT_STEREO | AFMT_S16_LE,
 426         0
 427 };
 428
 429 static struct pcmchan_caps hdac_caps = {48000, 48000, hdac_fmt, 0};
 430
 431 static const struct {
 432         uint32_t        model;
 433         char            *desc;
 434 } hdac_devices[] = {
 435         { HDA_INTEL_82801F,  "Intel 82801F" },
 436         { HDA_INTEL_63XXESB, "Intel 631x/632xESB" },
 437         { HDA_INTEL_82801G,  "Intel 82801G" },
 438         { HDA_INTEL_82801H,  "Intel 82801H" },
 439         { HDA_INTEL_82801I,  "Intel 82801I" },
 440         { HDA_NVIDIA_MCP51,  "NVidia MCP51" },
 441         { HDA_NVIDIA_MCP55,  "NVidia MCP55" },
 442         { HDA_NVIDIA_MCP61_1, "NVidia MCP61" },
 443         { HDA_NVIDIA_MCP61_2, "NVidia MCP61" },
 444         { HDA_NVIDIA_MCP65_1, "NVidia MCP65" },
 445         { HDA_NVIDIA_MCP65_2, "NVidia MCP65" },
 446         { HDA_NVIDIA_MCP67_1, "NVidia MCP67" },
 447         { HDA_NVIDIA_MCP67_2, "NVidia MCP67" },
 448         { HDA_ATI_SB450,     "ATI SB450"    },
 449         { HDA_ATI_SB600,     "ATI SB600"    },
 450         { HDA_VIA_VT82XX,    "VIA VT8251/8237A" },
 451         { HDA_SIS_966,       "SiS 966" },
 452         /* Unknown */
 453         { HDA_INTEL_ALL,  "Intel (Unknown)"  },
 454         { HDA_NVIDIA_ALL, "NVidia (Unknown)" },
 455         { HDA_ATI_ALL,    "ATI (Unknown)"    },
 456         { HDA_VIA_ALL,    "VIA (Unknown)"    },
 457         { HDA_SIS_ALL,    "SiS (Unknown)"    },
 458 };
 459 #define HDAC_DEVICES_LEN (sizeof(hdac_devices) / sizeof(hdac_devices[0]))
 460
 461 static const struct {
 462         uint16_t vendor;
 463         uint8_t reg;
 464         uint8_t mask;
 465         uint8_t enable;
 466 } hdac_pcie_snoop[] = {
 467         {  INTEL_VENDORID, 0x00, 0x00, 0x00 },
 468         {    ATI_VENDORID, 0x42, 0xf8, 0x02 },
 469         { NVIDIA_VENDORID, 0x4e, 0xf0, 0x0f },
 470 };
 471 #define HDAC_PCIESNOOP_LEN      \
 472                         (sizeof(hdac_pcie_snoop) / sizeof(hdac_pcie_snoop[0]))
 473
 474 static const struct {
 475         uint32_t        rate;
 476         int             valid;
 477         uint16_t        base;
 478         uint16_t        mul;
 479         uint16_t        div;
 480 } hda_rate_tab[] = {
 481         {   8000, 1, 0x0000, 0x0000, 0x0500 },  /* (48000 * 1) / 6 */
 482         {   9600, 0, 0x0000, 0x0000, 0x0400 },  /* (48000 * 1) / 5 */
 483         {  12000, 0, 0x0000, 0x0000, 0x0300 },  /* (48000 * 1) / 4 */
 484         {  16000, 1, 0x0000, 0x0000, 0x0200 },  /* (48000 * 1) / 3 */
 485         {  18000, 0, 0x0000, 0x1000, 0x0700 },  /* (48000 * 3) / 8 */
 486         {  19200, 0, 0x0000, 0x0800, 0x0400 },  /* (48000 * 2) / 5 */
 487         {  24000, 0, 0x0000, 0x0000, 0x0100 },  /* (48000 * 1) / 2 */
 488         {  28800, 0, 0x0000, 0x1000, 0x0400 },  /* (48000 * 3) / 5 */
 489         {  32000, 1, 0x0000, 0x0800, 0x0200 },  /* (48000 * 2) / 3 */
 490         {  36000, 0, 0x0000, 0x1000, 0x0300 },  /* (48000 * 3) / 4 */
 491         {  38400, 0, 0x0000, 0x1800, 0x0400 },  /* (48000 * 4) / 5 */
 492         {  48000, 1, 0x0000, 0x0000, 0x0000 },  /* (48000 * 1) / 1 */
 493         {  64000, 0, 0x0000, 0x1800, 0x0200 },  /* (48000 * 4) / 3 */
 494         {  72000, 0, 0x0000, 0x1000, 0x0100 },  /* (48000 * 3) / 2 */
 495         {  96000, 1, 0x0000, 0x0800, 0x0000 },  /* (48000 * 2) / 1 */
 496         { 144000, 0, 0x0000, 0x1000, 0x0000 },  /* (48000 * 3) / 1 */
 497         { 192000, 1, 0x0000, 0x1800, 0x0000 },  /* (48000 * 4) / 1 */
 498         {   8820, 0, 0x4000, 0x0000, 0x0400 },  /* (44100 * 1) / 5 */
 499         {  11025, 1, 0x4000, 0x0000, 0x0300 },  /* (44100 * 1) / 4 */
 500         {  12600, 0, 0x4000, 0x0800, 0x0600 },  /* (44100 * 2) / 7 */
 501         {  14700, 0, 0x4000, 0x0000, 0x0200 },  /* (44100 * 1) / 3 */
 502         {  17640, 0, 0x4000, 0x0800, 0x0400 },  /* (44100 * 2) / 5 */
 503         {  18900, 0, 0x4000, 0x1000, 0x0600 },  /* (44100 * 3) / 7 */
 504         {  22050, 1, 0x4000, 0x0000, 0x0100 },  /* (44100 * 1) / 2 */
 505         {  25200, 0, 0x4000, 0x1800, 0x0600 },  /* (44100 * 4) / 7 */
 506         {  26460, 0, 0x4000, 0x1000, 0x0400 },  /* (44100 * 3) / 5 */
 507         {  29400, 0, 0x4000, 0x0800, 0x0200 },  /* (44100 * 2) / 3 */
 508         {  33075, 0, 0x4000, 0x1000, 0x0300 },  /* (44100 * 3) / 4 */
 509         {  35280, 0, 0x4000, 0x1800, 0x0400 },  /* (44100 * 4) / 5 */
 510         {  44100, 1, 0x4000, 0x0000, 0x0000 },  /* (44100 * 1) / 1 */
 511         {  58800, 0, 0x4000, 0x1800, 0x0200 },  /* (44100 * 4) / 3 */
 512         {  66150, 0, 0x4000, 0x1000, 0x0100 },  /* (44100 * 3) / 2 */
 513         {  88200, 1, 0x4000, 0x0800, 0x0000 },  /* (44100 * 2) / 1 */
 514         { 132300, 0, 0x4000, 0x1000, 0x0000 },  /* (44100 * 3) / 1 */
 515         { 176400, 1, 0x4000, 0x1800, 0x0000 },  /* (44100 * 4) / 1 */
 516 };
 517 #define HDA_RATE_TAB_LEN (sizeof(hda_rate_tab) / sizeof(hda_rate_tab[0]))
 518
 519 /* All codecs you can eat... */
 520 #define HDA_CODEC_CONSTRUCT(vendor, id) \
 521                 (((uint32_t)(vendor##_VENDORID) << 16) | ((id) & 0xffff))
 522
 523 /* Realtek */
 524 #define REALTEK_VENDORID        0x10ec
 525 #define HDA_CODEC_ALC260        HDA_CODEC_CONSTRUCT(REALTEK, 0x0260)
 526 #define HDA_CODEC_ALC262        HDA_CODEC_CONSTRUCT(REALTEK, 0x0262)
 527 #define HDA_CODEC_ALC268        HDA_CODEC_CONSTRUCT(REALTEK, 0x0268)
 528 #define HDA_CODEC_ALC660        HDA_CODEC_CONSTRUCT(REALTEK, 0x0660)
 529 #define HDA_CODEC_ALC861        HDA_CODEC_CONSTRUCT(REALTEK, 0x0861)
 530 #define HDA_CODEC_ALC861VD      HDA_CODEC_CONSTRUCT(REALTEK, 0x0862)
 531 #define HDA_CODEC_ALC880        HDA_CODEC_CONSTRUCT(REALTEK, 0x0880)
 532 #define HDA_CODEC_ALC882        HDA_CODEC_CONSTRUCT(REALTEK, 0x0882)
 533 #define HDA_CODEC_ALC883        HDA_CODEC_CONSTRUCT(REALTEK, 0x0883)
 534 #define HDA_CODEC_ALC885        HDA_CODEC_CONSTRUCT(REALTEK, 0x0885)
 535 #define HDA_CODEC_ALC888        HDA_CODEC_CONSTRUCT(REALTEK, 0x0888)
 536 #define HDA_CODEC_ALCXXXX       HDA_CODEC_CONSTRUCT(REALTEK, 0xffff)
 537
 538 /* Analog Devices */
 539 #define ANALOGDEVICES_VENDORID  0x11d4
 540 #define HDA_CODEC_AD1981HD      HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1981)
 541 #define HDA_CODEC_AD1983        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1983)
 542 #define HDA_CODEC_AD1984        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1984)
 543 #define HDA_CODEC_AD1986A       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1986)
 544 #define HDA_CODEC_AD1988        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x1988)
 545 #define HDA_CODEC_AD1988B       HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0x198b)
 546 #define HDA_CODEC_ADXXXX        HDA_CODEC_CONSTRUCT(ANALOGDEVICES, 0xffff)
 547
 548 /* CMedia */
 549 #define CMEDIA_VENDORID         0x434d
 550 #define HDA_CODEC_CMI9880       HDA_CODEC_CONSTRUCT(CMEDIA, 0x4980)
 551 #define HDA_CODEC_CMIXXXX       HDA_CODEC_CONSTRUCT(CMEDIA, 0xffff)
 552
 553 /* Sigmatel */
 554 #define SIGMATEL_VENDORID       0x8384
 555 #define HDA_CODEC_STAC9221      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7680)
 556 #define HDA_CODEC_STAC9221D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7683)
 557 #define HDA_CODEC_STAC9220      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7690)
 558 #define HDA_CODEC_STAC922XD     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7681)
 559 #define HDA_CODEC_STAC9227      HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7618)
 560 #define HDA_CODEC_STAC9271D     HDA_CODEC_CONSTRUCT(SIGMATEL, 0x7627)
 561 #define HDA_CODEC_STACXXXX      HDA_CODEC_CONSTRUCT(SIGMATEL, 0xffff)
 562
 563 /*
 564  * Conexant
 565  *
 566  * Ok, the truth is, I don't have any idea at all whether
 567  * it is "Venice" or "Waikiki" or other unnamed CXyadayada. The only
 568  * place that tell me it is "Venice" is from its Windows driver INF.
 569  *
 570  *  Venice - CX?????
 571  * Waikiki - CX20551-22
 572  */
 573 #define CONEXANT_VENDORID       0x14f1
 574 #define HDA_CODEC_CXVENICE      HDA_CODEC_CONSTRUCT(CONEXANT, 0x5045)
 575 #define HDA_CODEC_CXWAIKIKI     HDA_CODEC_CONSTRUCT(CONEXANT, 0x5047)
 576 #define HDA_CODEC_CXXXXX        HDA_CODEC_CONSTRUCT(CONEXANT, 0xffff)
 577
 578 /* VIA */
 579 #define HDA_CODEC_VT1708_8      HDA_CODEC_CONSTRUCT(VIA, 0x1708)
 580 #define HDA_CODEC_VT1708_9      HDA_CODEC_CONSTRUCT(VIA, 0x1709)
 581 #define HDA_CODEC_VT1708_A      HDA_CODEC_CONSTRUCT(VIA, 0x170a)
 582 #define HDA_CODEC_VT1708_B      HDA_CODEC_CONSTRUCT(VIA, 0x170b)
 583 #define HDA_CODEC_VT1709_0      HDA_CODEC_CONSTRUCT(VIA, 0xe710)
 584 #define HDA_CODEC_VT1709_1      HDA_CODEC_CONSTRUCT(VIA, 0xe711)
 585 #define HDA_CODEC_VT1709_2      HDA_CODEC_CONSTRUCT(VIA, 0xe712)
 586 #define HDA_CODEC_VT1709_3      HDA_CODEC_CONSTRUCT(VIA, 0xe713)
 587 #define HDA_CODEC_VT1709_4      HDA_CODEC_CONSTRUCT(VIA, 0xe714)
 588 #define HDA_CODEC_VT1709_5      HDA_CODEC_CONSTRUCT(VIA, 0xe715)
 589 #define HDA_CODEC_VT1709_6      HDA_CODEC_CONSTRUCT(VIA, 0xe716)
 590 #define HDA_CODEC_VT1709_7      HDA_CODEC_CONSTRUCT(VIA, 0xe717)
 591 #define HDA_CODEC_VTXXXX        HDA_CODEC_CONSTRUCT(VIA, 0xffff)
 592
 593
 594 /* Codecs */
 595 static const struct {
 596         uint32_t id;
 597         char *name;
 598 } hdac_codecs[] = {
 599         { HDA_CODEC_ALC260,    "Realtek ALC260" },
 600         { HDA_CODEC_ALC262,    "Realtek ALC262" },
 601         { HDA_CODEC_ALC268,    "Realtek ALC268" },
 602         { HDA_CODEC_ALC660,    "Realtek ALC660" },
 603         { HDA_CODEC_ALC861,    "Realtek ALC861" },
 604         { HDA_CODEC_ALC861VD,  "Realtek ALC861-VD" },
 605         { HDA_CODEC_ALC880,    "Realtek ALC880" },
 606         { HDA_CODEC_ALC882,    "Realtek ALC882" },
 607         { HDA_CODEC_ALC883,    "Realtek ALC883" },
 608         { HDA_CODEC_ALC885,    "Realtek ALC885" },
 609         { HDA_CODEC_ALC888,    "Realtek ALC888" },
 610         { HDA_CODEC_AD1981HD,  "Analog Devices AD1981HD" },
 611         { HDA_CODEC_AD1983,    "Analog Devices AD1983" },
 612         { HDA_CODEC_AD1984,    "Analog Devices AD1984" },
 613         { HDA_CODEC_AD1986A,   "Analog Devices AD1986A" },
 614         { HDA_CODEC_AD1988,    "Analog Devices AD1988" },
 615         { HDA_CODEC_AD1988B,   "Analog Devices AD1988B" },
 616         { HDA_CODEC_CMI9880,   "CMedia CMI9880" },
 617         { HDA_CODEC_STAC9221,  "Sigmatel STAC9221" },
 618         { HDA_CODEC_STAC9221D, "Sigmatel STAC9221D" },
 619         { HDA_CODEC_STAC9220,  "Sigmatel STAC9220" },
 620         { HDA_CODEC_STAC922XD, "Sigmatel STAC9220D/9223D" },
 621         { HDA_CODEC_STAC9227,  "Sigmatel STAC9227" },
 622         { HDA_CODEC_STAC9271D, "Sigmatel STAC9271D" },
 623         { HDA_CODEC_CXVENICE,  "Conexant Venice" },
 624         { HDA_CODEC_CXWAIKIKI, "Conexant Waikiki" },
 625         { HDA_CODEC_VT1708_8,  "VIA VT1708_8" },
 626         { HDA_CODEC_VT1708_9,  "VIA VT1708_9" },
 627         { HDA_CODEC_VT1708_A,  "VIA VT1708_A" },
 628         { HDA_CODEC_VT1708_B,  "VIA VT1708_B" },
 629         { HDA_CODEC_VT1709_0,  "VIA VT1709_0" },
 630         { HDA_CODEC_VT1709_1,  "VIA VT1709_1" },
 631         { HDA_CODEC_VT1709_2,  "VIA VT1709_2" },
 632         { HDA_CODEC_VT1709_3,  "VIA VT1709_3" },
 633         { HDA_CODEC_VT1709_4,  "VIA VT1709_4" },
 634         { HDA_CODEC_VT1709_5,  "VIA VT1709_5" },
 635         { HDA_CODEC_VT1709_6,  "VIA VT1709_6" },
 636         { HDA_CODEC_VT1709_7,  "VIA VT1709_7" },
 637         /* Unknown codec */
 638         { HDA_CODEC_ALCXXXX,   "Realtek (Unknown)" },
 639         { HDA_CODEC_ADXXXX,    "Analog Devices (Unknown)" },
 640         { HDA_CODEC_CMIXXXX,   "CMedia (Unknown)" },
 641         { HDA_CODEC_STACXXXX,  "Sigmatel (Unknown)" },
 642         { HDA_CODEC_CXXXXX,    "Conexant (Unknown)" },
 643         { HDA_CODEC_VTXXXX,    "VIA (Unknown)" },
 644 };
 645 #define HDAC_CODECS_LEN (sizeof(hdac_codecs) / sizeof(hdac_codecs[0]))
 646
 647 enum {
 648         HDAC_HP_SWITCH_CTL,
 649         HDAC_HP_SWITCH_CTRL,
 650         HDAC_HP_SWITCH_DEBUG
 651 };
 652
 653 static const struct {
 654         uint32_t model;
 655         uint32_t id;
 656         int type;
 657         int inverted;
 658         int polling;
 659         int execsense;
 660         nid_t hpnid;
 661         nid_t spkrnid[8];
 662         nid_t eapdnid;
 663 } hdac_hp_switch[] = {
 664         /* Specific OEM models */
 665         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 666             0, 0, -1, 17, { 16, -1 }, 16 },
 667         /* { HP_XW4300_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 668             0, 0, -1, 21, { 16, 17, -1 }, -1 } */
 669         /* { HP_3010_SUBVENDOR,  HDA_CODEC_ALC260, HDAC_HP_SWITCH_DEBUG,
 670             0, 1, 0, 16, { 15, 18, 19, 20, 21, -1 }, -1 }, */
 671         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 672             0, 0, -1, 6, { 5, -1 }, 5 },
 673         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 674             0, 0, -1, 6, { 5, -1 }, 5 },
 675         { HP_NX6325_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 676             0, 0, -1, 6, { 5, -1 }, 5 },
 677         /* { HP_DC7700_SUBVENDOR, HDA_CODEC_ALC262, HDAC_HP_SWITCH_CTL,
 678             0, 0, -1, 21, { 22, 27, -1 }, -1 }, */
 679         { TOSHIBA_U200_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 680             0, 0, -1, 6, { 5, -1 }, -1 },
 681         { TOSHIBA_A135_SUBVENDOR, HDA_CODEC_ALC861VD, HDAC_HP_SWITCH_CTL,
 682             0, 0, -1, 27, { 20, -1 }, -1 },
 683         { DELL_D820_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 684             0, 0, -1, 13, { 14, -1 }, -1 },
 685         { DELL_I1300_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 686             0, 0, -1, 13, { 14, -1 }, -1 },
 687         { DELL_OPLX745_SUBVENDOR, HDA_CODEC_AD1983, HDAC_HP_SWITCH_CTL,
 688             0, 0, -1, 6, { 5, 7, -1 }, -1 },
 689         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885, HDAC_HP_SWITCH_CTL,
 690             0, 0, -1, 21, { 20, 22, -1 }, -1 },
 691         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221, HDAC_HP_SWITCH_CTRL,
 692             0, 0, -1, 10, { 13, -1 }, -1 },
 693         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 694             1, 0, -1, 26, { 27, -1 }, -1 },
 695         /* { LENOVO_TCA55_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 696             0, 0, -1, 26, { 27, 28, 29, 30, -1 }, -1 }, */
 697         { LG_LW20_SUBVENDOR, HDA_CODEC_ALC880, HDAC_HP_SWITCH_CTL,
 698             0, 0, -1, 27, { 20, -1 }, -1 },
 699         { ACER_A5050_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 700             0, 0, -1, 20, { 21, -1 }, -1 },
 701         { ACER_3681WXM_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 702             0, 0, -1, 20, { 21, -1 }, -1 },
 703         { ACER_A4520_SUBVENDOR, HDA_CODEC_ALC268, HDAC_HP_SWITCH_CTL,
 704             0, 0, -1, 20, { 21, -1 }, -1 },
 705         { UNIWILL_9080_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 706             0, 0, -1, 20, { 21, -1 }, -1 },
 707         { MSI_MS1034_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 708             0, 0, -1, 20, { 27, -1 }, -1 },
 709         { MSI_MS034A_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 710             0, 0, -1, 20, { 27, -1 }, -1 },
 711         { FS_SI1848_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 712             0, 0, -1, 20, { 21, -1 }, -1 },
 713         { FL_S7020D_SUBVENDOR, HDA_CODEC_ALC260, HDAC_HP_SWITCH_CTL,
 714             0, 0, -1, 20, { 16, -1 }, -1 },
 715         /*
 716          * All models that at least come from the same vendor with
 717          * simmilar codec.
 718          */
 719         { HP_ALL_SUBVENDOR, HDA_CODEC_CXVENICE, HDAC_HP_SWITCH_CTL,
 720             0, 0, -1, 17, { 16, -1 }, 16 },
 721         { HP_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 722             0, 0, -1, 6, { 5, -1 }, 5 },
 723         { TOSHIBA_ALL_SUBVENDOR, HDA_CODEC_AD1981HD, HDAC_HP_SWITCH_CTL,
 724             0, 0, -1, 6, { 5, -1 }, -1 },
 725         { DELL_ALL_SUBVENDOR, HDA_CODEC_STAC9220, HDAC_HP_SWITCH_CTRL,
 726             0, 0, -1, 13, { 14, -1 }, -1 },
 727 #if 0
 728         { LENOVO_ALL_SUBVENDOR, HDA_CODEC_AD1986A, HDAC_HP_SWITCH_CTL,
 729             1, 0, -1, 26, { 27, -1 }, -1 },
 730         { ACER_ALL_SUBVENDOR, HDA_CODEC_ALC883, HDAC_HP_SWITCH_CTL,
 731             0, 0, -1, 20, { 21, -1 }, -1 },
 732 #endif
 733 };
 734 #define HDAC_HP_SWITCH_LEN      \
 735                 (sizeof(hdac_hp_switch) / sizeof(hdac_hp_switch[0]))
 736
 737 static const struct {
 738         uint32_t model;
 739         uint32_t id;
 740         nid_t eapdnid;
 741         int hp_switch;
 742 } hdac_eapd_switch[] = {
 743         { HP_V3000_SUBVENDOR, HDA_CODEC_CXVENICE, 16, 1 },
 744         { HP_NX7400_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 745         { HP_NX6310_SUBVENDOR, HDA_CODEC_AD1981HD, 5, 1 },
 746 };
 747 #define HDAC_EAPD_SWITCH_LEN    \
 748                 (sizeof(hdac_eapd_switch) / sizeof(hdac_eapd_switch[0]))
 749
 750 /****************************************************************************
 751  * Function prototypes
 752  ****************************************************************************/
 753 static void     hdac_intr_handler(void *);
 754 static int      hdac_reset(struct hdac_softc *);
 755 static int      hdac_get_capabilities(struct hdac_softc *);
 756 static void     hdac_dma_cb(void *, bus_dma_segment_t *, int, int);
 757 static int      hdac_dma_alloc(struct hdac_softc *,
 758                                         struct hdac_dma *, bus_size_t);
 759 static void     hdac_dma_free(struct hdac_softc *, struct hdac_dma *);
 760 static int      hdac_mem_alloc(struct hdac_softc *);
 761 static void     hdac_mem_free(struct hdac_softc *);
 762 static int      hdac_irq_alloc(struct hdac_softc *);
 763 static void     hdac_irq_free(struct hdac_softc *);
 764 static void     hdac_corb_init(struct hdac_softc *);
 765 static void     hdac_rirb_init(struct hdac_softc *);
 766 static void     hdac_corb_start(struct hdac_softc *);
 767 static void     hdac_rirb_start(struct hdac_softc *);
 768 static void     hdac_scan_codecs(struct hdac_softc *, int);
 769 static int      hdac_probe_codec(struct hdac_codec *);
 770 static struct   hdac_devinfo *hdac_probe_function(struct hdac_codec *, nid_t);
 771 static void     hdac_add_child(struct hdac_softc *, struct hdac_devinfo *);
 772
 773 static void     hdac_attach2(void *);
 774
 775 static uint32_t hdac_command_sendone_internal(struct hdac_softc *,
 776                                                         uint32_t, int);
 777 static void     hdac_command_send_internal(struct hdac_softc *,
 778                                         struct hdac_command_list *, int);
 779
 780 static int      hdac_probe(device_t);
 781 static int      hdac_attach(device_t);
 782 static int      hdac_detach(device_t);
 783 static void     hdac_widget_connection_select(struct hdac_widget *, uint8_t);
 784 static void     hdac_audio_ctl_amp_set(struct hdac_audio_ctl *,
 785                                                 uint32_t, int, int);
 786 static struct   hdac_audio_ctl *hdac_audio_ctl_amp_get(struct hdac_devinfo *,
 787                                                         nid_t, int, int);
 788 static void     hdac_audio_ctl_amp_set_internal(struct hdac_softc *,
 789                                 nid_t, nid_t, int, int, int, int, int, int);
 790 static int      hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *);
 791 static struct   hdac_widget *hdac_widget_get(struct hdac_devinfo *, nid_t);
 792
 793 static int      hdac_rirb_flush(struct hdac_softc *sc);
 794 static int      hdac_unsolq_flush(struct hdac_softc *sc);
 795
 796 #define hdac_command(a1, a2, a3)        \
 797                 hdac_command_sendone_internal(a1, a2, a3)
 798
 799 #define hdac_codec_id(d)                                                \
 800                 ((uint32_t)((d == NULL) ? 0x00000000 :                  \
 801                 ((((uint32_t)(d)->vendor_id & 0x0000ffff) << 16) |      \
 802                 ((uint32_t)(d)->device_id & 0x0000ffff))))
 803
 804 static char *
 805 hdac_codec_name(struct hdac_devinfo *devinfo)
 806 {
 807         uint32_t id;
 808         int i;
 809
 810         id = hdac_codec_id(devinfo);
 811
 812         for (i = 0; i < HDAC_CODECS_LEN; i++) {
 813                 if (HDA_DEV_MATCH(hdac_codecs[i].id, id))
 814                         return (hdac_codecs[i].name);
 815         }
 816
 817         return ((id == 0x00000000) ? "NULL Codec" : "Unknown Codec");
 818 }
 819
 820 static char *
 821 hdac_audio_ctl_ossmixer_mask2name(uint32_t devmask)
 822 {
 823         static char *ossname[] = SOUND_DEVICE_NAMES;
 824         static char *unknown = "???";
 825         int i;
 826
 827         for (i = SOUND_MIXER_NRDEVICES - 1; i >= 0; i--) {
 828                 if (devmask & (1 << i))
 829                         return (ossname[i]);
 830         }
 831         return (unknown);
 832 }
 833
 834 static void
 835 hdac_audio_ctl_ossmixer_mask2allname(uint32_t mask, char *buf, size_t len)
 836 {
 837         static char *ossname[] = SOUND_DEVICE_NAMES;
 838         int i, first = 1;
 839
 840         bzero(buf, len);
 841         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
 842                 if (mask & (1 << i)) {
 843                         if (first == 0)
 844                                 strlcat(buf, ", ", len);
 845                         strlcat(buf, ossname[i], len);
 846                         first = 0;
 847                 }
 848         }
 849 }
 850
 851 static struct hdac_audio_ctl *
 852 hdac_audio_ctl_each(struct hdac_devinfo *devinfo, int *index)
 853 {
 854         if (devinfo == NULL ||
 855             devinfo->node_type != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO ||
 856             index == NULL || devinfo->function.audio.ctl == NULL ||
 857             devinfo->function.audio.ctlcnt < 1 ||
 858             *index < 0 || *index >= devinfo->function.audio.ctlcnt)
 859                 return (NULL);
 860         return (&devinfo->function.audio.ctl[(*index)++]);
 861 }
 862
 863 static struct hdac_audio_ctl *
 864 hdac_audio_ctl_amp_get(struct hdac_devinfo *devinfo, nid_t nid,
 865                                                 int index, int cnt)
 866 {
 867         struct hdac_audio_ctl *ctl, *retctl = NULL;
 868         int i, at, atindex, found = 0;
 869
 870         if (devinfo == NULL || devinfo->function.audio.ctl == NULL)
 871                 return (NULL);
 872
 873         at = cnt;
 874         if (at == 0)
 875                 at = 1;
 876         else if (at < 0)
 877                 at = -1;
 878         atindex = index;
 879         if (atindex < 0)
 880                 atindex = -1;
 881
 882         i = 0;
 883         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
 884                 if (ctl->enable == 0 || ctl->widget == NULL)
 885                         continue;
 886                 if (!(ctl->widget->nid == nid && (atindex == -1 ||
 887                     ctl->index == atindex)))
 888                         continue;
 889                 found++;
 890                 if (found == cnt)
 891                         return (ctl);
 892                 retctl = ctl;
 893         }
 894
 895         return ((at == -1) ? retctl : NULL);
 896 }
 897
 898 static void
 899 hdac_hp_switch_handler(struct hdac_devinfo *devinfo)
 900 {
 901         struct hdac_softc *sc;
 902         struct hdac_widget *w;
 903         struct hdac_audio_ctl *ctl;
 904         uint32_t val, id, res;
 905         int i = 0, j, timeout, forcemute;
 906         nid_t cad;
 907
 908         if (devinfo == NULL || devinfo->codec == NULL ||
 909             devinfo->codec->sc == NULL)
 910                 return;
 911
 912         sc = devinfo->codec->sc;
 913         cad = devinfo->codec->cad;
 914         id = hdac_codec_id(devinfo);
 915         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
 916                 if (HDA_DEV_MATCH(hdac_hp_switch[i].model,
 917                     sc->pci_subvendor) &&
 918                     hdac_hp_switch[i].id == id)
 919                         break;
 920         }
 921
 922         if (i >= HDAC_HP_SWITCH_LEN)
 923                 return;
 924
 925         forcemute = 0;
 926         if (hdac_hp_switch[i].eapdnid != -1) {
 927                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].eapdnid);
 928                 if (w != NULL && w->param.eapdbtl != HDAC_INVALID)
 929                         forcemute = (w->param.eapdbtl &
 930                             HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD) ? 0 : 1;
 931         }
 932
 933         if (hdac_hp_switch[i].execsense != -1)
 934                 hdac_command(sc,
 935                     HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
 936                     hdac_hp_switch[i].execsense), cad);
 937
 938         timeout = 10000;
 939         do {
 940                 res = hdac_command(sc,
 941                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid),
 942                     cad);
 943                 if (hdac_hp_switch[i].execsense == -1 || res != 0x7fffffff)
 944                         break;
 945                 DELAY(10);
 946         } while (--timeout != 0);
 947
 948         HDA_BOOTVERBOSE(
 949                 device_printf(sc->dev,
 950                     "HDA_DEBUG: Pin sense: nid=%d timeout=%d res=0x%08x\n",
 951                     hdac_hp_switch[i].hpnid, timeout, res);
 952         );
 953
 954         res = HDA_CMD_GET_PIN_SENSE_PRESENCE_DETECT(res);
 955         res ^= hdac_hp_switch[i].inverted;
 956
 957         switch (hdac_hp_switch[i].type) {
 958         case HDAC_HP_SWITCH_CTL:
 959                 ctl = hdac_audio_ctl_amp_get(devinfo,
 960                     hdac_hp_switch[i].hpnid, 0, 1);
 961                 if (ctl != NULL) {
 962                         val = (res != 0 && forcemute == 0) ?
 963                             HDA_AMP_MUTE_NONE : HDA_AMP_MUTE_ALL;
 964                         if (val != ctl->muted) {
 965                                 ctl->muted = val;
 966                                 hdac_audio_ctl_amp_set(ctl,
 967                                     HDA_AMP_MUTE_DEFAULT, ctl->left,
 968                                     ctl->right);
 969                         }
 970                 }
 971                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
 972                         ctl = hdac_audio_ctl_amp_get(devinfo,
 973                             hdac_hp_switch[i].spkrnid[j], 0, 1);
 974                         if (ctl == NULL)
 975                                 continue;
 976                         val = (res != 0 || forcemute == 1) ?
 977                             HDA_AMP_MUTE_ALL : HDA_AMP_MUTE_NONE;
 978                         if (val == ctl->muted)
 979                                 continue;
 980                         ctl->muted = val;
 981                         hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
 982                             ctl->left, ctl->right);
 983                 }
 984                 break;
 985         case HDAC_HP_SWITCH_CTRL:
 986                 if (res != 0) {
 987                         /* HP in */
 988                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
 989                         if (w != NULL && w->type ==
 990                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
 991                                 if (forcemute == 0)
 992                                         val = w->wclass.pin.ctrl |
 993                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
 994                                 else
 995                                         val = w->wclass.pin.ctrl &
 996                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
 997                                 if (val != w->wclass.pin.ctrl) {
 998                                         w->wclass.pin.ctrl = val;
 999                                         hdac_command(sc,
1000                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1001                                             w->nid, w->wclass.pin.ctrl), cad);
1002                                 }
1003                         }
1004                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1005                                 w = hdac_widget_get(devinfo,
1006                                     hdac_hp_switch[i].spkrnid[j]);
1007                                 if (w == NULL || w->type !=
1008                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1009                                         continue;
1010                                 val = w->wclass.pin.ctrl &
1011                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1012                                 if (val == w->wclass.pin.ctrl)
1013                                         continue;
1014                                 w->wclass.pin.ctrl = val;
1015                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1016                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1017                         }
1018                 } else {
1019                         /* HP out */
1020                         w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
1021                         if (w != NULL && w->type ==
1022                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
1023                                 val = w->wclass.pin.ctrl &
1024                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1025                                 if (val != w->wclass.pin.ctrl) {
1026                                         w->wclass.pin.ctrl = val;
1027                                         hdac_command(sc,
1028                                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad,
1029                                             w->nid, w->wclass.pin.ctrl), cad);
1030                                 }
1031                         }
1032                         for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1033                                 w = hdac_widget_get(devinfo,
1034                                     hdac_hp_switch[i].spkrnid[j]);
1035                                 if (w == NULL || w->type !=
1036                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1037                                         continue;
1038                                 if (forcemute == 0)
1039                                         val = w->wclass.pin.ctrl |
1040                                             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1041                                 else
1042                                         val = w->wclass.pin.ctrl &
1043                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
1044                                 if (val == w->wclass.pin.ctrl)
1045                                         continue;
1046                                 w->wclass.pin.ctrl = val;
1047                                 hdac_command(sc, HDA_CMD_SET_PIN_WIDGET_CTRL(
1048                                     cad, w->nid, w->wclass.pin.ctrl), cad);
1049                         }
1050                 }
1051                 break;
1052         case HDAC_HP_SWITCH_DEBUG:
1053                 if (hdac_hp_switch[i].execsense != -1)
1054                         hdac_command(sc,
1055                             HDA_CMD_SET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid,
1056                             hdac_hp_switch[i].execsense), cad);
1057                 res = hdac_command(sc,
1058                     HDA_CMD_GET_PIN_SENSE(cad, hdac_hp_switch[i].hpnid), cad);
1059                 device_printf(sc->dev,
1060                     "[ 0] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1061                     hdac_hp_switch[i].hpnid, res);
1062                 for (j = 0; hdac_hp_switch[i].spkrnid[j] != -1; j++) {
1063                         w = hdac_widget_get(devinfo,
1064                             hdac_hp_switch[i].spkrnid[j]);
1065                         if (w == NULL || w->type !=
1066                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
1067                                 continue;
1068                         if (hdac_hp_switch[i].execsense != -1)
1069                                 hdac_command(sc,
1070                                     HDA_CMD_SET_PIN_SENSE(cad, w->nid,
1071                                     hdac_hp_switch[i].execsense), cad);
1072                         res = hdac_command(sc,
1073                             HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
1074                         device_printf(sc->dev,
1075                             "[%2d] HDA_DEBUG: Pin sense: nid=%d res=0x%08x\n",
1076                             j + 1, w->nid, res);
1077                 }
1078                 break;
1079         default:
1080                 break;
1081         }
1082 }
1083
1084 static void
1085 hdac_unsolicited_handler(struct hdac_codec *codec, uint32_t tag)
1086 {
1087         struct hdac_softc *sc;
1088         struct hdac_devinfo *devinfo = NULL;
1089         device_t *devlist = NULL;
1090         int devcount, i;
1091
1092         if (codec == NULL || codec->sc == NULL)
1093                 return;
1094
1095         sc = codec->sc;
1096
1097         HDA_BOOTVERBOSE(
1098                 device_printf(sc->dev, "HDA_DEBUG: Unsol Tag: 0x%08x\n", tag);
1099         );
1100
1101         device_get_children(sc->dev, &devlist, &devcount);
1102         for (i = 0; devlist != NULL && i < devcount; i++) {
1103                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
1104                 if (devinfo != NULL && devinfo->node_type ==
1105                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
1106                     devinfo->codec != NULL &&
1107                     devinfo->codec->cad == codec->cad) {
1108                         break;
1109                 } else
1110                         devinfo = NULL;
1111         }
1112         if (devlist != NULL)
1113                 kfree(devlist, M_TEMP);
1114
1115         if (devinfo == NULL)
1116                 return;
1117
1118         switch (tag) {
1119         case HDAC_UNSOLTAG_EVENT_HP:
1120                 hdac_hp_switch_handler(devinfo);
1121                 break;
1122         case HDAC_UNSOLTAG_EVENT_TEST:
1123                 device_printf(sc->dev, "Unsol Test!\n");
1124                 break;
1125         default:
1126                 break;
1127         }
1128 }
1129
1130 static int
1131 hdac_stream_intr(struct hdac_softc *sc, struct hdac_chan *ch)
1132 {
1133         /* XXX to be removed */
1134 #ifdef HDAC_INTR_EXTRA
1135         uint32_t res;
1136 #endif
1137
1138         if (!(ch->flags & HDAC_CHN_RUNNING))
1139                 return (0);
1140
1141         /* XXX to be removed */
1142 #ifdef HDAC_INTR_EXTRA
1143         res = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDSTS);
1144 #endif
1145
1146         /* XXX to be removed */
1147 #ifdef HDAC_INTR_EXTRA
1148         HDA_BOOTVERBOSE(
1149                 if (res & (HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE))
1150                         device_printf(sc->dev,
1151                             "PCMDIR_%s intr triggered beyond stream boundary:"
1152                             "%08x\n",
1153                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC", res);
1154         );
1155 #endif
1156
1157         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDSTS,
1158             HDAC_SDSTS_DESE | HDAC_SDSTS_FIFOE | HDAC_SDSTS_BCIS );
1159
1160         /* XXX to be removed */
1161 #ifdef HDAC_INTR_EXTRA
1162         if (res & HDAC_SDSTS_BCIS) {
1163 #endif
1164                 return (1);
1165         /* XXX to be removed */
1166 #ifdef HDAC_INTR_EXTRA
1167         }
1168 #endif
1169
1170         return (0);
1171 }
1172
1173 /****************************************************************************
1174  * void hdac_intr_handler(void *)
1175  *
1176  * Interrupt handler. Processes interrupts received from the hdac.
1177  ****************************************************************************/
1178 static void
1179 hdac_intr_handler(void *context)
1180 {
1181         struct hdac_softc *sc;
1182         uint32_t intsts;
1183         uint8_t rirbsts;
1184         struct hdac_rirb *rirb_base;
1185         uint32_t trigger;
1186
1187         sc = (struct hdac_softc *)context;
1188
1189         hdac_lock(sc);
1190         if (sc->polling != 0) {
1191                 hdac_unlock(sc);
1192                 return;
1193         }
1194
1195         /* Do we have anything to do? */
1196         intsts = HDAC_READ_4(&sc->mem, HDAC_INTSTS);
1197         if (!HDA_FLAG_MATCH(intsts, HDAC_INTSTS_GIS)) {
1198                 hdac_unlock(sc);
1199                 return;
1200         }
1201
1202         trigger = 0;
1203
1204         /* Was this a controller interrupt? */
1205         if (HDA_FLAG_MATCH(intsts, HDAC_INTSTS_CIS)) {
1206                 rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
1207                 rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1208                 /* Get as many responses that we can */
1209                 while (HDA_FLAG_MATCH(rirbsts, HDAC_RIRBSTS_RINTFL)) {
1210                         HDAC_WRITE_1(&sc->mem,
1211                             HDAC_RIRBSTS, HDAC_RIRBSTS_RINTFL);
1212                         if (hdac_rirb_flush(sc) != 0)
1213                                 trigger |= HDAC_TRIGGER_UNSOL;
1214                         rirbsts = HDAC_READ_1(&sc->mem, HDAC_RIRBSTS);
1215                 }
1216                 /* XXX to be removed */
1217                 /* Clear interrupt and exit */
1218 #ifdef HDAC_INTR_EXTRA
1219                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, HDAC_INTSTS_CIS);
1220 #endif
1221         }
1222
1223         if (intsts & HDAC_INTSTS_SIS_MASK) {
1224                 if ((intsts & (1 << sc->num_iss)) &&
1225                     hdac_stream_intr(sc, &sc->play) != 0)
1226                         trigger |= HDAC_TRIGGER_PLAY;
1227                 if ((intsts & (1 << 0)) &&
1228                     hdac_stream_intr(sc, &sc->rec) != 0)
1229                         trigger |= HDAC_TRIGGER_REC;
1230                 /* XXX to be removed */
1231 #ifdef HDAC_INTR_EXTRA
1232                 HDAC_WRITE_4(&sc->mem, HDAC_INTSTS, intsts &
1233                     HDAC_INTSTS_SIS_MASK);
1234 #endif
1235         }
1236
1237         hdac_unlock(sc);
1238
1239         if (trigger & HDAC_TRIGGER_PLAY)
1240                 chn_intr(sc->play.c);
1241         if (trigger & HDAC_TRIGGER_REC)
1242                 chn_intr(sc->rec.c);
1243         if (trigger & HDAC_TRIGGER_UNSOL)
1244                 taskqueue_enqueue(taskqueue_swi, &sc->unsolq_task);
1245 }
1246
1247 /****************************************************************************
1248  * int hdac_reset(hdac_softc *)
1249  *
1250  * Reset the hdac to a quiescent and known state.
1251  ****************************************************************************/
1252 static int
1253 hdac_reset(struct hdac_softc *sc)
1254 {
1255         uint32_t gctl;
1256         int count, i;
1257
1258         /*
1259          * Stop all Streams DMA engine
1260          */
1261         for (i = 0; i < sc->num_iss; i++)
1262                 HDAC_WRITE_4(&sc->mem, HDAC_ISDCTL(sc, i), 0x0);
1263         for (i = 0; i < sc->num_oss; i++)
1264                 HDAC_WRITE_4(&sc->mem, HDAC_OSDCTL(sc, i), 0x0);
1265         for (i = 0; i < sc->num_bss; i++)
1266                 HDAC_WRITE_4(&sc->mem, HDAC_BSDCTL(sc, i), 0x0);
1267
1268         /*
1269          * Stop Control DMA engines.
1270          */
1271         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, 0x0);
1272         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, 0x0);
1273
1274         /*
1275          * Reset DMA position buffer.
1276          */
1277         HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE, 0x0);
1278         HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, 0x0);
1279
1280         /*
1281          * Reset the controller. The reset must remain asserted for
1282          * a minimum of 100us.
1283          */
1284         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1285         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl & ~HDAC_GCTL_CRST);
1286         count = 10000;
1287         do {
1288                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1289                 if (!(gctl & HDAC_GCTL_CRST))
1290                         break;
1291                 DELAY(10);
1292         } while (--count);
1293         if (gctl & HDAC_GCTL_CRST) {
1294                 device_printf(sc->dev, "Unable to put hdac in reset\n");
1295                 return (ENXIO);
1296         }
1297         DELAY(100);
1298         gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1299         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, gctl | HDAC_GCTL_CRST);
1300         count = 10000;
1301         do {
1302                 gctl = HDAC_READ_4(&sc->mem, HDAC_GCTL);
1303                 if (gctl & HDAC_GCTL_CRST)
1304                         break;
1305                 DELAY(10);
1306         } while (--count);
1307         if (!(gctl & HDAC_GCTL_CRST)) {
1308                 device_printf(sc->dev, "Device stuck in reset\n");
1309                 return (ENXIO);
1310         }
1311
1312         /*
1313          * Wait for codecs to finish their own reset sequence. The delay here
1314          * should be of 250us but for some reasons, on it's not enough on my
1315          * computer. Let's use twice as much as necessary to make sure that
1316          * it's reset properly.
1317          */
1318         DELAY(1000);
1319
1320         return (0);
1321 }
1322
1323
1324 /****************************************************************************
1325  * int hdac_get_capabilities(struct hdac_softc *);
1326  *
1327  * Retreive the general capabilities of the hdac;
1328  *      Number of Input Streams
1329  *      Number of Output Streams
1330  *      Number of bidirectional Streams
1331  *      64bit ready
1332  *      CORB and RIRB sizes
1333  ****************************************************************************/
1334 static int
1335 hdac_get_capabilities(struct hdac_softc *sc)
1336 {
1337         uint16_t gcap;
1338         uint8_t corbsize, rirbsize;
1339
1340         gcap = HDAC_READ_2(&sc->mem, HDAC_GCAP);
1341         sc->num_iss = HDAC_GCAP_ISS(gcap);
1342         sc->num_oss = HDAC_GCAP_OSS(gcap);
1343         sc->num_bss = HDAC_GCAP_BSS(gcap);
1344
1345         sc->support_64bit = HDA_FLAG_MATCH(gcap, HDAC_GCAP_64OK);
1346
1347         corbsize = HDAC_READ_1(&sc->mem, HDAC_CORBSIZE);
1348         if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_256) ==
1349             HDAC_CORBSIZE_CORBSZCAP_256)
1350                 sc->corb_size = 256;
1351         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_16) ==
1352             HDAC_CORBSIZE_CORBSZCAP_16)
1353                 sc->corb_size = 16;
1354         else if ((corbsize & HDAC_CORBSIZE_CORBSZCAP_2) ==
1355             HDAC_CORBSIZE_CORBSZCAP_2)
1356                 sc->corb_size = 2;
1357         else {
1358                 device_printf(sc->dev, "%s: Invalid corb size (%x)\n",
1359                     __func__, corbsize);
1360                 return (ENXIO);
1361         }
1362
1363         rirbsize = HDAC_READ_1(&sc->mem, HDAC_RIRBSIZE);
1364         if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_256) ==
1365             HDAC_RIRBSIZE_RIRBSZCAP_256)
1366                 sc->rirb_size = 256;
1367         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_16) ==
1368             HDAC_RIRBSIZE_RIRBSZCAP_16)
1369                 sc->rirb_size = 16;
1370         else if ((rirbsize & HDAC_RIRBSIZE_RIRBSZCAP_2) ==
1371             HDAC_RIRBSIZE_RIRBSZCAP_2)
1372                 sc->rirb_size = 2;
1373         else {
1374                 device_printf(sc->dev, "%s: Invalid rirb size (%x)\n",
1375                     __func__, rirbsize);
1376                 return (ENXIO);
1377         }
1378
1379         return (0);
1380 }
1381
1382
1383 /****************************************************************************
1384  * void hdac_dma_cb
1385  *
1386  * This function is called by bus_dmamap_load when the mapping has been
1387  * established. We just record the physical address of the mapping into
1388  * the struct hdac_dma passed in.
1389  ****************************************************************************/
1390 static void
1391 hdac_dma_cb(void *callback_arg, bus_dma_segment_t *segs, int nseg, int error)
1392 {
1393         struct hdac_dma *dma;
1394
1395         if (error == 0) {
1396                 dma = (struct hdac_dma *)callback_arg;
1397                 dma->dma_paddr = segs[0].ds_addr;
1398         }
1399 }
1400
1401
1402 /****************************************************************************
1403  * int hdac_dma_alloc
1404  *
1405  * This function allocate and setup a dma region (struct hdac_dma).
1406  * It must be freed by a corresponding hdac_dma_free.
1407  ****************************************************************************/
1408 static int
1409 hdac_dma_alloc(struct hdac_softc *sc, struct hdac_dma *dma, bus_size_t size)
1410 {
1411         bus_size_t roundsz;
1412         int result;
1413         int lowaddr;
1414
1415         roundsz = roundup2(size, HDAC_DMA_ALIGNMENT);
1416         lowaddr = (sc->support_64bit) ? BUS_SPACE_MAXADDR :
1417             BUS_SPACE_MAXADDR_32BIT;
1418         bzero(dma, sizeof(*dma));
1419
1420         /*
1421          * Create a DMA tag
1422          */
1423         result = bus_dma_tag_create(NULL,       /* parent */
1424             HDAC_DMA_ALIGNMENT,                 /* alignment */
1425             0,                                  /* boundary */
1426             lowaddr,                            /* lowaddr */
1427             BUS_SPACE_MAXADDR,                  /* highaddr */
1428             NULL,                               /* filtfunc */
1429             NULL,                               /* fistfuncarg */
1430             roundsz,                            /* maxsize */
1431             1,                                  /* nsegments */
1432             roundsz,                            /* maxsegsz */
1433             0,                                  /* flags */
1434             &dma->dma_tag);                     /* dmat */
1435         if (result != 0) {
1436                 device_printf(sc->dev, "%s: bus_dma_tag_create failed (%x)\n",
1437                     __func__, result);
1438                 goto hdac_dma_alloc_fail;
1439         }
1440
1441         /*
1442          * Allocate DMA memory
1443          */
1444 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
1445         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1446             BUS_DMA_NOWAIT | BUS_DMA_ZERO |
1447             ((sc->flags & HDAC_F_DMA_NOCACHE) ? BUS_DMA_NOCACHE : 0),
1448             &dma->dma_map);
1449 #else
1450         result = bus_dmamem_alloc(dma->dma_tag, (void **)&dma->dma_vaddr,
1451             BUS_DMA_NOWAIT | BUS_DMA_ZERO, &dma->dma_map);
1452 #endif
1453         if (result != 0) {
1454                 device_printf(sc->dev, "%s: bus_dmamem_alloc failed (%x)\n",
1455                     __func__, result);
1456                 goto hdac_dma_alloc_fail;
1457         }
1458
1459         dma->dma_size = roundsz;
1460
1461         /*
1462          * Map the memory
1463          */
1464         result = bus_dmamap_load(dma->dma_tag, dma->dma_map,
1465             (void *)dma->dma_vaddr, roundsz, hdac_dma_cb, (void *)dma, 0);
1466         if (result != 0 || dma->dma_paddr == 0) {
1467                 if (result == 0)
1468                         result = ENOMEM;
1469                 device_printf(sc->dev, "%s: bus_dmamem_load failed (%x)\n",
1470                     __func__, result);
1471                 goto hdac_dma_alloc_fail;
1472         }
1473
1474         HDA_BOOTVERBOSE(
1475                 device_printf(sc->dev, "%s: size=%ju -> roundsz=%ju\n",
1476                     __func__, (uintmax_t)size, (uintmax_t)roundsz);
1477         );
1478
1479         return (0);
1480
1481 hdac_dma_alloc_fail:
1482         hdac_dma_free(sc, dma);
1483
1484         return (result);
1485 }
1486
1487
1488 /****************************************************************************
1489  * void hdac_dma_free(struct hdac_softc *, struct hdac_dma *)
1490  *
1491  * Free a struct dhac_dma that has been previously allocated via the
1492  * hdac_dma_alloc function.
1493  ****************************************************************************/
1494 static void
1495 hdac_dma_free(struct hdac_softc *sc, struct hdac_dma *dma)
1496 {
1497         if (dma->dma_map != NULL) {
1498 #if 0
1499                 /* Flush caches */
1500                 bus_dmamap_sync(dma->dma_tag, dma->dma_map,
1501                     BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1502 #endif
1503                 bus_dmamap_unload(dma->dma_tag, dma->dma_map);
1504         }
1505         if (dma->dma_vaddr != NULL) {
1506                 bus_dmamem_free(dma->dma_tag, dma->dma_vaddr, dma->dma_map);
1507                 dma->dma_vaddr = NULL;
1508         }
1509         dma->dma_map = NULL;
1510         if (dma->dma_tag != NULL) {
1511                 bus_dma_tag_destroy(dma->dma_tag);
1512                 dma->dma_tag = NULL;
1513         }
1514         dma->dma_size = 0;
1515 }
1516
1517 /****************************************************************************
1518  * int hdac_mem_alloc(struct hdac_softc *)
1519  *
1520  * Allocate all the bus resources necessary to speak with the physical
1521  * controller.
1522  ****************************************************************************/
1523 static int
1524 hdac_mem_alloc(struct hdac_softc *sc)
1525 {
1526         struct hdac_mem *mem;
1527
1528         mem = &sc->mem;
1529         mem->mem_rid = PCIR_BAR(0);
1530         mem->mem_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
1531             &mem->mem_rid, RF_ACTIVE);
1532         if (mem->mem_res == NULL) {
1533                 device_printf(sc->dev,
1534                     "%s: Unable to allocate memory resource\n", __func__);
1535                 return (ENOMEM);
1536         }
1537         mem->mem_tag = rman_get_bustag(mem->mem_res);
1538         mem->mem_handle = rman_get_bushandle(mem->mem_res);
1539
1540         return (0);
1541 }
1542
1543 /****************************************************************************
1544  * void hdac_mem_free(struct hdac_softc *)
1545  *
1546  * Free up resources previously allocated by hdac_mem_alloc.
1547  ****************************************************************************/
1548 static void
1549 hdac_mem_free(struct hdac_softc *sc)
1550 {
1551         struct hdac_mem *mem;
1552
1553         mem = &sc->mem;
1554         if (mem->mem_res != NULL)
1555                 bus_release_resource(sc->dev, SYS_RES_MEMORY, mem->mem_rid,
1556                     mem->mem_res);
1557         mem->mem_res = NULL;
1558 }
1559
1560 /****************************************************************************
1561  * int hdac_irq_alloc(struct hdac_softc *)
1562  *
1563  * Allocate and setup the resources necessary for interrupt handling.
1564  ****************************************************************************/
1565 static int
1566 hdac_irq_alloc(struct hdac_softc *sc)
1567 {
1568         struct hdac_irq *irq;
1569         int result;
1570
1571         irq = &sc->irq;
1572         irq->irq_rid = 0x0;
1573
1574 #if 0 /* TODO: No MSI support in DragonFly yet. */
1575         if ((sc->flags & HDAC_F_MSI) &&
1576             (result = pci_msi_count(sc->dev)) == 1 &&
1577             pci_alloc_msi(sc->dev, &result) == 0)
1578                 irq->irq_rid = 0x1;
1579         else
1580 #endif
1581                 sc->flags &= ~HDAC_F_MSI;
1582
1583         irq->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ,
1584             &irq->irq_rid, RF_SHAREABLE | RF_ACTIVE);
1585         if (irq->irq_res == NULL) {
1586                 device_printf(sc->dev, "%s: Unable to allocate irq\n",
1587                     __func__);
1588                 goto hdac_irq_alloc_fail;
1589         }
1590         result = snd_setup_intr(sc->dev, irq->irq_res, INTR_MPSAFE,
1591             hdac_intr_handler, sc, &irq->irq_handle);
1592         if (result != 0) {
1593                 device_printf(sc->dev,
1594                     "%s: Unable to setup interrupt handler (%x)\n",
1595                     __func__, result);
1596                 goto hdac_irq_alloc_fail;
1597         }
1598
1599         return (0);
1600
1601 hdac_irq_alloc_fail:
1602         hdac_irq_free(sc);
1603
1604         return (ENXIO);
1605 }
1606
1607 /****************************************************************************
1608  * void hdac_irq_free(struct hdac_softc *)
1609  *
1610  * Free up resources previously allocated by hdac_irq_alloc.
1611  ****************************************************************************/
1612 static void
1613 hdac_irq_free(struct hdac_softc *sc)
1614 {
1615         struct hdac_irq *irq;
1616
1617         irq = &sc->irq;
1618         if (irq->irq_res != NULL && irq->irq_handle != NULL)
1619                 bus_teardown_intr(sc->dev, irq->irq_res, irq->irq_handle);
1620         if (irq->irq_res != NULL)
1621                 bus_release_resource(sc->dev, SYS_RES_IRQ, irq->irq_rid,
1622                     irq->irq_res);
1623 #if 0 /* TODO: No MSI support in DragonFly yet. */
1624         if ((sc->flags & HDAC_F_MSI) && irq->irq_rid == 0x1)
1625                 pci_release_msi(sc->dev);
1626 #endif
1627         irq->irq_handle = NULL;
1628         irq->irq_res = NULL;
1629         irq->irq_rid = 0x0;
1630 }
1631
1632 /****************************************************************************
1633  * void hdac_corb_init(struct hdac_softc *)
1634  *
1635  * Initialize the corb registers for operations but do not start it up yet.
1636  * The CORB engine must not be running when this function is called.
1637  ****************************************************************************/
1638 static void
1639 hdac_corb_init(struct hdac_softc *sc)
1640 {
1641         uint8_t corbsize;
1642         uint64_t corbpaddr;
1643
1644         /* Setup the CORB size. */
1645         switch (sc->corb_size) {
1646         case 256:
1647                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_256);
1648                 break;
1649         case 16:
1650                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_16);
1651                 break;
1652         case 2:
1653                 corbsize = HDAC_CORBSIZE_CORBSIZE(HDAC_CORBSIZE_CORBSIZE_2);
1654                 break;
1655         default:
1656                 panic("%s: Invalid CORB size (%x)\n", __func__, sc->corb_size);
1657         }
1658         HDAC_WRITE_1(&sc->mem, HDAC_CORBSIZE, corbsize);
1659
1660         /* Setup the CORB Address in the hdac */
1661         corbpaddr = (uint64_t)sc->corb_dma.dma_paddr;
1662         HDAC_WRITE_4(&sc->mem, HDAC_CORBLBASE, (uint32_t)corbpaddr);
1663         HDAC_WRITE_4(&sc->mem, HDAC_CORBUBASE, (uint32_t)(corbpaddr >> 32));
1664
1665         /* Set the WP and RP */
1666         sc->corb_wp = 0;
1667         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
1668         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, HDAC_CORBRP_CORBRPRST);
1669         /*
1670          * The HDA specification indicates that the CORBRPRST bit will always
1671          * read as zero. Unfortunately, it seems that at least the 82801G
1672          * doesn't reset the bit to zero, which stalls the corb engine.
1673          * manually reset the bit to zero before continuing.
1674          */
1675         HDAC_WRITE_2(&sc->mem, HDAC_CORBRP, 0x0);
1676
1677         /* Enable CORB error reporting */
1678 #if 0
1679         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, HDAC_CORBCTL_CMEIE);
1680 #endif
1681 }
1682
1683 /****************************************************************************
1684  * void hdac_rirb_init(struct hdac_softc *)
1685  *
1686  * Initialize the rirb registers for operations but do not start it up yet.
1687  * The RIRB engine must not be running when this function is called.
1688  ****************************************************************************/
1689 static void
1690 hdac_rirb_init(struct hdac_softc *sc)
1691 {
1692         uint8_t rirbsize;
1693         uint64_t rirbpaddr;
1694
1695         /* Setup the RIRB size. */
1696         switch (sc->rirb_size) {
1697         case 256:
1698                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_256);
1699                 break;
1700         case 16:
1701                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_16);
1702                 break;
1703         case 2:
1704                 rirbsize = HDAC_RIRBSIZE_RIRBSIZE(HDAC_RIRBSIZE_RIRBSIZE_2);
1705                 break;
1706         default:
1707                 panic("%s: Invalid RIRB size (%x)\n", __func__, sc->rirb_size);
1708         }
1709         HDAC_WRITE_1(&sc->mem, HDAC_RIRBSIZE, rirbsize);
1710
1711         /* Setup the RIRB Address in the hdac */
1712         rirbpaddr = (uint64_t)sc->rirb_dma.dma_paddr;
1713         HDAC_WRITE_4(&sc->mem, HDAC_RIRBLBASE, (uint32_t)rirbpaddr);
1714         HDAC_WRITE_4(&sc->mem, HDAC_RIRBUBASE, (uint32_t)(rirbpaddr >> 32));
1715
1716         /* Setup the WP and RP */
1717         sc->rirb_rp = 0;
1718         HDAC_WRITE_2(&sc->mem, HDAC_RIRBWP, HDAC_RIRBWP_RIRBWPRST);
1719
1720         if (sc->polling == 0) {
1721                 /* Setup the interrupt threshold */
1722                 HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, sc->rirb_size / 2);
1723
1724                 /* Enable Overrun and response received reporting */
1725 #if 0
1726                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL,
1727                     HDAC_RIRBCTL_RIRBOIC | HDAC_RIRBCTL_RINTCTL);
1728 #else
1729                 HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, HDAC_RIRBCTL_RINTCTL);
1730 #endif
1731         }
1732
1733 #if 0
1734         /*
1735          * Make sure that the Host CPU cache doesn't contain any dirty
1736          * cache lines that falls in the rirb. If I understood correctly, it
1737          * should be sufficient to do this only once as the rirb is purely
1738          * read-only from now on.
1739          */
1740         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
1741             BUS_DMASYNC_PREREAD);
1742 #endif
1743 }
1744
1745 /****************************************************************************
1746  * void hdac_corb_start(hdac_softc *)
1747  *
1748  * Startup the corb DMA engine
1749  ****************************************************************************/
1750 static void
1751 hdac_corb_start(struct hdac_softc *sc)
1752 {
1753         uint32_t corbctl;
1754
1755         corbctl = HDAC_READ_1(&sc->mem, HDAC_CORBCTL);
1756         corbctl |= HDAC_CORBCTL_CORBRUN;
1757         HDAC_WRITE_1(&sc->mem, HDAC_CORBCTL, corbctl);
1758 }
1759
1760 /****************************************************************************
1761  * void hdac_rirb_start(hdac_softc *)
1762  *
1763  * Startup the rirb DMA engine
1764  ****************************************************************************/
1765 static void
1766 hdac_rirb_start(struct hdac_softc *sc)
1767 {
1768         uint32_t rirbctl;
1769
1770         rirbctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
1771         rirbctl |= HDAC_RIRBCTL_RIRBDMAEN;
1772         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, rirbctl);
1773 }
1774
1775
1776 /****************************************************************************
1777  * void hdac_scan_codecs(struct hdac_softc *, int)
1778  *
1779  * Scan the bus for available codecs, starting with num.
1780  ****************************************************************************/
1781 static void
1782 hdac_scan_codecs(struct hdac_softc *sc, int num)
1783 {
1784         struct hdac_codec *codec;
1785         int i;
1786         uint16_t statests;
1787
1788         if (num < 0)
1789                 num = 0;
1790         if (num >= HDAC_CODEC_MAX)
1791                 num = HDAC_CODEC_MAX - 1;
1792
1793         statests = HDAC_READ_2(&sc->mem, HDAC_STATESTS);
1794         for (i = num; i < HDAC_CODEC_MAX; i++) {
1795                 if (HDAC_STATESTS_SDIWAKE(statests, i)) {
1796                         /* We have found a codec. */
1797                         codec = (struct hdac_codec *)kmalloc(sizeof(*codec),
1798                             M_HDAC, M_ZERO | M_NOWAIT);
1799                         if (codec == NULL) {
1800                                 device_printf(sc->dev,
1801                                     "Unable to allocate memory for codec\n");
1802                                 continue;
1803                         }
1804                         codec->commands = NULL;
1805                         codec->responses_received = 0;
1806                         codec->verbs_sent = 0;
1807                         codec->sc = sc;
1808                         codec->cad = i;
1809                         sc->codecs[i] = codec;
1810                         if (hdac_probe_codec(codec) != 0)
1811                                 break;
1812                 }
1813         }
1814         /* All codecs have been probed, now try to attach drivers to them */
1815         /* bus_generic_attach(sc->dev); */
1816 }
1817
1818 /****************************************************************************
1819  * void hdac_probe_codec(struct hdac_softc *, int)
1820  *
1821  * Probe a the given codec_id for available function groups.
1822  ****************************************************************************/
1823 static int
1824 hdac_probe_codec(struct hdac_codec *codec)
1825 {
1826         struct hdac_softc *sc = codec->sc;
1827         struct hdac_devinfo *devinfo;
1828         uint32_t vendorid, revisionid, subnode;
1829         int startnode;
1830         int endnode;
1831         int i;
1832         nid_t cad = codec->cad;
1833
1834         HDA_BOOTVERBOSE(
1835                 device_printf(sc->dev, "HDA_DEBUG: Probing codec: %d\n", cad);
1836         );
1837         vendorid = hdac_command(sc,
1838             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_VENDOR_ID),
1839             cad);
1840         revisionid = hdac_command(sc,
1841             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_REVISION_ID),
1842             cad);
1843         subnode = hdac_command(sc,
1844             HDA_CMD_GET_PARAMETER(cad, 0x0, HDA_PARAM_SUB_NODE_COUNT),
1845             cad);
1846         startnode = HDA_PARAM_SUB_NODE_COUNT_START(subnode);
1847         endnode = startnode + HDA_PARAM_SUB_NODE_COUNT_TOTAL(subnode);
1848
1849         HDA_BOOTVERBOSE(
1850                 device_printf(sc->dev, "HDA_DEBUG: \tstartnode=%d endnode=%d\n",
1851                     startnode, endnode);
1852         );
1853         for (i = startnode; i < endnode; i++) {
1854                 devinfo = hdac_probe_function(codec, i);
1855                 if (devinfo != NULL) {
1856                         /* XXX Ignore other FG. */
1857                         devinfo->vendor_id =
1858                             HDA_PARAM_VENDOR_ID_VENDOR_ID(vendorid);
1859                         devinfo->device_id =
1860                             HDA_PARAM_VENDOR_ID_DEVICE_ID(vendorid);
1861                         devinfo->revision_id =
1862                             HDA_PARAM_REVISION_ID_REVISION_ID(revisionid);
1863                         devinfo->stepping_id =
1864                             HDA_PARAM_REVISION_ID_STEPPING_ID(revisionid);
1865                         HDA_BOOTVERBOSE(
1866                                 device_printf(sc->dev,
1867                                     "HDA_DEBUG: \tFound AFG nid=%d "
1868                                     "[startnode=%d endnode=%d]\n",
1869                                     devinfo->nid, startnode, endnode);
1870                         );
1871                         return (1);
1872                 }
1873         }
1874
1875         HDA_BOOTVERBOSE(
1876                 device_printf(sc->dev, "HDA_DEBUG: \tAFG not found\n");
1877         );
1878         return (0);
1879 }
1880
1881 static struct hdac_devinfo *
1882 hdac_probe_function(struct hdac_codec *codec, nid_t nid)
1883 {
1884         struct hdac_softc *sc = codec->sc;
1885         struct hdac_devinfo *devinfo;
1886         uint32_t fctgrptype;
1887         nid_t cad = codec->cad;
1888
1889         fctgrptype = HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE(hdac_command(sc,
1890             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_FCT_GRP_TYPE), cad));
1891
1892         /* XXX For now, ignore other FG. */
1893         if (fctgrptype != HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO)
1894                 return (NULL);
1895
1896         devinfo = (struct hdac_devinfo *)kmalloc(sizeof(*devinfo), M_HDAC,
1897             M_NOWAIT | M_ZERO);
1898         if (devinfo == NULL) {
1899                 device_printf(sc->dev, "%s: Unable to allocate ivar\n",
1900                     __func__);
1901                 return (NULL);
1902         }
1903
1904         devinfo->nid = nid;
1905         devinfo->node_type = fctgrptype;
1906         devinfo->codec = codec;
1907
1908         hdac_add_child(sc, devinfo);
1909
1910         return (devinfo);
1911 }
1912
1913 static void
1914 hdac_add_child(struct hdac_softc *sc, struct hdac_devinfo *devinfo)
1915 {
1916         devinfo->dev = device_add_child(sc->dev, NULL, -1);
1917         device_set_ivars(devinfo->dev, (void *)devinfo);
1918         /* XXX - Print more information when booting verbose??? */
1919 }
1920
1921 static void
1922 hdac_widget_connection_parse(struct hdac_widget *w)
1923 {
1924         struct hdac_softc *sc = w->devinfo->codec->sc;
1925         uint32_t res;
1926         int i, j, max, ents, entnum;
1927         nid_t cad = w->devinfo->codec->cad;
1928         nid_t nid = w->nid;
1929         nid_t cnid, addcnid, prevcnid;
1930
1931         w->nconns = 0;
1932
1933         res = hdac_command(sc,
1934             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_CONN_LIST_LENGTH), cad);
1935
1936         ents = HDA_PARAM_CONN_LIST_LENGTH_LIST_LENGTH(res);
1937
1938         if (ents < 1)
1939                 return;
1940
1941         entnum = HDA_PARAM_CONN_LIST_LENGTH_LONG_FORM(res) ? 2 : 4;
1942         max = (sizeof(w->conns) / sizeof(w->conns[0])) - 1;
1943         prevcnid = 0;
1944
1945 #define CONN_RMASK(e)           (1 << ((32 / (e)) - 1))
1946 #define CONN_NMASK(e)           (CONN_RMASK(e) - 1)
1947 #define CONN_RESVAL(r, e, n)    ((r) >> ((32 / (e)) * (n)))
1948 #define CONN_RANGE(r, e, n)     (CONN_RESVAL(r, e, n) & CONN_RMASK(e))
1949 #define CONN_CNID(r, e, n)      (CONN_RESVAL(r, e, n) & CONN_NMASK(e))
1950
1951         for (i = 0; i < ents; i += entnum) {
1952                 res = hdac_command(sc,
1953                     HDA_CMD_GET_CONN_LIST_ENTRY(cad, nid, i), cad);
1954                 for (j = 0; j < entnum; j++) {
1955                         cnid = CONN_CNID(res, entnum, j);
1956                         if (cnid == 0) {
1957                                 if (w->nconns < ents)
1958                                         device_printf(sc->dev,
1959                                             "%s: nid=%d WARNING: zero cnid "
1960                                             "entnum=%d j=%d index=%d "
1961                                             "entries=%d found=%d res=0x%08x\n",
1962                                             __func__, nid, entnum, j, i,
1963                                             ents, w->nconns, res);
1964                                 else
1965                                         goto getconns_out;
1966                         }
1967                         if (cnid < w->devinfo->startnode ||
1968                             cnid >= w->devinfo->endnode) {
1969                                 HDA_BOOTVERBOSE(
1970                                         device_printf(sc->dev,
1971                                             "%s: GHOST: nid=%d j=%d "
1972                                             "entnum=%d index=%d res=0x%08x\n",
1973                                             __func__, nid, j, entnum, i, res);
1974                                 );
1975                         }
1976                         if (CONN_RANGE(res, entnum, j) == 0)
1977                                 addcnid = cnid;
1978                         else if (prevcnid == 0 || prevcnid >= cnid) {
1979                                 device_printf(sc->dev,
1980                                     "%s: WARNING: Invalid child range "
1981                                     "nid=%d index=%d j=%d entnum=%d "
1982                                     "prevcnid=%d cnid=%d res=0x%08x\n",
1983                                     __func__, nid, i, j, entnum, prevcnid,
1984                                     cnid, res);
1985                                 addcnid = cnid;
1986                         } else
1987                                 addcnid = prevcnid + 1;
1988                         while (addcnid <= cnid) {
1989                                 if (w->nconns > max) {
1990                                         device_printf(sc->dev,
1991                                             "%s: nid=%d: Adding %d: "
1992                                             "Max connection reached! max=%d\n",
1993                                             __func__, nid, addcnid, max + 1);
1994                                         goto getconns_out;
1995                                 }
1996                                 w->conns[w->nconns++] = addcnid++;
1997                         }
1998                         prevcnid = cnid;
1999                 }
2000         }
2001
2002 getconns_out:
2003         HDA_BOOTVERBOSE(
2004                 device_printf(sc->dev,
2005                     "HDA_DEBUG: %s: nid=%d entries=%d found=%d\n",
2006                     __func__, nid, ents, w->nconns);
2007         );
2008         return;
2009 }
2010
2011 static uint32_t
2012 hdac_widget_pin_getconfig(struct hdac_widget *w)
2013 {
2014         struct hdac_softc *sc;
2015         uint32_t config, orig, id;
2016         nid_t cad, nid;
2017
2018         sc = w->devinfo->codec->sc;
2019         cad = w->devinfo->codec->cad;
2020         nid = w->nid;
2021         id = hdac_codec_id(w->devinfo);
2022
2023         config = hdac_command(sc,
2024             HDA_CMD_GET_CONFIGURATION_DEFAULT(cad, nid),
2025             cad);
2026         orig = config;
2027
2028         /*
2029          * XXX REWRITE!!!! Don't argue!
2030          */
2031         if (id == HDA_CODEC_ALC880 && sc->pci_subvendor == LG_LW20_SUBVENDOR) {
2032                 switch (nid) {
2033                 case 26:
2034                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2035                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2036                         break;
2037                 case 27:
2038                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2039                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT;
2040                         break;
2041                 default:
2042                         break;
2043                 }
2044         } else if (id == HDA_CODEC_ALC880 &&
2045             (sc->pci_subvendor == CLEVO_D900T_SUBVENDOR ||
2046             sc->pci_subvendor == ASUS_M5200_SUBVENDOR)) {
2047                 /*
2048                  * Super broken BIOS
2049                  */
2050                 switch (nid) {
2051                 case 20:
2052                         break;
2053                 case 21:
2054                         break;
2055                 case 22:
2056                         break;
2057                 case 23:
2058                         break;
2059                 case 24:        /* MIC1 */
2060                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2061                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2062                         break;
2063                 case 25:        /* XXX MIC2 */
2064                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2065                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2066                         break;
2067                 case 26:        /* LINE1 */
2068                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2069                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2070                         break;
2071                 case 27:        /* XXX LINE2 */
2072                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2073                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2074                         break;
2075                 case 28:        /* CD */
2076                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2077                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_CD;
2078                         break;
2079                 case 30:
2080                         break;
2081                 case 31:
2082                         break;
2083                 default:
2084                         break;
2085                 }
2086         } else if (id == HDA_CODEC_ALC883 &&
2087             (sc->pci_subvendor == MSI_MS034A_SUBVENDOR ||
2088             HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, sc->pci_subvendor))) {
2089                 switch (nid) {
2090                 case 25:
2091                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2092                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2093                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2094                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2095                         break;
2096                 case 28:
2097                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2098                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2099                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2100                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2101                         break;
2102                 default:
2103                         break;
2104                 }
2105         } else if (id == HDA_CODEC_CXVENICE && sc->pci_subvendor ==
2106             HP_V3000_SUBVENDOR) {
2107                 switch (nid) {
2108                 case 18:
2109                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2110                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2111                         break;
2112                 case 20:
2113                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2114                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2115                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN |
2116                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2117                         break;
2118                 case 21:
2119                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2120                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2121                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_CD |
2122                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2123                         break;
2124                 default:
2125                         break;
2126                 }
2127         } else if (id == HDA_CODEC_CXWAIKIKI && sc->pci_subvendor ==
2128             HP_DV5000_SUBVENDOR) {
2129                 switch (nid) {
2130                 case 20:
2131                 case 21:
2132                         config &= ~HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK;
2133                         config |= HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE;
2134                         break;
2135                 default:
2136                         break;
2137                 }
2138         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2139             ASUS_W6F_SUBVENDOR) {
2140                 switch (nid) {
2141                 case 11:
2142                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2143                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2144                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT |
2145                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED);
2146                         break;
2147                 case 15:
2148                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2149                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2150                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2151                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2152                         break;
2153                 default:
2154                         break;
2155                 }
2156         } else if (id == HDA_CODEC_ALC861 && sc->pci_subvendor ==
2157             UNIWILL_9075_SUBVENDOR) {
2158                 switch (nid) {
2159                 case 15:
2160                         config &= ~(HDA_CONFIG_DEFAULTCONF_DEVICE_MASK |
2161                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK);
2162                         config |= (HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT |
2163                             HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK);
2164                         break;
2165                 default:
2166                         break;
2167                 }
2168         } else if (id == HDA_CODEC_AD1986A &&
2169             (sc->pci_subvendor == ASUS_M2NPVMX_SUBVENDOR ||
2170             sc->pci_subvendor == ASUS_A8NVMCSM_SUBVENDOR)) {
2171                 switch (nid) {
2172                 case 28:        /* LINE */
2173                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2174                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN;
2175                         break;
2176                 case 29:        /* MIC */
2177                         config &= ~HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
2178                         config |= HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN;
2179                         break;
2180                 default:
2181                         break;
2182                 }
2183         }
2184
2185         HDA_BOOTVERBOSE(
2186                 if (config != orig)
2187                         device_printf(sc->dev,
2188                             "HDA_DEBUG: Pin config nid=%u 0x%08x -> 0x%08x\n",
2189                             nid, orig, config);
2190         );
2191
2192         return (config);
2193 }
2194
2195 static uint32_t
2196 hdac_widget_pin_getcaps(struct hdac_widget *w)
2197 {
2198         struct hdac_softc *sc;
2199         uint32_t caps, orig, id;
2200         nid_t cad, nid;
2201
2202         sc = w->devinfo->codec->sc;
2203         cad = w->devinfo->codec->cad;
2204         nid = w->nid;
2205         id = hdac_codec_id(w->devinfo);
2206
2207         caps = hdac_command(sc,
2208             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_PIN_CAP), cad);
2209         orig = caps;
2210
2211         HDA_BOOTVERBOSE(
2212                 if (caps != orig)
2213                         device_printf(sc->dev,
2214                             "HDA_DEBUG: Pin caps nid=%u 0x%08x -> 0x%08x\n",
2215                             nid, orig, caps);
2216         );
2217
2218         return (caps);
2219 }
2220
2221 static void
2222 hdac_widget_pin_parse(struct hdac_widget *w)
2223 {
2224         struct hdac_softc *sc = w->devinfo->codec->sc;
2225         uint32_t config, pincap;
2226         char *devstr, *connstr;
2227         nid_t cad = w->devinfo->codec->cad;
2228         nid_t nid = w->nid;
2229
2230         config = hdac_widget_pin_getconfig(w);
2231         w->wclass.pin.config = config;
2232
2233         pincap = hdac_widget_pin_getcaps(w);
2234         w->wclass.pin.cap = pincap;
2235
2236         w->wclass.pin.ctrl = hdac_command(sc,
2237             HDA_CMD_GET_PIN_WIDGET_CTRL(cad, nid), cad) &
2238             ~(HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
2239             HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
2240             HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
2241             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
2242
2243         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
2244                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
2245         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
2246                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE;
2247         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
2248                 w->wclass.pin.ctrl |= HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
2249         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap)) {
2250                 w->param.eapdbtl = hdac_command(sc,
2251                     HDA_CMD_GET_EAPD_BTL_ENABLE(cad, nid), cad);
2252                 w->param.eapdbtl &= 0x7;
2253                 w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
2254         } else
2255                 w->param.eapdbtl = HDAC_INVALID;
2256
2257         switch (config & HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) {
2258         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT:
2259                 devstr = "line out";
2260                 break;
2261         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER:
2262                 devstr = "speaker";
2263                 break;
2264         case HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT:
2265                 devstr = "headphones out";
2266                 break;
2267         case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
2268                 devstr = "CD";
2269                 break;
2270         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_OUT:
2271                 devstr = "SPDIF out";
2272                 break;
2273         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_OUT:
2274                 devstr = "digital (other) out";
2275                 break;
2276         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_LINE:
2277                 devstr = "modem, line side";
2278                 break;
2279         case HDA_CONFIG_DEFAULTCONF_DEVICE_MODEM_HANDSET:
2280                 devstr = "modem, handset side";
2281                 break;
2282         case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
2283                 devstr = "line in";
2284                 break;
2285         case HDA_CONFIG_DEFAULTCONF_DEVICE_AUX:
2286                 devstr = "AUX";
2287                 break;
2288         case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
2289                 devstr = "Mic in";
2290                 break;
2291         case HDA_CONFIG_DEFAULTCONF_DEVICE_TELEPHONY:
2292                 devstr = "telephony";
2293                 break;
2294         case HDA_CONFIG_DEFAULTCONF_DEVICE_SPDIF_IN:
2295                 devstr = "SPDIF in";
2296                 break;
2297         case HDA_CONFIG_DEFAULTCONF_DEVICE_DIGITAL_OTHER_IN:
2298                 devstr = "digital (other) in";
2299                 break;
2300         case HDA_CONFIG_DEFAULTCONF_DEVICE_OTHER:
2301                 devstr = "other";
2302                 break;
2303         default:
2304                 devstr = "unknown";
2305                 break;
2306         }
2307
2308         switch (config & HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) {
2309         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK:
2310                 connstr = "jack";
2311                 break;
2312         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE:
2313                 connstr = "none";
2314                 break;
2315         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_FIXED:
2316                 connstr = "fixed";
2317                 break;
2318         case HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_BOTH:
2319                 connstr = "jack / fixed";
2320                 break;
2321         default:
2322                 connstr = "unknown";
2323                 break;
2324         }
2325
2326         strlcat(w->name, ": ", sizeof(w->name));
2327         strlcat(w->name, devstr, sizeof(w->name));
2328         strlcat(w->name, " (", sizeof(w->name));
2329         strlcat(w->name, connstr, sizeof(w->name));
2330         strlcat(w->name, ")", sizeof(w->name));
2331 }
2332
2333 static void
2334 hdac_widget_parse(struct hdac_widget *w)
2335 {
2336         struct hdac_softc *sc = w->devinfo->codec->sc;
2337         uint32_t wcap, cap;
2338         char *typestr;
2339         nid_t cad = w->devinfo->codec->cad;
2340         nid_t nid = w->nid;
2341
2342         wcap = hdac_command(sc,
2343             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_AUDIO_WIDGET_CAP),
2344             cad);
2345         w->param.widget_cap = wcap;
2346         w->type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE(wcap);
2347
2348         switch (w->type) {
2349         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
2350                 typestr = "audio output";
2351                 break;
2352         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
2353                 typestr = "audio input";
2354                 break;
2355         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
2356                 typestr = "audio mixer";
2357                 break;
2358         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
2359                 typestr = "audio selector";
2360                 break;
2361         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
2362                 typestr = "pin";
2363                 break;
2364         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_POWER_WIDGET:
2365                 typestr = "power widget";
2366                 break;
2367         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VOLUME_WIDGET:
2368                 typestr = "volume widget";
2369                 break;
2370         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET:
2371                 typestr = "beep widget";
2372                 break;
2373         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_VENDOR_WIDGET:
2374                 typestr = "vendor widget";
2375                 break;
2376         default:
2377                 typestr = "unknown type";
2378                 break;
2379         }
2380
2381         strlcpy(w->name, typestr, sizeof(w->name));
2382
2383         if (HDA_PARAM_AUDIO_WIDGET_CAP_POWER_CTRL(wcap)) {
2384                 hdac_command(sc,
2385                     HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0),
2386                     cad);
2387                 DELAY(1000);
2388         }
2389
2390         hdac_widget_connection_parse(w);
2391
2392         if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(wcap)) {
2393                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2394                         w->param.outamp_cap =
2395                             hdac_command(sc,
2396                             HDA_CMD_GET_PARAMETER(cad, nid,
2397                             HDA_PARAM_OUTPUT_AMP_CAP), cad);
2398                 else
2399                         w->param.outamp_cap =
2400                             w->devinfo->function.audio.outamp_cap;
2401         } else
2402                 w->param.outamp_cap = 0;
2403
2404         if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(wcap)) {
2405                 if (HDA_PARAM_AUDIO_WIDGET_CAP_AMP_OVR(wcap))
2406                         w->param.inamp_cap =
2407                             hdac_command(sc,
2408                             HDA_CMD_GET_PARAMETER(cad, nid,
2409                             HDA_PARAM_INPUT_AMP_CAP), cad);
2410                 else
2411                         w->param.inamp_cap =
2412                             w->devinfo->function.audio.inamp_cap;
2413         } else
2414                 w->param.inamp_cap = 0;
2415
2416         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
2417             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
2418                 if (HDA_PARAM_AUDIO_WIDGET_CAP_FORMAT_OVR(wcap)) {
2419                         cap = hdac_command(sc,
2420                             HDA_CMD_GET_PARAMETER(cad, nid,
2421                             HDA_PARAM_SUPP_STREAM_FORMATS), cad);
2422                         w->param.supp_stream_formats = (cap != 0) ? cap :
2423                             w->devinfo->function.audio.supp_stream_formats;
2424                         cap = hdac_command(sc,
2425                             HDA_CMD_GET_PARAMETER(cad, nid,
2426                             HDA_PARAM_SUPP_PCM_SIZE_RATE), cad);
2427                         w->param.supp_pcm_size_rate = (cap != 0) ? cap :
2428                             w->devinfo->function.audio.supp_pcm_size_rate;
2429                 } else {
2430                         w->param.supp_stream_formats =
2431                             w->devinfo->function.audio.supp_stream_formats;
2432                         w->param.supp_pcm_size_rate =
2433                             w->devinfo->function.audio.supp_pcm_size_rate;
2434                 }
2435         } else {
2436                 w->param.supp_stream_formats = 0;
2437                 w->param.supp_pcm_size_rate = 0;
2438         }
2439
2440         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
2441                 hdac_widget_pin_parse(w);
2442 }
2443
2444 static struct hdac_widget *
2445 hdac_widget_get(struct hdac_devinfo *devinfo, nid_t nid)
2446 {
2447         if (devinfo == NULL || devinfo->widget == NULL ||
2448                     nid < devinfo->startnode || nid >= devinfo->endnode)
2449                 return (NULL);
2450         return (&devinfo->widget[nid - devinfo->startnode]);
2451 }
2452
2453 static __inline int
2454 hda_poll_channel(struct hdac_chan *ch)
2455 {
2456         uint32_t sz, delta;
2457         volatile uint32_t ptr;
2458
2459         if (!(ch->flags & HDAC_CHN_RUNNING))
2460                 return (0);
2461
2462         sz = ch->blksz * ch->blkcnt;
2463         if (ch->dmapos != NULL)
2464                 ptr = *(ch->dmapos);
2465         else
2466                 ptr = HDAC_READ_4(&ch->devinfo->codec->sc->mem,
2467                     ch->off + HDAC_SDLPIB);
2468         ch->ptr = ptr;
2469         ptr %= sz;
2470         ptr &= ~(ch->blksz - 1);
2471         delta = (sz + ptr - ch->prevptr) % sz;
2472
2473         if (delta < ch->blksz)
2474                 return (0);
2475
2476         ch->prevptr = ptr;
2477
2478         return (1);
2479 }
2480
2481 #define hda_chan_active(sc)    (((sc)->play.flags | (sc)->rec.flags) & \
2482                                 HDAC_CHN_RUNNING)
2483
2484 static void
2485 hda_poll_callback(void *arg)
2486 {
2487         struct hdac_softc *sc = arg;
2488         uint32_t trigger;
2489
2490         if (sc == NULL)
2491                 return;
2492
2493         hdac_lock(sc);
2494         if (sc->polling == 0 || hda_chan_active(sc) == 0) {
2495                 hdac_unlock(sc);
2496                 return;
2497         }
2498
2499         trigger = 0;
2500         trigger |= (hda_poll_channel(&sc->play) != 0) ? HDAC_TRIGGER_PLAY : 0;
2501         trigger |= (hda_poll_channel(&sc->rec)) != 0 ? HDAC_TRIGGER_REC : 0;
2502
2503         /* XXX */
2504         callout_reset(&sc->poll_hda, 1/*sc->poll_ticks*/,
2505             hda_poll_callback, sc);
2506
2507         hdac_unlock(sc);
2508
2509         if (trigger & HDAC_TRIGGER_PLAY)
2510                 chn_intr(sc->play.c);
2511         if (trigger & HDAC_TRIGGER_REC)
2512                 chn_intr(sc->rec.c);
2513 }
2514
2515 static int
2516 hdac_rirb_flush(struct hdac_softc *sc)
2517 {
2518         struct hdac_rirb *rirb_base, *rirb;
2519         struct hdac_codec *codec;
2520         struct hdac_command_list *commands;
2521         nid_t cad;
2522         uint32_t resp;
2523         uint8_t rirbwp;
2524         int ret;
2525
2526         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2527         rirbwp = HDAC_READ_1(&sc->mem, HDAC_RIRBWP);
2528 #if 0
2529         bus_dmamap_sync(sc->rirb_dma.dma_tag, sc->rirb_dma.dma_map,
2530             BUS_DMASYNC_POSTREAD);
2531 #endif
2532         ret = 0;
2533
2534         while (sc->rirb_rp != rirbwp) {
2535                 sc->rirb_rp++;
2536                 sc->rirb_rp %= sc->rirb_size;
2537                 rirb = &rirb_base[sc->rirb_rp];
2538                 cad = HDAC_RIRB_RESPONSE_EX_SDATA_IN(rirb->response_ex);
2539                 if (cad < 0 || cad >= HDAC_CODEC_MAX ||
2540                     sc->codecs[cad] == NULL)
2541                         continue;
2542                 resp = rirb->response;
2543                 codec = sc->codecs[cad];
2544                 commands = codec->commands;
2545                 if (rirb->response_ex & HDAC_RIRB_RESPONSE_EX_UNSOLICITED) {
2546                         sc->unsolq[sc->unsolq_wp++] = (cad << 16) |
2547                             ((resp >> 26) & 0xffff);
2548                         sc->unsolq_wp %= HDAC_UNSOLQ_MAX;
2549                 } else if (commands != NULL && commands->num_commands > 0 &&
2550                     codec->responses_received < commands->num_commands)
2551                         commands->responses[codec->responses_received++] =
2552                             resp;
2553                 ret++;
2554         }
2555
2556         return (ret);
2557 }
2558
2559 static int
2560 hdac_unsolq_flush(struct hdac_softc *sc)
2561 {
2562         nid_t cad;
2563         uint32_t tag;
2564         int ret = 0;
2565
2566         if (sc->unsolq_st == HDAC_UNSOLQ_READY) {
2567                 sc->unsolq_st = HDAC_UNSOLQ_BUSY;
2568                 while (sc->unsolq_rp != sc->unsolq_wp) {
2569                         cad = sc->unsolq[sc->unsolq_rp] >> 16;
2570                         tag = sc->unsolq[sc->unsolq_rp++] & 0xffff;
2571                         sc->unsolq_rp %= HDAC_UNSOLQ_MAX;
2572                         hdac_unsolicited_handler(sc->codecs[cad], tag);
2573                         ret++;
2574                 }
2575                 sc->unsolq_st = HDAC_UNSOLQ_READY;
2576         }
2577
2578         return (ret);
2579 }
2580
2581 static void
2582 hdac_poll_callback(void *arg)
2583 {
2584         struct hdac_softc *sc = arg;
2585         if (sc == NULL)
2586                 return;
2587
2588         hdac_lock(sc);
2589         if (sc->polling == 0 || sc->poll_ival == 0) {
2590                 hdac_unlock(sc);
2591                 return;
2592         }
2593         if (hdac_rirb_flush(sc) != 0)
2594                 hdac_unsolq_flush(sc);
2595         callout_reset(&sc->poll_hdac, sc->poll_ival, hdac_poll_callback, sc);
2596         hdac_unlock(sc);
2597 }
2598
2599 static void
2600 hdac_stream_stop(struct hdac_chan *ch)
2601 {
2602         struct hdac_softc *sc = ch->devinfo->codec->sc;
2603         uint32_t ctl;
2604
2605         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2606         ctl &= ~(HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2607             HDAC_SDCTL_RUN);
2608         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2609
2610         ch->flags &= ~HDAC_CHN_RUNNING;
2611
2612         if (sc->polling != 0) {
2613                 int pollticks;
2614
2615                 if (hda_chan_active(sc) == 0) {
2616                         callout_stop(&sc->poll_hda);
2617                         sc->poll_ticks = 1;
2618                 } else {
2619                         if (sc->play.flags & HDAC_CHN_RUNNING)
2620                                 ch = &sc->play;
2621                         else
2622                                 ch = &sc->rec;
2623                         pollticks = ((uint64_t)hz * ch->blksz) /
2624                             ((uint64_t)sndbuf_getbps(ch->b) *
2625                             sndbuf_getspd(ch->b));
2626                         pollticks >>= 2;
2627                         if (pollticks > hz)
2628                                 pollticks = hz;
2629                         if (pollticks < 1) {
2630                                 HDA_BOOTVERBOSE(
2631                                         device_printf(sc->dev,
2632                                             "%s: pollticks=%d < 1 !\n",
2633                                             __func__, pollticks);
2634                                 );
2635                                 pollticks = 1;
2636                         }
2637                         if (pollticks > sc->poll_ticks) {
2638                                 HDA_BOOTVERBOSE(
2639                                         device_printf(sc->dev,
2640                                             "%s: pollticks %d -> %d\n",
2641                                             __func__, sc->poll_ticks,
2642                                             pollticks);
2643                                 );
2644                                 sc->poll_ticks = pollticks;
2645                                 callout_reset(&sc->poll_hda, 1,
2646                                     hda_poll_callback, sc);
2647                         }
2648                 }
2649         } else {
2650                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2651                 ctl &= ~(1 << (ch->off >> 5));
2652                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2653         }
2654 }
2655
2656 static void
2657 hdac_stream_start(struct hdac_chan *ch)
2658 {
2659         struct hdac_softc *sc = ch->devinfo->codec->sc;
2660         uint32_t ctl;
2661
2662         if (sc->polling != 0) {
2663                 int pollticks;
2664
2665                 pollticks = ((uint64_t)hz * ch->blksz) /
2666                     ((uint64_t)sndbuf_getbps(ch->b) * sndbuf_getspd(ch->b));
2667                 pollticks >>= 2;
2668                 if (pollticks > hz)
2669                         pollticks = hz;
2670                 if (pollticks < 1) {
2671                         HDA_BOOTVERBOSE(
2672                                 device_printf(sc->dev,
2673                                     "%s: pollticks=%d < 1 !\n",
2674                                     __func__, pollticks);
2675                         );
2676                         pollticks = 1;
2677                 }
2678                 if (hda_chan_active(sc) == 0 || pollticks < sc->poll_ticks) {
2679                         HDA_BOOTVERBOSE(
2680                                 if (hda_chan_active(sc) == 0) {
2681                                         device_printf(sc->dev,
2682                                             "%s: pollticks=%d\n",
2683                                             __func__, pollticks);
2684                                 } else {
2685                                         device_printf(sc->dev,
2686                                             "%s: pollticks %d -> %d\n",
2687                                             __func__, sc->poll_ticks,
2688                                             pollticks);
2689                                 }
2690                         );
2691                         sc->poll_ticks = pollticks;
2692                         callout_reset(&sc->poll_hda, 1, hda_poll_callback,
2693                             sc);
2694                 }
2695                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2696                 ctl |= HDAC_SDCTL_RUN;
2697         } else {
2698                 ctl = HDAC_READ_4(&sc->mem, HDAC_INTCTL);
2699                 ctl |= 1 << (ch->off >> 5);
2700                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, ctl);
2701                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2702                 ctl |= HDAC_SDCTL_IOCE | HDAC_SDCTL_FEIE | HDAC_SDCTL_DEIE |
2703                     HDAC_SDCTL_RUN;
2704         }
2705         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2706
2707         ch->flags |= HDAC_CHN_RUNNING;
2708 }
2709
2710 static void
2711 hdac_stream_reset(struct hdac_chan *ch)
2712 {
2713         struct hdac_softc *sc = ch->devinfo->codec->sc;
2714         int timeout = 1000;
2715         int to = timeout;
2716         uint32_t ctl;
2717
2718         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2719         ctl |= HDAC_SDCTL_SRST;
2720         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2721         do {
2722                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2723                 if (ctl & HDAC_SDCTL_SRST)
2724                         break;
2725                 DELAY(10);
2726         } while (--to);
2727         if (!(ctl & HDAC_SDCTL_SRST)) {
2728                 device_printf(sc->dev, "timeout in reset\n");
2729         }
2730         ctl &= ~HDAC_SDCTL_SRST;
2731         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL0, ctl);
2732         to = timeout;
2733         do {
2734                 ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL0);
2735                 if (!(ctl & HDAC_SDCTL_SRST))
2736                         break;
2737                 DELAY(10);
2738         } while (--to);
2739         if (ctl & HDAC_SDCTL_SRST)
2740                 device_printf(sc->dev, "can't reset!\n");
2741 }
2742
2743 static void
2744 hdac_stream_setid(struct hdac_chan *ch)
2745 {
2746         struct hdac_softc *sc = ch->devinfo->codec->sc;
2747         uint32_t ctl;
2748
2749         ctl = HDAC_READ_1(&sc->mem, ch->off + HDAC_SDCTL2);
2750         ctl &= ~HDAC_SDCTL2_STRM_MASK;
2751         ctl |= ch->sid << HDAC_SDCTL2_STRM_SHIFT;
2752         HDAC_WRITE_1(&sc->mem, ch->off + HDAC_SDCTL2, ctl);
2753 }
2754
2755 static void
2756 hdac_bdl_setup(struct hdac_chan *ch)
2757 {
2758         struct hdac_softc *sc = ch->devinfo->codec->sc;
2759         struct hdac_bdle *bdle;
2760         uint64_t addr;
2761         uint32_t blksz, blkcnt;
2762         int i;
2763
2764         addr = (uint64_t)sndbuf_getbufaddr(ch->b);
2765         bdle = (struct hdac_bdle *)ch->bdl_dma.dma_vaddr;
2766
2767         if (sc->polling != 0) {
2768                 blksz = ch->blksz * ch->blkcnt;
2769                 blkcnt = 1;
2770         } else {
2771                 blksz = ch->blksz;
2772                 blkcnt = ch->blkcnt;
2773         }
2774
2775         for (i = 0; i < blkcnt; i++, bdle++) {
2776                 bdle->addrl = (uint32_t)addr;
2777                 bdle->addrh = (uint32_t)(addr >> 32);
2778                 bdle->len = blksz;
2779                 bdle->ioc = 1 ^ sc->polling;
2780                 addr += blksz;
2781         }
2782
2783         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDCBL, blksz * blkcnt);
2784         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDLVI, blkcnt - 1);
2785         addr = ch->bdl_dma.dma_paddr;
2786         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPL, (uint32_t)addr);
2787         HDAC_WRITE_4(&sc->mem, ch->off + HDAC_SDBDPU, (uint32_t)(addr >> 32));
2788         if (ch->dmapos != NULL &&
2789             !(HDAC_READ_4(&sc->mem, HDAC_DPIBLBASE) & 0x00000001)) {
2790                 addr = sc->pos_dma.dma_paddr;
2791                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBLBASE,
2792                     ((uint32_t)addr & HDAC_DPLBASE_DPLBASE_MASK) | 0x00000001);
2793                 HDAC_WRITE_4(&sc->mem, HDAC_DPIBUBASE, (uint32_t)(addr >> 32));
2794         }
2795 }
2796
2797 static int
2798 hdac_bdl_alloc(struct hdac_chan *ch)
2799 {
2800         struct hdac_softc *sc = ch->devinfo->codec->sc;
2801         int rc;
2802
2803         rc = hdac_dma_alloc(sc, &ch->bdl_dma,
2804             sizeof(struct hdac_bdle) * HDA_BDL_MAX);
2805         if (rc) {
2806                 device_printf(sc->dev, "can't alloc bdl\n");
2807                 return (rc);
2808         }
2809
2810         return (0);
2811 }
2812
2813 static void
2814 hdac_audio_ctl_amp_set_internal(struct hdac_softc *sc, nid_t cad, nid_t nid,
2815                                         int index, int lmute, int rmute,
2816                                         int left, int right, int dir)
2817 {
2818         uint16_t v = 0;
2819
2820         if (sc == NULL)
2821                 return;
2822
2823         if (left != right || lmute != rmute) {
2824                 v = (1 << (15 - dir)) | (1 << 13) | (index << 8) |
2825                     (lmute << 7) | left;
2826                 hdac_command(sc,
2827                     HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2828                 v = (1 << (15 - dir)) | (1 << 12) | (index << 8) |
2829                     (rmute << 7) | right;
2830         } else
2831                 v = (1 << (15 - dir)) | (3 << 12) | (index << 8) |
2832                     (lmute << 7) | left;
2833
2834         hdac_command(sc,
2835             HDA_CMD_SET_AMP_GAIN_MUTE(cad, nid, v), cad);
2836 }
2837
2838 static void
2839 hdac_audio_ctl_amp_set(struct hdac_audio_ctl *ctl, uint32_t mute,
2840                                                 int left, int right)
2841 {
2842         struct hdac_softc *sc;
2843         nid_t nid, cad;
2844         int lmute, rmute;
2845
2846         if (ctl == NULL || ctl->widget == NULL ||
2847             ctl->widget->devinfo == NULL ||
2848             ctl->widget->devinfo->codec == NULL ||
2849             ctl->widget->devinfo->codec->sc == NULL)
2850                 return;
2851
2852         sc = ctl->widget->devinfo->codec->sc;
2853         cad = ctl->widget->devinfo->codec->cad;
2854         nid = ctl->widget->nid;
2855
2856         if (mute == HDA_AMP_MUTE_DEFAULT) {
2857                 lmute = HDA_AMP_LEFT_MUTED(ctl->muted);
2858                 rmute = HDA_AMP_RIGHT_MUTED(ctl->muted);
2859         } else {
2860                 lmute = HDA_AMP_LEFT_MUTED(mute);
2861                 rmute = HDA_AMP_RIGHT_MUTED(mute);
2862         }
2863
2864         if (ctl->dir & HDA_CTL_OUT)
2865                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2866                     lmute, rmute, left, right, 0);
2867         if (ctl->dir & HDA_CTL_IN)
2868                 hdac_audio_ctl_amp_set_internal(sc, cad, nid, ctl->index,
2869                     lmute, rmute, left, right, 1);
2870         ctl->left = left;
2871         ctl->right = right;
2872 }
2873
2874 static void
2875 hdac_widget_connection_select(struct hdac_widget *w, uint8_t index)
2876 {
2877         if (w == NULL || w->nconns < 1 || index > (w->nconns - 1))
2878                 return;
2879         hdac_command(w->devinfo->codec->sc,
2880             HDA_CMD_SET_CONNECTION_SELECT_CONTROL(w->devinfo->codec->cad,
2881             w->nid, index), w->devinfo->codec->cad);
2882         w->selconn = index;
2883 }
2884
2885
2886 /****************************************************************************
2887  * uint32_t hdac_command_sendone_internal
2888  *
2889  * Wrapper function that sends only one command to a given codec
2890  ****************************************************************************/
2891 static uint32_t
2892 hdac_command_sendone_internal(struct hdac_softc *sc, uint32_t verb, nid_t cad)
2893 {
2894         struct hdac_command_list cl;
2895         uint32_t response = HDAC_INVALID;
2896
2897         if (!hdac_lockowned(sc))
2898                 device_printf(sc->dev, "WARNING!!!! mtx not owned!!!!\n");
2899         cl.num_commands = 1;
2900         cl.verbs = &verb;
2901         cl.responses = &response;
2902
2903         hdac_command_send_internal(sc, &cl, cad);
2904
2905         return (response);
2906 }
2907
2908 /****************************************************************************
2909  * hdac_command_send_internal
2910  *
2911  * Send a command list to the codec via the corb. We queue as much verbs as
2912  * we can and msleep on the codec. When the interrupt get the responses
2913  * back from the rirb, it will wake us up so we can queue the remaining verbs
2914  * if any.
2915  ****************************************************************************/
2916 static void
2917 hdac_command_send_internal(struct hdac_softc *sc,
2918                         struct hdac_command_list *commands, nid_t cad)
2919 {
2920         struct hdac_codec *codec;
2921         int corbrp;
2922         uint32_t *corb;
2923         int timeout;
2924         int retry = 10;
2925         struct hdac_rirb *rirb_base;
2926
2927         if (sc == NULL || sc->codecs[cad] == NULL || commands == NULL ||
2928             commands->num_commands < 1)
2929                 return;
2930
2931         codec = sc->codecs[cad];
2932         codec->commands = commands;
2933         codec->responses_received = 0;
2934         codec->verbs_sent = 0;
2935         corb = (uint32_t *)sc->corb_dma.dma_vaddr;
2936         rirb_base = (struct hdac_rirb *)sc->rirb_dma.dma_vaddr;
2937
2938         do {
2939                 if (codec->verbs_sent != commands->num_commands) {
2940                         /* Queue as many verbs as possible */
2941                         corbrp = HDAC_READ_2(&sc->mem, HDAC_CORBRP);
2942 #if 0
2943                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2944                             sc->corb_dma.dma_map, BUS_DMASYNC_PREWRITE);
2945 #endif
2946                         while (codec->verbs_sent != commands->num_commands &&
2947                             ((sc->corb_wp + 1) % sc->corb_size) != corbrp) {
2948                                 sc->corb_wp++;
2949                                 sc->corb_wp %= sc->corb_size;
2950                                 corb[sc->corb_wp] =
2951                                     commands->verbs[codec->verbs_sent++];
2952                         }
2953
2954                         /* Send the verbs to the codecs */
2955 #if 0
2956                         bus_dmamap_sync(sc->corb_dma.dma_tag,
2957                             sc->corb_dma.dma_map, BUS_DMASYNC_POSTWRITE);
2958 #endif
2959                         HDAC_WRITE_2(&sc->mem, HDAC_CORBWP, sc->corb_wp);
2960                 }
2961
2962                 timeout = 1000;
2963                 while (hdac_rirb_flush(sc) == 0 && --timeout)
2964                         DELAY(10);
2965         } while ((codec->verbs_sent != commands->num_commands ||
2966             codec->responses_received != commands->num_commands) && --retry);
2967
2968         if (retry == 0)
2969                 device_printf(sc->dev,
2970                     "%s: TIMEOUT numcmd=%d, sent=%d, received=%d\n",
2971                     __func__, commands->num_commands, codec->verbs_sent,
2972                     codec->responses_received);
2973
2974         codec->commands = NULL;
2975         codec->responses_received = 0;
2976         codec->verbs_sent = 0;
2977
2978         hdac_unsolq_flush(sc);
2979 }
2980
2981
2982 /****************************************************************************
2983  * Device Methods
2984  ****************************************************************************/
2985
2986 /****************************************************************************
2987  * int hdac_probe(device_t)
2988  *
2989  * Probe for the presence of an hdac. If none is found, check for a generic
2990  * match using the subclass of the device.
2991  ****************************************************************************/
2992 static int
2993 hdac_probe(device_t dev)
2994 {
2995         int i, result;
2996         uint32_t model;
2997         uint16_t class, subclass;
2998         char desc[64];
2999
3000         model = (uint32_t)pci_get_device(dev) << 16;
3001         model |= (uint32_t)pci_get_vendor(dev) & 0x0000ffff;
3002         class = pci_get_class(dev);
3003         subclass = pci_get_subclass(dev);
3004
3005         bzero(desc, sizeof(desc));
3006         result = ENXIO;
3007         for (i = 0; i < HDAC_DEVICES_LEN; i++) {
3008                 if (hdac_devices[i].model == model) {
3009                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
3010                         result = BUS_PROBE_DEFAULT;
3011                         break;
3012                 }
3013                 if (HDA_DEV_MATCH(hdac_devices[i].model, model) &&
3014                     class == PCIC_MULTIMEDIA &&
3015                     subclass == PCIS_MULTIMEDIA_HDA) {
3016                         strlcpy(desc, hdac_devices[i].desc, sizeof(desc));
3017                         result = BUS_PROBE_GENERIC;
3018                         break;
3019                 }
3020         }
3021         if (result == ENXIO && class == PCIC_MULTIMEDIA &&
3022             subclass == PCIS_MULTIMEDIA_HDA) {
3023                 strlcpy(desc, "Generic", sizeof(desc));
3024                 result = BUS_PROBE_GENERIC;
3025         }
3026         if (result != ENXIO) {
3027                 strlcat(desc, " High Definition Audio Controller",
3028                     sizeof(desc));
3029                 device_set_desc_copy(dev, desc);
3030         }
3031
3032         return (result);
3033 }
3034
3035 static void *
3036 hdac_channel_init(kobj_t obj, void *data, struct snd_dbuf *b,
3037                                         struct pcm_channel *c, int dir)
3038 {
3039         struct hdac_devinfo *devinfo = data;
3040         struct hdac_softc *sc = devinfo->codec->sc;
3041         struct hdac_chan *ch;
3042
3043         hdac_lock(sc);
3044         if (dir == PCMDIR_PLAY) {
3045                 ch = &sc->play;
3046                 ch->off = (sc->num_iss + devinfo->function.audio.playcnt) << 5;
3047                 devinfo->function.audio.playcnt++;
3048         } else {
3049                 ch = &sc->rec;
3050                 ch->off = devinfo->function.audio.reccnt << 5;
3051                 devinfo->function.audio.reccnt++;
3052         }
3053         if (devinfo->function.audio.quirks & HDA_QUIRK_FIXEDRATE) {
3054                 ch->caps.minspeed = ch->caps.maxspeed = 48000;
3055                 ch->pcmrates[0] = 48000;
3056                 ch->pcmrates[1] = 0;
3057         }
3058         if (sc->pos_dma.dma_vaddr != NULL)
3059                 ch->dmapos = (uint32_t *)(sc->pos_dma.dma_vaddr +
3060                     (sc->streamcnt * 8));
3061         else
3062                 ch->dmapos = NULL;
3063         ch->sid = ++sc->streamcnt;
3064         ch->dir = dir;
3065         ch->b = b;
3066         ch->c = c;
3067         ch->devinfo = devinfo;
3068         ch->blksz = sc->chan_size / sc->chan_blkcnt;
3069         ch->blkcnt = sc->chan_blkcnt;
3070         hdac_unlock(sc);
3071
3072         if (hdac_bdl_alloc(ch) != 0) {
3073                 ch->blkcnt = 0;
3074                 return (NULL);
3075         }
3076
3077         if (sndbuf_alloc(ch->b, sc->chan_dmat, sc->chan_size) != 0)
3078                 return (NULL);
3079
3080         HDAC_DMA_ATTR(sc, sndbuf_getbuf(ch->b), sndbuf_getmaxsize(ch->b),
3081             PAT_UNCACHEABLE);
3082
3083         return (ch);
3084 }
3085
3086 static int
3087 hdac_channel_free(kobj_t obj, void *data)
3088 {
3089         struct hdac_softc *sc;
3090         struct hdac_chan *ch;
3091
3092         ch = (struct hdac_chan *)data;
3093         sc = (ch != NULL && ch->devinfo != NULL && ch->devinfo->codec != NULL) ?
3094             ch->devinfo->codec->sc : NULL;
3095         if (ch != NULL && sc != NULL) {
3096                 HDAC_DMA_ATTR(sc, sndbuf_getbuf(ch->b),
3097                     sndbuf_getmaxsize(ch->b), PAT_WRITE_BACK);
3098         }
3099
3100         return (1);
3101 }
3102
3103 static int
3104 hdac_channel_setformat(kobj_t obj, void *data, uint32_t format)
3105 {
3106         struct hdac_chan *ch = data;
3107         int i;
3108
3109         for (i = 0; ch->caps.fmtlist[i] != 0; i++) {
3110                 if (format == ch->caps.fmtlist[i]) {
3111                         ch->fmt = format;
3112                         return (0);
3113                 }
3114         }
3115
3116         return (EINVAL);
3117 }
3118
3119 static int
3120 hdac_channel_setspeed(kobj_t obj, void *data, uint32_t speed)
3121 {
3122         struct hdac_chan *ch = data;
3123         uint32_t spd = 0, threshold;
3124         int i;
3125
3126         for (i = 0; ch->pcmrates[i] != 0; i++) {
3127                 spd = ch->pcmrates[i];
3128                 threshold = spd + ((ch->pcmrates[i + 1] != 0) ?
3129                     ((ch->pcmrates[i + 1] - spd) >> 1) : 0);
3130                 if (speed < threshold)
3131                         break;
3132         }
3133
3134         if (spd == 0)   /* impossible */
3135                 ch->spd = 48000;
3136         else
3137                 ch->spd = spd;
3138
3139         return (ch->spd);
3140 }
3141
3142 static void
3143 hdac_stream_setup(struct hdac_chan *ch)
3144 {
3145         struct hdac_softc *sc = ch->devinfo->codec->sc;
3146         struct hdac_widget *w;
3147         int i, chn, totalchn;
3148         nid_t cad = ch->devinfo->codec->cad;
3149         uint16_t fmt;
3150
3151         fmt = 0;
3152         if (ch->fmt & AFMT_S16_LE)
3153                 fmt |= ch->bit16 << 4;
3154         else if (ch->fmt & AFMT_S32_LE)
3155                 fmt |= ch->bit32 << 4;
3156         else
3157                 fmt |= 1 << 4;
3158
3159         for (i = 0; i < HDA_RATE_TAB_LEN; i++) {
3160                 if (hda_rate_tab[i].valid && ch->spd == hda_rate_tab[i].rate) {
3161                         fmt |= hda_rate_tab[i].base;
3162                         fmt |= hda_rate_tab[i].mul;
3163                         fmt |= hda_rate_tab[i].div;
3164                         break;
3165                 }
3166         }
3167
3168         if (ch->fmt & AFMT_STEREO) {
3169                 fmt |= 1;
3170                 totalchn = 2;
3171         } else
3172                 totalchn = 1;
3173
3174         HDAC_WRITE_2(&sc->mem, ch->off + HDAC_SDFMT, fmt);
3175
3176         chn = 0;
3177         for (i = 0; ch->io[i] != -1; i++) {
3178                 w = hdac_widget_get(ch->devinfo, ch->io[i]);
3179                 if (w == NULL)
3180                         continue;
3181                 HDA_BOOTVERBOSE(
3182                         device_printf(sc->dev,
3183                             "HDA_DEBUG: PCMDIR_%s: Stream setup nid=%d "
3184                             "fmt=0x%08x\n",
3185                             (ch->dir == PCMDIR_PLAY) ? "PLAY" : "REC",
3186                             ch->io[i], fmt);
3187                 );
3188                 hdac_command(sc,
3189                     HDA_CMD_SET_CONV_FMT(cad, ch->io[i], fmt), cad);
3190                 if (ch->dir == PCMDIR_REC)
3191                         hdac_command(sc,
3192                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3193                             (chn < totalchn) ? ((ch->sid << 4) | chn) : 0),
3194                             cad);
3195                 else
3196                         hdac_command(sc,
3197                             HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3198                             ch->sid << 4), cad);
3199                 chn +=
3200                     HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(w->param.widget_cap) ?
3201                     2 : 1;
3202         }
3203 }
3204
3205 static int
3206 hdac_channel_setfragments(kobj_t obj, void *data,
3207                                         uint32_t blksz, uint32_t blkcnt)
3208 {
3209         struct hdac_chan *ch = data;
3210         struct hdac_softc *sc = ch->devinfo->codec->sc;
3211
3212         blksz &= HDA_BLK_ALIGN;
3213
3214         if (blksz > (sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN))
3215                 blksz = sndbuf_getmaxsize(ch->b) / HDA_BDL_MIN;
3216         if (blksz < HDA_BLK_MIN)
3217                 blksz = HDA_BLK_MIN;
3218         if (blkcnt > HDA_BDL_MAX)
3219                 blkcnt = HDA_BDL_MAX;
3220         if (blkcnt < HDA_BDL_MIN)
3221                 blkcnt = HDA_BDL_MIN;
3222
3223         while ((blksz * blkcnt) > sndbuf_getmaxsize(ch->b)) {
3224                 if ((blkcnt >> 1) >= HDA_BDL_MIN)
3225                         blkcnt >>= 1;
3226                 else if ((blksz >> 1) >= HDA_BLK_MIN)
3227                         blksz >>= 1;
3228                 else
3229                         break;
3230         }
3231
3232         if ((sndbuf_getblksz(ch->b) != blksz ||
3233             sndbuf_getblkcnt(ch->b) != blkcnt) &&
3234             sndbuf_resize(ch->b, blkcnt, blksz) != 0)
3235                 device_printf(sc->dev, "%s: failed blksz=%u blkcnt=%u\n",
3236                     __func__, blksz, blkcnt);
3237
3238         ch->blksz = sndbuf_getblksz(ch->b);
3239         ch->blkcnt = sndbuf_getblkcnt(ch->b);
3240
3241         return (1);
3242 }
3243
3244 static int
3245 hdac_channel_setblocksize(kobj_t obj, void *data, uint32_t blksz)
3246 {
3247         struct hdac_chan *ch = data;
3248         struct hdac_softc *sc = ch->devinfo->codec->sc;
3249
3250         hdac_channel_setfragments(obj, data, blksz, sc->chan_blkcnt);
3251
3252         return (ch->blksz);
3253 }
3254
3255 static void
3256 hdac_channel_stop(struct hdac_softc *sc, struct hdac_chan *ch)
3257 {
3258         struct hdac_devinfo *devinfo = ch->devinfo;
3259         nid_t cad = devinfo->codec->cad;
3260         int i;
3261
3262         hdac_stream_stop(ch);
3263
3264         for (i = 0; ch->io[i] != -1; i++) {
3265                 hdac_command(sc,
3266                     HDA_CMD_SET_CONV_STREAM_CHAN(cad, ch->io[i],
3267                     0), cad);
3268         }
3269 }
3270
3271 static void
3272 hdac_channel_start(struct hdac_softc *sc, struct hdac_chan *ch)
3273 {
3274         ch->ptr = 0;
3275         ch->prevptr = 0;
3276         hdac_stream_stop(ch);
3277         hdac_stream_reset(ch);
3278         hdac_bdl_setup(ch);
3279         hdac_stream_setid(ch);
3280         hdac_stream_setup(ch);
3281         hdac_stream_start(ch);
3282 }
3283
3284 static int
3285 hdac_channel_trigger(kobj_t obj, void *data, int go)
3286 {
3287         struct hdac_chan *ch = data;
3288         struct hdac_softc *sc = ch->devinfo->codec->sc;
3289
3290         if (!(go == PCMTRIG_START || go == PCMTRIG_STOP || go == PCMTRIG_ABORT))
3291                 return (0);
3292
3293         hdac_lock(sc);
3294         switch (go) {
3295         case PCMTRIG_START:
3296                 hdac_channel_start(sc, ch);
3297                 break;
3298         case PCMTRIG_STOP:
3299         case PCMTRIG_ABORT:
3300                 hdac_channel_stop(sc, ch);
3301                 break;
3302         default:
3303                 break;
3304         }
3305         hdac_unlock(sc);
3306
3307         return (0);
3308 }
3309
3310 static int
3311 hdac_channel_getptr(kobj_t obj, void *data)
3312 {
3313         struct hdac_chan *ch = data;
3314         struct hdac_softc *sc = ch->devinfo->codec->sc;
3315         uint32_t ptr;
3316
3317         hdac_lock(sc);
3318         if (sc->polling != 0)
3319                 ptr = ch->ptr;
3320         else if (ch->dmapos != NULL)
3321                 ptr = *(ch->dmapos);
3322         else
3323                 ptr = HDAC_READ_4(&sc->mem, ch->off + HDAC_SDLPIB);
3324         hdac_unlock(sc);
3325
3326         /*
3327          * Round to available space and force 128 bytes aligment.
3328          */
3329         ptr %= ch->blksz * ch->blkcnt;
3330         ptr &= HDA_BLK_ALIGN;
3331
3332         return (ptr);
3333 }
3334
3335 static struct pcmchan_caps *
3336 hdac_channel_getcaps(kobj_t obj, void *data)
3337 {
3338         return (&((struct hdac_chan *)data)->caps);
3339 }
3340
3341 static kobj_method_t hdac_channel_methods[] = {
3342         KOBJMETHOD(channel_init,                hdac_channel_init),
3343         KOBJMETHOD(channel_free,                hdac_channel_free),
3344         KOBJMETHOD(channel_setformat,           hdac_channel_setformat),
3345         KOBJMETHOD(channel_setspeed,            hdac_channel_setspeed),
3346         KOBJMETHOD(channel_setblocksize,        hdac_channel_setblocksize),
3347         KOBJMETHOD(channel_trigger,             hdac_channel_trigger),
3348         KOBJMETHOD(channel_getptr,              hdac_channel_getptr),
3349         KOBJMETHOD(channel_getcaps,             hdac_channel_getcaps),
3350         { 0, 0 }
3351 };
3352 CHANNEL_DECLARE(hdac_channel);
3353
3354 static void
3355 hdac_jack_poll_callback(void *arg)
3356 {
3357         struct hdac_devinfo *devinfo = arg;
3358         struct hdac_softc *sc;
3359
3360         if (devinfo == NULL || devinfo->codec == NULL ||
3361             devinfo->codec->sc == NULL)
3362                 return;
3363         sc = devinfo->codec->sc;
3364         hdac_lock(sc);
3365         if (sc->poll_ival == 0) {
3366                 hdac_unlock(sc);
3367                 return;
3368         }
3369         hdac_hp_switch_handler(devinfo);
3370         callout_reset(&sc->poll_jack, sc->poll_ival,
3371             hdac_jack_poll_callback, devinfo);
3372         hdac_unlock(sc);
3373 }
3374
3375 static int
3376 hdac_audio_ctl_ossmixer_init(struct snd_mixer *m)
3377 {
3378         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3379         struct hdac_softc *sc = devinfo->codec->sc;
3380         struct hdac_widget *w, *cw;
3381         struct hdac_audio_ctl *ctl;
3382         uint32_t mask, recmask, id;
3383         int i, j, softpcmvol;
3384         nid_t cad;
3385
3386         hdac_lock(sc);
3387
3388         mask = 0;
3389         recmask = 0;
3390
3391         id = hdac_codec_id(devinfo);
3392         cad = devinfo->codec->cad;
3393         for (i = 0; i < HDAC_HP_SWITCH_LEN; i++) {
3394                 if (!(HDA_DEV_MATCH(hdac_hp_switch[i].model,
3395                     sc->pci_subvendor) && hdac_hp_switch[i].id == id))
3396                         continue;
3397                 w = hdac_widget_get(devinfo, hdac_hp_switch[i].hpnid);
3398                 if (w == NULL || w->enable == 0 || w->type !=
3399                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
3400                         continue;
3401                 if (hdac_hp_switch[i].polling != 0)
3402                         callout_reset(&sc->poll_jack, 1,
3403                             hdac_jack_poll_callback, devinfo);
3404                 else if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(w->param.widget_cap))
3405                         hdac_command(sc,
3406                             HDA_CMD_SET_UNSOLICITED_RESPONSE(cad, w->nid,
3407                             HDA_CMD_SET_UNSOLICITED_RESPONSE_ENABLE |
3408                             HDAC_UNSOLTAG_EVENT_HP), cad);
3409                 else
3410                         continue;
3411                 hdac_hp_switch_handler(devinfo);
3412                 HDA_BOOTVERBOSE(
3413                         device_printf(sc->dev,
3414                             "HDA_DEBUG: Enabling headphone/speaker "
3415                             "audio routing switching:\n");
3416                         device_printf(sc->dev,
3417                             "HDA_DEBUG: \tindex=%d nid=%d "
3418                             "pci_subvendor=0x%08x "
3419                             "codec=0x%08x [%s]\n",
3420                             i, w->nid, sc->pci_subvendor, id,
3421                             (hdac_hp_switch[i].polling != 0) ? "POLL" :
3422                             "UNSOL");
3423                 );
3424                 break;
3425         }
3426         for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3427                 if (!(HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3428                     sc->pci_subvendor) &&
3429                     hdac_eapd_switch[i].id == id))
3430                         continue;
3431                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3432                 if (w == NULL || w->enable == 0)
3433                         break;
3434                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3435                     w->param.eapdbtl == HDAC_INVALID)
3436                         break;
3437                 mask |= SOUND_MASK_OGAIN;
3438                 break;
3439         }
3440
3441         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3442                 w = hdac_widget_get(devinfo, i);
3443                 if (w == NULL || w->enable == 0)
3444                         continue;
3445                 mask |= w->ctlflags;
3446                 if (!(w->pflags & HDA_ADC_RECSEL))
3447                         continue;
3448                 for (j = 0; j < w->nconns; j++) {
3449                         cw = hdac_widget_get(devinfo, w->conns[j]);
3450                         if (cw == NULL || cw->enable == 0)
3451                                 continue;
3452                         recmask |= cw->ctlflags;
3453                 }
3454         }
3455
3456         if (!(mask & SOUND_MASK_PCM)) {
3457                 softpcmvol = 1;
3458                 mask |= SOUND_MASK_PCM;
3459         } else
3460                 softpcmvol = (devinfo->function.audio.quirks &
3461                     HDA_QUIRK_SOFTPCMVOL) ? 1 : 0;
3462
3463         i = 0;
3464         ctl = NULL;
3465         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3466                 if (ctl->widget == NULL || ctl->enable == 0)
3467                         continue;
3468                 if (!(ctl->ossmask & SOUND_MASK_PCM))
3469                         continue;
3470                 if (ctl->step > 0)
3471                         break;
3472         }
3473
3474         if (softpcmvol == 1 || ctl == NULL) {
3475                 pcm_setflags(sc->dev, pcm_getflags(sc->dev) | SD_F_SOFTPCMVOL);
3476                 HDA_BOOTVERBOSE(
3477                         device_printf(sc->dev,
3478                             "HDA_DEBUG: %s Soft PCM volume\n",
3479                             (softpcmvol == 1) ?
3480                             "Forcing" : "Enabling");
3481                 );
3482                 i = 0;
3483                 /*
3484                  * XXX Temporary quirk for STAC9220, until the parser
3485                  *     become smarter.
3486                  */
3487                 if (id == HDA_CODEC_STAC9220) {
3488                         mask |= SOUND_MASK_VOLUME;
3489                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3490                             NULL) {
3491                                 if (ctl->widget == NULL || ctl->enable == 0)
3492                                         continue;
3493                                 if (ctl->widget->nid == 11 && ctl->index == 0) {
3494                                         ctl->ossmask = SOUND_MASK_VOLUME;
3495                                         ctl->ossval = 100 | (100 << 8);
3496                                 } else
3497                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3498                         }
3499                 } else if (id == HDA_CODEC_STAC9221) {
3500                         mask |= SOUND_MASK_VOLUME;
3501                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3502                             NULL) {
3503                                 if (ctl->widget == NULL)
3504                                         continue;
3505                                 if (ctl->widget->type ==
3506                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
3507                                     ctl->index == 0 && (ctl->widget->nid == 2 ||
3508                                     ctl->widget->enable != 0)) {
3509                                         ctl->enable = 1;
3510                                         ctl->ossmask = SOUND_MASK_VOLUME;
3511                                         ctl->ossval = 100 | (100 << 8);
3512                                 } else if (ctl->enable == 0)
3513                                         continue;
3514                                 else
3515                                         ctl->ossmask &= ~SOUND_MASK_VOLUME;
3516                         }
3517                 } else {
3518                         mix_setparentchild(m, SOUND_MIXER_VOLUME,
3519                             SOUND_MASK_PCM);
3520                         if (!(mask & SOUND_MASK_VOLUME))
3521                                 mix_setrealdev(m, SOUND_MIXER_VOLUME,
3522                                     SOUND_MIXER_NONE);
3523                         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) !=
3524                             NULL) {
3525                                 if (ctl->widget == NULL || ctl->enable == 0)
3526                                         continue;
3527                                 if (!HDA_FLAG_MATCH(ctl->ossmask,
3528                                     SOUND_MASK_VOLUME | SOUND_MASK_PCM))
3529                                         continue;
3530                                 if (!(ctl->mute == 1 && ctl->step == 0))
3531                                         ctl->enable = 0;
3532                         }
3533                 }
3534         }
3535
3536         recmask &= ~(SOUND_MASK_PCM | SOUND_MASK_RECLEV | SOUND_MASK_SPEAKER |
3537             SOUND_MASK_BASS | SOUND_MASK_TREBLE | SOUND_MASK_IGAIN |
3538             SOUND_MASK_OGAIN);
3539         recmask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3540         mask &= (1 << SOUND_MIXER_NRDEVICES) - 1;
3541
3542         mix_setrecdevs(m, recmask);
3543         mix_setdevs(m, mask);
3544
3545         hdac_unlock(sc);
3546
3547         return (0);
3548 }
3549
3550 static int
3551 hdac_audio_ctl_ossmixer_set(struct snd_mixer *m, unsigned dev,
3552                                         unsigned left, unsigned right)
3553 {
3554         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3555         struct hdac_softc *sc = devinfo->codec->sc;
3556         struct hdac_widget *w;
3557         struct hdac_audio_ctl *ctl;
3558         uint32_t id, mute;
3559         int lvol, rvol, mlvol, mrvol;
3560         int i = 0;
3561
3562         hdac_lock(sc);
3563         if (dev == SOUND_MIXER_OGAIN) {
3564                 uint32_t orig;
3565                 /*if (left != right || !(left == 0 || left == 1)) {
3566                         hdac_unlock(sc);
3567                         return (-1);
3568                 }*/
3569                 id = hdac_codec_id(devinfo);
3570                 for (i = 0; i < HDAC_EAPD_SWITCH_LEN; i++) {
3571                         if (HDA_DEV_MATCH(hdac_eapd_switch[i].model,
3572                             sc->pci_subvendor) &&
3573                             hdac_eapd_switch[i].id == id)
3574                                 break;
3575                 }
3576                 if (i >= HDAC_EAPD_SWITCH_LEN) {
3577                         hdac_unlock(sc);
3578                         return (-1);
3579                 }
3580                 w = hdac_widget_get(devinfo, hdac_eapd_switch[i].eapdnid);
3581                 if (w == NULL ||
3582                     w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
3583                     w->param.eapdbtl == HDAC_INVALID) {
3584                         hdac_unlock(sc);
3585                         return (-1);
3586                 }
3587                 orig = w->param.eapdbtl;
3588                 if (left == 0)
3589                         w->param.eapdbtl &= ~HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3590                 else
3591                         w->param.eapdbtl |= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3592                 if (orig != w->param.eapdbtl) {
3593                         uint32_t val;
3594
3595                         if (hdac_eapd_switch[i].hp_switch != 0)
3596                                 hdac_hp_switch_handler(devinfo);
3597                         val = w->param.eapdbtl;
3598                         if (devinfo->function.audio.quirks & HDA_QUIRK_EAPDINV)
3599                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
3600                         hdac_command(sc,
3601                             HDA_CMD_SET_EAPD_BTL_ENABLE(devinfo->codec->cad,
3602                             w->nid, val), devinfo->codec->cad);
3603                 }
3604                 hdac_unlock(sc);
3605                 return (left | (left << 8));
3606         }
3607         if (dev == SOUND_MIXER_VOLUME)
3608                 devinfo->function.audio.mvol = left | (right << 8);
3609
3610         mlvol = devinfo->function.audio.mvol & 0x7f;
3611         mrvol = (devinfo->function.audio.mvol >> 8) & 0x7f;
3612         lvol = 0;
3613         rvol = 0;
3614
3615         i = 0;
3616         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
3617                 if (ctl->widget == NULL || ctl->enable == 0 ||
3618                     !(ctl->ossmask & (1 << dev)))
3619                         continue;
3620                 switch (dev) {
3621                 case SOUND_MIXER_VOLUME:
3622                         lvol = ((ctl->ossval & 0x7f) * left) / 100;
3623                         lvol = (lvol * ctl->step) / 100;
3624                         rvol = (((ctl->ossval >> 8) & 0x7f) * right) / 100;
3625                         rvol = (rvol * ctl->step) / 100;
3626                         break;
3627                 default:
3628                         if (ctl->ossmask & SOUND_MASK_VOLUME) {
3629                                 lvol = (left * mlvol) / 100;
3630                                 lvol = (lvol * ctl->step) / 100;
3631                                 rvol = (right * mrvol) / 100;
3632                                 rvol = (rvol * ctl->step) / 100;
3633                         } else {
3634                                 lvol = (left * ctl->step) / 100;
3635                                 rvol = (right * ctl->step) / 100;
3636                         }
3637                         ctl->ossval = left | (right << 8);
3638                         break;
3639                 }
3640                 mute = 0;
3641                 if (ctl->step < 1) {
3642                         mute |= (left == 0) ? HDA_AMP_MUTE_LEFT :
3643                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3644                         mute |= (right == 0) ? HDA_AMP_MUTE_RIGHT :
3645                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3646                 } else {
3647                         mute |= (lvol == 0) ? HDA_AMP_MUTE_LEFT :
3648                             (ctl->muted & HDA_AMP_MUTE_LEFT);
3649                         mute |= (rvol == 0) ? HDA_AMP_MUTE_RIGHT :
3650                             (ctl->muted & HDA_AMP_MUTE_RIGHT);
3651                 }
3652                 hdac_audio_ctl_amp_set(ctl, mute, lvol, rvol);
3653         }
3654         hdac_unlock(sc);
3655
3656         return (left | (right << 8));
3657 }
3658
3659 static int
3660 hdac_audio_ctl_ossmixer_setrecsrc(struct snd_mixer *m, uint32_t src)
3661 {
3662         struct hdac_devinfo *devinfo = mix_getdevinfo(m);
3663         struct hdac_widget *w, *cw;
3664         struct hdac_softc *sc = devinfo->codec->sc;
3665         uint32_t ret = src, target;
3666         int i, j;
3667
3668         target = 0;
3669         for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
3670                 if (src & (1 << i)) {
3671                         target = 1 << i;
3672                         break;
3673                 }
3674         }
3675
3676         hdac_lock(sc);
3677
3678         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
3679                 w = hdac_widget_get(devinfo, i);
3680                 if (w == NULL || w->enable == 0)
3681                         continue;
3682                 if (!(w->pflags & HDA_ADC_RECSEL))
3683                         continue;
3684                 for (j = 0; j < w->nconns; j++) {
3685                         cw = hdac_widget_get(devinfo, w->conns[j]);
3686                         if (cw == NULL || cw->enable == 0)
3687                                 continue;
3688                         if ((target == SOUND_MASK_VOLUME &&
3689                             cw->type !=
3690                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) ||
3691                             (target != SOUND_MASK_VOLUME &&
3692                             cw->type ==
3693                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER))
3694                                 continue;
3695                         if (cw->ctlflags & target) {
3696                                 if (!(w->pflags & HDA_ADC_LOCKED))
3697                                         hdac_widget_connection_select(w, j);
3698                                 ret = target;
3699                                 j += w->nconns;
3700                         }
3701                 }
3702         }
3703
3704         hdac_unlock(sc);
3705
3706         return (ret);
3707 }
3708
3709 static kobj_method_t hdac_audio_ctl_ossmixer_methods[] = {
3710         KOBJMETHOD(mixer_init,          hdac_audio_ctl_ossmixer_init),
3711         KOBJMETHOD(mixer_set,           hdac_audio_ctl_ossmixer_set),
3712         KOBJMETHOD(mixer_setrecsrc,     hdac_audio_ctl_ossmixer_setrecsrc),
3713         { 0, 0 }
3714 };
3715 MIXER_DECLARE(hdac_audio_ctl_ossmixer);
3716
3717 static void
3718 hdac_unsolq_task(void *context, int pending)
3719 {
3720         struct hdac_softc *sc;
3721
3722         sc = (struct hdac_softc *)context;
3723
3724         hdac_lock(sc);
3725         hdac_unsolq_flush(sc);
3726         hdac_unlock(sc);
3727 }
3728
3729 /****************************************************************************
3730  * int hdac_attach(device_t)
3731  *
3732  * Attach the device into the kernel. Interrupts usually won't be enabled
3733  * when this function is called. Setup everything that doesn't require
3734  * interrupts and defer probing of codecs until interrupts are enabled.
3735  ****************************************************************************/
3736 static int
3737 hdac_attach(device_t dev)
3738 {
3739         struct hdac_softc *sc;
3740         int result;
3741         int i;
3742         uint16_t vendor;
3743         uint8_t v;
3744
3745         sc = kmalloc(sizeof(*sc), M_DEVBUF, M_WAITOK | M_ZERO);
3746         sc->lock = snd_mtxcreate(device_get_nameunit(dev), HDAC_MTX_NAME);
3747         sc->dev = dev;
3748         sc->pci_subvendor = (uint32_t)pci_get_subdevice(sc->dev) << 16;
3749         sc->pci_subvendor |= (uint32_t)pci_get_subvendor(sc->dev) & 0x0000ffff;
3750         vendor = pci_get_vendor(dev);
3751
3752         if (sc->pci_subvendor == HP_NX6325_SUBVENDORX) {
3753                 /* Screw nx6325 - subdevice/subvendor swapped */
3754                 sc->pci_subvendor = HP_NX6325_SUBVENDOR;
3755         }
3756
3757         callout_init(&sc->poll_hda);
3758         callout_init(&sc->poll_hdac);
3759         callout_init(&sc->poll_jack);
3760
3761         TASK_INIT(&sc->unsolq_task, 0, hdac_unsolq_task, sc);
3762
3763         sc->poll_ticks = 1;
3764         sc->poll_ival = HDAC_POLL_INTERVAL;
3765         if (resource_int_value(device_get_name(dev),
3766             device_get_unit(dev), "polling", &i) == 0 && i != 0)
3767                 sc->polling = 1;
3768         else
3769                 sc->polling = 0;
3770
3771         sc->chan_size = pcm_getbuffersize(dev,
3772             HDA_BUFSZ_MIN, HDA_BUFSZ_DEFAULT, HDA_BUFSZ_MAX);
3773
3774         if (resource_int_value(device_get_name(dev),
3775             device_get_unit(dev), "blocksize", &i) == 0 && i > 0) {
3776                 i &= HDA_BLK_ALIGN;
3777                 if (i < HDA_BLK_MIN)
3778                         i = HDA_BLK_MIN;
3779                 sc->chan_blkcnt = sc->chan_size / i;
3780                 i = 0;
3781                 while (sc->chan_blkcnt >> i)
3782                         i++;
3783                 sc->chan_blkcnt = 1 << (i - 1);
3784                 if (sc->chan_blkcnt < HDA_BDL_MIN)
3785                         sc->chan_blkcnt = HDA_BDL_MIN;
3786                 else if (sc->chan_blkcnt > HDA_BDL_MAX)
3787                         sc->chan_blkcnt = HDA_BDL_MAX;
3788         } else
3789                 sc->chan_blkcnt = HDA_BDL_DEFAULT;
3790
3791         result = bus_dma_tag_create(NULL,       /* parent */
3792             HDAC_DMA_ALIGNMENT,                 /* alignment */
3793             0,                                  /* boundary */
3794             BUS_SPACE_MAXADDR_32BIT,            /* lowaddr */
3795             BUS_SPACE_MAXADDR,                  /* highaddr */
3796             NULL,                               /* filtfunc */
3797             NULL,                               /* fistfuncarg */
3798             sc->chan_size,                      /* maxsize */
3799             1,                                  /* nsegments */
3800             sc->chan_size,                      /* maxsegsz */
3801             0,                                  /* flags */
3802             &sc->chan_dmat);                    /* dmat */
3803         if (result != 0) {
3804                 device_printf(dev, "%s: bus_dma_tag_create failed (%x)\n",
3805                      __func__, result);
3806                 snd_mtxfree(sc->lock);
3807                 kfree(sc, M_DEVBUF);
3808                 return (ENXIO);
3809         }
3810
3811
3812         sc->hdabus = NULL;
3813         for (i = 0; i < HDAC_CODEC_MAX; i++)
3814                 sc->codecs[i] = NULL;
3815
3816         pci_enable_busmaster(dev);
3817
3818         if (vendor == INTEL_VENDORID) {
3819                 /* TCSEL -> TC0 */
3820                 v = pci_read_config(dev, 0x44, 1);
3821                 pci_write_config(dev, 0x44, v & 0xf8, 1);
3822                 HDA_BOOTVERBOSE(
3823                         device_printf(dev, "TCSEL: 0x%02d -> 0x%02d\n", v,
3824                             pci_read_config(dev, 0x44, 1));
3825                 );
3826         }
3827 #if 0 /* TODO: No MSI support yet in DragonFly. */
3828         if (resource_int_value(device_get_name(dev),
3829             device_get_unit(dev), "msi", &i) == 0 && i != 0 &&
3830             pci_msi_count(dev) == 1)
3831                 sc->flags |= HDAC_F_MSI;
3832         else
3833 #endif
3834                 sc->flags &= ~HDAC_F_MSI;
3835
3836 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3837         sc->flags |= HDAC_F_DMA_NOCACHE;
3838
3839         if (resource_int_value(device_get_name(dev),
3840             device_get_unit(dev), "snoop", &i) == 0 && i != 0) {
3841 #else
3842         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3843 #endif
3844                 /*
3845                  * Try to enable PCIe snoop to avoid messing around with
3846                  * uncacheable DMA attribute. Since PCIe snoop register
3847                  * config is pretty much vendor specific, there are no
3848                  * general solutions on how to enable it, forcing us (even
3849                  * Microsoft) to enable uncacheable or write combined DMA
3850                  * by default.
3851                  *
3852                  * http://msdn2.microsoft.com/en-us/library/ms790324.aspx
3853                  */
3854                 for (i = 0; i < HDAC_PCIESNOOP_LEN; i++) {
3855                         if (hdac_pcie_snoop[i].vendor != vendor)
3856                                 continue;
3857                         sc->flags &= ~HDAC_F_DMA_NOCACHE;
3858                         if (hdac_pcie_snoop[i].reg == 0x00)
3859                                 break;
3860                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3861                         if ((v & hdac_pcie_snoop[i].enable) ==
3862                             hdac_pcie_snoop[i].enable)
3863                                 break;
3864                         v &= hdac_pcie_snoop[i].mask;
3865                         v |= hdac_pcie_snoop[i].enable;
3866                         pci_write_config(dev, hdac_pcie_snoop[i].reg, v, 1);
3867                         v = pci_read_config(dev, hdac_pcie_snoop[i].reg, 1);
3868                         if ((v & hdac_pcie_snoop[i].enable) !=
3869                             hdac_pcie_snoop[i].enable) {
3870                                 HDA_BOOTVERBOSE(
3871                                         device_printf(dev,
3872                                             "WARNING: Failed to enable PCIe "
3873                                             "snoop!\n");
3874                                 );
3875 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3876                                 sc->flags |= HDAC_F_DMA_NOCACHE;
3877 #endif
3878                         }
3879                         break;
3880                 }
3881 #if 0 /* TODO: No uncacheable DMA support in DragonFly. */
3882         }
3883 #endif
3884
3885         HDA_BOOTVERBOSE(
3886                 device_printf(dev, "DMA Coherency: %s / vendor=0x%04x\n",
3887                     (sc->flags & HDAC_F_DMA_NOCACHE) ?
3888                     "Uncacheable" : "PCIe snoop", vendor);
3889         );
3890
3891         /* Allocate resources */
3892         result = hdac_mem_alloc(sc);
3893         if (result != 0)
3894                 goto hdac_attach_fail;
3895         result = hdac_irq_alloc(sc);
3896         if (result != 0)
3897                 goto hdac_attach_fail;
3898
3899         /* Get Capabilities */
3900         result = hdac_get_capabilities(sc);
3901         if (result != 0)
3902                 goto hdac_attach_fail;
3903
3904         /* Allocate CORB and RIRB dma memory */
3905         result = hdac_dma_alloc(sc, &sc->corb_dma,
3906             sc->corb_size * sizeof(uint32_t));
3907         if (result != 0)
3908                 goto hdac_attach_fail;
3909         result = hdac_dma_alloc(sc, &sc->rirb_dma,
3910             sc->rirb_size * sizeof(struct hdac_rirb));
3911         if (result != 0)
3912                 goto hdac_attach_fail;
3913
3914         /* Quiesce everything */
3915         hdac_reset(sc);
3916
3917         /* Initialize the CORB and RIRB */
3918         hdac_corb_init(sc);
3919         hdac_rirb_init(sc);
3920
3921         /* Defer remaining of initialization until interrupts are enabled */
3922         sc->intrhook.ich_func = hdac_attach2;
3923         sc->intrhook.ich_arg = (void *)sc;
3924         if (cold == 0 || config_intrhook_establish(&sc->intrhook) != 0) {
3925                 sc->intrhook.ich_func = NULL;
3926                 hdac_attach2((void *)sc);
3927         }
3928
3929         return (0);
3930
3931 hdac_attach_fail:
3932         hdac_irq_free(sc);
3933         hdac_dma_free(sc, &sc->rirb_dma);
3934         hdac_dma_free(sc, &sc->corb_dma);
3935         hdac_mem_free(sc);
3936         snd_mtxfree(sc->lock);
3937         kfree(sc, M_DEVBUF);
3938
3939         return (ENXIO);
3940 }
3941
3942 static void
3943 hdac_audio_parse(struct hdac_devinfo *devinfo)
3944 {
3945         struct hdac_softc *sc = devinfo->codec->sc;
3946         struct hdac_widget *w;
3947         uint32_t res;
3948         int i;
3949         nid_t cad, nid;
3950
3951         cad = devinfo->codec->cad;
3952         nid = devinfo->nid;
3953
3954         hdac_command(sc,
3955             HDA_CMD_SET_POWER_STATE(cad, nid, HDA_CMD_POWER_STATE_D0), cad);
3956
3957         DELAY(100);
3958
3959         res = hdac_command(sc,
3960             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_SUB_NODE_COUNT), cad);
3961
3962         devinfo->nodecnt = HDA_PARAM_SUB_NODE_COUNT_TOTAL(res);
3963         devinfo->startnode = HDA_PARAM_SUB_NODE_COUNT_START(res);
3964         devinfo->endnode = devinfo->startnode + devinfo->nodecnt;
3965
3966         res = hdac_command(sc,
3967             HDA_CMD_GET_PARAMETER(cad , nid, HDA_PARAM_GPIO_COUNT), cad);
3968         devinfo->function.audio.gpio = res;
3969
3970         HDA_BOOTVERBOSE(
3971                 device_printf(sc->dev, "       Vendor: 0x%08x\n",
3972                     devinfo->vendor_id);
3973                 device_printf(sc->dev, "       Device: 0x%08x\n",
3974                     devinfo->device_id);
3975                 device_printf(sc->dev, "     Revision: 0x%08x\n",
3976                     devinfo->revision_id);
3977                 device_printf(sc->dev, "     Stepping: 0x%08x\n",
3978                     devinfo->stepping_id);
3979                 device_printf(sc->dev, "PCI Subvendor: 0x%08x\n",
3980                     sc->pci_subvendor);
3981                 device_printf(sc->dev, "        Nodes: start=%d "
3982                     "endnode=%d total=%d\n",
3983                     devinfo->startnode, devinfo->endnode, devinfo->nodecnt);
3984                 device_printf(sc->dev, "    CORB size: %d\n", sc->corb_size);
3985                 device_printf(sc->dev, "    RIRB size: %d\n", sc->rirb_size);
3986                 device_printf(sc->dev, "      Streams: ISS=%d OSS=%d BSS=%d\n",
3987                     sc->num_iss, sc->num_oss, sc->num_bss);
3988                 device_printf(sc->dev, "         GPIO: 0x%08x\n",
3989                     devinfo->function.audio.gpio);
3990                 device_printf(sc->dev, "               NumGPIO=%d NumGPO=%d "
3991                     "NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
3992                     HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
3993                     HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
3994                     HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
3995                     HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
3996                     HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
3997         );
3998
3999         res = hdac_command(sc,
4000             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_STREAM_FORMATS),
4001             cad);
4002         devinfo->function.audio.supp_stream_formats = res;
4003
4004         res = hdac_command(sc,
4005             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_SUPP_PCM_SIZE_RATE),
4006             cad);
4007         devinfo->function.audio.supp_pcm_size_rate = res;
4008
4009         res = hdac_command(sc,
4010             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_OUTPUT_AMP_CAP),
4011             cad);
4012         devinfo->function.audio.outamp_cap = res;
4013
4014         res = hdac_command(sc,
4015             HDA_CMD_GET_PARAMETER(cad, nid, HDA_PARAM_INPUT_AMP_CAP),
4016             cad);
4017         devinfo->function.audio.inamp_cap = res;
4018
4019         if (devinfo->nodecnt > 0)
4020                 devinfo->widget = (struct hdac_widget *)kmalloc(
4021                     sizeof(*(devinfo->widget)) * devinfo->nodecnt, M_HDAC,
4022                     M_NOWAIT | M_ZERO);
4023         else
4024                 devinfo->widget = NULL;
4025
4026         if (devinfo->widget == NULL) {
4027                 device_printf(sc->dev, "unable to allocate widgets!\n");
4028                 devinfo->endnode = devinfo->startnode;
4029                 devinfo->nodecnt = 0;
4030                 return;
4031         }
4032
4033         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4034                 w = hdac_widget_get(devinfo, i);
4035                 if (w == NULL)
4036                         device_printf(sc->dev, "Ghost widget! nid=%d!\n", i);
4037                 else {
4038                         w->devinfo = devinfo;
4039                         w->nid = i;
4040                         w->enable = 1;
4041                         w->selconn = -1;
4042                         w->pflags = 0;
4043                         w->ctlflags = 0;
4044                         w->param.eapdbtl = HDAC_INVALID;
4045                         hdac_widget_parse(w);
4046                 }
4047         }
4048 }
4049
4050 static void
4051 hdac_audio_ctl_parse(struct hdac_devinfo *devinfo)
4052 {
4053         struct hdac_softc *sc = devinfo->codec->sc;
4054         struct hdac_audio_ctl *ctls;
4055         struct hdac_widget *w, *cw;
4056         int i, j, cnt, max, ocap, icap;
4057         int mute, offset, step, size;
4058
4059         /* XXX This is redundant */
4060         max = 0;
4061         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4062                 w = hdac_widget_get(devinfo, i);
4063                 if (w == NULL || w->enable == 0)
4064                         continue;
4065                 if (w->param.outamp_cap != 0)
4066                         max++;
4067                 if (w->param.inamp_cap != 0) {
4068                         switch (w->type) {
4069                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4070                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4071                                 for (j = 0; j < w->nconns; j++) {
4072                                         cw = hdac_widget_get(devinfo,
4073                                             w->conns[j]);
4074                                         if (cw == NULL || cw->enable == 0)
4075                                                 continue;
4076                                         max++;
4077                                 }
4078                                 break;
4079                         default:
4080                                 max++;
4081                                 break;
4082                         }
4083                 }
4084         }
4085
4086         devinfo->function.audio.ctlcnt = max;
4087
4088         if (max < 1)
4089                 return;
4090
4091         ctls = (struct hdac_audio_ctl *)kmalloc(
4092             sizeof(*ctls) * max, M_HDAC, M_ZERO | M_NOWAIT);
4093
4094         if (ctls == NULL) {
4095                 /* Blekh! */
4096                 device_printf(sc->dev, "unable to allocate ctls!\n");
4097                 devinfo->function.audio.ctlcnt = 0;
4098                 return;
4099         }
4100
4101         cnt = 0;
4102         for (i = devinfo->startnode; cnt < max && i < devinfo->endnode; i++) {
4103                 if (cnt >= max) {
4104                         device_printf(sc->dev, "%s: Ctl overflow!\n",
4105                             __func__);
4106                         break;
4107                 }
4108                 w = hdac_widget_get(devinfo, i);
4109                 if (w == NULL || w->enable == 0)
4110                         continue;
4111                 ocap = w->param.outamp_cap;
4112                 icap = w->param.inamp_cap;
4113                 if (ocap != 0) {
4114                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(ocap);
4115                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(ocap);
4116                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(ocap);
4117                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(ocap);
4118                         /*if (offset > step) {
4119                                 HDA_BOOTVERBOSE(
4120                                         device_printf(sc->dev,
4121                                             "HDA_DEBUG: BUGGY outamp: nid=%d "
4122                                             "[offset=%d > step=%d]\n",
4123                                             w->nid, offset, step);
4124                                 );
4125                                 offset = step;
4126                         }*/
4127                         ctls[cnt].enable = 1;
4128                         ctls[cnt].widget = w;
4129                         ctls[cnt].mute = mute;
4130                         ctls[cnt].step = step;
4131                         ctls[cnt].size = size;
4132                         ctls[cnt].offset = offset;
4133                         ctls[cnt].left = offset;
4134                         ctls[cnt].right = offset;
4135                         ctls[cnt++].dir = HDA_CTL_OUT;
4136                 }
4137
4138                 if (icap != 0) {
4139                         mute = HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(icap);
4140                         step = HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(icap);
4141                         size = HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(icap);
4142                         offset = HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(icap);
4143                         /*if (offset > step) {
4144                                 HDA_BOOTVERBOSE(
4145                                         device_printf(sc->dev,
4146                                             "HDA_DEBUG: BUGGY inamp: nid=%d "
4147                                             "[offset=%d > step=%d]\n",
4148                                             w->nid, offset, step);
4149                                 );
4150                                 offset = step;
4151                         }*/
4152                         switch (w->type) {
4153                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4154                         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4155                                 for (j = 0; j < w->nconns; j++) {
4156                                         if (cnt >= max) {
4157                                                 device_printf(sc->dev,
4158                                                     "%s: Ctl overflow!\n",
4159                                                     __func__);
4160                                                 break;
4161                                         }
4162                                         cw = hdac_widget_get(devinfo,
4163                                             w->conns[j]);
4164                                         if (cw == NULL || cw->enable == 0)
4165                                                 continue;
4166                                         ctls[cnt].enable = 1;
4167                                         ctls[cnt].widget = w;
4168                                         ctls[cnt].childwidget = cw;
4169                                         ctls[cnt].index = j;
4170                                         ctls[cnt].mute = mute;
4171                                         ctls[cnt].step = step;
4172                                         ctls[cnt].size = size;
4173                                         ctls[cnt].offset = offset;
4174                                         ctls[cnt].left = offset;
4175                                         ctls[cnt].right = offset;
4176                                         ctls[cnt++].dir = HDA_CTL_IN;
4177                                 }
4178                                 break;
4179                         default:
4180                                 if (cnt >= max) {
4181                                         device_printf(sc->dev,
4182                                             "%s: Ctl overflow!\n",
4183                                             __func__);
4184                                         break;
4185                                 }
4186                                 ctls[cnt].enable = 1;
4187                                 ctls[cnt].widget = w;
4188                                 ctls[cnt].mute = mute;
4189                                 ctls[cnt].step = step;
4190                                 ctls[cnt].size = size;
4191                                 ctls[cnt].offset = offset;
4192                                 ctls[cnt].left = offset;
4193                                 ctls[cnt].right = offset;
4194                                 ctls[cnt++].dir = HDA_CTL_IN;
4195                                 break;
4196                         }
4197                 }
4198         }
4199
4200         devinfo->function.audio.ctl = ctls;
4201 }
4202
4203 static const struct {
4204         uint32_t model;
4205         uint32_t id;
4206         uint32_t set, unset;
4207 } hdac_quirks[] = {
4208         /*
4209          * XXX Force stereo quirk. Monoural recording / playback
4210          *     on few codecs (especially ALC880) seems broken or
4211          *     perhaps unsupported.
4212          */
4213         { HDA_MATCH_ALL, HDA_MATCH_ALL,
4214             HDA_QUIRK_FORCESTEREO | HDA_QUIRK_IVREF, 0 },
4215         { ACER_ALL_SUBVENDOR, HDA_MATCH_ALL,
4216             HDA_QUIRK_GPIO0, 0 },
4217         { ASUS_M5200_SUBVENDOR, HDA_CODEC_ALC880,
4218             HDA_QUIRK_GPIO0, 0 },
4219         { ASUS_A7M_SUBVENDOR, HDA_CODEC_ALC880,
4220             HDA_QUIRK_GPIO0, 0 },
4221         { ASUS_A7T_SUBVENDOR, HDA_CODEC_ALC882,
4222             HDA_QUIRK_GPIO0, 0 },
4223         { ASUS_W2J_SUBVENDOR, HDA_CODEC_ALC882,
4224             HDA_QUIRK_GPIO0, 0 },
4225         { ASUS_U5F_SUBVENDOR, HDA_CODEC_AD1986A,
4226             HDA_QUIRK_EAPDINV, 0 },
4227         { ASUS_A8JC_SUBVENDOR, HDA_CODEC_AD1986A,
4228             HDA_QUIRK_EAPDINV, 0 },
4229         { ASUS_F3JC_SUBVENDOR, HDA_CODEC_ALC861,
4230             HDA_QUIRK_OVREF, 0 },
4231         { ASUS_W6F_SUBVENDOR, HDA_CODEC_ALC861,
4232             HDA_QUIRK_OVREF, 0 },
4233         { UNIWILL_9075_SUBVENDOR, HDA_CODEC_ALC861,
4234             HDA_QUIRK_OVREF, 0 },
4235         /*{ ASUS_M2N_SUBVENDOR, HDA_CODEC_AD1988,
4236             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },*/
4237         { MEDION_MD95257_SUBVENDOR, HDA_CODEC_ALC880,
4238             HDA_QUIRK_GPIO1, 0 },
4239         { LENOVO_3KN100_SUBVENDOR, HDA_CODEC_AD1986A,
4240             HDA_QUIRK_EAPDINV, 0 },
4241         { SAMSUNG_Q1_SUBVENDOR, HDA_CODEC_AD1986A,
4242             HDA_QUIRK_EAPDINV, 0 },
4243         { APPLE_MB3_SUBVENDOR, HDA_CODEC_ALC885,
4244             HDA_QUIRK_GPIO0 | HDA_QUIRK_OVREF50, 0},
4245         { APPLE_INTEL_MAC, HDA_CODEC_STAC9221,
4246             HDA_QUIRK_GPIO0 | HDA_QUIRK_GPIO1, 0 },
4247         { HDA_MATCH_ALL, HDA_CODEC_AD1988,
4248             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4249         { HDA_MATCH_ALL, HDA_CODEC_AD1988B,
4250             HDA_QUIRK_IVREF80, HDA_QUIRK_IVREF50 | HDA_QUIRK_IVREF100 },
4251         { HDA_MATCH_ALL, HDA_CODEC_CXVENICE,
4252             0, HDA_QUIRK_FORCESTEREO },
4253         { HDA_MATCH_ALL, HDA_CODEC_STACXXXX,
4254             HDA_QUIRK_SOFTPCMVOL, 0 }
4255 };
4256 #define HDAC_QUIRKS_LEN (sizeof(hdac_quirks) / sizeof(hdac_quirks[0]))
4257
4258 static void
4259 hdac_vendor_patch_parse(struct hdac_devinfo *devinfo)
4260 {
4261         struct hdac_widget *w;
4262         struct hdac_audio_ctl *ctl;
4263         uint32_t id, subvendor;
4264         int i;
4265
4266         id = hdac_codec_id(devinfo);
4267         subvendor = devinfo->codec->sc->pci_subvendor;
4268
4269         /*
4270          * Quirks
4271          */
4272         for (i = 0; i < HDAC_QUIRKS_LEN; i++) {
4273                 if (!(HDA_DEV_MATCH(hdac_quirks[i].model, subvendor) &&
4274                     HDA_DEV_MATCH(hdac_quirks[i].id, id)))
4275                         continue;
4276                 if (hdac_quirks[i].set != 0)
4277                         devinfo->function.audio.quirks |=
4278                             hdac_quirks[i].set;
4279                 if (hdac_quirks[i].unset != 0)
4280                         devinfo->function.audio.quirks &=
4281                             ~(hdac_quirks[i].unset);
4282         }
4283
4284         switch (id) {
4285         case HDA_CODEC_ALC260:
4286                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4287                         w = hdac_widget_get(devinfo, i);
4288                         if (w == NULL || w->enable == 0)
4289                                 continue;
4290                         if (w->type !=
4291                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
4292                                 continue;
4293                         if (w->nid != 5)
4294                                 w->enable = 0;
4295                 }
4296                 if (subvendor == HP_XW4300_SUBVENDOR) {
4297                         ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4298                         if (ctl != NULL && ctl->widget != NULL) {
4299                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4300                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4301                         }
4302                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4303                         if (ctl != NULL && ctl->widget != NULL) {
4304                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4305                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4306                         }
4307                 } else if (subvendor == HP_3010_SUBVENDOR) {
4308                         ctl = hdac_audio_ctl_amp_get(devinfo, 17, 0, 1);
4309                         if (ctl != NULL && ctl->widget != NULL) {
4310                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4311                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4312                         }
4313                         ctl = hdac_audio_ctl_amp_get(devinfo, 21, 0, 1);
4314                         if (ctl != NULL && ctl->widget != NULL) {
4315                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4316                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4317                         }
4318                 }
4319                 break;
4320         case HDA_CODEC_ALC268:
4321                 if (HDA_DEV_MATCH(ACER_ALL_SUBVENDOR, subvendor)) {
4322                         w = hdac_widget_get(devinfo, 29);
4323                         if (w != NULL) {
4324                                 w->enable = 1;
4325                                 w->type =
4326                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4327                                 w->param.widget_cap &=
4328                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4329                                 w->param.widget_cap |=
4330                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4331                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4332                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4333                         }
4334                 }
4335                 break;
4336         case HDA_CODEC_ALC262:
4337                 if (subvendor == HP_DC7700_SUBVENDOR) {
4338                         ctl = hdac_audio_ctl_amp_get(devinfo, 22, 0, 1);
4339                         if (ctl != NULL && ctl->widget != NULL) {
4340                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4341                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4342                         }
4343                         ctl = hdac_audio_ctl_amp_get(devinfo, 27, 0, 1);
4344                         if (ctl != NULL && ctl->widget != NULL) {
4345                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4346                                 ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4347                         }
4348                 }
4349                 break;
4350         case HDA_CODEC_ALC861:
4351                 ctl = hdac_audio_ctl_amp_get(devinfo, 21, 2, 1);
4352                 if (ctl != NULL)
4353                         ctl->muted = HDA_AMP_MUTE_ALL;
4354                 break;
4355         case HDA_CODEC_ALC880:
4356                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4357                         w = hdac_widget_get(devinfo, i);
4358                         if (w == NULL || w->enable == 0)
4359                                 continue;
4360                         if (w->type ==
4361                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4362                             w->nid != 9 && w->nid != 29) {
4363                                         w->enable = 0;
4364                         } else if (w->type !=
4365                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET &&
4366                             w->nid == 29) {
4367                                 w->type =
4368                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET;
4369                                 w->param.widget_cap &=
4370                                     ~HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_MASK;
4371                                 w->param.widget_cap |=
4372                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET <<
4373                                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_SHIFT;
4374                                 strlcpy(w->name, "beep widget", sizeof(w->name));
4375                         }
4376                 }
4377                 break;
4378         case HDA_CODEC_ALC883:
4379                 /*
4380                  * nid: 24/25 = External (jack) or Internal (fixed) Mic.
4381                  *              Clear vref cap for jack connectivity.
4382                  */
4383                 w = hdac_widget_get(devinfo, 24);
4384                 if (w != NULL && w->enable != 0 && w->type ==
4385                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4386                     (w->wclass.pin.config &
4387                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4388                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4389                         w->wclass.pin.cap &= ~(
4390                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4391                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4392                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4393                 w = hdac_widget_get(devinfo, 25);
4394                 if (w != NULL && w->enable != 0 && w->type ==
4395                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4396                     (w->wclass.pin.config &
4397                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
4398                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_JACK)
4399                         w->wclass.pin.cap &= ~(
4400                             HDA_PARAM_PIN_CAP_VREF_CTRL_100_MASK |
4401                             HDA_PARAM_PIN_CAP_VREF_CTRL_80_MASK |
4402                             HDA_PARAM_PIN_CAP_VREF_CTRL_50_MASK);
4403                 /*
4404                  * nid: 26 = Line-in, leave it alone.
4405                  */
4406                 break;
4407         case HDA_CODEC_AD1981HD:
4408                 w = hdac_widget_get(devinfo, 11);
4409                 if (w != NULL && w->enable != 0 && w->nconns > 3)
4410                         w->selconn = 3;
4411                 if (subvendor == IBM_M52_SUBVENDOR) {
4412                         ctl = hdac_audio_ctl_amp_get(devinfo, 7, 0, 1);
4413                         if (ctl != NULL)
4414                                 ctl->ossmask = SOUND_MASK_SPEAKER;
4415                 }
4416                 break;
4417         case HDA_CODEC_AD1986A:
4418                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4419                         w = hdac_widget_get(devinfo, i);
4420                         if (w == NULL || w->enable == 0)
4421                                 continue;
4422                         if (w->type !=
4423                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4424                                 continue;
4425                         if (w->nid != 3)
4426                                 w->enable = 0;
4427                 }
4428                 if (subvendor == ASUS_M2NPVMX_SUBVENDOR ||
4429                     subvendor == ASUS_A8NVMCSM_SUBVENDOR) {
4430                         /* nid 28 is mic, nid 29 is line-in */
4431                         w = hdac_widget_get(devinfo, 15);
4432                         if (w != NULL)
4433                                 w->selconn = 2;
4434                         w = hdac_widget_get(devinfo, 16);
4435                         if (w != NULL)
4436                                 w->selconn = 1;
4437                 }
4438                 break;
4439         case HDA_CODEC_AD1988:
4440         case HDA_CODEC_AD1988B:
4441                 /*w = hdac_widget_get(devinfo, 12);
4442                 if (w != NULL) {
4443                         w->selconn = 1;
4444                         w->pflags |= HDA_ADC_LOCKED;
4445                 }
4446                 w = hdac_widget_get(devinfo, 13);
4447                 if (w != NULL) {
4448                         w->selconn = 4;
4449                         w->pflags |= HDA_ADC_LOCKED;
4450                 }
4451                 w = hdac_widget_get(devinfo, 14);
4452                 if (w != NULL) {
4453                         w->selconn = 2;
4454                         w->pflags |= HDA_ADC_LOCKED;
4455                 }*/
4456                 ctl = hdac_audio_ctl_amp_get(devinfo, 57, 0, 1);
4457                 if (ctl != NULL) {
4458                         ctl->ossmask = SOUND_MASK_IGAIN;
4459                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4460                 }
4461                 ctl = hdac_audio_ctl_amp_get(devinfo, 58, 0, 1);
4462                 if (ctl != NULL) {
4463                         ctl->ossmask = SOUND_MASK_IGAIN;
4464                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4465                 }
4466                 ctl = hdac_audio_ctl_amp_get(devinfo, 60, 0, 1);
4467                 if (ctl != NULL) {
4468                         ctl->ossmask = SOUND_MASK_IGAIN;
4469                         ctl->widget->ctlflags |= SOUND_MASK_IGAIN;
4470                 }
4471                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 0, 1);
4472                 if (ctl != NULL) {
4473                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4474                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4475                 }
4476                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 4, 1);
4477                 if (ctl != NULL) {
4478                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4479                         ctl->widget->ctlflags |= SOUND_MASK_MIC;
4480                 }
4481                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 1, 1);
4482                 if (ctl != NULL) {
4483                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4484                         ctl->widget->ctlflags |= SOUND_MASK_LINE;
4485                 }
4486                 ctl = hdac_audio_ctl_amp_get(devinfo, 32, 7, 1);
4487                 if (ctl != NULL) {
4488                         ctl->ossmask = SOUND_MASK_SPEAKER | SOUND_MASK_VOLUME;
4489                         ctl->widget->ctlflags |= SOUND_MASK_SPEAKER;
4490                 }
4491                 break;
4492         case HDA_CODEC_STAC9221:
4493                 /*
4494                  * Dell XPS M1210 need all DACs for each output jacks
4495                  */
4496                 if (subvendor == DELL_XPSM1210_SUBVENDOR)
4497                         break;
4498                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4499                         w = hdac_widget_get(devinfo, i);
4500                         if (w == NULL || w->enable == 0)
4501                                 continue;
4502                         if (w->type !=
4503                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT)
4504                                 continue;
4505                         if (w->nid != 2)
4506                                 w->enable = 0;
4507                 }
4508                 break;
4509         case HDA_CODEC_STAC9221D:
4510                 for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4511                         w = hdac_widget_get(devinfo, i);
4512                         if (w == NULL || w->enable == 0)
4513                                 continue;
4514                         if (w->type ==
4515                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
4516                             w->nid != 6)
4517                                 w->enable = 0;
4518
4519                 }
4520                 break;
4521         case HDA_CODEC_STAC9227:
4522                 w = hdac_widget_get(devinfo, 8);
4523                 if (w != NULL)
4524                         w->enable = 0;
4525                 w = hdac_widget_get(devinfo, 9);
4526                 if (w != NULL)
4527                         w->enable = 0;
4528                 break;
4529         case HDA_CODEC_CXWAIKIKI:
4530                 if (subvendor == HP_DV5000_SUBVENDOR) {
4531                         w = hdac_widget_get(devinfo, 27);
4532                         if (w != NULL)
4533                                 w->enable = 0;
4534                 }
4535                 ctl = hdac_audio_ctl_amp_get(devinfo, 16, 0, 1);
4536                 if (ctl != NULL)
4537                         ctl->ossmask = SOUND_MASK_SKIP;
4538                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 0, 1);
4539                 if (ctl != NULL && ctl->childwidget != NULL &&
4540                     ctl->childwidget->enable != 0) {
4541                         ctl->ossmask = SOUND_MASK_PCM | SOUND_MASK_VOLUME;
4542                         ctl->childwidget->ctlflags |= SOUND_MASK_PCM;
4543                 }
4544                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 1, 1);
4545                 if (ctl != NULL && ctl->childwidget != NULL &&
4546                     ctl->childwidget->enable != 0) {
4547                         ctl->ossmask = SOUND_MASK_LINE | SOUND_MASK_VOLUME;
4548                         ctl->childwidget->ctlflags |= SOUND_MASK_LINE;
4549                 }
4550                 ctl = hdac_audio_ctl_amp_get(devinfo, 25, 2, 1);
4551                 if (ctl != NULL && ctl->childwidget != NULL &&
4552                     ctl->childwidget->enable != 0) {
4553                         ctl->ossmask = SOUND_MASK_MIC | SOUND_MASK_VOLUME;
4554                         ctl->childwidget->ctlflags |= SOUND_MASK_MIC;
4555                 }
4556                 ctl = hdac_audio_ctl_amp_get(devinfo, 26, 0, 1);
4557                 if (ctl != NULL) {
4558                         ctl->ossmask = SOUND_MASK_SKIP;
4559                         /* XXX mixer \=rec mic broken.. why?!? */
4560                         /* ctl->widget->ctlflags |= SOUND_MASK_MIC; */
4561                 }
4562                 break;
4563         default:
4564                 break;
4565         }
4566 }
4567
4568 static int
4569 hdac_audio_ctl_ossmixer_getnextdev(struct hdac_devinfo *devinfo)
4570 {
4571         int *dev = &devinfo->function.audio.ossidx;
4572
4573         while (*dev < SOUND_MIXER_NRDEVICES) {
4574                 switch (*dev) {
4575                 case SOUND_MIXER_VOLUME:
4576                 case SOUND_MIXER_BASS:
4577                 case SOUND_MIXER_TREBLE:
4578                 case SOUND_MIXER_PCM:
4579                 case SOUND_MIXER_SPEAKER:
4580                 case SOUND_MIXER_LINE:
4581                 case SOUND_MIXER_MIC:
4582                 case SOUND_MIXER_CD:
4583                 case SOUND_MIXER_RECLEV:
4584                 case SOUND_MIXER_IGAIN:
4585                 case SOUND_MIXER_OGAIN: /* reserved for EAPD switch */
4586                         (*dev)++;
4587                         break;
4588                 default:
4589                         return (*dev)++;
4590                         break;
4591                 }
4592         }
4593
4594         return (-1);
4595 }
4596
4597 static int
4598 hdac_widget_find_dac_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4599 {
4600         struct hdac_widget *w;
4601         int i, ret = 0;
4602
4603         if (depth > HDA_PARSE_MAXDEPTH)
4604                 return (0);
4605         w = hdac_widget_get(devinfo, nid);
4606         if (w == NULL || w->enable == 0)
4607                 return (0);
4608         switch (w->type) {
4609         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT:
4610                 w->pflags |= HDA_DAC_PATH;
4611                 ret = 1;
4612                 break;
4613         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4614         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4615                 for (i = 0; i < w->nconns; i++) {
4616                         if (hdac_widget_find_dac_path(devinfo,
4617                             w->conns[i], depth + 1) != 0) {
4618                                 if (w->selconn == -1)
4619                                         w->selconn = i;
4620                                 ret = 1;
4621                                 w->pflags |= HDA_DAC_PATH;
4622                         }
4623                 }
4624                 break;
4625         default:
4626                 break;
4627         }
4628         return (ret);
4629 }
4630
4631 static int
4632 hdac_widget_find_adc_path(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4633 {
4634         struct hdac_widget *w;
4635         int i, conndev, ret = 0;
4636
4637         if (depth > HDA_PARSE_MAXDEPTH)
4638                 return (0);
4639         w = hdac_widget_get(devinfo, nid);
4640         if (w == NULL || w->enable == 0)
4641                 return (0);
4642         switch (w->type) {
4643         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT:
4644         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR:
4645         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4646                 for (i = 0; i < w->nconns; i++) {
4647                         if (hdac_widget_find_adc_path(devinfo, w->conns[i],
4648                             depth + 1) != 0) {
4649                                 if (w->selconn == -1)
4650                                         w->selconn = i;
4651                                 w->pflags |= HDA_ADC_PATH;
4652                                 ret = 1;
4653                         }
4654                 }
4655                 break;
4656         case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX:
4657                 conndev = w->wclass.pin.config &
4658                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4659                 if (HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4660                     (conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_CD ||
4661                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN ||
4662                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN)) {
4663                         w->pflags |= HDA_ADC_PATH;
4664                         ret = 1;
4665                 }
4666                 break;
4667         /*case HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER:
4668                 if (w->pflags & HDA_DAC_PATH) {
4669                         w->pflags |= HDA_ADC_PATH;
4670                         ret = 1;
4671                 }
4672                 break;*/
4673         default:
4674                 break;
4675         }
4676         return (ret);
4677 }
4678
4679 static uint32_t
4680 hdac_audio_ctl_outamp_build(struct hdac_devinfo *devinfo,
4681                                 nid_t nid, nid_t pnid, int index, int depth)
4682 {
4683         struct hdac_widget *w, *pw;
4684         struct hdac_audio_ctl *ctl;
4685         uint32_t fl = 0;
4686         int i, ossdev, conndev, strategy;
4687
4688         if (depth > HDA_PARSE_MAXDEPTH)
4689                 return (0);
4690
4691         w = hdac_widget_get(devinfo, nid);
4692         if (w == NULL || w->enable == 0)
4693                 return (0);
4694
4695         pw = hdac_widget_get(devinfo, pnid);
4696         strategy = devinfo->function.audio.parsing_strategy;
4697
4698         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER
4699             || w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR) {
4700                 for (i = 0; i < w->nconns; i++) {
4701                         fl |= hdac_audio_ctl_outamp_build(devinfo, w->conns[i],
4702                             w->nid, i, depth + 1);
4703                 }
4704                 w->ctlflags |= fl;
4705                 return (fl);
4706         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT &&
4707             (w->pflags & HDA_DAC_PATH)) {
4708                 i = 0;
4709                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4710                         if (ctl->enable == 0 || ctl->widget == NULL)
4711                                 continue;
4712                         /* XXX This should be compressed! */
4713                         if (((ctl->widget->nid == w->nid) ||
4714                             (ctl->widget->nid == pnid && ctl->index == index &&
4715                             (ctl->dir & HDA_CTL_IN)) ||
4716                             (ctl->widget->nid == pnid && pw != NULL &&
4717                             pw->type ==
4718                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4719                             (pw->nconns < 2 || pw->selconn == index ||
4720                             pw->selconn == -1) &&
4721                             (ctl->dir & HDA_CTL_OUT)) ||
4722                             (strategy == HDA_PARSE_DIRECT &&
4723                             ctl->widget->nid == w->nid)) &&
4724                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4725                                 /*if (pw != NULL && pw->selconn == -1)
4726                                         pw->selconn = index;
4727                                 fl |= SOUND_MASK_VOLUME;
4728                                 fl |= SOUND_MASK_PCM;
4729                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4730                                 ctl->ossmask |= SOUND_MASK_PCM;
4731                                 ctl->ossdev = SOUND_MIXER_PCM;*/
4732                                 if (!(w->ctlflags & SOUND_MASK_PCM) ||
4733                                     (pw != NULL &&
4734                                     !(pw->ctlflags & SOUND_MASK_PCM))) {
4735                                         fl |= SOUND_MASK_VOLUME;
4736                                         fl |= SOUND_MASK_PCM;
4737                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4738                                         ctl->ossmask |= SOUND_MASK_PCM;
4739                                         ctl->ossdev = SOUND_MIXER_PCM;
4740                                         w->ctlflags |= SOUND_MASK_VOLUME;
4741                                         w->ctlflags |= SOUND_MASK_PCM;
4742                                         if (pw != NULL) {
4743                                                 if (pw->selconn == -1)
4744                                                         pw->selconn = index;
4745                                                 pw->ctlflags |=
4746                                                     SOUND_MASK_VOLUME;
4747                                                 pw->ctlflags |=
4748                                                     SOUND_MASK_PCM;
4749                                         }
4750                                 }
4751                         }
4752                 }
4753                 w->ctlflags |= fl;
4754                 return (fl);
4755         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
4756             HDA_PARAM_PIN_CAP_INPUT_CAP(w->wclass.pin.cap) &&
4757             (w->pflags & HDA_ADC_PATH)) {
4758                 conndev = w->wclass.pin.config &
4759                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4760                 i = 0;
4761                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4762                         if (ctl->enable == 0 || ctl->widget == NULL)
4763                                 continue;
4764                         /* XXX This should be compressed! */
4765                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4766                             (ctl->dir & HDA_CTL_IN)) ||
4767                             (ctl->widget->nid == pnid && pw != NULL &&
4768                             pw->type ==
4769                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4770                             (pw->nconns < 2 || pw->selconn == index ||
4771                             pw->selconn == -1) &&
4772                             (ctl->dir & HDA_CTL_OUT)) ||
4773                             (strategy == HDA_PARSE_DIRECT &&
4774                             ctl->widget->nid == w->nid)) &&
4775                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4776                                 if (pw != NULL && pw->selconn == -1)
4777                                         pw->selconn = index;
4778                                 ossdev = 0;
4779                                 switch (conndev) {
4780                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_MIC_IN:
4781                                         ossdev = SOUND_MIXER_MIC;
4782                                         break;
4783                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_IN:
4784                                         ossdev = SOUND_MIXER_LINE;
4785                                         break;
4786                                 case HDA_CONFIG_DEFAULTCONF_DEVICE_CD:
4787                                         ossdev = SOUND_MIXER_CD;
4788                                         break;
4789                                 default:
4790                                         ossdev =
4791                                             hdac_audio_ctl_ossmixer_getnextdev(
4792                                             devinfo);
4793                                         if (ossdev < 0)
4794                                                 ossdev = 0;
4795                                         break;
4796                                 }
4797                                 if (strategy == HDA_PARSE_MIXER) {
4798                                         fl |= SOUND_MASK_VOLUME;
4799                                         ctl->ossmask |= SOUND_MASK_VOLUME;
4800                                 }
4801                                 fl |= 1 << ossdev;
4802                                 ctl->ossmask |= 1 << ossdev;
4803                                 ctl->ossdev = ossdev;
4804                         }
4805                 }
4806                 w->ctlflags |= fl;
4807                 return (fl);
4808         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
4809                 i = 0;
4810                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4811                         if (ctl->enable == 0 || ctl->widget == NULL)
4812                                 continue;
4813                         /* XXX This should be compressed! */
4814                         if (((ctl->widget->nid == pnid && ctl->index == index &&
4815                             (ctl->dir & HDA_CTL_IN)) ||
4816                             (ctl->widget->nid == pnid && pw != NULL &&
4817                             pw->type ==
4818                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR &&
4819                             (pw->nconns < 2 || pw->selconn == index ||
4820                             pw->selconn == -1) &&
4821                             (ctl->dir & HDA_CTL_OUT)) ||
4822                             (strategy == HDA_PARSE_DIRECT &&
4823                             ctl->widget->nid == w->nid)) &&
4824                             !(ctl->ossmask & ~SOUND_MASK_VOLUME)) {
4825                                 if (pw != NULL && pw->selconn == -1)
4826                                         pw->selconn = index;
4827                                 fl |= SOUND_MASK_VOLUME;
4828                                 fl |= SOUND_MASK_SPEAKER;
4829                                 ctl->ossmask |= SOUND_MASK_VOLUME;
4830                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
4831                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
4832                         }
4833                 }
4834                 w->ctlflags |= fl;
4835                 return (fl);
4836         }
4837         return (0);
4838 }
4839
4840 static uint32_t
4841 hdac_audio_ctl_inamp_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4842 {
4843         struct hdac_widget *w, *cw;
4844         struct hdac_audio_ctl *ctl;
4845         uint32_t fl;
4846         int i;
4847
4848         if (depth > HDA_PARSE_MAXDEPTH)
4849                 return (0);
4850
4851         w = hdac_widget_get(devinfo, nid);
4852         if (w == NULL || w->enable == 0)
4853                 return (0);
4854         /*if (!(w->pflags & HDA_ADC_PATH))
4855                 return (0);
4856         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4857             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4858                 return (0);*/
4859         i = 0;
4860         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
4861                 if (ctl->enable == 0 || ctl->widget == NULL)
4862                         continue;
4863                 if (ctl->widget->nid == nid) {
4864                         ctl->ossmask |= SOUND_MASK_RECLEV;
4865                         w->ctlflags |= SOUND_MASK_RECLEV;
4866                         return (SOUND_MASK_RECLEV);
4867                 }
4868         }
4869         for (i = 0; i < w->nconns; i++) {
4870                 cw = hdac_widget_get(devinfo, w->conns[i]);
4871                 if (cw == NULL || cw->enable == 0)
4872                         continue;
4873                 if (cw->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
4874                         continue;
4875                 fl = hdac_audio_ctl_inamp_build(devinfo, cw->nid, depth + 1);
4876                 if (fl != 0) {
4877                         cw->ctlflags |= fl;
4878                         w->ctlflags |= fl;
4879                         return (fl);
4880                 }
4881         }
4882         return (0);
4883 }
4884
4885 static int
4886 hdac_audio_ctl_recsel_build(struct hdac_devinfo *devinfo, nid_t nid, int depth)
4887 {
4888         struct hdac_widget *w, *cw;
4889         int i, child = 0;
4890
4891         if (depth > HDA_PARSE_MAXDEPTH)
4892                 return (0);
4893
4894         w = hdac_widget_get(devinfo, nid);
4895         if (w == NULL || w->enable == 0)
4896                 return (0);
4897         /*if (!(w->pflags & HDA_ADC_PATH))
4898                 return (0);
4899         if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT ||
4900             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4901                 return (0);*/
4902         /* XXX weak! */
4903         for (i = 0; i < w->nconns; i++) {
4904                 cw = hdac_widget_get(devinfo, w->conns[i]);
4905                 if (cw == NULL)
4906                         continue;
4907                 if (++child > 1) {
4908                         w->pflags |= HDA_ADC_RECSEL;
4909                         return (1);
4910                 }
4911         }
4912         for (i = 0; i < w->nconns; i++) {
4913                 if (hdac_audio_ctl_recsel_build(devinfo,
4914                     w->conns[i], depth + 1) != 0)
4915                         return (1);
4916         }
4917         return (0);
4918 }
4919
4920 static int
4921 hdac_audio_build_tree_strategy(struct hdac_devinfo *devinfo)
4922 {
4923         struct hdac_widget *w, *cw;
4924         int i, j, conndev, found_dac = 0;
4925         int strategy;
4926
4927         strategy = devinfo->function.audio.parsing_strategy;
4928
4929         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
4930                 w = hdac_widget_get(devinfo, i);
4931                 if (w == NULL || w->enable == 0)
4932                         continue;
4933                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
4934                         continue;
4935                 if (!HDA_PARAM_PIN_CAP_OUTPUT_CAP(w->wclass.pin.cap))
4936                         continue;
4937                 conndev = w->wclass.pin.config &
4938                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK;
4939                 if (!(conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT ||
4940                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_SPEAKER ||
4941                     conndev == HDA_CONFIG_DEFAULTCONF_DEVICE_LINE_OUT))
4942                         continue;
4943                 for (j = 0; j < w->nconns; j++) {
4944                         cw = hdac_widget_get(devinfo, w->conns[j]);
4945                         if (cw == NULL || cw->enable == 0)
4946                                 continue;
4947                         if (strategy == HDA_PARSE_MIXER && !(cw->type ==
4948                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
4949                             cw->type ==
4950                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR))
4951                                 continue;
4952                         if (hdac_widget_find_dac_path(devinfo, cw->nid, 0)
4953                             != 0) {
4954                                 if (w->selconn == -1)
4955                                         w->selconn = j;
4956                                 w->pflags |= HDA_DAC_PATH;
4957                                 found_dac++;
4958                         }
4959                 }
4960         }
4961
4962         return (found_dac);
4963 }
4964
4965 static void
4966 hdac_audio_build_tree(struct hdac_devinfo *devinfo)
4967 {
4968         struct hdac_widget *w;
4969         struct hdac_audio_ctl *ctl;
4970         int i, j, dacs, strategy;
4971
4972         /* Construct DAC path */
4973         strategy = HDA_PARSE_MIXER;
4974         devinfo->function.audio.parsing_strategy = strategy;
4975         HDA_BOOTVERBOSE(
4976                 device_printf(devinfo->codec->sc->dev,
4977                     "HDA_DEBUG: HWiP: HDA Widget Parser - Revision %d\n",
4978                     HDA_WIDGET_PARSER_REV);
4979         );
4980         dacs = hdac_audio_build_tree_strategy(devinfo);
4981         if (dacs == 0) {
4982                 HDA_BOOTVERBOSE(
4983                         device_printf(devinfo->codec->sc->dev,
4984                             "HDA_DEBUG: HWiP: 0 DAC path found! "
4985                             "Retrying parser "
4986                             "using HDA_PARSE_DIRECT strategy.\n");
4987                 );
4988                 strategy = HDA_PARSE_DIRECT;
4989                 devinfo->function.audio.parsing_strategy = strategy;
4990                 dacs = hdac_audio_build_tree_strategy(devinfo);
4991         }
4992
4993         HDA_BOOTVERBOSE(
4994                 device_printf(devinfo->codec->sc->dev,
4995                     "HDA_DEBUG: HWiP: Found %d DAC path using HDA_PARSE_%s "
4996                     "strategy.\n",
4997                     dacs, (strategy == HDA_PARSE_MIXER) ? "MIXER" : "DIRECT");
4998         );
4999
5000         /* Construct ADC path */
5001         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5002                 w = hdac_widget_get(devinfo, i);
5003                 if (w == NULL || w->enable == 0)
5004                         continue;
5005                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT)
5006                         continue;
5007                 (void)hdac_widget_find_adc_path(devinfo, w->nid, 0);
5008         }
5009
5010         /* Output mixers */
5011         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5012                 w = hdac_widget_get(devinfo, i);
5013                 if (w == NULL || w->enable == 0)
5014                         continue;
5015                 if ((strategy == HDA_PARSE_MIXER &&
5016                     (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER ||
5017                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR)
5018                     && (w->pflags & HDA_DAC_PATH)) ||
5019                     (strategy == HDA_PARSE_DIRECT && (w->pflags &
5020                     (HDA_DAC_PATH | HDA_ADC_PATH)))) {
5021                         w->ctlflags |= hdac_audio_ctl_outamp_build(devinfo,
5022                             w->nid, devinfo->startnode - 1, 0, 0);
5023                 } else if (w->type ==
5024                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_BEEP_WIDGET) {
5025                         j = 0;
5026                         while ((ctl = hdac_audio_ctl_each(devinfo, &j)) !=
5027                             NULL) {
5028                                 if (ctl->enable == 0 || ctl->widget == NULL)
5029                                         continue;
5030                                 if (ctl->widget->nid != w->nid)
5031                                         continue;
5032                                 ctl->ossmask |= SOUND_MASK_VOLUME;
5033                                 ctl->ossmask |= SOUND_MASK_SPEAKER;
5034                                 ctl->ossdev = SOUND_MIXER_SPEAKER;
5035                                 w->ctlflags |= SOUND_MASK_VOLUME;
5036                                 w->ctlflags |= SOUND_MASK_SPEAKER;
5037                         }
5038                 }
5039         }
5040
5041         /* Input mixers (rec) */
5042         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5043                 w = hdac_widget_get(devinfo, i);
5044                 if (w == NULL || w->enable == 0)
5045                         continue;
5046                 if (!(w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT &&
5047                     w->pflags & HDA_ADC_PATH))
5048                         continue;
5049                 hdac_audio_ctl_inamp_build(devinfo, w->nid, 0);
5050                 hdac_audio_ctl_recsel_build(devinfo, w->nid, 0);
5051         }
5052 }
5053
5054 #define HDA_COMMIT_CONN (1 << 0)
5055 #define HDA_COMMIT_CTRL (1 << 1)
5056 #define HDA_COMMIT_EAPD (1 << 2)
5057 #define HDA_COMMIT_GPIO (1 << 3)
5058 #define HDA_COMMIT_MISC (1 << 4)
5059 #define HDA_COMMIT_ALL  (HDA_COMMIT_CONN | HDA_COMMIT_CTRL | \
5060                         HDA_COMMIT_EAPD | HDA_COMMIT_GPIO | HDA_COMMIT_MISC)
5061
5062 static void
5063 hdac_audio_commit(struct hdac_devinfo *devinfo, uint32_t cfl)
5064 {
5065         struct hdac_softc *sc = devinfo->codec->sc;
5066         struct hdac_widget *w;
5067         nid_t cad;
5068         int i;
5069
5070         if (!(cfl & HDA_COMMIT_ALL))
5071                 return;
5072
5073         cad = devinfo->codec->cad;
5074
5075         if ((cfl & HDA_COMMIT_MISC)) {
5076                 if (sc->pci_subvendor == APPLE_INTEL_MAC)
5077                         hdac_command(sc, HDA_CMD_12BIT(cad, devinfo->nid,
5078                             0x7e7, 0), cad);
5079         }
5080
5081         if (cfl & HDA_COMMIT_GPIO) {
5082                 uint32_t gdata, gmask, gdir;
5083                 int commitgpio, numgpio;
5084
5085                 gdata = 0;
5086                 gmask = 0;
5087                 gdir = 0;
5088                 commitgpio = 0;
5089
5090                 numgpio = HDA_PARAM_GPIO_COUNT_NUM_GPIO(
5091                     devinfo->function.audio.gpio);
5092
5093                 if (devinfo->function.audio.quirks & HDA_QUIRK_GPIOFLUSH)
5094                         commitgpio = (numgpio > 0) ? 1 : 0;
5095                 else {
5096                         for (i = 0; i < numgpio && i < HDA_GPIO_MAX; i++) {
5097                                 if (!(devinfo->function.audio.quirks &
5098                                     (1 << i)))
5099                                         continue;
5100                                 if (commitgpio == 0) {
5101                                         commitgpio = 1;
5102                                         HDA_BOOTVERBOSE(
5103                                                 gdata = hdac_command(sc,
5104                                                     HDA_CMD_GET_GPIO_DATA(cad,
5105                                                     devinfo->nid), cad);
5106                                                 gmask = hdac_command(sc,
5107                                                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad,
5108                                                     devinfo->nid), cad);
5109                                                 gdir = hdac_command(sc,
5110                                                     HDA_CMD_GET_GPIO_DIRECTION(cad,
5111                                                     devinfo->nid), cad);
5112                                                 device_printf(sc->dev,
5113                                                     "GPIO init: data=0x%08x "
5114                                                     "mask=0x%08x dir=0x%08x\n",
5115                                                     gdata, gmask, gdir);
5116                                                 gdata = 0;
5117                                                 gmask = 0;
5118                                                 gdir = 0;
5119                                         );
5120                                 }
5121                                 gdata |= 1 << i;
5122                                 gmask |= 1 << i;
5123                                 gdir |= 1 << i;
5124                         }
5125                 }
5126
5127                 if (commitgpio != 0) {
5128                         HDA_BOOTVERBOSE(
5129                                 device_printf(sc->dev,
5130                                     "GPIO commit: data=0x%08x mask=0x%08x "
5131                                     "dir=0x%08x\n",
5132                                     gdata, gmask, gdir);
5133                         );
5134                         hdac_command(sc,
5135                             HDA_CMD_SET_GPIO_ENABLE_MASK(cad, devinfo->nid,
5136                             gmask), cad);
5137                         hdac_command(sc,
5138                             HDA_CMD_SET_GPIO_DIRECTION(cad, devinfo->nid,
5139                             gdir), cad);
5140                         hdac_command(sc,
5141                             HDA_CMD_SET_GPIO_DATA(cad, devinfo->nid,
5142                             gdata), cad);
5143                 }
5144         }
5145
5146         for (i = 0; i < devinfo->nodecnt; i++) {
5147                 w = &devinfo->widget[i];
5148                 if (w == NULL || w->enable == 0)
5149                         continue;
5150                 if (cfl & HDA_COMMIT_CONN) {
5151                         if (w->selconn == -1)
5152                                 w->selconn = 0;
5153                         if (w->nconns > 0)
5154                                 hdac_widget_connection_select(w, w->selconn);
5155                 }
5156                 if ((cfl & HDA_COMMIT_CTRL) &&
5157                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5158                         uint32_t pincap;
5159
5160                         pincap = w->wclass.pin.cap;
5161
5162                         if ((w->pflags & (HDA_DAC_PATH | HDA_ADC_PATH)) ==
5163                             (HDA_DAC_PATH | HDA_ADC_PATH))
5164                                 device_printf(sc->dev, "WARNING: node %d "
5165                                     "participate both for DAC/ADC!\n", w->nid);
5166                         if (w->pflags & HDA_DAC_PATH) {
5167                                 w->wclass.pin.ctrl &=
5168                                     ~HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE;
5169                                 if ((w->wclass.pin.config &
5170                                     HDA_CONFIG_DEFAULTCONF_DEVICE_MASK) !=
5171                                     HDA_CONFIG_DEFAULTCONF_DEVICE_HP_OUT)
5172                                         w->wclass.pin.ctrl &=
5173                                             ~HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE;
5174                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF100) &&
5175                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5176                                         w->wclass.pin.ctrl |=
5177                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5178                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5179                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF80) &&
5180                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5181                                         w->wclass.pin.ctrl |=
5182                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5183                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5184                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_OVREF50) &&
5185                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5186                                         w->wclass.pin.ctrl |=
5187                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5188                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5189                         } else if (w->pflags & HDA_ADC_PATH) {
5190                                 w->wclass.pin.ctrl &=
5191                                     ~(HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5192                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE);
5193                                 if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF100) &&
5194                                     HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5195                                         w->wclass.pin.ctrl |=
5196                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5197                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_100);
5198                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF80) &&
5199                                     HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5200                                         w->wclass.pin.ctrl |=
5201                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5202                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_80);
5203                                 else if ((devinfo->function.audio.quirks & HDA_QUIRK_IVREF50) &&
5204                                     HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5205                                         w->wclass.pin.ctrl |=
5206                                             HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE(
5207                                             HDA_CMD_PIN_WIDGET_CTRL_VREF_ENABLE_50);
5208                         } else
5209                                 w->wclass.pin.ctrl &= ~(
5210                                     HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE |
5211                                     HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE |
5212                                     HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE |
5213                                     HDA_CMD_SET_PIN_WIDGET_CTRL_VREF_ENABLE_MASK);
5214                         hdac_command(sc,
5215                             HDA_CMD_SET_PIN_WIDGET_CTRL(cad, w->nid,
5216                             w->wclass.pin.ctrl), cad);
5217                 }
5218                 if ((cfl & HDA_COMMIT_EAPD) &&
5219                     w->param.eapdbtl != HDAC_INVALID) {
5220                         uint32_t val;
5221
5222                         val = w->param.eapdbtl;
5223                         if (devinfo->function.audio.quirks &
5224                             HDA_QUIRK_EAPDINV)
5225                                 val ^= HDA_CMD_SET_EAPD_BTL_ENABLE_EAPD;
5226                         hdac_command(sc,
5227                             HDA_CMD_SET_EAPD_BTL_ENABLE(cad, w->nid,
5228                             val), cad);
5229
5230                 }
5231                 DELAY(1000);
5232         }
5233 }
5234
5235 static void
5236 hdac_audio_ctl_commit(struct hdac_devinfo *devinfo)
5237 {
5238         struct hdac_softc *sc = devinfo->codec->sc;
5239         struct hdac_audio_ctl *ctl;
5240         int i;
5241
5242         devinfo->function.audio.mvol = 100 | (100 << 8);
5243         i = 0;
5244         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5245                 if (ctl->enable == 0 || ctl->widget == NULL) {
5246                         HDA_BOOTVERBOSE(
5247                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5248                                     i, (ctl->widget != NULL) ?
5249                                     ctl->widget->nid : -1);
5250                                 if (ctl->childwidget != NULL)
5251                                         kprintf(" childnid=%d",
5252                                             ctl->childwidget->nid);
5253                                 if (ctl->widget == NULL)
5254                                         kprintf(" NULL WIDGET!");
5255                                 kprintf(" DISABLED\n");
5256                         );
5257                         continue;
5258                 }
5259                 HDA_BOOTVERBOSE(
5260                         if (ctl->ossmask == 0) {
5261                                 device_printf(sc->dev, "[%2d] Ctl nid=%d",
5262                                     i, ctl->widget->nid);
5263                                 if (ctl->childwidget != NULL)
5264                                         kprintf(" childnid=%d",
5265                                         ctl->childwidget->nid);
5266                                 kprintf(" Bind to NONE\n");
5267                         }
5268                 );
5269                 if (ctl->step > 0) {
5270                         ctl->ossval = (ctl->left * 100) / ctl->step;
5271                         ctl->ossval |= ((ctl->right * 100) / ctl->step) << 8;
5272                 } else
5273                         ctl->ossval = 0;
5274                 hdac_audio_ctl_amp_set(ctl, HDA_AMP_MUTE_DEFAULT,
5275                     ctl->left, ctl->right);
5276         }
5277 }
5278
5279 static int
5280 hdac_pcmchannel_setup(struct hdac_devinfo *devinfo, int dir)
5281 {
5282         struct hdac_chan *ch;
5283         struct hdac_widget *w;
5284         uint32_t cap, fmtcap, pcmcap, path;
5285         int i, type, ret, max;
5286
5287         if (dir == PCMDIR_PLAY) {
5288                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT;
5289                 ch = &devinfo->codec->sc->play;
5290                 path = HDA_DAC_PATH;
5291         } else {
5292                 type = HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT;
5293                 ch = &devinfo->codec->sc->rec;
5294                 path = HDA_ADC_PATH;
5295         }
5296
5297         ch->caps = hdac_caps;
5298         ch->caps.fmtlist = ch->fmtlist;
5299         ch->bit16 = 1;
5300         ch->bit32 = 0;
5301         ch->pcmrates[0] = 48000;
5302         ch->pcmrates[1] = 0;
5303
5304         ret = 0;
5305         fmtcap = devinfo->function.audio.supp_stream_formats;
5306         pcmcap = devinfo->function.audio.supp_pcm_size_rate;
5307         max = (sizeof(ch->io) / sizeof(ch->io[0])) - 1;
5308
5309         for (i = devinfo->startnode; i < devinfo->endnode && ret < max; i++) {
5310                 w = hdac_widget_get(devinfo, i);
5311                 if (w == NULL || w->enable == 0 || w->type != type ||
5312                     !(w->pflags & path))
5313                         continue;
5314                 cap = w->param.widget_cap;
5315                 /*if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(cap))
5316                         continue;*/
5317                 if (!HDA_PARAM_AUDIO_WIDGET_CAP_STEREO(cap))
5318                         continue;
5319                 cap = w->param.supp_stream_formats;
5320                 /*if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap)) {
5321                 }
5322                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap)) {
5323                 }*/
5324                 if (!HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5325                         continue;
5326                 if (ret == 0) {
5327                         fmtcap = w->param.supp_stream_formats;
5328                         pcmcap = w->param.supp_pcm_size_rate;
5329                 } else {
5330                         fmtcap &= w->param.supp_stream_formats;
5331                         pcmcap &= w->param.supp_pcm_size_rate;
5332                 }
5333                 ch->io[ret++] = i;
5334         }
5335         ch->io[ret] = -1;
5336
5337         ch->supp_stream_formats = fmtcap;
5338         ch->supp_pcm_size_rate = pcmcap;
5339
5340         /*
5341          *  8bit = 0
5342          * 16bit = 1
5343          * 20bit = 2
5344          * 24bit = 3
5345          * 32bit = 4
5346          */
5347         if (ret > 0) {
5348                 cap = pcmcap;
5349                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5350                         ch->bit16 = 1;
5351                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5352                         ch->bit16 = 0;
5353                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5354                         ch->bit32 = 4;
5355                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5356                         ch->bit32 = 3;
5357                 else if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5358                         ch->bit32 = 2;
5359                 i = 0;
5360                 if (!(devinfo->function.audio.quirks & HDA_QUIRK_FORCESTEREO))
5361                         ch->fmtlist[i++] = AFMT_S16_LE;
5362                 ch->fmtlist[i++] = AFMT_S16_LE | AFMT_STEREO;
5363                 if (ch->bit32 > 0) {
5364                         if (!(devinfo->function.audio.quirks &
5365                             HDA_QUIRK_FORCESTEREO))
5366                                 ch->fmtlist[i++] = AFMT_S32_LE;
5367                         ch->fmtlist[i++] = AFMT_S32_LE | AFMT_STEREO;
5368                 }
5369                 ch->fmtlist[i] = 0;
5370                 i = 0;
5371                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5372                         ch->pcmrates[i++] = 8000;
5373                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5374                         ch->pcmrates[i++] = 11025;
5375                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5376                         ch->pcmrates[i++] = 16000;
5377                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5378                         ch->pcmrates[i++] = 22050;
5379                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5380                         ch->pcmrates[i++] = 32000;
5381                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5382                         ch->pcmrates[i++] = 44100;
5383                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_48KHZ(cap)) */
5384                 ch->pcmrates[i++] = 48000;
5385                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5386                         ch->pcmrates[i++] = 88200;
5387                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5388                         ch->pcmrates[i++] = 96000;
5389                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5390                         ch->pcmrates[i++] = 176400;
5391                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5392                         ch->pcmrates[i++] = 192000;
5393                 /* if (HDA_PARAM_SUPP_PCM_SIZE_RATE_384KHZ(cap)) */
5394                 ch->pcmrates[i] = 0;
5395                 if (i > 0) {
5396                         ch->caps.minspeed = ch->pcmrates[0];
5397                         ch->caps.maxspeed = ch->pcmrates[i - 1];
5398                 }
5399         }
5400
5401         return (ret);
5402 }
5403
5404 static void
5405 hdac_dump_ctls(struct hdac_devinfo *devinfo, const char *banner, uint32_t flag)
5406 {
5407         struct hdac_audio_ctl *ctl;
5408         struct hdac_softc *sc = devinfo->codec->sc;
5409         int i;
5410         uint32_t fl = 0;
5411
5412
5413         if (flag == 0) {
5414                 fl = SOUND_MASK_VOLUME | SOUND_MASK_PCM |
5415                     SOUND_MASK_CD | SOUND_MASK_LINE | SOUND_MASK_RECLEV |
5416                     SOUND_MASK_MIC | SOUND_MASK_SPEAKER | SOUND_MASK_OGAIN;
5417         }
5418
5419         i = 0;
5420         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5421                 if (ctl->enable == 0 || ctl->widget == NULL ||
5422                     ctl->widget->enable == 0 || (ctl->ossmask &
5423                     (SOUND_MASK_SKIP | SOUND_MASK_DISABLE)))
5424                         continue;
5425                 if ((flag == 0 && (ctl->ossmask & ~fl)) ||
5426                     (flag != 0 && (ctl->ossmask & flag))) {
5427                         if (banner != NULL) {
5428                                 device_printf(sc->dev, "\n");
5429                                 device_printf(sc->dev, "%s\n", banner);
5430                         }
5431                         goto hdac_ctl_dump_it_all;
5432                 }
5433         }
5434
5435         return;
5436
5437 hdac_ctl_dump_it_all:
5438         i = 0;
5439         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
5440                 if (ctl->enable == 0 || ctl->widget == NULL ||
5441                     ctl->widget->enable == 0)
5442                         continue;
5443                 if (!((flag == 0 && (ctl->ossmask & ~fl)) ||
5444                     (flag != 0 && (ctl->ossmask & flag))))
5445                         continue;
5446                 if (flag == 0) {
5447                         device_printf(sc->dev, "\n");
5448                         device_printf(sc->dev, "Unknown Ctl (OSS: %s)\n",
5449                             hdac_audio_ctl_ossmixer_mask2name(ctl->ossmask));
5450                 }
5451                 device_printf(sc->dev, "   |\n");
5452                 device_printf(sc->dev, "   +-  nid: %2d index: %2d ",
5453                     ctl->widget->nid, ctl->index);
5454                 if (ctl->childwidget != NULL)
5455                         kprintf("(nid: %2d) ", ctl->childwidget->nid);
5456                 else
5457                         kprintf("          ");
5458                 kprintf("mute: %d step: %3d size: %3d off: %3d dir=0x%x ossmask=0x%08x\n",
5459                     ctl->mute, ctl->step, ctl->size, ctl->offset, ctl->dir,
5460                     ctl->ossmask);
5461         }
5462 }
5463
5464 static void
5465 hdac_dump_audio_formats(struct hdac_softc *sc, uint32_t fcap, uint32_t pcmcap)
5466 {
5467         uint32_t cap;
5468
5469         cap = fcap;
5470         if (cap != 0) {
5471                 device_printf(sc->dev, "     Stream cap: 0x%08x\n", cap);
5472                 device_printf(sc->dev, "         Format:");
5473                 if (HDA_PARAM_SUPP_STREAM_FORMATS_AC3(cap))
5474                         kprintf(" AC3");
5475                 if (HDA_PARAM_SUPP_STREAM_FORMATS_FLOAT32(cap))
5476                         kprintf(" FLOAT32");
5477                 if (HDA_PARAM_SUPP_STREAM_FORMATS_PCM(cap))
5478                         kprintf(" PCM");
5479                 kprintf("\n");
5480         }
5481         cap = pcmcap;
5482         if (cap != 0) {
5483                 device_printf(sc->dev, "        PCM cap: 0x%08x\n", cap);
5484                 device_printf(sc->dev, "       PCM size:");
5485                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8BIT(cap))
5486                         kprintf(" 8");
5487                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16BIT(cap))
5488                         kprintf(" 16");
5489                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_20BIT(cap))
5490                         kprintf(" 20");
5491                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_24BIT(cap))
5492                         kprintf(" 24");
5493                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32BIT(cap))
5494                         kprintf(" 32");
5495                 kprintf("\n");
5496                 device_printf(sc->dev, "       PCM rate:");
5497                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_8KHZ(cap))
5498                         kprintf(" 8");
5499                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_11KHZ(cap))
5500                         kprintf(" 11");
5501                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_16KHZ(cap))
5502                         kprintf(" 16");
5503                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_22KHZ(cap))
5504                         kprintf(" 22");
5505                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_32KHZ(cap))
5506                         kprintf(" 32");
5507                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_44KHZ(cap))
5508                         kprintf(" 44");
5509                 kprintf(" 48");
5510                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_88KHZ(cap))
5511                         kprintf(" 88");
5512                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_96KHZ(cap))
5513                         kprintf(" 96");
5514                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_176KHZ(cap))
5515                         kprintf(" 176");
5516                 if (HDA_PARAM_SUPP_PCM_SIZE_RATE_192KHZ(cap))
5517                         kprintf(" 192");
5518                 kprintf("\n");
5519         }
5520 }
5521
5522 static void
5523 hdac_dump_pin(struct hdac_softc *sc, struct hdac_widget *w)
5524 {
5525         uint32_t pincap, wcap;
5526
5527         pincap = w->wclass.pin.cap;
5528         wcap = w->param.widget_cap;
5529
5530         device_printf(sc->dev, "        Pin cap: 0x%08x\n", pincap);
5531         device_printf(sc->dev, "                ");
5532         if (HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap))
5533                 kprintf(" ISC");
5534         if (HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap))
5535                 kprintf(" TRQD");
5536         if (HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap))
5537                 kprintf(" PDC");
5538         if (HDA_PARAM_PIN_CAP_HEADPHONE_CAP(pincap))
5539                 kprintf(" HP");
5540         if (HDA_PARAM_PIN_CAP_OUTPUT_CAP(pincap))
5541                 kprintf(" OUT");
5542         if (HDA_PARAM_PIN_CAP_INPUT_CAP(pincap))
5543                 kprintf(" IN");
5544         if (HDA_PARAM_PIN_CAP_BALANCED_IO_PINS(pincap))
5545                 kprintf(" BAL");
5546         if (HDA_PARAM_PIN_CAP_VREF_CTRL(pincap)) {
5547                 kprintf(" VREF[");
5548                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_50(pincap))
5549                         kprintf(" 50");
5550                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_80(pincap))
5551                         kprintf(" 80");
5552                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_100(pincap))
5553                         kprintf(" 100");
5554                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_GROUND(pincap))
5555                         kprintf(" GROUND");
5556                 if (HDA_PARAM_PIN_CAP_VREF_CTRL_HIZ(pincap))
5557                         kprintf(" HIZ");
5558                 kprintf(" ]");
5559         }
5560         if (HDA_PARAM_PIN_CAP_EAPD_CAP(pincap))
5561                 kprintf(" EAPD");
5562         if (HDA_PARAM_AUDIO_WIDGET_CAP_UNSOL_CAP(wcap))
5563                 kprintf(" : UNSOL");
5564         kprintf("\n");
5565         device_printf(sc->dev, "     Pin config: 0x%08x\n",
5566             w->wclass.pin.config);
5567         device_printf(sc->dev, "    Pin control: 0x%08x", w->wclass.pin.ctrl);
5568         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_HPHN_ENABLE)
5569                 kprintf(" HP");
5570         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_IN_ENABLE)
5571                 kprintf(" IN");
5572         if (w->wclass.pin.ctrl & HDA_CMD_SET_PIN_WIDGET_CTRL_OUT_ENABLE)
5573                 kprintf(" OUT");
5574         kprintf("\n");
5575 }
5576
5577 static void
5578 hdac_dump_amp(struct hdac_softc *sc, uint32_t cap, char *banner)
5579 {
5580         device_printf(sc->dev, "     %s amp: 0x%08x\n", banner, cap);
5581         device_printf(sc->dev, "                 "
5582             "mute=%d step=%d size=%d offset=%d\n",
5583             HDA_PARAM_OUTPUT_AMP_CAP_MUTE_CAP(cap),
5584             HDA_PARAM_OUTPUT_AMP_CAP_NUMSTEPS(cap),
5585             HDA_PARAM_OUTPUT_AMP_CAP_STEPSIZE(cap),
5586             HDA_PARAM_OUTPUT_AMP_CAP_OFFSET(cap));
5587 }
5588
5589 static void
5590 hdac_dump_nodes(struct hdac_devinfo *devinfo)
5591 {
5592         struct hdac_softc *sc = devinfo->codec->sc;
5593         struct hdac_widget *w, *cw;
5594         int i, j;
5595
5596         device_printf(sc->dev, "\n");
5597         device_printf(sc->dev, "Default Parameter\n");
5598         device_printf(sc->dev, "-----------------\n");
5599         hdac_dump_audio_formats(sc,
5600             devinfo->function.audio.supp_stream_formats,
5601             devinfo->function.audio.supp_pcm_size_rate);
5602         device_printf(sc->dev, "         IN amp: 0x%08x\n",
5603             devinfo->function.audio.inamp_cap);
5604         device_printf(sc->dev, "        OUT amp: 0x%08x\n",
5605             devinfo->function.audio.outamp_cap);
5606         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5607                 w = hdac_widget_get(devinfo, i);
5608                 if (w == NULL) {
5609                         device_printf(sc->dev, "Ghost widget nid=%d\n", i);
5610                         continue;
5611                 }
5612                 device_printf(sc->dev, "\n");
5613                 device_printf(sc->dev, "            nid: %d [%s]%s\n", w->nid,
5614                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap) ?
5615                     "DIGITAL" : "ANALOG",
5616                     (w->enable == 0) ? " [DISABLED]" : "");
5617                 device_printf(sc->dev, "           name: %s\n", w->name);
5618                 device_printf(sc->dev, "     widget_cap: 0x%08x\n",
5619                     w->param.widget_cap);
5620                 device_printf(sc->dev, "    Parse flags: 0x%08x\n",
5621                     w->pflags);
5622                 device_printf(sc->dev, "      Ctl flags: 0x%08x\n",
5623                     w->ctlflags);
5624                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT ||
5625                     w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_INPUT) {
5626                         hdac_dump_audio_formats(sc,
5627                             w->param.supp_stream_formats,
5628                             w->param.supp_pcm_size_rate);
5629                 } else if (w->type ==
5630                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5631                         hdac_dump_pin(sc, w);
5632                 if (w->param.eapdbtl != HDAC_INVALID)
5633                         device_printf(sc->dev, "           EAPD: 0x%08x\n",
5634                             w->param.eapdbtl);
5635                 if (HDA_PARAM_AUDIO_WIDGET_CAP_OUT_AMP(w->param.widget_cap) &&
5636                     w->param.outamp_cap != 0)
5637                         hdac_dump_amp(sc, w->param.outamp_cap, "Output");
5638                 if (HDA_PARAM_AUDIO_WIDGET_CAP_IN_AMP(w->param.widget_cap) &&
5639                     w->param.inamp_cap != 0)
5640                         hdac_dump_amp(sc, w->param.inamp_cap, " Input");
5641                 device_printf(sc->dev, "    connections: %d\n", w->nconns);
5642                 for (j = 0; j < w->nconns; j++) {
5643                         cw = hdac_widget_get(devinfo, w->conns[j]);
5644                         device_printf(sc->dev, "          |\n");
5645                         device_printf(sc->dev, "          + <- nid=%d [%s]",
5646                             w->conns[j], (cw == NULL) ? "GHOST!" : cw->name);
5647                         if (cw == NULL)
5648                                 kprintf(" [UNKNOWN]");
5649                         else if (cw->enable == 0)
5650                                 kprintf(" [DISABLED]");
5651                         if (w->nconns > 1 && w->selconn == j && w->type !=
5652                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER)
5653                                 kprintf(" (selected)");
5654                         kprintf("\n");
5655                 }
5656         }
5657
5658 }
5659
5660 static int
5661 hdac_dump_dac_internal(struct hdac_devinfo *devinfo, nid_t nid, int depth)
5662 {
5663         struct hdac_widget *w, *cw;
5664         struct hdac_softc *sc = devinfo->codec->sc;
5665         int i;
5666
5667         if (depth > HDA_PARSE_MAXDEPTH)
5668                 return (0);
5669
5670         w = hdac_widget_get(devinfo, nid);
5671         if (w == NULL || w->enable == 0 || !(w->pflags & HDA_DAC_PATH))
5672                 return (0);
5673
5674         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) {
5675                 device_printf(sc->dev, "\n");
5676                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5677                 device_printf(sc->dev, "      ^\n");
5678                 device_printf(sc->dev, "      |\n");
5679                 device_printf(sc->dev, "      +-----<------+\n");
5680         } else {
5681                 device_printf(sc->dev, "                   ^\n");
5682                 device_printf(sc->dev, "                   |\n");
5683                 device_printf(sc->dev, "               ");
5684                 kprintf("  nid=%d [%s]\n", w->nid, w->name);
5685         }
5686
5687         if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_OUTPUT) {
5688                 return (1);
5689         } else if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_MIXER) {
5690                 for (i = 0; i < w->nconns; i++) {
5691                         cw = hdac_widget_get(devinfo, w->conns[i]);
5692                         if (cw == NULL || cw->enable == 0 || cw->type ==
5693                             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
5694                                 continue;
5695                         if (hdac_dump_dac_internal(devinfo, cw->nid,
5696                             depth + 1) != 0)
5697                                 return (1);
5698                 }
5699         } else if ((w->type ==
5700             HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_AUDIO_SELECTOR ||
5701             w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX) &&
5702             w->selconn > -1 && w->selconn < w->nconns) {
5703                 if (hdac_dump_dac_internal(devinfo, w->conns[w->selconn],
5704                     depth + 1) != 0)
5705                         return (1);
5706         }
5707
5708         return (0);
5709 }
5710
5711 static void
5712 hdac_dump_dac(struct hdac_devinfo *devinfo)
5713 {
5714         struct hdac_widget *w;
5715         struct hdac_softc *sc = devinfo->codec->sc;
5716         int i, printed = 0;
5717
5718         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5719                 w = hdac_widget_get(devinfo, i);
5720                 if (w == NULL || w->enable == 0)
5721                         continue;
5722                 if (w->type != HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX ||
5723                     !(w->pflags & HDA_DAC_PATH))
5724                         continue;
5725                 if (printed == 0) {
5726                         printed = 1;
5727                         device_printf(sc->dev, "\n");
5728                         device_printf(sc->dev, "Playback path:\n");
5729                 }
5730                 hdac_dump_dac_internal(devinfo, w->nid, 0);
5731         }
5732 }
5733
5734 static void
5735 hdac_dump_adc(struct hdac_devinfo *devinfo)
5736 {
5737         struct hdac_widget *w, *cw;
5738         struct hdac_softc *sc = devinfo->codec->sc;
5739         int i, j;
5740         int printed = 0;
5741         char ossdevs[256];
5742
5743         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
5744                 w = hdac_widget_get(devinfo, i);
5745                 if (w == NULL || w->enable == 0)
5746                         continue;
5747                 if (!(w->pflags & HDA_ADC_RECSEL))
5748                         continue;
5749                 if (printed == 0) {
5750                         printed = 1;
5751                         device_printf(sc->dev, "\n");
5752                         device_printf(sc->dev, "Recording sources:\n");
5753                 }
5754                 device_printf(sc->dev, "\n");
5755                 device_printf(sc->dev, "    nid=%d [%s]\n", w->nid, w->name);
5756                 for (j = 0; j < w->nconns; j++) {
5757                         cw = hdac_widget_get(devinfo, w->conns[j]);
5758                         if (cw == NULL || cw->enable == 0)
5759                                 continue;
5760                         hdac_audio_ctl_ossmixer_mask2allname(cw->ctlflags,
5761                             ossdevs, sizeof(ossdevs));
5762                         device_printf(sc->dev, "      |\n");
5763                         device_printf(sc->dev, "      + <- nid=%d [%s]",
5764                             cw->nid, cw->name);
5765                         if (strlen(ossdevs) > 0) {
5766                                 kprintf(" [recsrc: %s]", ossdevs);
5767                         }
5768                         kprintf("\n");
5769                 }
5770         }
5771 }
5772
5773 static void
5774 hdac_dump_pcmchannels(struct hdac_softc *sc, int pcnt, int rcnt)
5775 {
5776         nid_t *nids;
5777
5778         if (pcnt > 0) {
5779                 device_printf(sc->dev, "\n");
5780                 device_printf(sc->dev, "   PCM Playback: %d\n", pcnt);
5781                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5782                     sc->play.supp_pcm_size_rate);
5783                 device_printf(sc->dev, "            DAC:");
5784                 for (nids = sc->play.io; *nids != -1; nids++)
5785                         kprintf(" %d", *nids);
5786                 kprintf("\n");
5787         }
5788
5789         if (rcnt > 0) {
5790                 device_printf(sc->dev, "\n");
5791                 device_printf(sc->dev, "     PCM Record: %d\n", rcnt);
5792                 hdac_dump_audio_formats(sc, sc->play.supp_stream_formats,
5793                     sc->rec.supp_pcm_size_rate);
5794                 device_printf(sc->dev, "            ADC:");
5795                 for (nids = sc->rec.io; *nids != -1; nids++)
5796                         kprintf(" %d", *nids);
5797                 kprintf("\n");
5798         }
5799 }
5800
5801 static void
5802 hdac_release_resources(struct hdac_softc *sc)
5803 {
5804         struct hdac_devinfo *devinfo = NULL;
5805         device_t *devlist = NULL;
5806         int i, devcount;
5807
5808         if (sc == NULL)
5809                 return;
5810
5811         hdac_lock(sc);
5812         sc->polling = 0;
5813         sc->poll_ival = 0;
5814         callout_stop(&sc->poll_hda);
5815         callout_stop(&sc->poll_hdac);
5816         callout_stop(&sc->poll_jack);
5817         hdac_reset(sc);
5818         hdac_unlock(sc);
5819
5820         hdac_irq_free(sc);
5821
5822         /* give pending interrupts stuck on the lock a chance to clear */
5823         /* bad hack */
5824         tsleep(&sc->irq, 0, "hdaslp", hz / 10);
5825
5826         device_get_children(sc->dev, &devlist, &devcount);
5827         for (i = 0; devlist != NULL && i < devcount; i++) {
5828                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
5829                 if (devinfo == NULL)
5830                         continue;
5831                 if (devinfo->widget != NULL)
5832                         kfree(devinfo->widget, M_HDAC);
5833                 if (devinfo->node_type ==
5834                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO &&
5835                     devinfo->function.audio.ctl != NULL)
5836                         kfree(devinfo->function.audio.ctl, M_HDAC);
5837                 kfree(devinfo, M_HDAC);
5838                 device_delete_child(sc->dev, devlist[i]);
5839         }
5840         if (devlist != NULL)
5841                 kfree(devlist, M_TEMP);
5842
5843         for (i = 0; i < HDAC_CODEC_MAX; i++) {
5844                 if (sc->codecs[i] != NULL)
5845                         kfree(sc->codecs[i], M_HDAC);
5846                 sc->codecs[i] = NULL;
5847         }
5848
5849         hdac_dma_free(sc, &sc->pos_dma);
5850         hdac_dma_free(sc, &sc->rirb_dma);
5851         hdac_dma_free(sc, &sc->corb_dma);
5852         if (sc->play.blkcnt > 0)
5853                 hdac_dma_free(sc, &sc->play.bdl_dma);
5854         if (sc->rec.blkcnt > 0)
5855                 hdac_dma_free(sc, &sc->rec.bdl_dma);
5856         if (sc->chan_dmat != NULL) {
5857                 bus_dma_tag_destroy(sc->chan_dmat);
5858                 sc->chan_dmat = NULL;
5859         }
5860         hdac_mem_free(sc);
5861         snd_mtxfree(sc->lock);
5862         kfree(sc, M_DEVBUF);
5863 }
5864
5865 /* This function surely going to make its way into upper level someday. */
5866 static void
5867 hdac_config_fetch(struct hdac_softc *sc, uint32_t *on, uint32_t *off)
5868 {
5869         char *res = NULL;
5870         int i = 0, j, k, len, inv;
5871
5872         if (on != NULL)
5873                 *on = 0;
5874         if (off != NULL)
5875                 *off = 0;
5876         if (sc == NULL)
5877                 return;
5878         if (resource_string_value(device_get_name(sc->dev),
5879             device_get_unit(sc->dev), "config", &res) != 0)
5880                 return;
5881         if (!(res != NULL && strlen(res) > 0))
5882                 return;
5883         HDA_BOOTVERBOSE(
5884                 device_printf(sc->dev, "HDA_DEBUG: HDA Config:");
5885         );
5886         for (;;) {
5887                 while (res[i] != '\0' &&
5888                     (res[i] == ',' || isspace(res[i]) != 0))
5889                         i++;
5890                 if (res[i] == '\0') {
5891                         HDA_BOOTVERBOSE(
5892                                 kprintf("\n");
5893                         );
5894                         return;
5895                 }
5896                 j = i;
5897                 while (res[j] != '\0' &&
5898                     !(res[j] == ',' || isspace(res[j]) != 0))
5899                         j++;
5900                 len = j - i;
5901                 if (len > 2 && strncmp(res + i, "no", 2) == 0)
5902                         inv = 2;
5903                 else
5904                         inv = 0;
5905                 for (k = 0; len > inv && k < HDAC_QUIRKS_TAB_LEN; k++) {
5906                         if (strncmp(res + i + inv,
5907                             hdac_quirks_tab[k].key, len - inv) != 0)
5908                                 continue;
5909                         if (len - inv != strlen(hdac_quirks_tab[k].key))
5910                                 break;
5911                         HDA_BOOTVERBOSE(
5912                                 kprintf(" %s%s", (inv != 0) ? "no" : "",
5913                                     hdac_quirks_tab[k].key);
5914                         );
5915                         if (inv == 0 && on != NULL)
5916                                 *on |= hdac_quirks_tab[k].value;
5917                         else if (inv != 0 && off != NULL)
5918                                 *off |= hdac_quirks_tab[k].value;
5919                         break;
5920                 }
5921                 i = j;
5922         }
5923 }
5924
5925 #ifdef SND_DYNSYSCTL
5926 static int
5927 sysctl_hdac_polling(SYSCTL_HANDLER_ARGS)
5928 {
5929         struct hdac_softc *sc;
5930         struct hdac_devinfo *devinfo;
5931         device_t dev;
5932         uint32_t ctl;
5933         int err, val;
5934
5935         dev = oidp->oid_arg1;
5936         devinfo = pcm_getdevinfo(dev);
5937         if (devinfo == NULL || devinfo->codec == NULL ||
5938             devinfo->codec->sc == NULL)
5939                 return (EINVAL);
5940         sc = devinfo->codec->sc;
5941         hdac_lock(sc);
5942         val = sc->polling;
5943         hdac_unlock(sc);
5944         err = sysctl_handle_int(oidp, &val, 0, req);
5945
5946         if (err != 0 || req->newptr == NULL)
5947                 return (err);
5948         if (val < 0 || val > 1)
5949                 return (EINVAL);
5950
5951         hdac_lock(sc);
5952         if (val != sc->polling) {
5953                 if (hda_chan_active(sc) != 0)
5954                         err = EBUSY;
5955                 else if (val == 0) {
5956                         callout_stop(&sc->poll_hdac);
5957                         hdac_unlock(sc);
5958                         hdac_lock(sc);
5959                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT,
5960                             sc->rirb_size / 2);
5961                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
5962                         ctl |= HDAC_RIRBCTL_RINTCTL;
5963                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
5964                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
5965                             HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
5966                         sc->polling = 0;
5967                         DELAY(1000);
5968                 } else {
5969                         HDAC_WRITE_4(&sc->mem, HDAC_INTCTL, 0);
5970                         HDAC_WRITE_2(&sc->mem, HDAC_RINTCNT, 0);
5971                         ctl = HDAC_READ_1(&sc->mem, HDAC_RIRBCTL);
5972                         ctl &= ~HDAC_RIRBCTL_RINTCTL;
5973                         HDAC_WRITE_1(&sc->mem, HDAC_RIRBCTL, ctl);
5974                         callout_reset(&sc->poll_hdac, 1, hdac_poll_callback,
5975                             sc);
5976                         sc->polling = 1;
5977                         DELAY(1000);
5978                 }
5979         }
5980         hdac_unlock(sc);
5981
5982         return (err);
5983 }
5984
5985 static int
5986 sysctl_hdac_polling_interval(SYSCTL_HANDLER_ARGS)
5987 {
5988         struct hdac_softc *sc;
5989         struct hdac_devinfo *devinfo;
5990         device_t dev;
5991         int err, val;
5992
5993         dev = oidp->oid_arg1;
5994         devinfo = pcm_getdevinfo(dev);
5995         if (devinfo == NULL || devinfo->codec == NULL ||
5996             devinfo->codec->sc == NULL)
5997                 return (EINVAL);
5998         sc = devinfo->codec->sc;
5999         hdac_lock(sc);
6000         val = ((uint64_t)sc->poll_ival * 1000) / hz;
6001         hdac_unlock(sc);
6002         err = sysctl_handle_int(oidp, &val, 0, req);
6003
6004         if (err != 0 || req->newptr == NULL)
6005                 return (err);
6006
6007         if (val < 1)
6008                 val = 1;
6009         if (val > 5000)
6010                 val = 5000;
6011         val = ((uint64_t)val * hz) / 1000;
6012         if (val < 1)
6013                 val = 1;
6014         if (val > (hz * 5))
6015                 val = hz * 5;
6016
6017         hdac_lock(sc);
6018         sc->poll_ival = val;
6019         hdac_unlock(sc);
6020
6021         return (err);
6022 }
6023
6024 #ifdef SND_DEBUG
6025 static int
6026 sysctl_hdac_pindump(SYSCTL_HANDLER_ARGS)
6027 {
6028         struct hdac_softc *sc;
6029         struct hdac_devinfo *devinfo;
6030         struct hdac_widget *w;
6031         device_t dev;
6032         uint32_t res, pincap, execres;
6033         int i, err, val;
6034         nid_t cad;
6035
6036         dev = oidp->oid_arg1;
6037         devinfo = pcm_getdevinfo(dev);
6038         if (devinfo == NULL || devinfo->codec == NULL ||
6039             devinfo->codec->sc == NULL)
6040                 return (EINVAL);
6041         val = 0;
6042         err = sysctl_handle_int(oidp, &val, 0, req);
6043         if (err != 0 || req->newptr == NULL || val == 0)
6044                 return (err);
6045         sc = devinfo->codec->sc;
6046         cad = devinfo->codec->cad;
6047         hdac_lock(sc);
6048         device_printf(dev, "HDAC Dump AFG [nid=%d]:\n", devinfo->nid);
6049         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6050                 w = hdac_widget_get(devinfo, i);
6051                 if (w == NULL || w->type !=
6052                     HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX)
6053                         continue;
6054                 pincap = w->wclass.pin.cap;
6055                 if ((HDA_PARAM_PIN_CAP_IMP_SENSE_CAP(pincap) ||
6056                     HDA_PARAM_PIN_CAP_PRESENCE_DETECT_CAP(pincap)) &&
6057                     HDA_PARAM_PIN_CAP_TRIGGER_REQD(pincap)) {
6058                         timeout = 10000;
6059                         hdac_command(sc,
6060                             HDA_CMD_SET_PIN_SENSE(cad, w->nid, 0), cad);
6061                         do {
6062                                 res = hdac_command(sc,
6063                                     HDA_CMD_GET_PIN_SENSE(cad, w->nid), cad);
6064                                 if (res != 0x7fffffff)
6065                                         break;
6066                                 DELAY(10);
6067                         } while (--timeout != 0);
6068                 } else {
6069                         timeout = -1;
6070                         res = hdac_command(sc, HDA_CMD_GET_PIN_SENSE(cad,
6071                             w->nid), cad);
6072                 }
6073                 device_printf(dev,
6074                     "PIN_SENSE: nid=%-3d timeout=%d res=0x%08x [%s]\n",
6075                     w->nid, timeout, res,
6076                     (w->enable == 0) ? "DISABLED" : "ENABLED");
6077         }
6078         device_printf(dev,
6079             "NumGPIO=%d NumGPO=%d NumGPI=%d GPIWake=%d GPIUnsol=%d\n",
6080             HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio),
6081             HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio),
6082             HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio),
6083             HDA_PARAM_GPIO_COUNT_GPI_WAKE(devinfo->function.audio.gpio),
6084             HDA_PARAM_GPIO_COUNT_GPI_UNSOL(devinfo->function.audio.gpio));
6085         if (HDA_PARAM_GPIO_COUNT_NUM_GPI(devinfo->function.audio.gpio) > 0) {
6086                 device_printf(dev, " GPI:");
6087                 res = hdac_command(sc,
6088                     HDA_CMD_GET_GPI_DATA(cad, devinfo->nid), cad);
6089                 kprintf(" data=0x%08x", res);
6090                 res = hdac_command(sc,
6091                     HDA_CMD_GET_GPI_WAKE_ENABLE_MASK(cad, devinfo->nid),
6092                     cad);
6093                 kprintf(" wake=0x%08x", res);
6094                 res = hdac_command(sc,
6095                     HDA_CMD_GET_GPI_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6096                     cad);
6097                 kprintf(" unsol=0x%08x", res);
6098                 res = hdac_command(sc,
6099                     HDA_CMD_GET_GPI_STICKY_MASK(cad, devinfo->nid), cad);
6100                 kprintf(" sticky=0x%08x\n", res);
6101         }
6102         if (HDA_PARAM_GPIO_COUNT_NUM_GPO(devinfo->function.audio.gpio) > 0) {
6103                 device_printf(dev, " GPO:");
6104                 res = hdac_command(sc,
6105                     HDA_CMD_GET_GPO_DATA(cad, devinfo->nid), cad);
6106                 kprintf(" data=0x%08x\n", res);
6107         }
6108         if (HDA_PARAM_GPIO_COUNT_NUM_GPIO(devinfo->function.audio.gpio) > 0) {
6109                 device_printf(dev, "GPI0:");
6110                 res = hdac_command(sc,
6111                     HDA_CMD_GET_GPIO_DATA(cad, devinfo->nid), cad);
6112                 kprintf(" data=0x%08x", res);
6113                 res = hdac_command(sc,
6114                     HDA_CMD_GET_GPIO_ENABLE_MASK(cad, devinfo->nid), cad);
6115                 kprintf(" enable=0x%08x", res);
6116                 res = hdac_command(sc,
6117                     HDA_CMD_GET_GPIO_DIRECTION(cad, devinfo->nid), cad);
6118                 kprintf(" direction=0x%08x\n", res);
6119                 res = hdac_command(sc,
6120                     HDA_CMD_GET_GPIO_WAKE_ENABLE_MASK(cad, devinfo->nid), cad);
6121                 device_printf(dev, "      wake=0x%08x", res);
6122                 res = hdac_command(sc,
6123                     HDA_CMD_GET_GPIO_UNSOLICITED_ENABLE_MASK(cad, devinfo->nid),
6124                     cad);
6125                 kprintf("  unsol=0x%08x", res);
6126                 res = hdac_command(sc,
6127                     HDA_CMD_GET_GPIO_STICKY_MASK(cad, devinfo->nid), cad);
6128                 kprintf("    sticky=0x%08x\n", res);
6129         }
6130         hdac_unlock(sc);
6131         return (0);
6132 }
6133 #endif
6134 #endif
6135
6136 static void
6137 hdac_attach2(void *arg)
6138 {
6139         struct hdac_softc *sc;
6140         struct hdac_widget *w;
6141         struct hdac_audio_ctl *ctl;
6142         uint32_t quirks_on, quirks_off;
6143         int pcnt, rcnt, codec_index;
6144         int i;
6145         char status[SND_STATUSLEN];
6146         device_t *devlist = NULL;
6147         int devcount;
6148         struct hdac_devinfo *devinfo = NULL;
6149
6150         sc = (struct hdac_softc *)arg;
6151
6152         hdac_config_fetch(sc, &quirks_on, &quirks_off);
6153
6154         HDA_BOOTVERBOSE(
6155                 device_printf(sc->dev, "HDA_DEBUG: HDA Config: on=0x%08x off=0x%08x\n",
6156                     quirks_on, quirks_off);
6157         );
6158
6159         if (resource_int_value(device_get_name(sc->dev),
6160             device_get_unit(sc->dev), "codec_index", &codec_index) != 0) {
6161                 switch (sc->pci_subvendor) {
6162                 case GB_G33S2H_SUBVENDOR:
6163                         codec_index = 2;
6164                         break;
6165                 default:
6166                         codec_index = 0;
6167                         break;
6168                 }
6169         }
6170
6171         hdac_lock(sc);
6172
6173         /* Remove ourselves from the config hooks */
6174         if (sc->intrhook.ich_func != NULL) {
6175                 config_intrhook_disestablish(&sc->intrhook);
6176                 sc->intrhook.ich_func = NULL;
6177         }
6178
6179         /* Start the corb and rirb engines */
6180         HDA_BOOTVERBOSE(
6181                 device_printf(sc->dev, "HDA_DEBUG: Starting CORB Engine...\n");
6182         );
6183         hdac_corb_start(sc);
6184         HDA_BOOTVERBOSE(
6185                 device_printf(sc->dev, "HDA_DEBUG: Starting RIRB Engine...\n");
6186         );
6187         hdac_rirb_start(sc);
6188
6189         HDA_BOOTVERBOSE(
6190                 device_printf(sc->dev,
6191                     "HDA_DEBUG: Enabling controller interrupt...\n");
6192         );
6193         if (sc->polling == 0)
6194                 HDAC_WRITE_4(&sc->mem, HDAC_INTCTL,
6195                     HDAC_INTCTL_CIE | HDAC_INTCTL_GIE);
6196         HDAC_WRITE_4(&sc->mem, HDAC_GCTL, HDAC_READ_4(&sc->mem, HDAC_GCTL) |
6197             HDAC_GCTL_UNSOL);
6198
6199         DELAY(1000);
6200
6201         HDA_BOOTVERBOSE(
6202                 device_printf(sc->dev,
6203                     "HDA_DEBUG: Scanning HDA codecs [start index=%d] ...\n",
6204                     codec_index);
6205         );
6206         hdac_scan_codecs(sc, codec_index);
6207
6208         device_get_children(sc->dev, &devlist, &devcount);
6209         for (i = 0; devlist != NULL && i < devcount; i++) {
6210                 devinfo = (struct hdac_devinfo *)device_get_ivars(devlist[i]);
6211                 if (devinfo != NULL && devinfo->node_type ==
6212                     HDA_PARAM_FCT_GRP_TYPE_NODE_TYPE_AUDIO) {
6213                         break;
6214                 } else
6215                         devinfo = NULL;
6216         }
6217         if (devlist != NULL)
6218                 kfree(devlist, M_TEMP);
6219
6220         if (devinfo == NULL) {
6221                 hdac_unlock(sc);
6222                 device_printf(sc->dev, "Audio Function Group not found!\n");
6223                 hdac_release_resources(sc);
6224                 return;
6225         }
6226
6227         HDA_BOOTVERBOSE(
6228                 device_printf(sc->dev,
6229                     "HDA_DEBUG: Parsing AFG nid=%d cad=%d\n",
6230                     devinfo->nid, devinfo->codec->cad);
6231         );
6232         hdac_audio_parse(devinfo);
6233         HDA_BOOTVERBOSE(
6234                 device_printf(sc->dev, "HDA_DEBUG: Parsing Ctls...\n");
6235         );
6236         hdac_audio_ctl_parse(devinfo);
6237         HDA_BOOTVERBOSE(
6238                 device_printf(sc->dev, "HDA_DEBUG: Parsing vendor patch...\n");
6239         );
6240         hdac_vendor_patch_parse(devinfo);
6241         if (quirks_on != 0)
6242                 devinfo->function.audio.quirks |= quirks_on;
6243         if (quirks_off != 0)
6244                 devinfo->function.audio.quirks &= ~quirks_off;
6245
6246         /* XXX Disable all DIGITAL path. */
6247         for (i = devinfo->startnode; i < devinfo->endnode; i++) {
6248                 w = hdac_widget_get(devinfo, i);
6249                 if (w == NULL)
6250                         continue;
6251                 if (HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap)) {
6252                         w->enable = 0;
6253                         continue;
6254                 }
6255                 /* XXX Disable useless pin ? */
6256                 if (w->type == HDA_PARAM_AUDIO_WIDGET_CAP_TYPE_PIN_COMPLEX &&
6257                     (w->wclass.pin.config &
6258                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_MASK) ==
6259                     HDA_CONFIG_DEFAULTCONF_CONNECTIVITY_NONE)
6260                         w->enable = 0;
6261         }
6262         i = 0;
6263         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6264                 if (ctl->widget == NULL)
6265                         continue;
6266                 if (ctl->ossmask & SOUND_MASK_DISABLE)
6267                         ctl->enable = 0;
6268                 w = ctl->widget;
6269                 if (w->enable == 0 ||
6270                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6271                         ctl->enable = 0;
6272                 w = ctl->childwidget;
6273                 if (w == NULL)
6274                         continue;
6275                 if (w->enable == 0 ||
6276                     HDA_PARAM_AUDIO_WIDGET_CAP_DIGITAL(w->param.widget_cap))
6277                         ctl->enable = 0;
6278         }
6279
6280         HDA_BOOTVERBOSE(
6281                 device_printf(sc->dev, "HDA_DEBUG: Building AFG tree...\n");
6282         );
6283         hdac_audio_build_tree(devinfo);
6284
6285         i = 0;
6286         while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6287                 if (ctl->ossmask & (SOUND_MASK_SKIP | SOUND_MASK_DISABLE))
6288                         ctl->ossmask = 0;
6289         }
6290         HDA_BOOTVERBOSE(
6291                 device_printf(sc->dev, "HDA_DEBUG: AFG commit...\n");
6292         );
6293         hdac_audio_commit(devinfo, HDA_COMMIT_ALL);
6294         HDA_BOOTVERBOSE(
6295                 device_printf(sc->dev, "HDA_DEBUG: Ctls commit...\n");
6296         );
6297         hdac_audio_ctl_commit(devinfo);
6298
6299         HDA_BOOTVERBOSE(
6300                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_PLAY setup...\n");
6301         );
6302         pcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_PLAY);
6303         HDA_BOOTVERBOSE(
6304                 device_printf(sc->dev, "HDA_DEBUG: PCMDIR_REC setup...\n");
6305         );
6306         rcnt = hdac_pcmchannel_setup(devinfo, PCMDIR_REC);
6307
6308         hdac_unlock(sc);
6309         HDA_BOOTVERBOSE(
6310                 device_printf(sc->dev,
6311                     "HDA_DEBUG: OSS mixer initialization...\n");
6312         );
6313
6314         /*
6315          * There is no point of return after this. If the driver failed,
6316          * so be it. Let the detach procedure do all the cleanup.
6317          */
6318         if (mixer_init(sc->dev, &hdac_audio_ctl_ossmixer_class, devinfo) != 0)
6319                 device_printf(sc->dev, "Can't register mixer\n");
6320
6321         if (pcnt > 0)
6322                 pcnt = 1;
6323         if (rcnt > 0)
6324                 rcnt = 1;
6325
6326         HDA_BOOTVERBOSE(
6327                 device_printf(sc->dev,
6328                     "HDA_DEBUG: Registering PCM channels...\n");
6329         );
6330         if (pcm_register(sc->dev, devinfo, pcnt, rcnt) != 0)
6331                 device_printf(sc->dev, "Can't register PCM\n");
6332
6333         sc->registered++;
6334
6335         if ((devinfo->function.audio.quirks & HDA_QUIRK_DMAPOS) &&
6336             hdac_dma_alloc(sc, &sc->pos_dma,
6337             (sc->num_iss + sc->num_oss + sc->num_bss) * 8) != 0) {
6338                 HDA_BOOTVERBOSE(
6339                         device_printf(sc->dev,
6340                             "Failed to allocate DMA pos buffer (non-fatal)\n");
6341                 );
6342         }
6343
6344         for (i = 0; i < pcnt; i++)
6345                 pcm_addchan(sc->dev, PCMDIR_PLAY, &hdac_channel_class, devinfo);
6346         for (i = 0; i < rcnt; i++)
6347                 pcm_addchan(sc->dev, PCMDIR_REC, &hdac_channel_class, devinfo);
6348
6349 #ifdef SND_DYNSYSCTL
6350         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6351             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6352             "polling", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6353             sysctl_hdac_polling, "I", "Enable polling mode");
6354         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6355             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6356             "polling_interval", CTLTYPE_INT | CTLFLAG_RW, sc->dev,
6357             sizeof(sc->dev), sysctl_hdac_polling_interval, "I",
6358             "Controller/Jack Sense polling interval (1-1000 ms)");
6359 #ifdef SND_DEBUG
6360         SYSCTL_ADD_PROC(snd_sysctl_tree(sc->dev),
6361             SYSCTL_CHILDREN(snd_sysctl_tree_top(sc->dev)), OID_AUTO,
6362             "pindump", CTLTYPE_INT | CTLFLAG_RW, sc->dev, sizeof(sc->dev),
6363             sysctl_hdac_pindump, "I", "Dump pin states/data");
6364 #endif
6365 #endif
6366
6367         ksnprintf(status, SND_STATUSLEN, "at memory 0x%lx irq %ld %s [%s]",
6368             rman_get_start(sc->mem.mem_res), rman_get_start(sc->irq.irq_res),
6369             PCM_KLDSTRING(snd_hda), HDA_DRV_TEST_REV);
6370         pcm_setstatus(sc->dev, status);
6371         device_printf(sc->dev, "<HDA Codec: %s>\n", hdac_codec_name(devinfo));
6372         HDA_BOOTVERBOSE(
6373                 device_printf(sc->dev, "<HDA Codec ID: 0x%08x>\n",
6374                     hdac_codec_id(devinfo));
6375         );
6376         device_printf(sc->dev, "<HDA Driver Revision: %s>\n",
6377             HDA_DRV_TEST_REV);
6378
6379         HDA_BOOTVERBOSE(
6380                 if (devinfo->function.audio.quirks != 0) {
6381                         device_printf(sc->dev, "\n");
6382                         device_printf(sc->dev, "HDA config/quirks:");
6383                         for (i = 0; i < HDAC_QUIRKS_TAB_LEN; i++) {
6384                                 if ((devinfo->function.audio.quirks &
6385                                     hdac_quirks_tab[i].value) ==
6386                                     hdac_quirks_tab[i].value)
6387                                         kprintf(" %s", hdac_quirks_tab[i].key);
6388                         }
6389                         kprintf("\n");
6390                 }
6391                 device_printf(sc->dev, "\n");
6392                 device_printf(sc->dev, "+-------------------+\n");
6393                 device_printf(sc->dev, "| DUMPING HDA NODES |\n");
6394                 device_printf(sc->dev, "+-------------------+\n");
6395                 hdac_dump_nodes(devinfo);
6396                 device_printf(sc->dev, "\n");
6397                 device_printf(sc->dev, "+------------------------+\n");
6398                 device_printf(sc->dev, "| DUMPING HDA AMPLIFIERS |\n");
6399                 device_printf(sc->dev, "+------------------------+\n");
6400                 device_printf(sc->dev, "\n");
6401                 i = 0;
6402                 while ((ctl = hdac_audio_ctl_each(devinfo, &i)) != NULL) {
6403                         device_printf(sc->dev, "%3d: nid=%d", i,
6404                             (ctl->widget != NULL) ? ctl->widget->nid : -1);
6405                         if (ctl->childwidget != NULL)
6406                                 kprintf(" cnid=%d", ctl->childwidget->nid);
6407                         kprintf(" dir=0x%x index=%d "
6408                             "ossmask=0x%08x ossdev=%d%s\n",
6409                             ctl->dir, ctl->index,
6410                             ctl->ossmask, ctl->ossdev,
6411                             (ctl->enable == 0) ? " [DISABLED]" : "");
6412                 }
6413                 device_printf(sc->dev, "\n");
6414                 device_printf(sc->dev, "+-----------------------------------+\n");
6415                 device_printf(sc->dev, "| DUMPING HDA AUDIO/VOLUME CONTROLS |\n");
6416                 device_printf(sc->dev, "+-----------------------------------+\n");
6417                 hdac_dump_ctls(devinfo, "Master Volume (OSS: vol)", SOUND_MASK_VOLUME);
6418                 hdac_dump_ctls(devinfo, "PCM Volume (OSS: pcm)", SOUND_MASK_PCM);
6419                 hdac_dump_ctls(devinfo, "CD Volume (OSS: cd)", SOUND_MASK_CD);
6420                 hdac_dump_ctls(devinfo, "Microphone Volume (OSS: mic)", SOUND_MASK_MIC);
6421                 hdac_dump_ctls(devinfo, "Line-in Volume (OSS: line)", SOUND_MASK_LINE);
6422                 hdac_dump_ctls(devinfo, "Recording Level (OSS: rec)", SOUND_MASK_RECLEV);
6423                 hdac_dump_ctls(devinfo, "Speaker/Beep (OSS: speaker)", SOUND_MASK_SPEAKER);
6424                 hdac_dump_ctls(devinfo, NULL, 0);
6425                 hdac_dump_dac(devinfo);
6426                 hdac_dump_adc(devinfo);
6427                 device_printf(sc->dev, "\n");
6428                 device_printf(sc->dev, "+--------------------------------------+\n");
6429                 device_printf(sc->dev, "| DUMPING PCM Playback/Record Channels |\n");
6430                 device_printf(sc->dev, "+--------------------------------------+\n");
6431                 hdac_dump_pcmchannels(sc, pcnt, rcnt);
6432         );
6433
6434         if (sc->polling != 0) {
6435                 hdac_lock(sc);
6436                 callout_reset(&sc->poll_hdac, 1, hdac_poll_callback, sc);
6437                 hdac_unlock(sc);
6438         }
6439 }
6440
6441 /****************************************************************************
6442  * int hdac_detach(device_t)
6443  *
6444  * Detach and free up resources utilized by the hdac device.
6445  ****************************************************************************/
6446 static int
6447 hdac_detach(device_t dev)
6448 {
6449         struct hdac_softc *sc = NULL;
6450         struct hdac_devinfo *devinfo = NULL;
6451         int err;
6452
6453         devinfo = (struct hdac_devinfo *)pcm_getdevinfo(dev);
6454         if (devinfo != NULL && devinfo->codec != NULL)
6455                 sc = devinfo->codec->sc;
6456         if (sc == NULL)
6457                 return (0);
6458
6459         if (sc->registered > 0) {
6460                 err = pcm_unregister(dev);
6461                 if (err != 0)
6462                         return (err);
6463         }
6464
6465         hdac_release_resources(sc);
6466
6467         return (0);
6468 }
6469
6470 static device_method_t hdac_methods[] = {
6471         /* device interface */
6472         DEVMETHOD(device_probe,         hdac_probe),
6473         DEVMETHOD(device_attach,        hdac_attach),
6474         DEVMETHOD(device_detach,        hdac_detach),
6475         { 0, 0 }
6476 };
6477
6478 static driver_t hdac_driver = {
6479         "pcm",
6480         hdac_methods,
6481         PCM_SOFTC_SIZE,
6482 };
6483
6484 DRIVER_MODULE(snd_hda, pci, hdac_driver, pcm_devclass, 0, 0);
6485 MODULE_DEPEND(snd_hda, sound, SOUND_MINVER, SOUND_PREFVER, SOUND_MAXVER);
6486 MODULE_VERSION(snd_hda, 1);