2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "opt_atalk.h"
44 #include "opt_compat.h"
47 #include "opt_directio.h"
50 #include "opt_maxmem.h"
51 #include "opt_msgbuf.h"
52 #include "opt_perfmon.h"
54 #include "opt_userconfig.h"
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/sysproto.h>
59 #include <sys/signalvar.h>
60 #include <sys/kernel.h>
61 #include <sys/linker.h>
62 #include <sys/malloc.h>
66 #include <sys/reboot.h>
68 #include <sys/msgbuf.h>
69 #include <sys/sysent.h>
70 #include <sys/sysctl.h>
71 #include <sys/vmmeter.h>
73 #include <sys/upcall.h>
74 #include <sys/usched.h>
78 #include <vm/vm_param.h>
80 #include <vm/vm_kern.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_pager.h>
85 #include <vm/vm_extern.h>
87 #include <sys/thread2.h>
88 #include <sys/mplock2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
100 #include <machine/md_var.h>
101 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
102 #include <machine/globaldata.h> /* CPU_prvspace */
103 #include <machine/smp.h>
105 #include <machine/perfmon.h>
107 #include <machine/cputypes.h>
108 #include <machine/intr_machdep.h>
111 #include <bus/isa/isa_device.h>
113 #include <machine_base/isa/isa_intr.h>
114 #include <bus/isa/rtc.h>
115 #include <machine/vm86.h>
116 #include <sys/random.h>
117 #include <sys/ptrace.h>
118 #include <machine/sigframe.h>
120 #include <sys/machintr.h>
121 #include <machine_base/icu/icu_abi.h>
122 #include <machine_base/icu/elcr_var.h>
123 #include <machine_base/apic/ioapic.h>
124 #include <machine_base/apic/ioapic_abi.h>
126 #define PHYSMAP_ENTRIES 10
128 extern void init386(int first);
129 extern void dblfault_handler(void);
131 extern void printcpuinfo(void); /* XXX header file */
132 extern void finishidentcpu(void);
133 extern void panicifcpuunsupported(void);
134 extern void initializecpu(void);
136 static void cpu_startup(void *);
137 #ifndef CPU_DISABLE_SSE
138 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
139 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
140 #endif /* CPU_DISABLE_SSE */
142 extern void ffs_rawread_setup(void);
143 #endif /* DIRECTIO */
144 static void init_locks(void);
146 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
148 int _udatasel, _ucodesel;
151 int64_t tsc_offsets[MAXCPU];
153 int64_t tsc_offsets[1];
156 #if defined(SWTCH_OPTIM_STATS)
157 extern int swtch_optim_stats;
158 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
159 CTLFLAG_RD, &swtch_optim_stats, 0, "");
160 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
161 CTLFLAG_RD, &tlb_flush_count, 0, "");
166 u_long ebda_addr = 0;
168 int imcr_present = 0;
171 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
173 u_long pmem = ctob(physmem);
175 int error = sysctl_handle_long(oidp, &pmem, 0, req);
179 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
180 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
183 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
185 int error = sysctl_handle_int(oidp, 0,
186 ctob(physmem - vmstats.v_wire_count), req);
190 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
191 0, 0, sysctl_hw_usermem, "IU", "");
194 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
196 int error = sysctl_handle_int(oidp, 0,
197 i386_btop(avail_end - avail_start), req);
201 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
202 0, 0, sysctl_hw_availpages, "I", "");
207 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
208 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
211 static vm_offset_t buffer_sva, buffer_eva;
212 vm_offset_t clean_sva, clean_eva;
213 static vm_offset_t pager_sva, pager_eva;
214 static struct trapframe proc0_tf;
217 cpu_startup(void *dummy)
221 vm_offset_t firstaddr;
224 * Good {morning,afternoon,evening,night}.
226 kprintf("%s", version);
229 panicifcpuunsupported();
233 kprintf("real memory = %ju (%ju MB)\n",
235 (intmax_t)Realmem / 1024 / 1024);
237 * Display any holes after the first chunk of extended memory.
242 kprintf("Physical memory chunk(s):\n");
243 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
244 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
246 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
247 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
253 * Allocate space for system data structures.
254 * The first available kernel virtual address is in "v".
255 * As pages of kernel virtual memory are allocated, "v" is incremented.
256 * As pages of memory are allocated and cleared,
257 * "firstaddr" is incremented.
258 * An index into the kernel page table corresponding to the
259 * virtual memory address maintained in "v" is kept in "mapaddr".
263 * Make two passes. The first pass calculates how much memory is
264 * needed and allocates it. The second pass assigns virtual
265 * addresses to the various data structures.
269 v = (caddr_t)firstaddr;
271 #define valloc(name, type, num) \
272 (name) = (type *)v; v = (caddr_t)((name)+(num))
273 #define valloclim(name, type, num, lim) \
274 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
277 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
278 * For the first 64MB of ram nominally allocate sufficient buffers to
279 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
280 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
281 * the buffer cache we limit the eventual kva reservation to
284 * factor represents the 1/4 x ram conversion.
287 int factor = 4 * BKVASIZE / 1024;
288 int kbytes = physmem * (PAGE_SIZE / 1024);
292 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
294 nbuf += (kbytes - 65536) * 2 / (factor * 5);
295 if (maxbcache && nbuf > maxbcache / BKVASIZE)
296 nbuf = maxbcache / BKVASIZE;
300 * Do not allow the buffer_map to be more then 1/2 the size of the
303 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
304 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
305 kprintf("Warning: nbufs capped at %d\n", nbuf);
308 /* limit to 128 on i386 */
309 nswbuf = max(min(nbuf/4, 128), 16);
311 if (nswbuf < NSWBUF_MIN)
318 valloc(swbuf, struct buf, nswbuf);
319 valloc(buf, struct buf, nbuf);
322 * End of first pass, size has been calculated so allocate memory
324 if (firstaddr == 0) {
325 size = (vm_size_t)(v - firstaddr);
326 firstaddr = kmem_alloc(&kernel_map, round_page(size));
328 panic("startup: no room for tables");
333 * End of second pass, addresses have been assigned
335 if ((vm_size_t)(v - firstaddr) != size)
336 panic("startup: table size inconsistency");
338 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
339 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
340 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
342 buffer_map.system_map = 1;
343 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
344 (nswbuf*MAXPHYS) + pager_map_size);
345 pager_map.system_map = 1;
347 #if defined(USERCONFIG)
349 cninit(); /* the preferred console may have changed */
352 kprintf("avail memory = %ju (%ju MB)\n",
353 (intmax_t)ptoa(vmstats.v_free_count),
354 (intmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
357 * Set up buffers, so they can be used to read disk labels.
360 vm_pager_bufferinit();
362 /* Log ELCR information */
367 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
369 mp_start(); /* fire up the APs and APICs */
374 MachIntrABI.finalize();
380 * Send an interrupt to process.
382 * Stack is set up to allow sigcode stored
383 * at top to call routine, followed by kcall
384 * to sigreturn routine below. After sigreturn
385 * resets the signal mask, the stack, and the
386 * frame pointer, it returns to the user
390 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
392 struct lwp *lp = curthread->td_lwp;
393 struct proc *p = lp->lwp_proc;
394 struct trapframe *regs;
395 struct sigacts *psp = p->p_sigacts;
396 struct sigframe sf, *sfp;
399 regs = lp->lwp_md.md_regs;
400 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
402 /* save user context */
403 bzero(&sf, sizeof(struct sigframe));
404 sf.sf_uc.uc_sigmask = *mask;
405 sf.sf_uc.uc_stack = lp->lwp_sigstk;
406 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
407 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
409 /* make the size of the saved context visible to userland */
410 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
412 /* save mailbox pending state for syscall interlock semantics */
413 if (p->p_flag & P_MAILBOX)
414 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
416 /* Allocate and validate space for the signal handler context. */
417 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
418 SIGISMEMBER(psp->ps_sigonstack, sig)) {
419 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
420 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
421 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
423 sfp = (struct sigframe *)regs->tf_esp - 1;
426 /* Translate the signal is appropriate */
427 if (p->p_sysent->sv_sigtbl) {
428 if (sig <= p->p_sysent->sv_sigsize)
429 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
432 /* Build the argument list for the signal handler. */
434 sf.sf_ucontext = (register_t)&sfp->sf_uc;
435 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
436 /* Signal handler installed with SA_SIGINFO. */
437 sf.sf_siginfo = (register_t)&sfp->sf_si;
438 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
440 /* fill siginfo structure */
441 sf.sf_si.si_signo = sig;
442 sf.sf_si.si_code = code;
443 sf.sf_si.si_addr = (void*)regs->tf_err;
446 /* Old FreeBSD-style arguments. */
447 sf.sf_siginfo = code;
448 sf.sf_addr = regs->tf_err;
449 sf.sf_ahu.sf_handler = catcher;
453 * If we're a vm86 process, we want to save the segment registers.
454 * We also change eflags to be our emulated eflags, not the actual
457 if (regs->tf_eflags & PSL_VM) {
458 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
459 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
461 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
462 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
463 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
464 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
466 if (vm86->vm86_has_vme == 0)
467 sf.sf_uc.uc_mcontext.mc_eflags =
468 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
469 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
472 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
473 * syscalls made by the signal handler. This just avoids
474 * wasting time for our lazy fixup of such faults. PSL_NT
475 * does nothing in vm86 mode, but vm86 programs can set it
476 * almost legitimately in probes for old cpu types.
478 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
482 * Save the FPU state and reinit the FP unit
484 npxpush(&sf.sf_uc.uc_mcontext);
487 * Copy the sigframe out to the user's stack.
489 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
491 * Something is wrong with the stack pointer.
492 * ...Kill the process.
497 regs->tf_esp = (int)sfp;
498 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
501 * i386 abi specifies that the direction flag must be cleared
504 regs->tf_eflags &= ~(PSL_T|PSL_D);
506 regs->tf_cs = _ucodesel;
507 regs->tf_ds = _udatasel;
508 regs->tf_es = _udatasel;
511 * Allow the signal handler to inherit %fs in addition to %gs as
512 * the userland program might be using both.
514 * However, if a T_PROTFLT occured the segment registers could be
515 * totally broken. They must be reset in order to be able to
516 * return to userland.
518 if (regs->tf_trapno == T_PROTFLT) {
519 regs->tf_fs = _udatasel;
520 regs->tf_gs = _udatasel;
522 regs->tf_ss = _udatasel;
526 * Sanitize the trapframe for a virtual kernel passing control to a custom
527 * VM context. Remove any items that would otherwise create a privilage
530 * XXX at the moment we allow userland to set the resume flag. Is this a
534 cpu_sanitize_frame(struct trapframe *frame)
536 frame->tf_cs = _ucodesel;
537 frame->tf_ds = _udatasel;
538 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
540 frame->tf_fs = _udatasel;
541 frame->tf_gs = _udatasel;
543 frame->tf_ss = _udatasel;
544 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
545 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
550 cpu_sanitize_tls(struct savetls *tls)
552 struct segment_descriptor *desc;
555 for (i = 0; i < NGTLS; ++i) {
557 if (desc->sd_dpl == 0 && desc->sd_type == 0)
559 if (desc->sd_def32 == 0)
561 if (desc->sd_type != SDT_MEMRWA)
563 if (desc->sd_dpl != SEL_UPL)
565 if (desc->sd_xx != 0 || desc->sd_p != 1)
572 * sigreturn(ucontext_t *sigcntxp)
574 * System call to cleanup state after a signal
575 * has been taken. Reset signal mask and
576 * stack state from context left by sendsig (above).
577 * Return to previous pc and psl as specified by
578 * context left by sendsig. Check carefully to
579 * make sure that the user has not modified the
580 * state to gain improper privileges.
584 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
585 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
588 sys_sigreturn(struct sigreturn_args *uap)
590 struct lwp *lp = curthread->td_lwp;
591 struct proc *p = lp->lwp_proc;
592 struct trapframe *regs;
600 * We have to copy the information into kernel space so userland
601 * can't modify it while we are sniffing it.
603 regs = lp->lwp_md.md_regs;
604 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
608 eflags = ucp->uc_mcontext.mc_eflags;
610 if (eflags & PSL_VM) {
611 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
612 struct vm86_kernel *vm86;
615 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
616 * set up the vm86 area, and we can't enter vm86 mode.
618 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
620 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
621 if (vm86->vm86_inited == 0)
624 /* go back to user mode if both flags are set */
625 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
626 trapsignal(lp, SIGBUS, 0);
628 if (vm86->vm86_has_vme) {
629 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
630 (eflags & VME_USERCHANGE) | PSL_VM;
632 vm86->vm86_eflags = eflags; /* save VIF, VIP */
633 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
634 (eflags & VM_USERCHANGE) | PSL_VM;
636 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
637 tf->tf_eflags = eflags;
638 tf->tf_vm86_ds = tf->tf_ds;
639 tf->tf_vm86_es = tf->tf_es;
640 tf->tf_vm86_fs = tf->tf_fs;
641 tf->tf_vm86_gs = tf->tf_gs;
642 tf->tf_ds = _udatasel;
643 tf->tf_es = _udatasel;
645 tf->tf_fs = _udatasel;
646 tf->tf_gs = _udatasel;
650 * Don't allow users to change privileged or reserved flags.
653 * XXX do allow users to change the privileged flag PSL_RF.
654 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
655 * should sometimes set it there too. tf_eflags is kept in
656 * the signal context during signal handling and there is no
657 * other place to remember it, so the PSL_RF bit may be
658 * corrupted by the signal handler without us knowing.
659 * Corruption of the PSL_RF bit at worst causes one more or
660 * one less debugger trap, so allowing it is fairly harmless.
662 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
663 kprintf("sigreturn: eflags = 0x%x\n", eflags);
668 * Don't allow users to load a valid privileged %cs. Let the
669 * hardware check for invalid selectors, excess privilege in
670 * other selectors, invalid %eip's and invalid %esp's.
672 cs = ucp->uc_mcontext.mc_cs;
673 if (!CS_SECURE(cs)) {
674 kprintf("sigreturn: cs = 0x%x\n", cs);
675 trapsignal(lp, SIGBUS, T_PROTFLT);
678 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
682 * Restore the FPU state from the frame
685 npxpop(&ucp->uc_mcontext);
688 * Merge saved signal mailbox pending flag to maintain interlock
689 * semantics against system calls.
691 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
692 p->p_flag |= P_MAILBOX;
694 if (ucp->uc_mcontext.mc_onstack & 1)
695 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
697 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
699 lp->lwp_sigmask = ucp->uc_sigmask;
700 SIG_CANTMASK(lp->lwp_sigmask);
706 * Stack frame on entry to function. %eax will contain the function vector,
707 * %ecx will contain the function data. flags, ecx, and eax will have
708 * already been pushed on the stack.
719 sendupcall(struct vmupcall *vu, int morepending)
721 struct lwp *lp = curthread->td_lwp;
722 struct trapframe *regs;
723 struct upcall upcall;
724 struct upc_frame upc_frame;
728 * If we are a virtual kernel running an emulated user process
729 * context, switch back to the virtual kernel context before
730 * trying to post the signal.
732 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
733 lp->lwp_md.md_regs->tf_trapno = 0;
734 vkernel_trap(lp, lp->lwp_md.md_regs);
738 * Get the upcall data structure
740 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
741 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
744 kprintf("bad upcall address\n");
749 * If the data structure is already marked pending or has a critical
750 * section count, mark the data structure as pending and return
751 * without doing an upcall. vu_pending is left set.
753 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
754 if (upcall.upc_pending < vu->vu_pending) {
755 upcall.upc_pending = vu->vu_pending;
756 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
757 sizeof(upcall.upc_pending));
763 * We can run this upcall now, clear vu_pending.
765 * Bump our critical section count and set or clear the
766 * user pending flag depending on whether more upcalls are
767 * pending. The user will be responsible for calling
768 * upc_dispatch(-1) to process remaining upcalls.
771 upcall.upc_pending = morepending;
773 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
774 sizeof(upcall.upc_pending));
775 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
779 * Construct a stack frame and issue the upcall
781 regs = lp->lwp_md.md_regs;
782 upc_frame.eax = regs->tf_eax;
783 upc_frame.ecx = regs->tf_ecx;
784 upc_frame.edx = regs->tf_edx;
785 upc_frame.flags = regs->tf_eflags;
786 upc_frame.oldip = regs->tf_eip;
787 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
788 sizeof(upc_frame)) != 0) {
789 kprintf("bad stack on upcall\n");
791 regs->tf_eax = (register_t)vu->vu_func;
792 regs->tf_ecx = (register_t)vu->vu_data;
793 regs->tf_edx = (register_t)lp->lwp_upcall;
794 regs->tf_eip = (register_t)vu->vu_ctx;
795 regs->tf_esp -= sizeof(upc_frame);
800 * fetchupcall occurs in the context of a system call, which means that
801 * we have to return EJUSTRETURN in order to prevent eax and edx from
802 * being overwritten by the syscall return value.
804 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
805 * and the function pointer in %eax.
808 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
810 struct upc_frame upc_frame;
811 struct lwp *lp = curthread->td_lwp;
812 struct trapframe *regs;
814 struct upcall upcall;
817 regs = lp->lwp_md.md_regs;
819 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
823 * This jumps us to the next ready context.
826 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
829 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
832 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
833 regs->tf_eax = (register_t)vu->vu_func;
834 regs->tf_ecx = (register_t)vu->vu_data;
835 regs->tf_edx = (register_t)lp->lwp_upcall;
836 regs->tf_eip = (register_t)vu->vu_ctx;
837 regs->tf_esp = (register_t)rsp;
840 * This returns us to the originally interrupted code.
842 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
843 regs->tf_eax = upc_frame.eax;
844 regs->tf_ecx = upc_frame.ecx;
845 regs->tf_edx = upc_frame.edx;
846 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
847 (upc_frame.flags & PSL_USERCHANGE);
848 regs->tf_eip = upc_frame.oldip;
849 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
858 * Machine dependent boot() routine
860 * I haven't seen anything to put here yet
861 * Possibly some stuff might be grafted back here from boot()
869 * Shutdown the CPU as much as possible
875 __asm__ __volatile("hlt");
879 * cpu_idle() represents the idle LWKT. You cannot return from this function
880 * (unless you want to blow things up!). Instead we look for runnable threads
881 * and loop or halt as appropriate. Giant is not held on entry to the thread.
883 * The main loop is entered with a critical section held, we must release
884 * the critical section before doing anything else. lwkt_switch() will
885 * check for pending interrupts due to entering and exiting its own
888 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
889 * However, there are cases where the idlethread will be entered with
890 * the possibility that no IPI will occur and in such cases
891 * lwkt_switch() sets RQF_WAKEUP. We usually check
892 * RQF_IDLECHECK_WK_MASK.
894 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
895 * 1 to just use hlt and for debugging purposes.
897 static int cpu_idle_hlt = 2;
898 static int cpu_idle_hltcnt;
899 static int cpu_idle_spincnt;
900 static u_int cpu_idle_repeat = 4;
901 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
902 &cpu_idle_hlt, 0, "Idle loop HLT enable");
903 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
904 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
905 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
906 &cpu_idle_spincnt, 0, "Idle loop entry spins");
907 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
908 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
911 cpu_idle_default_hook(void)
914 * We must guarentee that hlt is exactly the instruction
917 __asm __volatile("sti; hlt");
920 /* Other subsystems (e.g., ACPI) can hook this later. */
921 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
926 globaldata_t gd = mycpu;
927 struct thread *td __debugvar = gd->gd_curthread;
932 KKASSERT(td->td_critcount == 0);
935 * See if there are any LWKTs ready to go.
940 * When halting inside a cli we must check for reqflags
941 * races, particularly [re]schedule requests. Running
942 * splz() does the job.
945 * 0 Never halt, just spin
947 * 1 Always use HLT (or MONITOR/MWAIT if avail).
948 * This typically eats more power than the
951 * 2 Use HLT/MONITOR/MWAIT up to a point and then
952 * use the ACPI halt (default). This is a hybrid
953 * approach. See machdep.cpu_idle_repeat.
955 * 3 Always use the ACPI halt. This typically
956 * eats the least amount of power but the cpu
957 * will be slow waking up. Slows down e.g.
958 * compiles and other pipe/event oriented stuff.
961 * NOTE: Interrupts are enabled and we are not in a critical
964 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
965 * don't bother capping gd_idle_repeat, it is ok if
968 ++gd->gd_idle_repeat;
969 reqflags = gd->gd_reqflags;
970 quick = (cpu_idle_hlt == 1) ||
972 gd->gd_idle_repeat < cpu_idle_repeat);
974 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
975 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
976 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
978 } else if (cpu_idle_hlt) {
979 __asm __volatile("cli");
981 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
983 cpu_idle_default_hook();
987 __asm __volatile("sti");
991 __asm __volatile("sti");
1000 * This routine is called if a spinlock has been held through the
1001 * exponential backoff period and is seriously contested. On a real cpu
1005 cpu_spinlock_contested(void)
1013 * Clear registers on exec
1016 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1018 struct thread *td = curthread;
1019 struct lwp *lp = td->td_lwp;
1020 struct pcb *pcb = td->td_pcb;
1021 struct trapframe *regs = lp->lwp_md.md_regs;
1023 /* was i386_user_cleanup() in NetBSD */
1026 bzero((char *)regs, sizeof(struct trapframe));
1027 regs->tf_eip = entry;
1028 regs->tf_esp = stack;
1029 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
1030 regs->tf_ss = _udatasel;
1031 regs->tf_ds = _udatasel;
1032 regs->tf_es = _udatasel;
1033 regs->tf_fs = _udatasel;
1034 regs->tf_gs = _udatasel;
1035 regs->tf_cs = _ucodesel;
1037 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
1038 regs->tf_ebx = ps_strings;
1041 * Reset the hardware debug registers if they were in use.
1042 * They won't have any meaning for the newly exec'd process.
1044 if (pcb->pcb_flags & PCB_DBREGS) {
1051 if (pcb == td->td_pcb) {
1053 * Clear the debug registers on the running
1054 * CPU, otherwise they will end up affecting
1055 * the next process we switch to.
1059 pcb->pcb_flags &= ~PCB_DBREGS;
1063 * Initialize the math emulator (if any) for the current process.
1064 * Actually, just clear the bit that says that the emulator has
1065 * been initialized. Initialization is delayed until the process
1066 * traps to the emulator (if it is done at all) mainly because
1067 * emulators don't provide an entry point for initialization.
1069 pcb->pcb_flags &= ~FP_SOFTFP;
1072 * note: do not set CR0_TS here. npxinit() must do it after clearing
1073 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1077 load_cr0(rcr0() | CR0_MP);
1080 /* Initialize the npx (if any) for the current process. */
1081 npxinit(__INITIAL_NPXCW__);
1086 * note: linux emulator needs edx to be 0x0 on entry, which is
1087 * handled in execve simply by setting the 64 bit syscall
1088 * return value to 0.
1098 cr0 |= CR0_NE; /* Done by npxinit() */
1099 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1100 cr0 |= CR0_WP | CR0_AM;
1106 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1109 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1111 if (!error && req->newptr)
1116 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1117 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1119 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1120 CTLFLAG_RW, &disable_rtc_set, 0, "");
1122 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1123 CTLFLAG_RD, &bootinfo, bootinfo, "");
1125 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1126 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1128 extern u_long bootdev; /* not a cdev_t - encoding is different */
1129 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1130 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1133 * Initialize 386 and configure to run kernel
1137 * Initialize segments & interrupt table
1141 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1142 static struct gate_descriptor idt0[NIDT];
1143 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1144 union descriptor ldt[NLDT]; /* local descriptor table */
1146 /* table descriptors - used to load tables by cpu */
1147 struct region_descriptor r_gdt, r_idt;
1149 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1150 extern int has_f00f_bug;
1153 static struct i386tss dblfault_tss;
1154 static char dblfault_stack[PAGE_SIZE];
1156 extern struct user *proc0paddr;
1159 /* software prototypes -- in more palatable form */
1160 struct soft_segment_descriptor gdt_segs[] = {
1161 /* GNULL_SEL 0 Null Descriptor */
1162 { 0x0, /* segment base address */
1164 0, /* segment type */
1165 0, /* segment descriptor priority level */
1166 0, /* segment descriptor present */
1168 0, /* default 32 vs 16 bit size */
1169 0 /* limit granularity (byte/page units)*/ },
1170 /* GCODE_SEL 1 Code Descriptor for kernel */
1171 { 0x0, /* segment base address */
1172 0xfffff, /* length - all address space */
1173 SDT_MEMERA, /* segment type */
1174 0, /* segment descriptor priority level */
1175 1, /* segment descriptor present */
1177 1, /* default 32 vs 16 bit size */
1178 1 /* limit granularity (byte/page units)*/ },
1179 /* GDATA_SEL 2 Data Descriptor for kernel */
1180 { 0x0, /* segment base address */
1181 0xfffff, /* length - all address space */
1182 SDT_MEMRWA, /* segment type */
1183 0, /* segment descriptor priority level */
1184 1, /* segment descriptor present */
1186 1, /* default 32 vs 16 bit size */
1187 1 /* limit granularity (byte/page units)*/ },
1188 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1189 { 0x0, /* segment base address */
1190 0xfffff, /* length - all address space */
1191 SDT_MEMRWA, /* segment type */
1192 0, /* segment descriptor priority level */
1193 1, /* segment descriptor present */
1195 1, /* default 32 vs 16 bit size */
1196 1 /* limit granularity (byte/page units)*/ },
1197 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1199 0x0, /* segment base address */
1200 sizeof(struct i386tss)-1,/* length - all address space */
1201 SDT_SYS386TSS, /* segment type */
1202 0, /* segment descriptor priority level */
1203 1, /* segment descriptor present */
1205 0, /* unused - default 32 vs 16 bit size */
1206 0 /* limit granularity (byte/page units)*/ },
1207 /* GLDT_SEL 5 LDT Descriptor */
1208 { (int) ldt, /* segment base address */
1209 sizeof(ldt)-1, /* length - all address space */
1210 SDT_SYSLDT, /* segment type */
1211 SEL_UPL, /* segment descriptor priority level */
1212 1, /* segment descriptor present */
1214 0, /* unused - default 32 vs 16 bit size */
1215 0 /* limit granularity (byte/page units)*/ },
1216 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1217 { (int) ldt, /* segment base address */
1218 (512 * sizeof(union descriptor)-1), /* length */
1219 SDT_SYSLDT, /* segment type */
1220 0, /* segment descriptor priority level */
1221 1, /* segment descriptor present */
1223 0, /* unused - default 32 vs 16 bit size */
1224 0 /* limit granularity (byte/page units)*/ },
1225 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1226 { 0x0, /* segment base address */
1227 0x0, /* length - all address space */
1228 0, /* segment type */
1229 0, /* segment descriptor priority level */
1230 0, /* segment descriptor present */
1232 0, /* default 32 vs 16 bit size */
1233 0 /* limit granularity (byte/page units)*/ },
1234 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1235 { 0x400, /* segment base address */
1236 0xfffff, /* length */
1237 SDT_MEMRWA, /* segment type */
1238 0, /* segment descriptor priority level */
1239 1, /* segment descriptor present */
1241 1, /* default 32 vs 16 bit size */
1242 1 /* limit granularity (byte/page units)*/ },
1243 /* GPANIC_SEL 9 Panic Tss Descriptor */
1244 { (int) &dblfault_tss, /* segment base address */
1245 sizeof(struct i386tss)-1,/* length - all address space */
1246 SDT_SYS386TSS, /* segment type */
1247 0, /* segment descriptor priority level */
1248 1, /* segment descriptor present */
1250 0, /* unused - default 32 vs 16 bit size */
1251 0 /* limit granularity (byte/page units)*/ },
1252 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1253 { 0, /* segment base address (overwritten) */
1254 0xfffff, /* length */
1255 SDT_MEMERA, /* segment type */
1256 0, /* segment descriptor priority level */
1257 1, /* segment descriptor present */
1259 0, /* default 32 vs 16 bit size */
1260 1 /* limit granularity (byte/page units)*/ },
1261 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1262 { 0, /* segment base address (overwritten) */
1263 0xfffff, /* length */
1264 SDT_MEMERA, /* segment type */
1265 0, /* segment descriptor priority level */
1266 1, /* segment descriptor present */
1268 0, /* default 32 vs 16 bit size */
1269 1 /* limit granularity (byte/page units)*/ },
1270 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1271 { 0, /* segment base address (overwritten) */
1272 0xfffff, /* length */
1273 SDT_MEMRWA, /* segment type */
1274 0, /* segment descriptor priority level */
1275 1, /* segment descriptor present */
1277 1, /* default 32 vs 16 bit size */
1278 1 /* limit granularity (byte/page units)*/ },
1279 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1280 { 0, /* segment base address (overwritten) */
1281 0xfffff, /* length */
1282 SDT_MEMRWA, /* segment type */
1283 0, /* segment descriptor priority level */
1284 1, /* segment descriptor present */
1286 0, /* default 32 vs 16 bit size */
1287 1 /* limit granularity (byte/page units)*/ },
1288 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1289 { 0, /* segment base address (overwritten) */
1290 0xfffff, /* length */
1291 SDT_MEMRWA, /* segment type */
1292 0, /* segment descriptor priority level */
1293 1, /* segment descriptor present */
1295 0, /* default 32 vs 16 bit size */
1296 1 /* limit granularity (byte/page units)*/ },
1297 /* GTLS_START 15 TLS */
1298 { 0x0, /* segment base address */
1300 0, /* segment type */
1301 0, /* segment descriptor priority level */
1302 0, /* segment descriptor present */
1304 0, /* default 32 vs 16 bit size */
1305 0 /* limit granularity (byte/page units)*/ },
1306 /* GTLS_START+1 16 TLS */
1307 { 0x0, /* segment base address */
1309 0, /* segment type */
1310 0, /* segment descriptor priority level */
1311 0, /* segment descriptor present */
1313 0, /* default 32 vs 16 bit size */
1314 0 /* limit granularity (byte/page units)*/ },
1315 /* GTLS_END 17 TLS */
1316 { 0x0, /* segment base address */
1318 0, /* segment type */
1319 0, /* segment descriptor priority level */
1320 0, /* segment descriptor present */
1322 0, /* default 32 vs 16 bit size */
1323 0 /* limit granularity (byte/page units)*/ },
1326 static struct soft_segment_descriptor ldt_segs[] = {
1327 /* Null Descriptor - overwritten by call gate */
1328 { 0x0, /* segment base address */
1329 0x0, /* length - all address space */
1330 0, /* segment type */
1331 0, /* segment descriptor priority level */
1332 0, /* segment descriptor present */
1334 0, /* default 32 vs 16 bit size */
1335 0 /* limit granularity (byte/page units)*/ },
1336 /* Null Descriptor - overwritten by call gate */
1337 { 0x0, /* segment base address */
1338 0x0, /* length - all address space */
1339 0, /* segment type */
1340 0, /* segment descriptor priority level */
1341 0, /* segment descriptor present */
1343 0, /* default 32 vs 16 bit size */
1344 0 /* limit granularity (byte/page units)*/ },
1345 /* Null Descriptor - overwritten by call gate */
1346 { 0x0, /* segment base address */
1347 0x0, /* length - all address space */
1348 0, /* segment type */
1349 0, /* segment descriptor priority level */
1350 0, /* segment descriptor present */
1352 0, /* default 32 vs 16 bit size */
1353 0 /* limit granularity (byte/page units)*/ },
1354 /* Code Descriptor for user */
1355 { 0x0, /* segment base address */
1356 0xfffff, /* length - all address space */
1357 SDT_MEMERA, /* segment type */
1358 SEL_UPL, /* segment descriptor priority level */
1359 1, /* segment descriptor present */
1361 1, /* default 32 vs 16 bit size */
1362 1 /* limit granularity (byte/page units)*/ },
1363 /* Null Descriptor - overwritten by call gate */
1364 { 0x0, /* segment base address */
1365 0x0, /* length - all address space */
1366 0, /* segment type */
1367 0, /* segment descriptor priority level */
1368 0, /* segment descriptor present */
1370 0, /* default 32 vs 16 bit size */
1371 0 /* limit granularity (byte/page units)*/ },
1372 /* Data Descriptor for user */
1373 { 0x0, /* segment base address */
1374 0xfffff, /* length - all address space */
1375 SDT_MEMRWA, /* segment type */
1376 SEL_UPL, /* segment descriptor priority level */
1377 1, /* segment descriptor present */
1379 1, /* default 32 vs 16 bit size */
1380 1 /* limit granularity (byte/page units)*/ },
1384 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1386 struct gate_descriptor *ip;
1389 ip->gd_looffset = (int)func;
1390 ip->gd_selector = selec;
1396 ip->gd_hioffset = ((int)func)>>16 ;
1399 #define IDTVEC(name) __CONCAT(X,name)
1402 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1403 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1404 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1405 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1406 IDTVEC(xmm), IDTVEC(syscall),
1409 IDTVEC(int0x80_syscall);
1411 #ifdef DEBUG_INTERRUPTS
1412 extern inthand_t *Xrsvdary[256];
1416 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1418 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1419 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1420 ssd->ssd_type = sd->sd_type;
1421 ssd->ssd_dpl = sd->sd_dpl;
1422 ssd->ssd_p = sd->sd_p;
1423 ssd->ssd_def32 = sd->sd_def32;
1424 ssd->ssd_gran = sd->sd_gran;
1428 * Populate the (physmap) array with base/bound pairs describing the
1429 * available physical memory in the system, then test this memory and
1430 * build the phys_avail array describing the actually-available memory.
1432 * If we cannot accurately determine the physical memory map, then use
1433 * value from the 0xE801 call, and failing that, the RTC.
1435 * Total memory size may be set by the kernel environment variable
1436 * hw.physmem or the compile-time define MAXMEM.
1439 getmemsize(int first)
1441 int i, physmap_idx, pa_indx, da_indx;
1443 u_int basemem, extmem;
1444 struct vm86frame vmf;
1445 struct vm86context vmc;
1447 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1455 quad_t dcons_addr, dcons_size;
1457 bzero(&vmf, sizeof(struct vm86frame));
1458 bzero(physmap, sizeof(physmap));
1462 * Some newer BIOSes has broken INT 12H implementation which cause
1463 * kernel panic immediately. In this case, we need to scan SMAP
1464 * with INT 15:E820 first, then determine base memory size.
1467 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1468 if (hasbrokenint12) {
1473 * Perform "base memory" related probes & setup. If we get a crazy
1474 * value give the bios some scribble space just in case.
1476 vm86_intcall(0x12, &vmf);
1477 basemem = vmf.vmf_ax;
1478 if (basemem > 640) {
1479 kprintf("Preposterous BIOS basemem of %uK, "
1480 "truncating to < 640K\n", basemem);
1485 * XXX if biosbasemem is now < 640, there is a `hole'
1486 * between the end of base memory and the start of
1487 * ISA memory. The hole may be empty or it may
1488 * contain BIOS code or data. Map it read/write so
1489 * that the BIOS can write to it. (Memory from 0 to
1490 * the physical end of the kernel is mapped read-only
1491 * to begin with and then parts of it are remapped.
1492 * The parts that aren't remapped form holes that
1493 * remain read-only and are unused by the kernel.
1494 * The base memory area is below the physical end of
1495 * the kernel and right now forms a read-only hole.
1496 * The part of it from PAGE_SIZE to
1497 * (trunc_page(biosbasemem * 1024) - 1) will be
1498 * remapped and used by the kernel later.)
1500 * This code is similar to the code used in
1501 * pmap_mapdev, but since no memory needs to be
1502 * allocated we simply change the mapping.
1504 for (pa = trunc_page(basemem * 1024);
1505 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1506 pte = vtopte(pa + KERNBASE);
1507 *pte = pa | PG_RW | PG_V;
1511 * if basemem != 640, map pages r/w into vm86 page table so
1512 * that the bios can scribble on it.
1515 for (i = basemem / 4; i < 160; i++)
1516 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1520 * map page 1 R/W into the kernel page table so we can use it
1521 * as a buffer. The kernel will unmap this page later.
1523 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1524 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1527 * get memory map with INT 15:E820
1529 #define SMAPSIZ sizeof(*smap)
1530 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1533 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1534 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1539 vmf.vmf_eax = 0xE820;
1540 vmf.vmf_edx = SMAP_SIG;
1541 vmf.vmf_ecx = SMAPSIZ;
1542 i = vm86_datacall(0x15, &vmf, &vmc);
1543 if (i || vmf.vmf_eax != SMAP_SIG)
1545 if (boothowto & RB_VERBOSE)
1546 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1548 *(u_int32_t *)((char *)&smap->base + 4),
1549 (u_int32_t)smap->base,
1550 *(u_int32_t *)((char *)&smap->length + 4),
1551 (u_int32_t)smap->length);
1553 if (smap->type != 0x01)
1556 if (smap->length == 0)
1559 Realmem += smap->length;
1561 if (smap->base >= 0xffffffffLLU) {
1562 kprintf("%ju MB of memory above 4GB ignored\n",
1563 (uintmax_t)(smap->length / 1024 / 1024));
1567 for (i = 0; i <= physmap_idx; i += 2) {
1568 if (smap->base < physmap[i + 1]) {
1569 if (boothowto & RB_VERBOSE) {
1570 kprintf("Overlapping or non-montonic "
1571 "memory region, ignoring "
1574 Realmem -= smap->length;
1579 if (smap->base == physmap[physmap_idx + 1]) {
1580 physmap[physmap_idx + 1] += smap->length;
1585 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1586 kprintf("Too many segments in the physical "
1587 "address map, giving up\n");
1590 physmap[physmap_idx] = smap->base;
1591 physmap[physmap_idx + 1] = smap->base + smap->length;
1593 ; /* fix GCC3.x warning */
1594 } while (vmf.vmf_ebx != 0);
1597 * Perform "base memory" related probes & setup based on SMAP
1600 for (i = 0; i <= physmap_idx; i += 2) {
1601 if (physmap[i] == 0x00000000) {
1602 basemem = physmap[i + 1] / 1024;
1611 if (basemem > 640) {
1612 kprintf("Preposterous BIOS basemem of %uK, "
1613 "truncating to 640K\n", basemem);
1617 for (pa = trunc_page(basemem * 1024);
1618 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1619 pte = vtopte(pa + KERNBASE);
1620 *pte = pa | PG_RW | PG_V;
1624 for (i = basemem / 4; i < 160; i++)
1625 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1628 if (physmap[1] != 0)
1632 * If we failed above, try memory map with INT 15:E801
1634 vmf.vmf_ax = 0xE801;
1635 if (vm86_intcall(0x15, &vmf) == 0) {
1636 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1640 vm86_intcall(0x15, &vmf);
1641 extmem = vmf.vmf_ax;
1644 * Prefer the RTC value for extended memory.
1646 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1651 * Special hack for chipsets that still remap the 384k hole when
1652 * there's 16MB of memory - this really confuses people that
1653 * are trying to use bus mastering ISA controllers with the
1654 * "16MB limit"; they only have 16MB, but the remapping puts
1655 * them beyond the limit.
1657 * If extended memory is between 15-16MB (16-17MB phys address range),
1660 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1664 physmap[1] = basemem * 1024;
1666 physmap[physmap_idx] = 0x100000;
1667 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1671 * Now, physmap contains a map of physical memory.
1675 /* make hole for AP bootstrap code YYY */
1676 physmap[1] = mp_bootaddress(physmap[1]);
1679 /* Save EBDA address, if any */
1680 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1684 * Maxmem isn't the "maximum memory", it's one larger than the
1685 * highest page of the physical address space. It should be
1686 * called something like "Maxphyspage". We may adjust this
1687 * based on ``hw.physmem'' and the results of the memory test.
1689 Maxmem = atop(physmap[physmap_idx + 1]);
1692 Maxmem = MAXMEM / 4;
1695 if (kgetenv_quad("hw.physmem", &maxmem))
1696 Maxmem = atop(maxmem);
1698 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1699 (boothowto & RB_VERBOSE))
1700 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1703 * If Maxmem has been increased beyond what the system has detected,
1704 * extend the last memory segment to the new limit.
1706 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1707 physmap[physmap_idx + 1] = ptoa(Maxmem);
1709 /* call pmap initialization to make new kernel address space */
1710 pmap_bootstrap(first, 0);
1713 * Size up each available chunk of physical memory.
1715 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1718 phys_avail[pa_indx++] = physmap[0];
1719 phys_avail[pa_indx] = physmap[0];
1720 dump_avail[da_indx] = physmap[0];
1725 * Get dcons buffer address
1727 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1728 kgetenv_quad("dcons.size", &dcons_size) == 0)
1732 * physmap is in bytes, so when converting to page boundaries,
1733 * round up the start address and round down the end address.
1735 for (i = 0; i <= physmap_idx; i += 2) {
1739 if (physmap[i + 1] < end)
1740 end = trunc_page(physmap[i + 1]);
1741 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1742 int tmp, page_bad, full;
1746 int *ptr = (int *)CADDR1;
1751 * block out kernel memory as not available.
1753 if (pa >= 0x100000 && pa < first)
1757 * block out dcons buffer
1760 && pa >= trunc_page(dcons_addr)
1761 && pa < dcons_addr + dcons_size)
1767 * map page into kernel: valid, read/write,non-cacheable
1769 *pte = pa | PG_V | PG_RW | PG_N;
1774 * Test for alternating 1's and 0's
1776 *(volatile int *)ptr = 0xaaaaaaaa;
1777 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1781 * Test for alternating 0's and 1's
1783 *(volatile int *)ptr = 0x55555555;
1784 if (*(volatile int *)ptr != 0x55555555) {
1790 *(volatile int *)ptr = 0xffffffff;
1791 if (*(volatile int *)ptr != 0xffffffff) {
1797 *(volatile int *)ptr = 0x0;
1798 if (*(volatile int *)ptr != 0x0) {
1802 * Restore original value.
1807 * Adjust array of valid/good pages.
1809 if (page_bad == TRUE) {
1813 * If this good page is a continuation of the
1814 * previous set of good pages, then just increase
1815 * the end pointer. Otherwise start a new chunk.
1816 * Note that "end" points one higher than end,
1817 * making the range >= start and < end.
1818 * If we're also doing a speculative memory
1819 * test and we at or past the end, bump up Maxmem
1820 * so that we keep going. The first bad page
1821 * will terminate the loop.
1823 if (phys_avail[pa_indx] == pa) {
1824 phys_avail[pa_indx] += PAGE_SIZE;
1827 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1828 kprintf("Too many holes in the physical address space, giving up\n");
1833 phys_avail[pa_indx++] = pa; /* start */
1834 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1838 if (dump_avail[da_indx] == pa) {
1839 dump_avail[da_indx] += PAGE_SIZE;
1842 if (da_indx >= PHYSMAP_ENTRIES*2) {
1846 dump_avail[da_indx++] = pa; /* start */
1847 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1860 * The last chunk must contain at least one page plus the message
1861 * buffer to avoid complicating other code (message buffer address
1862 * calculation, etc.).
1864 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1865 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1866 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1867 phys_avail[pa_indx--] = 0;
1868 phys_avail[pa_indx--] = 0;
1871 Maxmem = atop(phys_avail[pa_indx]);
1873 /* Trim off space for the message buffer. */
1874 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1876 avail_end = phys_avail[pa_indx];
1879 struct machintr_abi MachIntrABI;
1890 * 7 Device Not Available (x87)
1892 * 9 Coprocessor Segment overrun (unsupported, reserved)
1894 * 11 Segment not present
1896 * 13 General Protection
1899 * 16 x87 FP Exception pending
1900 * 17 Alignment Check
1902 * 19 SIMD floating point
1904 * 32-255 INTn/external sources
1909 struct gate_descriptor *gdp;
1910 int gsel_tss, metadata_missing, off, x;
1911 struct mdglobaldata *gd;
1914 * Prevent lowering of the ipl if we call tsleep() early.
1916 gd = &CPU_prvspace[0].mdglobaldata;
1917 bzero(gd, sizeof(*gd));
1919 gd->mi.gd_curthread = &thread0;
1920 thread0.td_gd = &gd->mi;
1922 atdevbase = ISA_HOLE_START + KERNBASE;
1924 metadata_missing = 0;
1925 if (bootinfo.bi_modulep) {
1926 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1927 preload_bootstrap_relocate(KERNBASE);
1929 metadata_missing = 1;
1931 if (bootinfo.bi_envp)
1932 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1934 if (boothowto & RB_VERBOSE)
1938 * Default MachIntrABI to ICU
1940 MachIntrABI = MachIntrABI_ICU;
1942 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1943 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1947 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1948 * and ncpus_fit_mask remain 0.
1953 /* Init basic tunables, hz etc */
1957 * make gdt memory segments, the code segment goes up to end of the
1958 * page with etext in it, the data segment goes to the end of
1962 * XXX text protection is temporarily (?) disabled. The limit was
1963 * i386_btop(round_page(etext)) - 1.
1965 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1966 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1968 gdt_segs[GPRIV_SEL].ssd_limit =
1969 atop(sizeof(struct privatespace) - 1);
1970 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1971 gdt_segs[GPROC0_SEL].ssd_base =
1972 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1974 gd->mi.gd_prvspace = &CPU_prvspace[0];
1977 * Note: on both UP and SMP curthread must be set non-NULL
1978 * early in the boot sequence because the system assumes
1979 * that 'curthread' is never NULL.
1982 for (x = 0; x < NGDT; x++) {
1984 /* avoid overwriting db entries with APM ones */
1985 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1988 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1991 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1992 r_gdt.rd_base = (int) gdt;
1995 mi_gdinit(&gd->mi, 0);
1997 mi_proc0init(&gd->mi, proc0paddr);
1998 safepri = TDPRI_MAX;
2000 /* make ldt memory segments */
2002 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
2003 * should be spelled ...MAX_USER...
2005 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2006 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
2007 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
2008 ssdtosd(&ldt_segs[x], &ldt[x].sd);
2010 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
2012 gd->gd_currentldt = _default_ldt;
2013 /* spinlocks and the BGL */
2017 * Setup the hardware exception table. Most exceptions use
2018 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
2019 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
2020 * an 'interrupt trap gate', which disables interrupts on entry,
2021 * in order to be able to poll the appropriate CRn register to
2022 * determine the fault address.
2024 for (x = 0; x < NIDT; x++) {
2025 #ifdef DEBUG_INTERRUPTS
2026 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2028 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2031 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2032 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2033 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2034 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2035 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2036 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2037 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2038 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2039 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
2040 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2041 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2042 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2043 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2044 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2045 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2046 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2047 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2048 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2049 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2050 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2051 setidt(0x80, &IDTVEC(int0x80_syscall),
2052 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
2054 r_idt.rd_limit = sizeof(idt0) - 1;
2055 r_idt.rd_base = (int) idt;
2059 * Initialize the console before we print anything out.
2063 if (metadata_missing)
2064 kprintf("WARNING: loader(8) metadata is missing!\n");
2073 * Initialize IRQ mapping
2076 * SHOULD be after elcr_probe()
2078 MachIntrABI_ICU.initmap();
2080 MachIntrABI_IOAPIC.initmap();
2085 if (boothowto & RB_KDB)
2086 Debugger("Boot flags requested debugger");
2089 finishidentcpu(); /* Final stage of CPU initialization */
2090 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2091 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2092 initializecpu(); /* Initialize CPU registers */
2095 * make an initial tss so cpu can get interrupt stack on syscall!
2096 * The 16 bytes is to save room for a VM86 context.
2098 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2099 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2100 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2101 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2102 gd->gd_common_tssd = *gd->gd_tss_gdt;
2103 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2106 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2107 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2108 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2109 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2110 dblfault_tss.tss_cr3 = (int)IdlePTD;
2111 dblfault_tss.tss_eip = (int) dblfault_handler;
2112 dblfault_tss.tss_eflags = PSL_KERNEL;
2113 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2114 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2115 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2116 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2117 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2121 init_param2(physmem);
2123 /* now running on new page tables, configured,and u/iom is accessible */
2125 /* Map the message buffer. */
2126 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2127 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2129 msgbufinit(msgbufp, MSGBUF_SIZE);
2131 /* make a call gate to reenter kernel with */
2132 gdp = &ldt[LSYS5CALLS_SEL].gd;
2134 x = (int) &IDTVEC(syscall);
2135 gdp->gd_looffset = x++;
2136 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2138 gdp->gd_type = SDT_SYS386CGT;
2139 gdp->gd_dpl = SEL_UPL;
2141 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2143 /* XXX does this work? */
2144 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2145 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2147 /* transfer to user mode */
2149 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2150 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2152 /* setup proc 0's pcb */
2153 thread0.td_pcb->pcb_flags = 0;
2154 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2155 thread0.td_pcb->pcb_ext = 0;
2156 lwp0.lwp_md.md_regs = &proc0_tf;
2160 * Initialize machine-dependant portions of the global data structure.
2161 * Note that the global data area and cpu0's idlestack in the private
2162 * data space were allocated in locore.
2164 * Note: the idlethread's cpl is 0
2166 * WARNING! Called from early boot, 'mycpu' may not work yet.
2169 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2172 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2174 lwkt_init_thread(&gd->mi.gd_idlethread,
2175 gd->mi.gd_prvspace->idlestack,
2176 sizeof(gd->mi.gd_prvspace->idlestack),
2178 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2179 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2180 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2181 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2185 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2187 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2188 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2195 globaldata_find(int cpu)
2197 KKASSERT(cpu >= 0 && cpu < ncpus);
2198 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2201 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2202 static void f00f_hack(void *unused);
2203 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2206 f00f_hack(void *unused)
2208 struct gate_descriptor *new_idt;
2214 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2216 r_idt.rd_limit = sizeof(idt0) - 1;
2218 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2220 panic("kmem_alloc returned 0");
2221 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2222 panic("kmem_alloc returned non-page-aligned memory");
2223 /* Put the first seven entries in the lower page */
2224 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2225 bcopy(idt, new_idt, sizeof(idt0));
2226 r_idt.rd_base = (int)new_idt;
2229 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2230 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2231 panic("vm_map_protect failed");
2234 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2237 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2239 lp->lwp_md.md_regs->tf_eip = addr;
2244 ptrace_single_step(struct lwp *lp)
2246 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2251 fill_regs(struct lwp *lp, struct reg *regs)
2253 struct trapframe *tp;
2255 tp = lp->lwp_md.md_regs;
2256 regs->r_gs = tp->tf_gs;
2257 regs->r_fs = tp->tf_fs;
2258 regs->r_es = tp->tf_es;
2259 regs->r_ds = tp->tf_ds;
2260 regs->r_edi = tp->tf_edi;
2261 regs->r_esi = tp->tf_esi;
2262 regs->r_ebp = tp->tf_ebp;
2263 regs->r_ebx = tp->tf_ebx;
2264 regs->r_edx = tp->tf_edx;
2265 regs->r_ecx = tp->tf_ecx;
2266 regs->r_eax = tp->tf_eax;
2267 regs->r_eip = tp->tf_eip;
2268 regs->r_cs = tp->tf_cs;
2269 regs->r_eflags = tp->tf_eflags;
2270 regs->r_esp = tp->tf_esp;
2271 regs->r_ss = tp->tf_ss;
2276 set_regs(struct lwp *lp, struct reg *regs)
2278 struct trapframe *tp;
2280 tp = lp->lwp_md.md_regs;
2281 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2282 !CS_SECURE(regs->r_cs))
2284 tp->tf_gs = regs->r_gs;
2285 tp->tf_fs = regs->r_fs;
2286 tp->tf_es = regs->r_es;
2287 tp->tf_ds = regs->r_ds;
2288 tp->tf_edi = regs->r_edi;
2289 tp->tf_esi = regs->r_esi;
2290 tp->tf_ebp = regs->r_ebp;
2291 tp->tf_ebx = regs->r_ebx;
2292 tp->tf_edx = regs->r_edx;
2293 tp->tf_ecx = regs->r_ecx;
2294 tp->tf_eax = regs->r_eax;
2295 tp->tf_eip = regs->r_eip;
2296 tp->tf_cs = regs->r_cs;
2297 tp->tf_eflags = regs->r_eflags;
2298 tp->tf_esp = regs->r_esp;
2299 tp->tf_ss = regs->r_ss;
2303 #ifndef CPU_DISABLE_SSE
2305 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2307 struct env87 *penv_87 = &sv_87->sv_env;
2308 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2311 /* FPU control/status */
2312 penv_87->en_cw = penv_xmm->en_cw;
2313 penv_87->en_sw = penv_xmm->en_sw;
2314 penv_87->en_tw = penv_xmm->en_tw;
2315 penv_87->en_fip = penv_xmm->en_fip;
2316 penv_87->en_fcs = penv_xmm->en_fcs;
2317 penv_87->en_opcode = penv_xmm->en_opcode;
2318 penv_87->en_foo = penv_xmm->en_foo;
2319 penv_87->en_fos = penv_xmm->en_fos;
2322 for (i = 0; i < 8; ++i)
2323 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2327 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2329 struct env87 *penv_87 = &sv_87->sv_env;
2330 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2333 /* FPU control/status */
2334 penv_xmm->en_cw = penv_87->en_cw;
2335 penv_xmm->en_sw = penv_87->en_sw;
2336 penv_xmm->en_tw = penv_87->en_tw;
2337 penv_xmm->en_fip = penv_87->en_fip;
2338 penv_xmm->en_fcs = penv_87->en_fcs;
2339 penv_xmm->en_opcode = penv_87->en_opcode;
2340 penv_xmm->en_foo = penv_87->en_foo;
2341 penv_xmm->en_fos = penv_87->en_fos;
2344 for (i = 0; i < 8; ++i)
2345 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2347 #endif /* CPU_DISABLE_SSE */
2350 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2352 #ifndef CPU_DISABLE_SSE
2354 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2355 (struct save87 *)fpregs);
2358 #endif /* CPU_DISABLE_SSE */
2359 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2364 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2366 #ifndef CPU_DISABLE_SSE
2368 set_fpregs_xmm((struct save87 *)fpregs,
2369 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2372 #endif /* CPU_DISABLE_SSE */
2373 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2378 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2381 dbregs->dr0 = rdr0();
2382 dbregs->dr1 = rdr1();
2383 dbregs->dr2 = rdr2();
2384 dbregs->dr3 = rdr3();
2385 dbregs->dr4 = rdr4();
2386 dbregs->dr5 = rdr5();
2387 dbregs->dr6 = rdr6();
2388 dbregs->dr7 = rdr7();
2392 pcb = lp->lwp_thread->td_pcb;
2393 dbregs->dr0 = pcb->pcb_dr0;
2394 dbregs->dr1 = pcb->pcb_dr1;
2395 dbregs->dr2 = pcb->pcb_dr2;
2396 dbregs->dr3 = pcb->pcb_dr3;
2399 dbregs->dr6 = pcb->pcb_dr6;
2400 dbregs->dr7 = pcb->pcb_dr7;
2406 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2409 load_dr0(dbregs->dr0);
2410 load_dr1(dbregs->dr1);
2411 load_dr2(dbregs->dr2);
2412 load_dr3(dbregs->dr3);
2413 load_dr4(dbregs->dr4);
2414 load_dr5(dbregs->dr5);
2415 load_dr6(dbregs->dr6);
2416 load_dr7(dbregs->dr7);
2419 struct ucred *ucred;
2421 uint32_t mask1, mask2;
2424 * Don't let an illegal value for dr7 get set. Specifically,
2425 * check for undefined settings. Setting these bit patterns
2426 * result in undefined behaviour and can lead to an unexpected
2429 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2430 i++, mask1 <<= 2, mask2 <<= 2)
2431 if ((dbregs->dr7 & mask1) == mask2)
2434 pcb = lp->lwp_thread->td_pcb;
2435 ucred = lp->lwp_proc->p_ucred;
2438 * Don't let a process set a breakpoint that is not within the
2439 * process's address space. If a process could do this, it
2440 * could halt the system by setting a breakpoint in the kernel
2441 * (if ddb was enabled). Thus, we need to check to make sure
2442 * that no breakpoints are being enabled for addresses outside
2443 * process's address space, unless, perhaps, we were called by
2446 * XXX - what about when the watched area of the user's
2447 * address space is written into from within the kernel
2448 * ... wouldn't that still cause a breakpoint to be generated
2449 * from within kernel mode?
2452 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2453 if (dbregs->dr7 & 0x3) {
2454 /* dr0 is enabled */
2455 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2459 if (dbregs->dr7 & (0x3<<2)) {
2460 /* dr1 is enabled */
2461 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2465 if (dbregs->dr7 & (0x3<<4)) {
2466 /* dr2 is enabled */
2467 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2471 if (dbregs->dr7 & (0x3<<6)) {
2472 /* dr3 is enabled */
2473 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2478 pcb->pcb_dr0 = dbregs->dr0;
2479 pcb->pcb_dr1 = dbregs->dr1;
2480 pcb->pcb_dr2 = dbregs->dr2;
2481 pcb->pcb_dr3 = dbregs->dr3;
2482 pcb->pcb_dr6 = dbregs->dr6;
2483 pcb->pcb_dr7 = dbregs->dr7;
2485 pcb->pcb_flags |= PCB_DBREGS;
2492 * Return > 0 if a hardware breakpoint has been hit, and the
2493 * breakpoint was in user space. Return 0, otherwise.
2496 user_dbreg_trap(void)
2498 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2499 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2500 int nbp; /* number of breakpoints that triggered */
2501 caddr_t addr[4]; /* breakpoint addresses */
2505 if ((dr7 & 0x000000ff) == 0) {
2507 * all GE and LE bits in the dr7 register are zero,
2508 * thus the trap couldn't have been caused by the
2509 * hardware debug registers
2516 bp = dr6 & 0x0000000f;
2520 * None of the breakpoint bits are set meaning this
2521 * trap was not caused by any of the debug registers
2527 * at least one of the breakpoints were hit, check to see
2528 * which ones and if any of them are user space addresses
2532 addr[nbp++] = (caddr_t)rdr0();
2535 addr[nbp++] = (caddr_t)rdr1();
2538 addr[nbp++] = (caddr_t)rdr2();
2541 addr[nbp++] = (caddr_t)rdr3();
2544 for (i=0; i<nbp; i++) {
2546 (caddr_t)VM_MAX_USER_ADDRESS) {
2548 * addr[i] is in user space
2555 * None of the breakpoints are in user space.
2563 Debugger(const char *msg)
2565 kprintf("Debugger(\"%s\") called.\n", msg);
2572 * Provide inb() and outb() as functions. They are normally only
2573 * available as macros calling inlined functions, thus cannot be
2574 * called inside DDB.
2576 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2582 /* silence compiler warnings */
2584 void outb(u_int, u_char);
2591 * We use %%dx and not %1 here because i/o is done at %dx and not at
2592 * %edx, while gcc generates inferior code (movw instead of movl)
2593 * if we tell it to load (u_short) port.
2595 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2600 outb(u_int port, u_char data)
2604 * Use an unnecessary assignment to help gcc's register allocator.
2605 * This make a large difference for gcc-1.40 and a tiny difference
2606 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2607 * best results. gcc-2.6.0 can't handle this.
2610 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2617 #include "opt_cpu.h"
2621 * initialize all the SMP locks
2624 /* critical region when masking or unmasking interupts */
2625 struct spinlock_deprecated imen_spinlock;
2627 /* critical region for old style disable_intr/enable_intr */
2628 struct spinlock_deprecated mpintr_spinlock;
2630 /* critical region around INTR() routines */
2631 struct spinlock_deprecated intr_spinlock;
2633 /* lock region used by kernel profiling */
2634 struct spinlock_deprecated mcount_spinlock;
2636 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2637 struct spinlock_deprecated com_spinlock;
2639 /* lock regions around the clock hardware */
2640 struct spinlock_deprecated clock_spinlock;
2642 /* lock around the MP rendezvous */
2643 struct spinlock_deprecated smp_rv_spinlock;
2650 * Get the initial mplock with a count of 1 for the BSP.
2651 * This uses a LOGICAL cpu ID, ie BSP == 0.
2653 cpu_get_initial_mplock();
2656 spin_lock_init(&mcount_spinlock);
2657 spin_lock_init(&intr_spinlock);
2658 spin_lock_init(&mpintr_spinlock);
2659 spin_lock_init(&imen_spinlock);
2660 spin_lock_init(&smp_rv_spinlock);
2661 spin_lock_init(&com_spinlock);
2662 spin_lock_init(&clock_spinlock);
2664 /* our token pool needs to work early */
2665 lwkt_token_pool_init();