2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 //#include "use_npx.h"
45 #include "opt_atalk.h"
46 #include "opt_compat.h"
49 #include "opt_directio.h"
52 #include "opt_msgbuf.h"
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sysproto.h>
58 #include <sys/signalvar.h>
59 #include <sys/kernel.h>
60 #include <sys/linker.h>
61 #include <sys/malloc.h>
65 #include <sys/reboot.h>
67 #include <sys/msgbuf.h>
68 #include <sys/sysent.h>
69 #include <sys/sysctl.h>
70 #include <sys/vmmeter.h>
72 #include <sys/upcall.h>
73 #include <sys/usched.h>
77 #include <vm/vm_param.h>
79 #include <vm/vm_kern.h>
80 #include <vm/vm_object.h>
81 #include <vm/vm_page.h>
82 #include <vm/vm_map.h>
83 #include <vm/vm_pager.h>
84 #include <vm/vm_extern.h>
86 #include <sys/thread2.h>
87 #include <sys/mplock2.h>
95 #include <machine/cpu.h>
96 #include <machine/clock.h>
97 #include <machine/specialreg.h>
99 #include <machine/bootinfo.h>
101 #include <machine/md_var.h>
102 #include <machine/metadata.h>
103 #include <machine/pc/bios.h>
104 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
105 #include <machine/globaldata.h> /* CPU_prvspace */
106 #include <machine/smp.h>
108 #include <machine/perfmon.h>
110 #include <machine/cputypes.h>
111 #include <machine/intr_machdep.h>
114 #include <bus/isa/isa_device.h>
116 #include <machine_base/isa/isa_intr.h>
117 #include <bus/isa/rtc.h>
118 #include <sys/random.h>
119 #include <sys/ptrace.h>
120 #include <machine/sigframe.h>
122 #include <sys/machintr.h>
123 #include <machine_base/icu/icu_abi.h>
124 #include <machine_base/icu/elcr_var.h>
125 #include <machine_base/apic/lapic.h>
126 #include <machine_base/apic/ioapic.h>
127 #include <machine_base/apic/ioapic_abi.h>
129 #define PHYSMAP_ENTRIES 10
131 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
133 extern void printcpuinfo(void); /* XXX header file */
134 extern void identify_cpu(void);
136 extern void finishidentcpu(void);
138 extern void panicifcpuunsupported(void);
140 static void cpu_startup(void *);
141 static void pic_finish(void *);
142 static void cpu_finish(void *);
144 #ifndef CPU_DISABLE_SSE
145 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
146 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
147 #endif /* CPU_DISABLE_SSE */
149 extern void ffs_rawread_setup(void);
150 #endif /* DIRECTIO */
151 static void init_locks(void);
153 SYSINIT(cpu, SI_BOOT2_START_CPU, SI_ORDER_FIRST, cpu_startup, NULL)
154 SYSINIT(pic_finish, SI_BOOT2_FINISH_PIC, SI_ORDER_FIRST, pic_finish, NULL)
155 SYSINIT(cpu_finish, SI_BOOT2_FINISH_CPU, SI_ORDER_FIRST, cpu_finish, NULL)
158 extern vm_offset_t ksym_start, ksym_end;
161 struct privatespace CPU_prvspace[MAXCPU] __aligned(4096); /* XXX */
163 int _udatasel, _ucodesel, _ucode32sel;
166 int64_t tsc_offsets[MAXCPU];
168 int64_t tsc_offsets[1];
171 #if defined(SWTCH_OPTIM_STATS)
172 extern int swtch_optim_stats;
173 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
174 CTLFLAG_RD, &swtch_optim_stats, 0, "");
175 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
176 CTLFLAG_RD, &tlb_flush_count, 0, "");
181 u_long ebda_addr = 0;
183 int imcr_present = 0;
185 int naps = 0; /* # of Applications processors */
190 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
192 u_long pmem = ctob(physmem);
194 int error = sysctl_handle_long(oidp, &pmem, 0, req);
198 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
199 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
202 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
204 int error = sysctl_handle_int(oidp, 0,
205 ctob(physmem - vmstats.v_wire_count), req);
209 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
210 0, 0, sysctl_hw_usermem, "IU", "");
213 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
215 int error = sysctl_handle_int(oidp, 0,
216 x86_64_btop(avail_end - avail_start), req);
220 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
221 0, 0, sysctl_hw_availpages, "I", "");
227 * The number of PHYSMAP entries must be one less than the number of
228 * PHYSSEG entries because the PHYSMAP entry that spans the largest
229 * physical address that is accessible by ISA DMA is split into two
232 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
234 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
235 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
237 /* must be 2 less so 0 0 can signal end of chunks */
238 #define PHYS_AVAIL_ARRAY_END (NELEM(phys_avail) - 2)
239 #define DUMP_AVAIL_ARRAY_END (NELEM(dump_avail) - 2)
241 static vm_offset_t buffer_sva, buffer_eva;
242 vm_offset_t clean_sva, clean_eva;
243 static vm_offset_t pager_sva, pager_eva;
244 static struct trapframe proc0_tf;
247 cpu_startup(void *dummy)
251 vm_offset_t firstaddr;
254 * Good {morning,afternoon,evening,night}.
256 kprintf("%s", version);
259 panicifcpuunsupported();
263 kprintf("real memory = %ju (%ju MB)\n",
265 (intmax_t)Realmem / 1024 / 1024);
267 * Display any holes after the first chunk of extended memory.
272 kprintf("Physical memory chunk(s):\n");
273 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
274 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
276 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
277 (intmax_t)phys_avail[indx],
278 (intmax_t)phys_avail[indx + 1] - 1,
280 (intmax_t)(size1 / PAGE_SIZE));
285 * Allocate space for system data structures.
286 * The first available kernel virtual address is in "v".
287 * As pages of kernel virtual memory are allocated, "v" is incremented.
288 * As pages of memory are allocated and cleared,
289 * "firstaddr" is incremented.
290 * An index into the kernel page table corresponding to the
291 * virtual memory address maintained in "v" is kept in "mapaddr".
295 * Make two passes. The first pass calculates how much memory is
296 * needed and allocates it. The second pass assigns virtual
297 * addresses to the various data structures.
301 v = (caddr_t)firstaddr;
303 #define valloc(name, type, num) \
304 (name) = (type *)v; v = (caddr_t)((name)+(num))
305 #define valloclim(name, type, num, lim) \
306 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
309 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
310 * For the first 64MB of ram nominally allocate sufficient buffers to
311 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
312 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
313 * the buffer cache we limit the eventual kva reservation to
316 * factor represents the 1/4 x ram conversion.
319 int factor = 4 * BKVASIZE / 1024;
320 int kbytes = physmem * (PAGE_SIZE / 1024);
324 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
326 nbuf += (kbytes - 65536) * 2 / (factor * 5);
327 if (maxbcache && nbuf > maxbcache / BKVASIZE)
328 nbuf = maxbcache / BKVASIZE;
332 * Do not allow the buffer_map to be more then 1/2 the size of the
335 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
336 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
337 kprintf("Warning: nbufs capped at %d\n", nbuf);
340 nswbuf = max(min(nbuf/4, 256), 16);
342 if (nswbuf < NSWBUF_MIN)
349 valloc(swbuf, struct buf, nswbuf);
350 valloc(buf, struct buf, nbuf);
353 * End of first pass, size has been calculated so allocate memory
355 if (firstaddr == 0) {
356 size = (vm_size_t)(v - firstaddr);
357 firstaddr = kmem_alloc(&kernel_map, round_page(size));
359 panic("startup: no room for tables");
364 * End of second pass, addresses have been assigned
366 if ((vm_size_t)(v - firstaddr) != size)
367 panic("startup: table size inconsistency");
369 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
370 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
371 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
373 buffer_map.system_map = 1;
374 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
375 (nswbuf*MAXPHYS) + pager_map_size);
376 pager_map.system_map = 1;
378 #if defined(USERCONFIG)
380 cninit(); /* the preferred console may have changed */
383 kprintf("avail memory = %ju (%ju MB)\n",
384 (uintmax_t)ptoa(vmstats.v_free_count),
385 (uintmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
388 * Set up buffers, so they can be used to read disk labels.
391 vm_pager_bufferinit();
395 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
397 mp_start(); /* fire up the APs and APICs */
403 cpu_finish(void *dummy __unused)
409 pic_finish(void *dummy __unused)
411 /* Log ELCR information */
415 MachIntrABI.finalize();
419 * Send an interrupt to process.
421 * Stack is set up to allow sigcode stored
422 * at top to call routine, followed by kcall
423 * to sigreturn routine below. After sigreturn
424 * resets the signal mask, the stack, and the
425 * frame pointer, it returns to the user
429 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
431 struct lwp *lp = curthread->td_lwp;
432 struct proc *p = lp->lwp_proc;
433 struct trapframe *regs;
434 struct sigacts *psp = p->p_sigacts;
435 struct sigframe sf, *sfp;
439 regs = lp->lwp_md.md_regs;
440 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
442 /* Save user context */
443 bzero(&sf, sizeof(struct sigframe));
444 sf.sf_uc.uc_sigmask = *mask;
445 sf.sf_uc.uc_stack = lp->lwp_sigstk;
446 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
447 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
448 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
450 /* Make the size of the saved context visible to userland */
451 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
453 /* Save mailbox pending state for syscall interlock semantics */
454 if (p->p_flag & P_MAILBOX)
455 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
457 /* Allocate and validate space for the signal handler context. */
458 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
459 SIGISMEMBER(psp->ps_sigonstack, sig)) {
460 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
461 sizeof(struct sigframe));
462 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
464 /* We take red zone into account */
465 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
468 /* Align to 16 bytes */
469 sfp = (struct sigframe *)((intptr_t)sp & ~(intptr_t)0xF);
471 /* Translate the signal is appropriate */
472 if (p->p_sysent->sv_sigtbl) {
473 if (sig <= p->p_sysent->sv_sigsize)
474 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
478 * Build the argument list for the signal handler.
480 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
482 regs->tf_rdi = sig; /* argument 1 */
483 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
485 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
487 * Signal handler installed with SA_SIGINFO.
489 * action(signo, siginfo, ucontext)
491 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
492 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
493 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
495 /* fill siginfo structure */
496 sf.sf_si.si_signo = sig;
497 sf.sf_si.si_code = code;
498 sf.sf_si.si_addr = (void *)regs->tf_addr;
501 * Old FreeBSD-style arguments.
503 * handler (signo, code, [uc], addr)
505 regs->tf_rsi = (register_t)code; /* argument 2 */
506 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
507 sf.sf_ahu.sf_handler = catcher;
511 * If we're a vm86 process, we want to save the segment registers.
512 * We also change eflags to be our emulated eflags, not the actual
516 if (regs->tf_eflags & PSL_VM) {
517 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
518 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
520 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
521 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
522 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
523 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
525 if (vm86->vm86_has_vme == 0)
526 sf.sf_uc.uc_mcontext.mc_eflags =
527 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
528 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
531 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
532 * syscalls made by the signal handler. This just avoids
533 * wasting time for our lazy fixup of such faults. PSL_NT
534 * does nothing in vm86 mode, but vm86 programs can set it
535 * almost legitimately in probes for old cpu types.
537 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
542 * Save the FPU state and reinit the FP unit
544 npxpush(&sf.sf_uc.uc_mcontext);
547 * Copy the sigframe out to the user's stack.
549 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
551 * Something is wrong with the stack pointer.
552 * ...Kill the process.
557 regs->tf_rsp = (register_t)sfp;
558 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
561 * i386 abi specifies that the direction flag must be cleared
564 regs->tf_rflags &= ~(PSL_T|PSL_D);
567 * 64 bit mode has a code and stack selector but
568 * no data or extra selector. %fs and %gs are not
571 regs->tf_cs = _ucodesel;
572 regs->tf_ss = _udatasel;
576 * Sanitize the trapframe for a virtual kernel passing control to a custom
577 * VM context. Remove any items that would otherwise create a privilage
580 * XXX at the moment we allow userland to set the resume flag. Is this a
584 cpu_sanitize_frame(struct trapframe *frame)
586 frame->tf_cs = _ucodesel;
587 frame->tf_ss = _udatasel;
588 /* XXX VM (8086) mode not supported? */
589 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
590 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
596 * Sanitize the tls so loading the descriptor does not blow up
597 * on us. For x86_64 we don't have to do anything.
600 cpu_sanitize_tls(struct savetls *tls)
606 * sigreturn(ucontext_t *sigcntxp)
608 * System call to cleanup state after a signal
609 * has been taken. Reset signal mask and
610 * stack state from context left by sendsig (above).
611 * Return to previous pc and psl as specified by
612 * context left by sendsig. Check carefully to
613 * make sure that the user has not modified the
614 * state to gain improper privileges.
618 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
619 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
622 sys_sigreturn(struct sigreturn_args *uap)
624 struct lwp *lp = curthread->td_lwp;
625 struct proc *p = lp->lwp_proc;
626 struct trapframe *regs;
634 * We have to copy the information into kernel space so userland
635 * can't modify it while we are sniffing it.
637 regs = lp->lwp_md.md_regs;
638 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
642 rflags = ucp->uc_mcontext.mc_rflags;
644 /* VM (8086) mode not supported */
645 rflags &= ~PSL_VM_UNSUPP;
648 if (eflags & PSL_VM) {
649 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
650 struct vm86_kernel *vm86;
653 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
654 * set up the vm86 area, and we can't enter vm86 mode.
656 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
658 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
659 if (vm86->vm86_inited == 0)
662 /* go back to user mode if both flags are set */
663 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
664 trapsignal(lp, SIGBUS, 0);
666 if (vm86->vm86_has_vme) {
667 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
668 (eflags & VME_USERCHANGE) | PSL_VM;
670 vm86->vm86_eflags = eflags; /* save VIF, VIP */
671 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
672 (eflags & VM_USERCHANGE) | PSL_VM;
674 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
675 tf->tf_eflags = eflags;
676 tf->tf_vm86_ds = tf->tf_ds;
677 tf->tf_vm86_es = tf->tf_es;
678 tf->tf_vm86_fs = tf->tf_fs;
679 tf->tf_vm86_gs = tf->tf_gs;
680 tf->tf_ds = _udatasel;
681 tf->tf_es = _udatasel;
682 tf->tf_fs = _udatasel;
683 tf->tf_gs = _udatasel;
688 * Don't allow users to change privileged or reserved flags.
691 * XXX do allow users to change the privileged flag PSL_RF.
692 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
693 * should sometimes set it there too. tf_eflags is kept in
694 * the signal context during signal handling and there is no
695 * other place to remember it, so the PSL_RF bit may be
696 * corrupted by the signal handler without us knowing.
697 * Corruption of the PSL_RF bit at worst causes one more or
698 * one less debugger trap, so allowing it is fairly harmless.
700 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
701 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
706 * Don't allow users to load a valid privileged %cs. Let the
707 * hardware check for invalid selectors, excess privilege in
708 * other selectors, invalid %eip's and invalid %esp's.
710 cs = ucp->uc_mcontext.mc_cs;
711 if (!CS_SECURE(cs)) {
712 kprintf("sigreturn: cs = 0x%x\n", cs);
713 trapsignal(lp, SIGBUS, T_PROTFLT);
716 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
720 * Restore the FPU state from the frame
723 npxpop(&ucp->uc_mcontext);
726 * Merge saved signal mailbox pending flag to maintain interlock
727 * semantics against system calls.
729 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
730 p->p_flag |= P_MAILBOX;
732 if (ucp->uc_mcontext.mc_onstack & 1)
733 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
735 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
737 lp->lwp_sigmask = ucp->uc_sigmask;
738 SIG_CANTMASK(lp->lwp_sigmask);
744 * Stack frame on entry to function. %rax will contain the function vector,
745 * %rcx will contain the function data. flags, rcx, and rax will have
746 * already been pushed on the stack.
757 sendupcall(struct vmupcall *vu, int morepending)
759 struct lwp *lp = curthread->td_lwp;
760 struct trapframe *regs;
761 struct upcall upcall;
762 struct upc_frame upc_frame;
766 * If we are a virtual kernel running an emulated user process
767 * context, switch back to the virtual kernel context before
768 * trying to post the signal.
770 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
771 lp->lwp_md.md_regs->tf_trapno = 0;
772 vkernel_trap(lp, lp->lwp_md.md_regs);
776 * Get the upcall data structure
778 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
779 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
782 kprintf("bad upcall address\n");
787 * If the data structure is already marked pending or has a critical
788 * section count, mark the data structure as pending and return
789 * without doing an upcall. vu_pending is left set.
791 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
792 if (upcall.upc_pending < vu->vu_pending) {
793 upcall.upc_pending = vu->vu_pending;
794 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
795 sizeof(upcall.upc_pending));
801 * We can run this upcall now, clear vu_pending.
803 * Bump our critical section count and set or clear the
804 * user pending flag depending on whether more upcalls are
805 * pending. The user will be responsible for calling
806 * upc_dispatch(-1) to process remaining upcalls.
809 upcall.upc_pending = morepending;
811 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
812 sizeof(upcall.upc_pending));
813 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
817 * Construct a stack frame and issue the upcall
819 regs = lp->lwp_md.md_regs;
820 upc_frame.rax = regs->tf_rax;
821 upc_frame.rcx = regs->tf_rcx;
822 upc_frame.rdx = regs->tf_rdx;
823 upc_frame.flags = regs->tf_rflags;
824 upc_frame.oldip = regs->tf_rip;
825 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
826 sizeof(upc_frame)) != 0) {
827 kprintf("bad stack on upcall\n");
829 regs->tf_rax = (register_t)vu->vu_func;
830 regs->tf_rcx = (register_t)vu->vu_data;
831 regs->tf_rdx = (register_t)lp->lwp_upcall;
832 regs->tf_rip = (register_t)vu->vu_ctx;
833 regs->tf_rsp -= sizeof(upc_frame);
838 * fetchupcall occurs in the context of a system call, which means that
839 * we have to return EJUSTRETURN in order to prevent eax and edx from
840 * being overwritten by the syscall return value.
842 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
843 * and the function pointer in %eax.
846 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
848 struct upc_frame upc_frame;
849 struct lwp *lp = curthread->td_lwp;
850 struct trapframe *regs;
852 struct upcall upcall;
855 regs = lp->lwp_md.md_regs;
857 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
861 * This jumps us to the next ready context.
864 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
867 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
870 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
871 regs->tf_rax = (register_t)vu->vu_func;
872 regs->tf_rcx = (register_t)vu->vu_data;
873 regs->tf_rdx = (register_t)lp->lwp_upcall;
874 regs->tf_rip = (register_t)vu->vu_ctx;
875 regs->tf_rsp = (register_t)rsp;
878 * This returns us to the originally interrupted code.
880 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
881 regs->tf_rax = upc_frame.rax;
882 regs->tf_rcx = upc_frame.rcx;
883 regs->tf_rdx = upc_frame.rdx;
884 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
885 (upc_frame.flags & PSL_USERCHANGE);
886 regs->tf_rip = upc_frame.oldip;
887 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
896 * Machine dependent boot() routine
898 * I haven't seen anything to put here yet
899 * Possibly some stuff might be grafted back here from boot()
907 * Shutdown the CPU as much as possible
913 __asm__ __volatile("hlt");
917 * cpu_idle() represents the idle LWKT. You cannot return from this function
918 * (unless you want to blow things up!). Instead we look for runnable threads
919 * and loop or halt as appropriate. Giant is not held on entry to the thread.
921 * The main loop is entered with a critical section held, we must release
922 * the critical section before doing anything else. lwkt_switch() will
923 * check for pending interrupts due to entering and exiting its own
926 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
927 * However, there are cases where the idlethread will be entered with
928 * the possibility that no IPI will occur and in such cases
929 * lwkt_switch() sets TDF_IDLE_NOHLT.
931 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
932 * 1 to just use hlt and for debugging purposes.
934 * NOTE: cpu_idle_repeat determines how many entries into the idle thread
935 * must occur before it starts using ACPI halt.
937 static int cpu_idle_hlt = 2;
938 static int cpu_idle_hltcnt;
939 static int cpu_idle_spincnt;
940 static u_int cpu_idle_repeat = 4;
941 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
942 &cpu_idle_hlt, 0, "Idle loop HLT enable");
943 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
944 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
945 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
946 &cpu_idle_spincnt, 0, "Idle loop entry spins");
947 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
948 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
951 cpu_idle_default_hook(void)
954 * We must guarentee that hlt is exactly the instruction
957 __asm __volatile("sti; hlt");
960 /* Other subsystems (e.g., ACPI) can hook this later. */
961 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
966 globaldata_t gd = mycpu;
967 struct thread *td __debugvar = gd->gd_curthread;
972 KKASSERT(td->td_critcount == 0);
975 * See if there are any LWKTs ready to go.
980 * When halting inside a cli we must check for reqflags
981 * races, particularly [re]schedule requests. Running
982 * splz() does the job.
985 * 0 Never halt, just spin
987 * 1 Always use HLT (or MONITOR/MWAIT if avail).
988 * This typically eats more power than the
991 * 2 Use HLT/MONITOR/MWAIT up to a point and then
992 * use the ACPI halt (default). This is a hybrid
993 * approach. See machdep.cpu_idle_repeat.
995 * 3 Always use the ACPI halt. This typically
996 * eats the least amount of power but the cpu
997 * will be slow waking up. Slows down e.g.
998 * compiles and other pipe/event oriented stuff.
1000 * NOTE: Interrupts are enabled and we are not in a critical
1003 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
1004 * don't bother capping gd_idle_repeat, it is ok if
1007 ++gd->gd_idle_repeat;
1008 reqflags = gd->gd_reqflags;
1009 quick = (cpu_idle_hlt == 1) ||
1010 (cpu_idle_hlt < 3 &&
1011 gd->gd_idle_repeat < cpu_idle_repeat);
1013 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
1014 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
1015 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
1017 } else if (cpu_idle_hlt) {
1018 __asm __volatile("cli");
1020 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
1022 cpu_idle_default_hook();
1026 __asm __volatile("sti");
1030 __asm __volatile("sti");
1039 * This routine is called if a spinlock has been held through the
1040 * exponential backoff period and is seriously contested. On a real cpu
1044 cpu_spinlock_contested(void)
1052 * Clear registers on exec
1055 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1057 struct thread *td = curthread;
1058 struct lwp *lp = td->td_lwp;
1059 struct pcb *pcb = td->td_pcb;
1060 struct trapframe *regs = lp->lwp_md.md_regs;
1062 /* was i386_user_cleanup() in NetBSD */
1065 bzero((char *)regs, sizeof(struct trapframe));
1066 regs->tf_rip = entry;
1067 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1068 regs->tf_rdi = stack; /* argv */
1069 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1070 regs->tf_ss = _udatasel;
1071 regs->tf_cs = _ucodesel;
1072 regs->tf_rbx = ps_strings;
1075 * Reset the hardware debug registers if they were in use.
1076 * They won't have any meaning for the newly exec'd process.
1078 if (pcb->pcb_flags & PCB_DBREGS) {
1084 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1085 if (pcb == td->td_pcb) {
1087 * Clear the debug registers on the running
1088 * CPU, otherwise they will end up affecting
1089 * the next process we switch to.
1093 pcb->pcb_flags &= ~PCB_DBREGS;
1097 * Initialize the math emulator (if any) for the current process.
1098 * Actually, just clear the bit that says that the emulator has
1099 * been initialized. Initialization is delayed until the process
1100 * traps to the emulator (if it is done at all) mainly because
1101 * emulators don't provide an entry point for initialization.
1103 pcb->pcb_flags &= ~FP_SOFTFP;
1106 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1107 * gd_npxthread. Otherwise a preemptive interrupt thread
1108 * may panic in npxdna().
1111 load_cr0(rcr0() | CR0_MP);
1114 * NOTE: The MSR values must be correct so we can return to
1115 * userland. gd_user_fs/gs must be correct so the switch
1116 * code knows what the current MSR values are.
1118 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1119 pcb->pcb_gsbase = 0;
1120 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1121 mdcpu->gd_user_gs = 0;
1122 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1123 wrmsr(MSR_KGSBASE, 0);
1125 /* Initialize the npx (if any) for the current process. */
1126 npxinit(__INITIAL_NPXCW__);
1129 pcb->pcb_ds = _udatasel;
1130 pcb->pcb_es = _udatasel;
1131 pcb->pcb_fs = _udatasel;
1132 pcb->pcb_gs = _udatasel;
1141 cr0 |= CR0_NE; /* Done by npxinit() */
1142 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1143 cr0 |= CR0_WP | CR0_AM;
1149 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1152 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1154 if (!error && req->newptr)
1159 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1160 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1162 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1163 CTLFLAG_RW, &disable_rtc_set, 0, "");
1166 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1167 CTLFLAG_RD, &bootinfo, bootinfo, "");
1170 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1171 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1173 extern u_long bootdev; /* not a cdev_t - encoding is different */
1174 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1175 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1178 * Initialize 386 and configure to run kernel
1182 * Initialize segments & interrupt table
1186 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1187 static struct gate_descriptor idt0[NIDT];
1188 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1190 union descriptor ldt[NLDT]; /* local descriptor table */
1193 /* table descriptors - used to load tables by cpu */
1194 struct region_descriptor r_gdt, r_idt;
1196 /* JG proc0paddr is a virtual address */
1199 char proc0paddr_buff[LWKT_THREAD_STACK];
1202 /* software prototypes -- in more palatable form */
1203 struct soft_segment_descriptor gdt_segs[] = {
1204 /* GNULL_SEL 0 Null Descriptor */
1205 { 0x0, /* segment base address */
1207 0, /* segment type */
1208 0, /* segment descriptor priority level */
1209 0, /* segment descriptor present */
1211 0, /* default 32 vs 16 bit size */
1212 0 /* limit granularity (byte/page units)*/ },
1213 /* GCODE_SEL 1 Code Descriptor for kernel */
1214 { 0x0, /* segment base address */
1215 0xfffff, /* length - all address space */
1216 SDT_MEMERA, /* segment type */
1217 SEL_KPL, /* segment descriptor priority level */
1218 1, /* segment descriptor present */
1220 0, /* default 32 vs 16 bit size */
1221 1 /* limit granularity (byte/page units)*/ },
1222 /* GDATA_SEL 2 Data Descriptor for kernel */
1223 { 0x0, /* segment base address */
1224 0xfffff, /* length - all address space */
1225 SDT_MEMRWA, /* segment type */
1226 SEL_KPL, /* segment descriptor priority level */
1227 1, /* segment descriptor present */
1229 0, /* default 32 vs 16 bit size */
1230 1 /* limit granularity (byte/page units)*/ },
1231 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1232 { 0x0, /* segment base address */
1233 0xfffff, /* length - all address space */
1234 SDT_MEMERA, /* segment type */
1235 SEL_UPL, /* segment descriptor priority level */
1236 1, /* segment descriptor present */
1238 1, /* default 32 vs 16 bit size */
1239 1 /* limit granularity (byte/page units)*/ },
1240 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1241 { 0x0, /* segment base address */
1242 0xfffff, /* length - all address space */
1243 SDT_MEMRWA, /* segment type */
1244 SEL_UPL, /* segment descriptor priority level */
1245 1, /* segment descriptor present */
1247 1, /* default 32 vs 16 bit size */
1248 1 /* limit granularity (byte/page units)*/ },
1249 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1250 { 0x0, /* segment base address */
1251 0xfffff, /* length - all address space */
1252 SDT_MEMERA, /* segment type */
1253 SEL_UPL, /* segment descriptor priority level */
1254 1, /* segment descriptor present */
1256 0, /* default 32 vs 16 bit size */
1257 1 /* limit granularity (byte/page units)*/ },
1258 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1260 0x0, /* segment base address */
1261 sizeof(struct x86_64tss)-1,/* length - all address space */
1262 SDT_SYSTSS, /* segment type */
1263 SEL_KPL, /* segment descriptor priority level */
1264 1, /* segment descriptor present */
1266 0, /* unused - default 32 vs 16 bit size */
1267 0 /* limit granularity (byte/page units)*/ },
1268 /* Actually, the TSS is a system descriptor which is double size */
1269 { 0x0, /* segment base address */
1271 0, /* segment type */
1272 0, /* segment descriptor priority level */
1273 0, /* segment descriptor present */
1275 0, /* default 32 vs 16 bit size */
1276 0 /* limit granularity (byte/page units)*/ },
1277 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1278 { 0x0, /* segment base address */
1279 0xfffff, /* length - all address space */
1280 SDT_MEMRWA, /* segment type */
1281 SEL_UPL, /* segment descriptor priority level */
1282 1, /* segment descriptor present */
1284 1, /* default 32 vs 16 bit size */
1285 1 /* limit granularity (byte/page units)*/ },
1289 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1291 struct gate_descriptor *ip;
1294 ip->gd_looffset = (uintptr_t)func;
1295 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1301 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1304 #define IDTVEC(name) __CONCAT(X,name)
1307 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1308 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1309 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1310 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1311 IDTVEC(xmm), IDTVEC(dblfault),
1312 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1314 #ifdef DEBUG_INTERRUPTS
1315 extern inthand_t *Xrsvdary[256];
1319 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1321 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1322 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1323 ssd->ssd_type = sd->sd_type;
1324 ssd->ssd_dpl = sd->sd_dpl;
1325 ssd->ssd_p = sd->sd_p;
1326 ssd->ssd_def32 = sd->sd_def32;
1327 ssd->ssd_gran = sd->sd_gran;
1331 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1334 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1335 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1336 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1337 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1338 sd->sd_type = ssd->ssd_type;
1339 sd->sd_dpl = ssd->ssd_dpl;
1340 sd->sd_p = ssd->ssd_p;
1341 sd->sd_long = ssd->ssd_long;
1342 sd->sd_def32 = ssd->ssd_def32;
1343 sd->sd_gran = ssd->ssd_gran;
1347 ssdtosyssd(struct soft_segment_descriptor *ssd,
1348 struct system_segment_descriptor *sd)
1351 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1352 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1353 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1354 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1355 sd->sd_type = ssd->ssd_type;
1356 sd->sd_dpl = ssd->ssd_dpl;
1357 sd->sd_p = ssd->ssd_p;
1358 sd->sd_gran = ssd->ssd_gran;
1362 * Populate the (physmap) array with base/bound pairs describing the
1363 * available physical memory in the system, then test this memory and
1364 * build the phys_avail array describing the actually-available memory.
1366 * If we cannot accurately determine the physical memory map, then use
1367 * value from the 0xE801 call, and failing that, the RTC.
1369 * Total memory size may be set by the kernel environment variable
1370 * hw.physmem or the compile-time define MAXMEM.
1372 * Memory is aligned to PHYSMAP_ALIGN which must be a multiple
1373 * of PAGE_SIZE. This also greatly reduces the memory test time
1374 * which would otherwise be excessive on machines with > 8G of ram.
1376 * XXX first should be vm_paddr_t.
1379 #define PHYSMAP_ALIGN (vm_paddr_t)(128 * 1024)
1380 #define PHYSMAP_ALIGN_MASK (vm_paddr_t)(PHYSMAP_ALIGN - 1)
1383 getmemsize(caddr_t kmdp, u_int64_t first)
1385 int off, physmap_idx, pa_indx, da_indx;
1387 vm_paddr_t physmap[PHYSMAP_SIZE];
1389 vm_paddr_t msgbuf_size;
1390 u_long physmem_tunable;
1392 struct bios_smap *smapbase, *smap, *smapend;
1394 quad_t dcons_addr, dcons_size;
1396 bzero(physmap, sizeof(physmap));
1400 * get memory map from INT 15:E820, kindly supplied by the loader.
1402 * subr_module.c says:
1403 * "Consumer may safely assume that size value precedes data."
1404 * ie: an int32_t immediately precedes smap.
1406 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1407 MODINFO_METADATA | MODINFOMD_SMAP);
1408 if (smapbase == NULL)
1409 panic("No BIOS smap info from loader!");
1411 smapsize = *((u_int32_t *)smapbase - 1);
1412 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1414 for (smap = smapbase; smap < smapend; smap++) {
1415 if (boothowto & RB_VERBOSE)
1416 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1417 smap->type, smap->base, smap->length);
1419 if (smap->type != SMAP_TYPE_MEMORY)
1422 if (smap->length == 0)
1425 for (i = 0; i <= physmap_idx; i += 2) {
1426 if (smap->base < physmap[i + 1]) {
1427 if (boothowto & RB_VERBOSE) {
1428 kprintf("Overlapping or non-monotonic "
1429 "memory region, ignoring "
1435 Realmem += smap->length;
1437 if (smap->base == physmap[physmap_idx + 1]) {
1438 physmap[physmap_idx + 1] += smap->length;
1443 if (physmap_idx == PHYSMAP_SIZE) {
1444 kprintf("Too many segments in the physical "
1445 "address map, giving up\n");
1448 physmap[physmap_idx] = smap->base;
1449 physmap[physmap_idx + 1] = smap->base + smap->length;
1452 base_memory = physmap[1] / 1024;
1454 /* make hole for AP bootstrap code */
1455 physmap[1] = mp_bootaddress(base_memory);
1458 /* Save EBDA address, if any */
1459 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1463 * Maxmem isn't the "maximum memory", it's one larger than the
1464 * highest page of the physical address space. It should be
1465 * called something like "Maxphyspage". We may adjust this
1466 * based on ``hw.physmem'' and the results of the memory test.
1468 Maxmem = atop(physmap[physmap_idx + 1]);
1471 Maxmem = MAXMEM / 4;
1474 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1475 Maxmem = atop(physmem_tunable);
1478 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1481 if (Maxmem > atop(physmap[physmap_idx + 1]))
1482 Maxmem = atop(physmap[physmap_idx + 1]);
1485 * Blowing out the DMAP will blow up the system.
1487 if (Maxmem > atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS)) {
1488 kprintf("Limiting Maxmem due to DMAP size\n");
1489 Maxmem = atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS);
1492 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1493 (boothowto & RB_VERBOSE)) {
1494 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1498 * Call pmap initialization to make new kernel address space
1502 pmap_bootstrap(&first);
1503 physmap[0] = PAGE_SIZE;
1506 * Align the physmap to PHYSMAP_ALIGN and cut out anything
1509 for (i = j = 0; i <= physmap_idx; i += 2) {
1510 if (physmap[i+1] > ptoa((vm_paddr_t)Maxmem))
1511 physmap[i+1] = ptoa((vm_paddr_t)Maxmem);
1512 physmap[i] = (physmap[i] + PHYSMAP_ALIGN_MASK) &
1513 ~PHYSMAP_ALIGN_MASK;
1514 physmap[i+1] = physmap[i+1] & ~PHYSMAP_ALIGN_MASK;
1516 physmap[j] = physmap[i];
1517 physmap[j+1] = physmap[i+1];
1519 if (physmap[i] < physmap[i+1])
1522 physmap_idx = j - 2;
1525 * Align anything else used in the validation loop.
1527 first = (first + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1530 * Size up each available chunk of physical memory.
1534 phys_avail[pa_indx++] = physmap[0];
1535 phys_avail[pa_indx] = physmap[0];
1536 dump_avail[da_indx] = physmap[0];
1540 * Get dcons buffer address
1542 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1543 kgetenv_quad("dcons.size", &dcons_size) == 0)
1547 * Validate the physical memory. The physical memory segments
1548 * have already been aligned to PHYSMAP_ALIGN which is a multiple
1551 for (i = 0; i <= physmap_idx; i += 2) {
1554 end = physmap[i + 1];
1556 for (pa = physmap[i]; pa < end; pa += PHYSMAP_ALIGN) {
1557 int tmp, page_bad, full;
1558 int *ptr = (int *)CADDR1;
1562 * block out kernel memory as not available.
1564 if (pa >= 0x100000 && pa < first)
1568 * block out dcons buffer
1571 && pa >= trunc_page(dcons_addr)
1572 && pa < dcons_addr + dcons_size) {
1579 * map page into kernel: valid, read/write,non-cacheable
1581 *pte = pa | PG_V | PG_RW | PG_N;
1586 * Test for alternating 1's and 0's
1588 *(volatile int *)ptr = 0xaaaaaaaa;
1590 if (*(volatile int *)ptr != 0xaaaaaaaa)
1593 * Test for alternating 0's and 1's
1595 *(volatile int *)ptr = 0x55555555;
1597 if (*(volatile int *)ptr != 0x55555555)
1602 *(volatile int *)ptr = 0xffffffff;
1604 if (*(volatile int *)ptr != 0xffffffff)
1609 *(volatile int *)ptr = 0x0;
1611 if (*(volatile int *)ptr != 0x0)
1614 * Restore original value.
1619 * Adjust array of valid/good pages.
1621 if (page_bad == TRUE)
1624 * If this good page is a continuation of the
1625 * previous set of good pages, then just increase
1626 * the end pointer. Otherwise start a new chunk.
1627 * Note that "end" points one higher than end,
1628 * making the range >= start and < end.
1629 * If we're also doing a speculative memory
1630 * test and we at or past the end, bump up Maxmem
1631 * so that we keep going. The first bad page
1632 * will terminate the loop.
1634 if (phys_avail[pa_indx] == pa) {
1635 phys_avail[pa_indx] += PHYSMAP_ALIGN;
1638 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1640 "Too many holes in the physical address space, giving up\n");
1645 phys_avail[pa_indx++] = pa;
1646 phys_avail[pa_indx] = pa + PHYSMAP_ALIGN;
1648 physmem += PHYSMAP_ALIGN / PAGE_SIZE;
1650 if (dump_avail[da_indx] == pa) {
1651 dump_avail[da_indx] += PHYSMAP_ALIGN;
1654 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1658 dump_avail[da_indx++] = pa;
1659 dump_avail[da_indx] = pa + PHYSMAP_ALIGN;
1670 * The last chunk must contain at least one page plus the message
1671 * buffer to avoid complicating other code (message buffer address
1672 * calculation, etc.).
1674 msgbuf_size = (MSGBUF_SIZE + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1676 while (phys_avail[pa_indx - 1] + PHYSMAP_ALIGN +
1677 msgbuf_size >= phys_avail[pa_indx]) {
1678 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1679 phys_avail[pa_indx--] = 0;
1680 phys_avail[pa_indx--] = 0;
1683 Maxmem = atop(phys_avail[pa_indx]);
1685 /* Trim off space for the message buffer. */
1686 phys_avail[pa_indx] -= msgbuf_size;
1688 avail_end = phys_avail[pa_indx];
1690 /* Map the message buffer. */
1691 for (off = 0; off < msgbuf_size; off += PAGE_SIZE) {
1692 pmap_kenter((vm_offset_t)msgbufp + off,
1693 phys_avail[pa_indx] + off);
1697 struct machintr_abi MachIntrABI;
1708 * 7 Device Not Available (x87)
1710 * 9 Coprocessor Segment overrun (unsupported, reserved)
1712 * 11 Segment not present
1714 * 13 General Protection
1717 * 16 x87 FP Exception pending
1718 * 17 Alignment Check
1720 * 19 SIMD floating point
1722 * 32-255 INTn/external sources
1725 hammer_time(u_int64_t modulep, u_int64_t physfree)
1730 int metadata_missing, off;
1732 struct mdglobaldata *gd;
1736 * Prevent lowering of the ipl if we call tsleep() early.
1738 gd = &CPU_prvspace[0].mdglobaldata;
1739 bzero(gd, sizeof(*gd));
1742 * Note: on both UP and SMP curthread must be set non-NULL
1743 * early in the boot sequence because the system assumes
1744 * that 'curthread' is never NULL.
1747 gd->mi.gd_curthread = &thread0;
1748 thread0.td_gd = &gd->mi;
1750 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1753 metadata_missing = 0;
1754 if (bootinfo.bi_modulep) {
1755 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1756 preload_bootstrap_relocate(KERNBASE);
1758 metadata_missing = 1;
1760 if (bootinfo.bi_envp)
1761 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1764 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1765 preload_bootstrap_relocate(PTOV_OFFSET);
1766 kmdp = preload_search_by_type("elf kernel");
1768 kmdp = preload_search_by_type("elf64 kernel");
1769 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1770 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1772 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1773 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1776 if (boothowto & RB_VERBOSE)
1780 * Default MachIntrABI to ICU
1782 MachIntrABI = MachIntrABI_ICU;
1784 TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
1785 TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
1786 TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
1790 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1791 * and ncpus_fit_mask remain 0.
1796 /* Init basic tunables, hz etc */
1800 * make gdt memory segments
1802 gdt_segs[GPROC0_SEL].ssd_base =
1803 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1805 gd->mi.gd_prvspace = &CPU_prvspace[0];
1807 for (x = 0; x < NGDT; x++) {
1808 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1809 ssdtosd(&gdt_segs[x], &gdt[x]);
1811 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1812 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1814 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1815 r_gdt.rd_base = (long) gdt;
1818 wrmsr(MSR_FSBASE, 0); /* User value */
1819 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1820 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1822 mi_gdinit(&gd->mi, 0);
1824 proc0paddr = proc0paddr_buff;
1825 mi_proc0init(&gd->mi, proc0paddr);
1826 safepri = TDPRI_MAX;
1828 /* spinlocks and the BGL */
1832 for (x = 0; x < NIDT; x++)
1833 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1834 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1835 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1836 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1837 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1838 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1839 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1840 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1841 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1842 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1843 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1844 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1845 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1846 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1847 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1848 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1849 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1850 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1851 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1852 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1854 r_idt.rd_limit = sizeof(idt0) - 1;
1855 r_idt.rd_base = (long) idt;
1859 * Initialize the console before we print anything out.
1864 if (metadata_missing)
1865 kprintf("WARNING: loader(8) metadata is missing!\n");
1875 * Initialize IRQ mapping
1878 * SHOULD be after elcr_probe()
1880 MachIntrABI_ICU.initmap();
1882 MachIntrABI_IOAPIC.initmap();
1887 if (boothowto & RB_KDB)
1888 Debugger("Boot flags requested debugger");
1892 finishidentcpu(); /* Final stage of CPU initialization */
1893 setidt(6, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1894 setidt(13, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1896 identify_cpu(); /* Final stage of CPU initialization */
1897 initializecpu(); /* Initialize CPU registers */
1899 /* make an initial tss so cpu can get interrupt stack on syscall! */
1900 gd->gd_common_tss.tss_rsp0 =
1901 (register_t)(thread0.td_kstack +
1902 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1903 /* Ensure the stack is aligned to 16 bytes */
1904 gd->gd_common_tss.tss_rsp0 &= ~(register_t)0xF;
1906 /* double fault stack */
1907 gd->gd_common_tss.tss_ist1 =
1908 (long)&gd->mi.gd_prvspace->idlestack[
1909 sizeof(gd->mi.gd_prvspace->idlestack)];
1911 /* Set the IO permission bitmap (empty due to tss seg limit) */
1912 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
1914 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1915 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1916 gd->gd_common_tssd = *gd->gd_tss_gdt;
1919 /* Set up the fast syscall stuff */
1920 msr = rdmsr(MSR_EFER) | EFER_SCE;
1921 wrmsr(MSR_EFER, msr);
1922 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1923 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1924 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1925 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1926 wrmsr(MSR_STAR, msr);
1927 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1929 getmemsize(kmdp, physfree);
1930 init_param2(physmem);
1932 /* now running on new page tables, configured,and u/iom is accessible */
1934 /* Map the message buffer. */
1936 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1937 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1940 msgbufinit(msgbufp, MSGBUF_SIZE);
1943 /* transfer to user mode */
1945 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1946 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1947 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1953 /* setup proc 0's pcb */
1954 thread0.td_pcb->pcb_flags = 0;
1955 thread0.td_pcb->pcb_cr3 = KPML4phys;
1956 thread0.td_pcb->pcb_ext = 0;
1957 lwp0.lwp_md.md_regs = &proc0_tf; /* XXX needed? */
1959 /* Location of kernel stack for locore */
1960 return ((u_int64_t)thread0.td_pcb);
1964 * Initialize machine-dependant portions of the global data structure.
1965 * Note that the global data area and cpu0's idlestack in the private
1966 * data space were allocated in locore.
1968 * Note: the idlethread's cpl is 0
1970 * WARNING! Called from early boot, 'mycpu' may not work yet.
1973 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1976 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1978 lwkt_init_thread(&gd->mi.gd_idlethread,
1979 gd->mi.gd_prvspace->idlestack,
1980 sizeof(gd->mi.gd_prvspace->idlestack),
1982 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1983 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1984 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1985 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1989 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1991 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1992 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1999 globaldata_find(int cpu)
2001 KKASSERT(cpu >= 0 && cpu < ncpus);
2002 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2006 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2008 lp->lwp_md.md_regs->tf_rip = addr;
2013 ptrace_single_step(struct lwp *lp)
2015 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
2020 fill_regs(struct lwp *lp, struct reg *regs)
2022 struct trapframe *tp;
2024 tp = lp->lwp_md.md_regs;
2025 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
2030 set_regs(struct lwp *lp, struct reg *regs)
2032 struct trapframe *tp;
2034 tp = lp->lwp_md.md_regs;
2035 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
2036 !CS_SECURE(regs->r_cs))
2038 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
2042 #ifndef CPU_DISABLE_SSE
2044 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2046 struct env87 *penv_87 = &sv_87->sv_env;
2047 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2050 /* FPU control/status */
2051 penv_87->en_cw = penv_xmm->en_cw;
2052 penv_87->en_sw = penv_xmm->en_sw;
2053 penv_87->en_tw = penv_xmm->en_tw;
2054 penv_87->en_fip = penv_xmm->en_fip;
2055 penv_87->en_fcs = penv_xmm->en_fcs;
2056 penv_87->en_opcode = penv_xmm->en_opcode;
2057 penv_87->en_foo = penv_xmm->en_foo;
2058 penv_87->en_fos = penv_xmm->en_fos;
2061 for (i = 0; i < 8; ++i)
2062 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2066 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2068 struct env87 *penv_87 = &sv_87->sv_env;
2069 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2072 /* FPU control/status */
2073 penv_xmm->en_cw = penv_87->en_cw;
2074 penv_xmm->en_sw = penv_87->en_sw;
2075 penv_xmm->en_tw = penv_87->en_tw;
2076 penv_xmm->en_fip = penv_87->en_fip;
2077 penv_xmm->en_fcs = penv_87->en_fcs;
2078 penv_xmm->en_opcode = penv_87->en_opcode;
2079 penv_xmm->en_foo = penv_87->en_foo;
2080 penv_xmm->en_fos = penv_87->en_fos;
2083 for (i = 0; i < 8; ++i)
2084 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2086 #endif /* CPU_DISABLE_SSE */
2089 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2091 #ifndef CPU_DISABLE_SSE
2093 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2094 (struct save87 *)fpregs);
2097 #endif /* CPU_DISABLE_SSE */
2098 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2103 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2105 #ifndef CPU_DISABLE_SSE
2107 set_fpregs_xmm((struct save87 *)fpregs,
2108 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2111 #endif /* CPU_DISABLE_SSE */
2112 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2117 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2120 dbregs->dr[0] = rdr0();
2121 dbregs->dr[1] = rdr1();
2122 dbregs->dr[2] = rdr2();
2123 dbregs->dr[3] = rdr3();
2124 dbregs->dr[4] = rdr4();
2125 dbregs->dr[5] = rdr5();
2126 dbregs->dr[6] = rdr6();
2127 dbregs->dr[7] = rdr7();
2131 pcb = lp->lwp_thread->td_pcb;
2132 dbregs->dr[0] = pcb->pcb_dr0;
2133 dbregs->dr[1] = pcb->pcb_dr1;
2134 dbregs->dr[2] = pcb->pcb_dr2;
2135 dbregs->dr[3] = pcb->pcb_dr3;
2138 dbregs->dr[6] = pcb->pcb_dr6;
2139 dbregs->dr[7] = pcb->pcb_dr7;
2145 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2148 load_dr0(dbregs->dr[0]);
2149 load_dr1(dbregs->dr[1]);
2150 load_dr2(dbregs->dr[2]);
2151 load_dr3(dbregs->dr[3]);
2152 load_dr4(dbregs->dr[4]);
2153 load_dr5(dbregs->dr[5]);
2154 load_dr6(dbregs->dr[6]);
2155 load_dr7(dbregs->dr[7]);
2158 struct ucred *ucred;
2160 uint64_t mask1, mask2;
2163 * Don't let an illegal value for dr7 get set. Specifically,
2164 * check for undefined settings. Setting these bit patterns
2165 * result in undefined behaviour and can lead to an unexpected
2168 /* JG this loop looks unreadable */
2169 /* Check 4 2-bit fields for invalid patterns.
2170 * These fields are R/Wi, for i = 0..3
2172 /* Is 10 in LENi allowed when running in compatibility mode? */
2173 /* Pattern 10 in R/Wi might be used to indicate
2174 * breakpoint on I/O. Further analysis should be
2175 * carried to decide if it is safe and useful to
2176 * provide access to that capability
2178 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2179 i++, mask1 <<= 4, mask2 <<= 4)
2180 if ((dbregs->dr[7] & mask1) == mask2)
2183 pcb = lp->lwp_thread->td_pcb;
2184 ucred = lp->lwp_proc->p_ucred;
2187 * Don't let a process set a breakpoint that is not within the
2188 * process's address space. If a process could do this, it
2189 * could halt the system by setting a breakpoint in the kernel
2190 * (if ddb was enabled). Thus, we need to check to make sure
2191 * that no breakpoints are being enabled for addresses outside
2192 * process's address space, unless, perhaps, we were called by
2195 * XXX - what about when the watched area of the user's
2196 * address space is written into from within the kernel
2197 * ... wouldn't that still cause a breakpoint to be generated
2198 * from within kernel mode?
2201 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2202 if (dbregs->dr[7] & 0x3) {
2203 /* dr0 is enabled */
2204 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2208 if (dbregs->dr[7] & (0x3<<2)) {
2209 /* dr1 is enabled */
2210 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2214 if (dbregs->dr[7] & (0x3<<4)) {
2215 /* dr2 is enabled */
2216 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2220 if (dbregs->dr[7] & (0x3<<6)) {
2221 /* dr3 is enabled */
2222 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2227 pcb->pcb_dr0 = dbregs->dr[0];
2228 pcb->pcb_dr1 = dbregs->dr[1];
2229 pcb->pcb_dr2 = dbregs->dr[2];
2230 pcb->pcb_dr3 = dbregs->dr[3];
2231 pcb->pcb_dr6 = dbregs->dr[6];
2232 pcb->pcb_dr7 = dbregs->dr[7];
2234 pcb->pcb_flags |= PCB_DBREGS;
2241 * Return > 0 if a hardware breakpoint has been hit, and the
2242 * breakpoint was in user space. Return 0, otherwise.
2245 user_dbreg_trap(void)
2247 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2248 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2249 int nbp; /* number of breakpoints that triggered */
2250 caddr_t addr[4]; /* breakpoint addresses */
2254 if ((dr7 & 0xff) == 0) {
2256 * all GE and LE bits in the dr7 register are zero,
2257 * thus the trap couldn't have been caused by the
2258 * hardware debug registers
2269 * None of the breakpoint bits are set meaning this
2270 * trap was not caused by any of the debug registers
2276 * at least one of the breakpoints were hit, check to see
2277 * which ones and if any of them are user space addresses
2281 addr[nbp++] = (caddr_t)rdr0();
2284 addr[nbp++] = (caddr_t)rdr1();
2287 addr[nbp++] = (caddr_t)rdr2();
2290 addr[nbp++] = (caddr_t)rdr3();
2293 for (i=0; i<nbp; i++) {
2295 (caddr_t)VM_MAX_USER_ADDRESS) {
2297 * addr[i] is in user space
2304 * None of the breakpoints are in user space.
2312 Debugger(const char *msg)
2314 kprintf("Debugger(\"%s\") called.\n", msg);
2321 * Provide inb() and outb() as functions. They are normally only
2322 * available as macros calling inlined functions, thus cannot be
2323 * called inside DDB.
2325 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2331 /* silence compiler warnings */
2333 void outb(u_int, u_char);
2340 * We use %%dx and not %1 here because i/o is done at %dx and not at
2341 * %edx, while gcc generates inferior code (movw instead of movl)
2342 * if we tell it to load (u_short) port.
2344 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2349 outb(u_int port, u_char data)
2353 * Use an unnecessary assignment to help gcc's register allocator.
2354 * This make a large difference for gcc-1.40 and a tiny difference
2355 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2356 * best results. gcc-2.6.0 can't handle this.
2359 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2366 #include "opt_cpu.h"
2370 * initialize all the SMP locks
2373 /* critical region when masking or unmasking interupts */
2374 struct spinlock_deprecated imen_spinlock;
2376 /* critical region for old style disable_intr/enable_intr */
2377 struct spinlock_deprecated mpintr_spinlock;
2379 /* critical region around INTR() routines */
2380 struct spinlock_deprecated intr_spinlock;
2382 /* lock region used by kernel profiling */
2383 struct spinlock_deprecated mcount_spinlock;
2385 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2386 struct spinlock_deprecated com_spinlock;
2388 /* lock regions around the clock hardware */
2389 struct spinlock_deprecated clock_spinlock;
2396 * Get the initial mplock with a count of 1 for the BSP.
2397 * This uses a LOGICAL cpu ID, ie BSP == 0.
2399 cpu_get_initial_mplock();
2402 spin_lock_init(&mcount_spinlock);
2403 spin_lock_init(&intr_spinlock);
2404 spin_lock_init(&mpintr_spinlock);
2405 spin_lock_init(&imen_spinlock);
2406 spin_lock_init(&com_spinlock);
2407 spin_lock_init(&clock_spinlock);
2409 /* our token pool needs to work early */
2410 lwkt_token_pool_init();