2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 //#include "use_npx.h"
45 #include "opt_atalk.h"
46 #include "opt_compat.h"
49 #include "opt_directio.h"
52 #include "opt_msgbuf.h"
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/sysproto.h>
59 #include <sys/signalvar.h>
60 #include <sys/kernel.h>
61 #include <sys/linker.h>
62 #include <sys/malloc.h>
66 #include <sys/reboot.h>
68 #include <sys/msgbuf.h>
69 #include <sys/sysent.h>
70 #include <sys/sysctl.h>
71 #include <sys/vmmeter.h>
73 #include <sys/upcall.h>
74 #include <sys/usched.h>
78 #include <vm/vm_param.h>
80 #include <vm/vm_kern.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_pager.h>
85 #include <vm/vm_extern.h>
87 #include <sys/thread2.h>
88 #include <sys/mplock2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/metadata.h>
104 #include <machine/pc/bios.h>
105 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
106 #include <machine/globaldata.h> /* CPU_prvspace */
107 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
112 #include <machine/intr_machdep.h>
115 #include <bus/isa/isa_device.h>
117 #include <machine_base/isa/isa_intr.h>
118 #include <machine_base/isa/elcr_var.h>
119 #include <bus/isa/rtc.h>
120 #include <sys/random.h>
121 #include <sys/ptrace.h>
122 #include <machine/sigframe.h>
124 #include <sys/machintr.h>
125 #include <machine_base/icu/icu_abi.h>
126 #include <machine_base/apic/ioapic_abi.h>
128 #define PHYSMAP_ENTRIES 10
130 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
132 extern void printcpuinfo(void); /* XXX header file */
133 extern void identify_cpu(void);
135 extern void finishidentcpu(void);
137 extern void panicifcpuunsupported(void);
139 static void cpu_startup(void *);
140 #ifndef CPU_DISABLE_SSE
141 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
142 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
143 #endif /* CPU_DISABLE_SSE */
145 extern void ffs_rawread_setup(void);
146 #endif /* DIRECTIO */
147 static void init_locks(void);
149 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
152 extern vm_offset_t ksym_start, ksym_end;
155 struct privatespace CPU_prvspace[MAXCPU] __aligned(4096); /* XXX */
157 int _udatasel, _ucodesel, _ucode32sel;
160 int64_t tsc_offsets[MAXCPU];
162 int64_t tsc_offsets[1];
165 #if defined(SWTCH_OPTIM_STATS)
166 extern int swtch_optim_stats;
167 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
168 CTLFLAG_RD, &swtch_optim_stats, 0, "");
169 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
170 CTLFLAG_RD, &tlb_flush_count, 0, "");
175 u_long ebda_addr = 0;
178 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
180 u_long pmem = ctob(physmem);
182 int error = sysctl_handle_long(oidp, &pmem, 0, req);
186 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
187 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
190 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
192 int error = sysctl_handle_int(oidp, 0,
193 ctob(physmem - vmstats.v_wire_count), req);
197 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
198 0, 0, sysctl_hw_usermem, "IU", "");
201 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
203 int error = sysctl_handle_int(oidp, 0,
204 x86_64_btop(avail_end - avail_start), req);
208 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
209 0, 0, sysctl_hw_availpages, "I", "");
215 * The number of PHYSMAP entries must be one less than the number of
216 * PHYSSEG entries because the PHYSMAP entry that spans the largest
217 * physical address that is accessible by ISA DMA is split into two
220 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
222 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
223 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
225 /* must be 2 less so 0 0 can signal end of chunks */
226 #define PHYS_AVAIL_ARRAY_END (NELEM(phys_avail) - 2)
227 #define DUMP_AVAIL_ARRAY_END (NELEM(dump_avail) - 2)
229 static vm_offset_t buffer_sva, buffer_eva;
230 vm_offset_t clean_sva, clean_eva;
231 static vm_offset_t pager_sva, pager_eva;
232 static struct trapframe proc0_tf;
235 cpu_startup(void *dummy)
239 vm_offset_t firstaddr;
241 if (boothowto & RB_VERBOSE)
245 * Good {morning,afternoon,evening,night}.
247 kprintf("%s", version);
250 panicifcpuunsupported();
254 kprintf("real memory = %ju (%ju MB)\n",
256 (intmax_t)Realmem / 1024 / 1024);
258 * Display any holes after the first chunk of extended memory.
263 kprintf("Physical memory chunk(s):\n");
264 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
265 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
267 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
268 (intmax_t)phys_avail[indx],
269 (intmax_t)phys_avail[indx + 1] - 1,
271 (intmax_t)(size1 / PAGE_SIZE));
276 * Allocate space for system data structures.
277 * The first available kernel virtual address is in "v".
278 * As pages of kernel virtual memory are allocated, "v" is incremented.
279 * As pages of memory are allocated and cleared,
280 * "firstaddr" is incremented.
281 * An index into the kernel page table corresponding to the
282 * virtual memory address maintained in "v" is kept in "mapaddr".
286 * Make two passes. The first pass calculates how much memory is
287 * needed and allocates it. The second pass assigns virtual
288 * addresses to the various data structures.
292 v = (caddr_t)firstaddr;
294 #define valloc(name, type, num) \
295 (name) = (type *)v; v = (caddr_t)((name)+(num))
296 #define valloclim(name, type, num, lim) \
297 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
300 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
301 * For the first 64MB of ram nominally allocate sufficient buffers to
302 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
303 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
304 * the buffer cache we limit the eventual kva reservation to
307 * factor represents the 1/4 x ram conversion.
310 int factor = 4 * BKVASIZE / 1024;
311 int kbytes = physmem * (PAGE_SIZE / 1024);
315 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
317 nbuf += (kbytes - 65536) * 2 / (factor * 5);
318 if (maxbcache && nbuf > maxbcache / BKVASIZE)
319 nbuf = maxbcache / BKVASIZE;
323 * Do not allow the buffer_map to be more then 1/2 the size of the
326 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
327 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
328 kprintf("Warning: nbufs capped at %d\n", nbuf);
331 nswbuf = max(min(nbuf/4, 256), 16);
333 if (nswbuf < NSWBUF_MIN)
340 valloc(swbuf, struct buf, nswbuf);
341 valloc(buf, struct buf, nbuf);
344 * End of first pass, size has been calculated so allocate memory
346 if (firstaddr == 0) {
347 size = (vm_size_t)(v - firstaddr);
348 firstaddr = kmem_alloc(&kernel_map, round_page(size));
350 panic("startup: no room for tables");
355 * End of second pass, addresses have been assigned
357 if ((vm_size_t)(v - firstaddr) != size)
358 panic("startup: table size inconsistency");
360 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
361 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
362 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
364 buffer_map.system_map = 1;
365 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
366 (nswbuf*MAXPHYS) + pager_map_size);
367 pager_map.system_map = 1;
369 #if defined(USERCONFIG)
371 cninit(); /* the preferred console may have changed */
374 kprintf("avail memory = %ju (%ju MB)\n",
375 (uintmax_t)ptoa(vmstats.v_free_count),
376 (uintmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
379 * Set up buffers, so they can be used to read disk labels.
382 vm_pager_bufferinit();
384 /* Log ELCR information */
389 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
391 mp_start(); /* fire up the APs and APICs */
394 MachIntrABI.finalize();
400 * Send an interrupt to process.
402 * Stack is set up to allow sigcode stored
403 * at top to call routine, followed by kcall
404 * to sigreturn routine below. After sigreturn
405 * resets the signal mask, the stack, and the
406 * frame pointer, it returns to the user
410 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
412 struct lwp *lp = curthread->td_lwp;
413 struct proc *p = lp->lwp_proc;
414 struct trapframe *regs;
415 struct sigacts *psp = p->p_sigacts;
416 struct sigframe sf, *sfp;
420 regs = lp->lwp_md.md_regs;
421 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
423 /* Save user context */
424 bzero(&sf, sizeof(struct sigframe));
425 sf.sf_uc.uc_sigmask = *mask;
426 sf.sf_uc.uc_stack = lp->lwp_sigstk;
427 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
428 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
429 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
431 /* Make the size of the saved context visible to userland */
432 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
434 /* Save mailbox pending state for syscall interlock semantics */
435 if (p->p_flag & P_MAILBOX)
436 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
438 /* Allocate and validate space for the signal handler context. */
439 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
440 SIGISMEMBER(psp->ps_sigonstack, sig)) {
441 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
442 sizeof(struct sigframe));
443 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
445 /* We take red zone into account */
446 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
449 /* Align to 16 bytes */
450 sfp = (struct sigframe *)((intptr_t)sp & ~(intptr_t)0xF);
452 /* Translate the signal is appropriate */
453 if (p->p_sysent->sv_sigtbl) {
454 if (sig <= p->p_sysent->sv_sigsize)
455 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
459 * Build the argument list for the signal handler.
461 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
463 regs->tf_rdi = sig; /* argument 1 */
464 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
466 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
468 * Signal handler installed with SA_SIGINFO.
470 * action(signo, siginfo, ucontext)
472 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
473 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
474 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
476 /* fill siginfo structure */
477 sf.sf_si.si_signo = sig;
478 sf.sf_si.si_code = code;
479 sf.sf_si.si_addr = (void *)regs->tf_addr;
482 * Old FreeBSD-style arguments.
484 * handler (signo, code, [uc], addr)
486 regs->tf_rsi = (register_t)code; /* argument 2 */
487 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
488 sf.sf_ahu.sf_handler = catcher;
492 * If we're a vm86 process, we want to save the segment registers.
493 * We also change eflags to be our emulated eflags, not the actual
497 if (regs->tf_eflags & PSL_VM) {
498 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
499 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
501 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
502 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
503 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
504 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
506 if (vm86->vm86_has_vme == 0)
507 sf.sf_uc.uc_mcontext.mc_eflags =
508 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
509 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
512 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
513 * syscalls made by the signal handler. This just avoids
514 * wasting time for our lazy fixup of such faults. PSL_NT
515 * does nothing in vm86 mode, but vm86 programs can set it
516 * almost legitimately in probes for old cpu types.
518 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
523 * Save the FPU state and reinit the FP unit
525 npxpush(&sf.sf_uc.uc_mcontext);
528 * Copy the sigframe out to the user's stack.
530 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
532 * Something is wrong with the stack pointer.
533 * ...Kill the process.
538 regs->tf_rsp = (register_t)sfp;
539 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
542 * i386 abi specifies that the direction flag must be cleared
545 regs->tf_rflags &= ~(PSL_T|PSL_D);
548 * 64 bit mode has a code and stack selector but
549 * no data or extra selector. %fs and %gs are not
552 regs->tf_cs = _ucodesel;
553 regs->tf_ss = _udatasel;
557 * Sanitize the trapframe for a virtual kernel passing control to a custom
558 * VM context. Remove any items that would otherwise create a privilage
561 * XXX at the moment we allow userland to set the resume flag. Is this a
565 cpu_sanitize_frame(struct trapframe *frame)
567 frame->tf_cs = _ucodesel;
568 frame->tf_ss = _udatasel;
569 /* XXX VM (8086) mode not supported? */
570 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
571 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
577 * Sanitize the tls so loading the descriptor does not blow up
578 * on us. For x86_64 we don't have to do anything.
581 cpu_sanitize_tls(struct savetls *tls)
587 * sigreturn(ucontext_t *sigcntxp)
589 * System call to cleanup state after a signal
590 * has been taken. Reset signal mask and
591 * stack state from context left by sendsig (above).
592 * Return to previous pc and psl as specified by
593 * context left by sendsig. Check carefully to
594 * make sure that the user has not modified the
595 * state to gain improper privileges.
599 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
600 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
603 sys_sigreturn(struct sigreturn_args *uap)
605 struct lwp *lp = curthread->td_lwp;
606 struct proc *p = lp->lwp_proc;
607 struct trapframe *regs;
615 * We have to copy the information into kernel space so userland
616 * can't modify it while we are sniffing it.
618 regs = lp->lwp_md.md_regs;
619 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
623 rflags = ucp->uc_mcontext.mc_rflags;
625 /* VM (8086) mode not supported */
626 rflags &= ~PSL_VM_UNSUPP;
629 if (eflags & PSL_VM) {
630 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
631 struct vm86_kernel *vm86;
634 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
635 * set up the vm86 area, and we can't enter vm86 mode.
637 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
639 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
640 if (vm86->vm86_inited == 0)
643 /* go back to user mode if both flags are set */
644 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
645 trapsignal(lp, SIGBUS, 0);
647 if (vm86->vm86_has_vme) {
648 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
649 (eflags & VME_USERCHANGE) | PSL_VM;
651 vm86->vm86_eflags = eflags; /* save VIF, VIP */
652 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
653 (eflags & VM_USERCHANGE) | PSL_VM;
655 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
656 tf->tf_eflags = eflags;
657 tf->tf_vm86_ds = tf->tf_ds;
658 tf->tf_vm86_es = tf->tf_es;
659 tf->tf_vm86_fs = tf->tf_fs;
660 tf->tf_vm86_gs = tf->tf_gs;
661 tf->tf_ds = _udatasel;
662 tf->tf_es = _udatasel;
663 tf->tf_fs = _udatasel;
664 tf->tf_gs = _udatasel;
669 * Don't allow users to change privileged or reserved flags.
672 * XXX do allow users to change the privileged flag PSL_RF.
673 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
674 * should sometimes set it there too. tf_eflags is kept in
675 * the signal context during signal handling and there is no
676 * other place to remember it, so the PSL_RF bit may be
677 * corrupted by the signal handler without us knowing.
678 * Corruption of the PSL_RF bit at worst causes one more or
679 * one less debugger trap, so allowing it is fairly harmless.
681 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
682 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
687 * Don't allow users to load a valid privileged %cs. Let the
688 * hardware check for invalid selectors, excess privilege in
689 * other selectors, invalid %eip's and invalid %esp's.
691 cs = ucp->uc_mcontext.mc_cs;
692 if (!CS_SECURE(cs)) {
693 kprintf("sigreturn: cs = 0x%x\n", cs);
694 trapsignal(lp, SIGBUS, T_PROTFLT);
697 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
701 * Restore the FPU state from the frame
704 npxpop(&ucp->uc_mcontext);
707 * Merge saved signal mailbox pending flag to maintain interlock
708 * semantics against system calls.
710 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
711 p->p_flag |= P_MAILBOX;
713 if (ucp->uc_mcontext.mc_onstack & 1)
714 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
716 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
718 lp->lwp_sigmask = ucp->uc_sigmask;
719 SIG_CANTMASK(lp->lwp_sigmask);
725 * Stack frame on entry to function. %rax will contain the function vector,
726 * %rcx will contain the function data. flags, rcx, and rax will have
727 * already been pushed on the stack.
738 sendupcall(struct vmupcall *vu, int morepending)
740 struct lwp *lp = curthread->td_lwp;
741 struct trapframe *regs;
742 struct upcall upcall;
743 struct upc_frame upc_frame;
747 * If we are a virtual kernel running an emulated user process
748 * context, switch back to the virtual kernel context before
749 * trying to post the signal.
751 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
752 lp->lwp_md.md_regs->tf_trapno = 0;
753 vkernel_trap(lp, lp->lwp_md.md_regs);
757 * Get the upcall data structure
759 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
760 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
763 kprintf("bad upcall address\n");
768 * If the data structure is already marked pending or has a critical
769 * section count, mark the data structure as pending and return
770 * without doing an upcall. vu_pending is left set.
772 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
773 if (upcall.upc_pending < vu->vu_pending) {
774 upcall.upc_pending = vu->vu_pending;
775 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
776 sizeof(upcall.upc_pending));
782 * We can run this upcall now, clear vu_pending.
784 * Bump our critical section count and set or clear the
785 * user pending flag depending on whether more upcalls are
786 * pending. The user will be responsible for calling
787 * upc_dispatch(-1) to process remaining upcalls.
790 upcall.upc_pending = morepending;
792 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
793 sizeof(upcall.upc_pending));
794 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
798 * Construct a stack frame and issue the upcall
800 regs = lp->lwp_md.md_regs;
801 upc_frame.rax = regs->tf_rax;
802 upc_frame.rcx = regs->tf_rcx;
803 upc_frame.rdx = regs->tf_rdx;
804 upc_frame.flags = regs->tf_rflags;
805 upc_frame.oldip = regs->tf_rip;
806 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
807 sizeof(upc_frame)) != 0) {
808 kprintf("bad stack on upcall\n");
810 regs->tf_rax = (register_t)vu->vu_func;
811 regs->tf_rcx = (register_t)vu->vu_data;
812 regs->tf_rdx = (register_t)lp->lwp_upcall;
813 regs->tf_rip = (register_t)vu->vu_ctx;
814 regs->tf_rsp -= sizeof(upc_frame);
819 * fetchupcall occurs in the context of a system call, which means that
820 * we have to return EJUSTRETURN in order to prevent eax and edx from
821 * being overwritten by the syscall return value.
823 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
824 * and the function pointer in %eax.
827 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
829 struct upc_frame upc_frame;
830 struct lwp *lp = curthread->td_lwp;
831 struct trapframe *regs;
833 struct upcall upcall;
836 regs = lp->lwp_md.md_regs;
838 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
842 * This jumps us to the next ready context.
845 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
848 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
851 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
852 regs->tf_rax = (register_t)vu->vu_func;
853 regs->tf_rcx = (register_t)vu->vu_data;
854 regs->tf_rdx = (register_t)lp->lwp_upcall;
855 regs->tf_rip = (register_t)vu->vu_ctx;
856 regs->tf_rsp = (register_t)rsp;
859 * This returns us to the originally interrupted code.
861 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
862 regs->tf_rax = upc_frame.rax;
863 regs->tf_rcx = upc_frame.rcx;
864 regs->tf_rdx = upc_frame.rdx;
865 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
866 (upc_frame.flags & PSL_USERCHANGE);
867 regs->tf_rip = upc_frame.oldip;
868 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
877 * Machine dependent boot() routine
879 * I haven't seen anything to put here yet
880 * Possibly some stuff might be grafted back here from boot()
888 * Shutdown the CPU as much as possible
894 __asm__ __volatile("hlt");
898 * cpu_idle() represents the idle LWKT. You cannot return from this function
899 * (unless you want to blow things up!). Instead we look for runnable threads
900 * and loop or halt as appropriate. Giant is not held on entry to the thread.
902 * The main loop is entered with a critical section held, we must release
903 * the critical section before doing anything else. lwkt_switch() will
904 * check for pending interrupts due to entering and exiting its own
907 * NOTE: On an SMP system we rely on a scheduler IPI to wake a HLTed cpu up.
908 * However, there are cases where the idlethread will be entered with
909 * the possibility that no IPI will occur and in such cases
910 * lwkt_switch() sets TDF_IDLE_NOHLT.
912 * NOTE: cpu_idle_hlt again defaults to 2 (use ACPI sleep states). Set to
913 * 1 to just use hlt and for debugging purposes.
915 * NOTE: cpu_idle_repeat determines how many entries into the idle thread
916 * must occur before it starts using ACPI halt.
918 static int cpu_idle_hlt = 2;
919 static int cpu_idle_hltcnt;
920 static int cpu_idle_spincnt;
921 static u_int cpu_idle_repeat = 4;
922 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
923 &cpu_idle_hlt, 0, "Idle loop HLT enable");
924 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
925 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
926 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
927 &cpu_idle_spincnt, 0, "Idle loop entry spins");
928 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_repeat, CTLFLAG_RW,
929 &cpu_idle_repeat, 0, "Idle entries before acpi hlt");
932 cpu_idle_default_hook(void)
935 * We must guarentee that hlt is exactly the instruction
938 __asm __volatile("sti; hlt");
941 /* Other subsystems (e.g., ACPI) can hook this later. */
942 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
947 globaldata_t gd = mycpu;
948 struct thread *td __debugvar = gd->gd_curthread;
953 KKASSERT(td->td_critcount == 0);
956 * See if there are any LWKTs ready to go.
961 * When halting inside a cli we must check for reqflags
962 * races, particularly [re]schedule requests. Running
963 * splz() does the job.
966 * 0 Never halt, just spin
968 * 1 Always use HLT (or MONITOR/MWAIT if avail).
969 * This typically eats more power than the
972 * 2 Use HLT/MONITOR/MWAIT up to a point and then
973 * use the ACPI halt (default). This is a hybrid
974 * approach. See machdep.cpu_idle_repeat.
976 * 3 Always use the ACPI halt. This typically
977 * eats the least amount of power but the cpu
978 * will be slow waking up. Slows down e.g.
979 * compiles and other pipe/event oriented stuff.
981 * NOTE: Interrupts are enabled and we are not in a critical
984 * NOTE: Preemptions do not reset gd_idle_repeat. Also we
985 * don't bother capping gd_idle_repeat, it is ok if
988 ++gd->gd_idle_repeat;
989 reqflags = gd->gd_reqflags;
990 quick = (cpu_idle_hlt == 1) ||
992 gd->gd_idle_repeat < cpu_idle_repeat);
994 if (quick && (cpu_mi_feature & CPU_MI_MONITOR) &&
995 (reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
996 cpu_mmw_pause_int(&gd->gd_reqflags, reqflags);
998 } else if (cpu_idle_hlt) {
999 __asm __volatile("cli");
1001 if ((gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
1003 cpu_idle_default_hook();
1007 __asm __volatile("sti");
1011 __asm __volatile("sti");
1020 * This routine is called if a spinlock has been held through the
1021 * exponential backoff period and is seriously contested. On a real cpu
1025 cpu_spinlock_contested(void)
1033 * Clear registers on exec
1036 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1038 struct thread *td = curthread;
1039 struct lwp *lp = td->td_lwp;
1040 struct pcb *pcb = td->td_pcb;
1041 struct trapframe *regs = lp->lwp_md.md_regs;
1043 /* was i386_user_cleanup() in NetBSD */
1046 bzero((char *)regs, sizeof(struct trapframe));
1047 regs->tf_rip = entry;
1048 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1049 regs->tf_rdi = stack; /* argv */
1050 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1051 regs->tf_ss = _udatasel;
1052 regs->tf_cs = _ucodesel;
1053 regs->tf_rbx = ps_strings;
1056 * Reset the hardware debug registers if they were in use.
1057 * They won't have any meaning for the newly exec'd process.
1059 if (pcb->pcb_flags & PCB_DBREGS) {
1065 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1066 if (pcb == td->td_pcb) {
1068 * Clear the debug registers on the running
1069 * CPU, otherwise they will end up affecting
1070 * the next process we switch to.
1074 pcb->pcb_flags &= ~PCB_DBREGS;
1078 * Initialize the math emulator (if any) for the current process.
1079 * Actually, just clear the bit that says that the emulator has
1080 * been initialized. Initialization is delayed until the process
1081 * traps to the emulator (if it is done at all) mainly because
1082 * emulators don't provide an entry point for initialization.
1084 pcb->pcb_flags &= ~FP_SOFTFP;
1087 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1088 * gd_npxthread. Otherwise a preemptive interrupt thread
1089 * may panic in npxdna().
1092 load_cr0(rcr0() | CR0_MP);
1095 * NOTE: The MSR values must be correct so we can return to
1096 * userland. gd_user_fs/gs must be correct so the switch
1097 * code knows what the current MSR values are.
1099 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1100 pcb->pcb_gsbase = 0;
1101 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1102 mdcpu->gd_user_gs = 0;
1103 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1104 wrmsr(MSR_KGSBASE, 0);
1106 /* Initialize the npx (if any) for the current process. */
1107 npxinit(__INITIAL_NPXCW__);
1110 pcb->pcb_ds = _udatasel;
1111 pcb->pcb_es = _udatasel;
1112 pcb->pcb_fs = _udatasel;
1113 pcb->pcb_gs = _udatasel;
1122 cr0 |= CR0_NE; /* Done by npxinit() */
1123 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1124 cr0 |= CR0_WP | CR0_AM;
1130 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1133 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1135 if (!error && req->newptr)
1140 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1141 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1143 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1144 CTLFLAG_RW, &disable_rtc_set, 0, "");
1147 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1148 CTLFLAG_RD, &bootinfo, bootinfo, "");
1151 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1152 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1154 extern u_long bootdev; /* not a cdev_t - encoding is different */
1155 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1156 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1159 * Initialize 386 and configure to run kernel
1163 * Initialize segments & interrupt table
1167 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1168 static struct gate_descriptor idt0[NIDT];
1169 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1171 union descriptor ldt[NLDT]; /* local descriptor table */
1174 /* table descriptors - used to load tables by cpu */
1175 struct region_descriptor r_gdt, r_idt;
1177 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1178 extern int has_f00f_bug;
1181 /* JG proc0paddr is a virtual address */
1184 char proc0paddr_buff[LWKT_THREAD_STACK];
1187 /* software prototypes -- in more palatable form */
1188 struct soft_segment_descriptor gdt_segs[] = {
1189 /* GNULL_SEL 0 Null Descriptor */
1190 { 0x0, /* segment base address */
1192 0, /* segment type */
1193 0, /* segment descriptor priority level */
1194 0, /* segment descriptor present */
1196 0, /* default 32 vs 16 bit size */
1197 0 /* limit granularity (byte/page units)*/ },
1198 /* GCODE_SEL 1 Code Descriptor for kernel */
1199 { 0x0, /* segment base address */
1200 0xfffff, /* length - all address space */
1201 SDT_MEMERA, /* segment type */
1202 SEL_KPL, /* segment descriptor priority level */
1203 1, /* segment descriptor present */
1205 0, /* default 32 vs 16 bit size */
1206 1 /* limit granularity (byte/page units)*/ },
1207 /* GDATA_SEL 2 Data Descriptor for kernel */
1208 { 0x0, /* segment base address */
1209 0xfffff, /* length - all address space */
1210 SDT_MEMRWA, /* segment type */
1211 SEL_KPL, /* segment descriptor priority level */
1212 1, /* segment descriptor present */
1214 0, /* default 32 vs 16 bit size */
1215 1 /* limit granularity (byte/page units)*/ },
1216 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1217 { 0x0, /* segment base address */
1218 0xfffff, /* length - all address space */
1219 SDT_MEMERA, /* segment type */
1220 SEL_UPL, /* segment descriptor priority level */
1221 1, /* segment descriptor present */
1223 1, /* default 32 vs 16 bit size */
1224 1 /* limit granularity (byte/page units)*/ },
1225 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1226 { 0x0, /* segment base address */
1227 0xfffff, /* length - all address space */
1228 SDT_MEMRWA, /* segment type */
1229 SEL_UPL, /* segment descriptor priority level */
1230 1, /* segment descriptor present */
1232 1, /* default 32 vs 16 bit size */
1233 1 /* limit granularity (byte/page units)*/ },
1234 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1235 { 0x0, /* segment base address */
1236 0xfffff, /* length - all address space */
1237 SDT_MEMERA, /* segment type */
1238 SEL_UPL, /* segment descriptor priority level */
1239 1, /* segment descriptor present */
1241 0, /* default 32 vs 16 bit size */
1242 1 /* limit granularity (byte/page units)*/ },
1243 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1245 0x0, /* segment base address */
1246 sizeof(struct x86_64tss)-1,/* length - all address space */
1247 SDT_SYSTSS, /* segment type */
1248 SEL_KPL, /* segment descriptor priority level */
1249 1, /* segment descriptor present */
1251 0, /* unused - default 32 vs 16 bit size */
1252 0 /* limit granularity (byte/page units)*/ },
1253 /* Actually, the TSS is a system descriptor which is double size */
1254 { 0x0, /* segment base address */
1256 0, /* segment type */
1257 0, /* segment descriptor priority level */
1258 0, /* segment descriptor present */
1260 0, /* default 32 vs 16 bit size */
1261 0 /* limit granularity (byte/page units)*/ },
1262 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1263 { 0x0, /* segment base address */
1264 0xfffff, /* length - all address space */
1265 SDT_MEMRWA, /* segment type */
1266 SEL_UPL, /* segment descriptor priority level */
1267 1, /* segment descriptor present */
1269 1, /* default 32 vs 16 bit size */
1270 1 /* limit granularity (byte/page units)*/ },
1274 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1276 struct gate_descriptor *ip;
1279 ip->gd_looffset = (uintptr_t)func;
1280 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1286 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1289 #define IDTVEC(name) __CONCAT(X,name)
1292 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1293 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1294 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1295 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1296 IDTVEC(xmm), IDTVEC(dblfault),
1297 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1299 #ifdef DEBUG_INTERRUPTS
1300 extern inthand_t *Xrsvdary[256];
1304 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1306 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1307 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1308 ssd->ssd_type = sd->sd_type;
1309 ssd->ssd_dpl = sd->sd_dpl;
1310 ssd->ssd_p = sd->sd_p;
1311 ssd->ssd_def32 = sd->sd_def32;
1312 ssd->ssd_gran = sd->sd_gran;
1316 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1319 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1320 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1321 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1322 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1323 sd->sd_type = ssd->ssd_type;
1324 sd->sd_dpl = ssd->ssd_dpl;
1325 sd->sd_p = ssd->ssd_p;
1326 sd->sd_long = ssd->ssd_long;
1327 sd->sd_def32 = ssd->ssd_def32;
1328 sd->sd_gran = ssd->ssd_gran;
1332 ssdtosyssd(struct soft_segment_descriptor *ssd,
1333 struct system_segment_descriptor *sd)
1336 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1337 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1338 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1339 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1340 sd->sd_type = ssd->ssd_type;
1341 sd->sd_dpl = ssd->ssd_dpl;
1342 sd->sd_p = ssd->ssd_p;
1343 sd->sd_gran = ssd->ssd_gran;
1347 * Populate the (physmap) array with base/bound pairs describing the
1348 * available physical memory in the system, then test this memory and
1349 * build the phys_avail array describing the actually-available memory.
1351 * If we cannot accurately determine the physical memory map, then use
1352 * value from the 0xE801 call, and failing that, the RTC.
1354 * Total memory size may be set by the kernel environment variable
1355 * hw.physmem or the compile-time define MAXMEM.
1357 * Memory is aligned to PHYSMAP_ALIGN which must be a multiple
1358 * of PAGE_SIZE. This also greatly reduces the memory test time
1359 * which would otherwise be excessive on machines with > 8G of ram.
1361 * XXX first should be vm_paddr_t.
1364 #define PHYSMAP_ALIGN (vm_paddr_t)(128 * 1024)
1365 #define PHYSMAP_ALIGN_MASK (vm_paddr_t)(PHYSMAP_ALIGN - 1)
1368 getmemsize(caddr_t kmdp, u_int64_t first)
1370 int off, physmap_idx, pa_indx, da_indx;
1372 vm_paddr_t physmap[PHYSMAP_SIZE];
1374 vm_paddr_t msgbuf_size;
1375 u_long physmem_tunable;
1377 struct bios_smap *smapbase, *smap, *smapend;
1379 quad_t dcons_addr, dcons_size;
1381 bzero(physmap, sizeof(physmap));
1385 * get memory map from INT 15:E820, kindly supplied by the loader.
1387 * subr_module.c says:
1388 * "Consumer may safely assume that size value precedes data."
1389 * ie: an int32_t immediately precedes smap.
1391 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1392 MODINFO_METADATA | MODINFOMD_SMAP);
1393 if (smapbase == NULL)
1394 panic("No BIOS smap info from loader!");
1396 smapsize = *((u_int32_t *)smapbase - 1);
1397 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1399 for (smap = smapbase; smap < smapend; smap++) {
1400 if (boothowto & RB_VERBOSE)
1401 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1402 smap->type, smap->base, smap->length);
1404 if (smap->type != SMAP_TYPE_MEMORY)
1407 if (smap->length == 0)
1410 for (i = 0; i <= physmap_idx; i += 2) {
1411 if (smap->base < physmap[i + 1]) {
1412 if (boothowto & RB_VERBOSE) {
1413 kprintf("Overlapping or non-monotonic "
1414 "memory region, ignoring "
1420 Realmem += smap->length;
1422 if (smap->base == physmap[physmap_idx + 1]) {
1423 physmap[physmap_idx + 1] += smap->length;
1428 if (physmap_idx == PHYSMAP_SIZE) {
1429 kprintf("Too many segments in the physical "
1430 "address map, giving up\n");
1433 physmap[physmap_idx] = smap->base;
1434 physmap[physmap_idx + 1] = smap->base + smap->length;
1438 /* make hole for AP bootstrap code */
1439 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1441 /* Save EBDA address, if any */
1442 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1447 * Maxmem isn't the "maximum memory", it's one larger than the
1448 * highest page of the physical address space. It should be
1449 * called something like "Maxphyspage". We may adjust this
1450 * based on ``hw.physmem'' and the results of the memory test.
1452 Maxmem = atop(physmap[physmap_idx + 1]);
1455 Maxmem = MAXMEM / 4;
1458 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1459 Maxmem = atop(physmem_tunable);
1462 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1465 if (Maxmem > atop(physmap[physmap_idx + 1]))
1466 Maxmem = atop(physmap[physmap_idx + 1]);
1469 * Blowing out the DMAP will blow up the system.
1471 if (Maxmem > atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS)) {
1472 kprintf("Limiting Maxmem due to DMAP size\n");
1473 Maxmem = atop(DMAP_MAX_ADDRESS - DMAP_MIN_ADDRESS);
1476 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1477 (boothowto & RB_VERBOSE)) {
1478 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1482 * Call pmap initialization to make new kernel address space
1486 pmap_bootstrap(&first);
1487 physmap[0] = PAGE_SIZE;
1490 * Align the physmap to PHYSMAP_ALIGN and cut out anything
1493 for (i = j = 0; i <= physmap_idx; i += 2) {
1494 if (physmap[i+1] > ptoa((vm_paddr_t)Maxmem))
1495 physmap[i+1] = ptoa((vm_paddr_t)Maxmem);
1496 physmap[i] = (physmap[i] + PHYSMAP_ALIGN_MASK) &
1497 ~PHYSMAP_ALIGN_MASK;
1498 physmap[i+1] = physmap[i+1] & ~PHYSMAP_ALIGN_MASK;
1500 physmap[j] = physmap[i];
1501 physmap[j+1] = physmap[i+1];
1503 if (physmap[i] < physmap[i+1])
1506 physmap_idx = j - 2;
1509 * Align anything else used in the validation loop.
1511 first = (first + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1514 * Size up each available chunk of physical memory.
1518 phys_avail[pa_indx++] = physmap[0];
1519 phys_avail[pa_indx] = physmap[0];
1520 dump_avail[da_indx] = physmap[0];
1524 * Get dcons buffer address
1526 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1527 kgetenv_quad("dcons.size", &dcons_size) == 0)
1531 * Validate the physical memory. The physical memory segments
1532 * have already been aligned to PHYSMAP_ALIGN which is a multiple
1535 for (i = 0; i <= physmap_idx; i += 2) {
1538 end = physmap[i + 1];
1540 for (pa = physmap[i]; pa < end; pa += PHYSMAP_ALIGN) {
1541 int tmp, page_bad, full;
1542 int *ptr = (int *)CADDR1;
1546 * block out kernel memory as not available.
1548 if (pa >= 0x100000 && pa < first)
1552 * block out dcons buffer
1555 && pa >= trunc_page(dcons_addr)
1556 && pa < dcons_addr + dcons_size) {
1563 * map page into kernel: valid, read/write,non-cacheable
1565 *pte = pa | PG_V | PG_RW | PG_N;
1570 * Test for alternating 1's and 0's
1572 *(volatile int *)ptr = 0xaaaaaaaa;
1574 if (*(volatile int *)ptr != 0xaaaaaaaa)
1577 * Test for alternating 0's and 1's
1579 *(volatile int *)ptr = 0x55555555;
1581 if (*(volatile int *)ptr != 0x55555555)
1586 *(volatile int *)ptr = 0xffffffff;
1588 if (*(volatile int *)ptr != 0xffffffff)
1593 *(volatile int *)ptr = 0x0;
1595 if (*(volatile int *)ptr != 0x0)
1598 * Restore original value.
1603 * Adjust array of valid/good pages.
1605 if (page_bad == TRUE)
1608 * If this good page is a continuation of the
1609 * previous set of good pages, then just increase
1610 * the end pointer. Otherwise start a new chunk.
1611 * Note that "end" points one higher than end,
1612 * making the range >= start and < end.
1613 * If we're also doing a speculative memory
1614 * test and we at or past the end, bump up Maxmem
1615 * so that we keep going. The first bad page
1616 * will terminate the loop.
1618 if (phys_avail[pa_indx] == pa) {
1619 phys_avail[pa_indx] += PHYSMAP_ALIGN;
1622 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1624 "Too many holes in the physical address space, giving up\n");
1629 phys_avail[pa_indx++] = pa;
1630 phys_avail[pa_indx] = pa + PHYSMAP_ALIGN;
1632 physmem += PHYSMAP_ALIGN / PAGE_SIZE;
1634 if (dump_avail[da_indx] == pa) {
1635 dump_avail[da_indx] += PHYSMAP_ALIGN;
1638 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1642 dump_avail[da_indx++] = pa;
1643 dump_avail[da_indx] = pa + PHYSMAP_ALIGN;
1654 * The last chunk must contain at least one page plus the message
1655 * buffer to avoid complicating other code (message buffer address
1656 * calculation, etc.).
1658 msgbuf_size = (MSGBUF_SIZE + PHYSMAP_ALIGN_MASK) & ~PHYSMAP_ALIGN_MASK;
1660 while (phys_avail[pa_indx - 1] + PHYSMAP_ALIGN +
1661 msgbuf_size >= phys_avail[pa_indx]) {
1662 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1663 phys_avail[pa_indx--] = 0;
1664 phys_avail[pa_indx--] = 0;
1667 Maxmem = atop(phys_avail[pa_indx]);
1669 /* Trim off space for the message buffer. */
1670 phys_avail[pa_indx] -= msgbuf_size;
1672 avail_end = phys_avail[pa_indx];
1674 /* Map the message buffer. */
1675 for (off = 0; off < msgbuf_size; off += PAGE_SIZE) {
1676 pmap_kenter((vm_offset_t)msgbufp + off,
1677 phys_avail[pa_indx] + off);
1683 int apic_io_enable = 1; /* Enabled by default for kernels compiled w/APIC_IO */
1685 int apic_io_enable = 0; /* Disabled by default for kernels compiled without */
1687 TUNABLE_INT("hw.apic_io_enable", &apic_io_enable);
1690 struct machintr_abi MachIntrABI;
1701 * 7 Device Not Available (x87)
1703 * 9 Coprocessor Segment overrun (unsupported, reserved)
1705 * 11 Segment not present
1707 * 13 General Protection
1710 * 16 x87 FP Exception pending
1711 * 17 Alignment Check
1713 * 19 SIMD floating point
1715 * 32-255 INTn/external sources
1718 hammer_time(u_int64_t modulep, u_int64_t physfree)
1723 int metadata_missing, off;
1725 struct mdglobaldata *gd;
1729 * Prevent lowering of the ipl if we call tsleep() early.
1731 gd = &CPU_prvspace[0].mdglobaldata;
1732 bzero(gd, sizeof(*gd));
1735 * Note: on both UP and SMP curthread must be set non-NULL
1736 * early in the boot sequence because the system assumes
1737 * that 'curthread' is never NULL.
1740 gd->mi.gd_curthread = &thread0;
1741 thread0.td_gd = &gd->mi;
1743 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1746 metadata_missing = 0;
1747 if (bootinfo.bi_modulep) {
1748 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1749 preload_bootstrap_relocate(KERNBASE);
1751 metadata_missing = 1;
1753 if (bootinfo.bi_envp)
1754 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1757 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1758 preload_bootstrap_relocate(PTOV_OFFSET);
1759 kmdp = preload_search_by_type("elf kernel");
1761 kmdp = preload_search_by_type("elf64 kernel");
1762 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1763 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1765 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1766 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1770 * Default MachIntrABI to ICU
1772 MachIntrABI = MachIntrABI_ICU;
1774 TUNABLE_INT_FETCH("hw.apic_io_enable", &apic_io_enable);
1778 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1779 * and ncpus_fit_mask remain 0.
1784 /* Init basic tunables, hz etc */
1788 * make gdt memory segments
1790 gdt_segs[GPROC0_SEL].ssd_base =
1791 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1793 gd->mi.gd_prvspace = &CPU_prvspace[0];
1795 for (x = 0; x < NGDT; x++) {
1796 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1797 ssdtosd(&gdt_segs[x], &gdt[x]);
1799 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1800 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1802 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1803 r_gdt.rd_base = (long) gdt;
1806 wrmsr(MSR_FSBASE, 0); /* User value */
1807 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1808 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1810 mi_gdinit(&gd->mi, 0);
1812 proc0paddr = proc0paddr_buff;
1813 mi_proc0init(&gd->mi, proc0paddr);
1814 safepri = TDPRI_MAX;
1816 /* spinlocks and the BGL */
1820 for (x = 0; x < NIDT; x++)
1821 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1822 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1823 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1824 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1825 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1826 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1827 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1828 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1829 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1830 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1831 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1832 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1833 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1834 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1835 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1836 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1837 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1838 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1839 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1840 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1842 r_idt.rd_limit = sizeof(idt0) - 1;
1843 r_idt.rd_base = (long) idt;
1847 * Initialize the console before we print anything out.
1852 if (metadata_missing)
1853 kprintf("WARNING: loader(8) metadata is missing!\n");
1863 * Initialize IRQ mapping
1866 * SHOULD be after elcr_probe()
1868 MachIntrABI_ICU.initmap();
1870 MachIntrABI_IOAPIC.initmap();
1875 if (boothowto & RB_KDB)
1876 Debugger("Boot flags requested debugger");
1880 finishidentcpu(); /* Final stage of CPU initialization */
1881 setidt(6, &IDTVEC(ill), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1882 setidt(13, &IDTVEC(prot), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1884 identify_cpu(); /* Final stage of CPU initialization */
1885 initializecpu(); /* Initialize CPU registers */
1887 /* make an initial tss so cpu can get interrupt stack on syscall! */
1888 gd->gd_common_tss.tss_rsp0 =
1889 (register_t)(thread0.td_kstack +
1890 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1891 /* Ensure the stack is aligned to 16 bytes */
1892 gd->gd_common_tss.tss_rsp0 &= ~(register_t)0xF;
1894 /* double fault stack */
1895 gd->gd_common_tss.tss_ist1 =
1896 (long)&gd->mi.gd_prvspace->idlestack[
1897 sizeof(gd->mi.gd_prvspace->idlestack)];
1899 /* Set the IO permission bitmap (empty due to tss seg limit) */
1900 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
1902 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1903 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1904 gd->gd_common_tssd = *gd->gd_tss_gdt;
1907 /* Set up the fast syscall stuff */
1908 msr = rdmsr(MSR_EFER) | EFER_SCE;
1909 wrmsr(MSR_EFER, msr);
1910 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1911 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1912 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1913 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1914 wrmsr(MSR_STAR, msr);
1915 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1917 getmemsize(kmdp, physfree);
1918 init_param2(physmem);
1920 /* now running on new page tables, configured,and u/iom is accessible */
1922 /* Map the message buffer. */
1924 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1925 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1928 msgbufinit(msgbufp, MSGBUF_SIZE);
1931 /* transfer to user mode */
1933 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1934 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1935 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1941 /* setup proc 0's pcb */
1942 thread0.td_pcb->pcb_flags = 0;
1943 thread0.td_pcb->pcb_cr3 = KPML4phys;
1944 thread0.td_pcb->pcb_ext = 0;
1945 lwp0.lwp_md.md_regs = &proc0_tf; /* XXX needed? */
1947 /* Location of kernel stack for locore */
1948 return ((u_int64_t)thread0.td_pcb);
1952 * Initialize machine-dependant portions of the global data structure.
1953 * Note that the global data area and cpu0's idlestack in the private
1954 * data space were allocated in locore.
1956 * Note: the idlethread's cpl is 0
1958 * WARNING! Called from early boot, 'mycpu' may not work yet.
1961 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1964 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1966 lwkt_init_thread(&gd->mi.gd_idlethread,
1967 gd->mi.gd_prvspace->idlestack,
1968 sizeof(gd->mi.gd_prvspace->idlestack),
1970 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1971 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1972 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1973 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1977 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1979 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1980 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1987 globaldata_find(int cpu)
1989 KKASSERT(cpu >= 0 && cpu < ncpus);
1990 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1993 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1994 static void f00f_hack(void *unused);
1995 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1998 f00f_hack(void *unused)
2000 struct gate_descriptor *new_idt;
2006 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2008 r_idt.rd_limit = sizeof(idt0) - 1;
2010 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2012 panic("kmem_alloc returned 0");
2013 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2014 panic("kmem_alloc returned non-page-aligned memory");
2015 /* Put the first seven entries in the lower page */
2016 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2017 bcopy(idt, new_idt, sizeof(idt0));
2018 r_idt.rd_base = (int)new_idt;
2021 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2022 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2023 panic("vm_map_protect failed");
2026 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2029 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2031 lp->lwp_md.md_regs->tf_rip = addr;
2036 ptrace_single_step(struct lwp *lp)
2038 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
2043 fill_regs(struct lwp *lp, struct reg *regs)
2045 struct trapframe *tp;
2047 tp = lp->lwp_md.md_regs;
2048 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
2053 set_regs(struct lwp *lp, struct reg *regs)
2055 struct trapframe *tp;
2057 tp = lp->lwp_md.md_regs;
2058 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
2059 !CS_SECURE(regs->r_cs))
2061 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
2065 #ifndef CPU_DISABLE_SSE
2067 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2069 struct env87 *penv_87 = &sv_87->sv_env;
2070 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2073 /* FPU control/status */
2074 penv_87->en_cw = penv_xmm->en_cw;
2075 penv_87->en_sw = penv_xmm->en_sw;
2076 penv_87->en_tw = penv_xmm->en_tw;
2077 penv_87->en_fip = penv_xmm->en_fip;
2078 penv_87->en_fcs = penv_xmm->en_fcs;
2079 penv_87->en_opcode = penv_xmm->en_opcode;
2080 penv_87->en_foo = penv_xmm->en_foo;
2081 penv_87->en_fos = penv_xmm->en_fos;
2084 for (i = 0; i < 8; ++i)
2085 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2089 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2091 struct env87 *penv_87 = &sv_87->sv_env;
2092 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2095 /* FPU control/status */
2096 penv_xmm->en_cw = penv_87->en_cw;
2097 penv_xmm->en_sw = penv_87->en_sw;
2098 penv_xmm->en_tw = penv_87->en_tw;
2099 penv_xmm->en_fip = penv_87->en_fip;
2100 penv_xmm->en_fcs = penv_87->en_fcs;
2101 penv_xmm->en_opcode = penv_87->en_opcode;
2102 penv_xmm->en_foo = penv_87->en_foo;
2103 penv_xmm->en_fos = penv_87->en_fos;
2106 for (i = 0; i < 8; ++i)
2107 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2109 #endif /* CPU_DISABLE_SSE */
2112 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2114 #ifndef CPU_DISABLE_SSE
2116 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2117 (struct save87 *)fpregs);
2120 #endif /* CPU_DISABLE_SSE */
2121 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2126 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2128 #ifndef CPU_DISABLE_SSE
2130 set_fpregs_xmm((struct save87 *)fpregs,
2131 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2134 #endif /* CPU_DISABLE_SSE */
2135 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2140 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2143 dbregs->dr[0] = rdr0();
2144 dbregs->dr[1] = rdr1();
2145 dbregs->dr[2] = rdr2();
2146 dbregs->dr[3] = rdr3();
2147 dbregs->dr[4] = rdr4();
2148 dbregs->dr[5] = rdr5();
2149 dbregs->dr[6] = rdr6();
2150 dbregs->dr[7] = rdr7();
2154 pcb = lp->lwp_thread->td_pcb;
2155 dbregs->dr[0] = pcb->pcb_dr0;
2156 dbregs->dr[1] = pcb->pcb_dr1;
2157 dbregs->dr[2] = pcb->pcb_dr2;
2158 dbregs->dr[3] = pcb->pcb_dr3;
2161 dbregs->dr[6] = pcb->pcb_dr6;
2162 dbregs->dr[7] = pcb->pcb_dr7;
2168 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2171 load_dr0(dbregs->dr[0]);
2172 load_dr1(dbregs->dr[1]);
2173 load_dr2(dbregs->dr[2]);
2174 load_dr3(dbregs->dr[3]);
2175 load_dr4(dbregs->dr[4]);
2176 load_dr5(dbregs->dr[5]);
2177 load_dr6(dbregs->dr[6]);
2178 load_dr7(dbregs->dr[7]);
2181 struct ucred *ucred;
2183 uint64_t mask1, mask2;
2186 * Don't let an illegal value for dr7 get set. Specifically,
2187 * check for undefined settings. Setting these bit patterns
2188 * result in undefined behaviour and can lead to an unexpected
2191 /* JG this loop looks unreadable */
2192 /* Check 4 2-bit fields for invalid patterns.
2193 * These fields are R/Wi, for i = 0..3
2195 /* Is 10 in LENi allowed when running in compatibility mode? */
2196 /* Pattern 10 in R/Wi might be used to indicate
2197 * breakpoint on I/O. Further analysis should be
2198 * carried to decide if it is safe and useful to
2199 * provide access to that capability
2201 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2202 i++, mask1 <<= 4, mask2 <<= 4)
2203 if ((dbregs->dr[7] & mask1) == mask2)
2206 pcb = lp->lwp_thread->td_pcb;
2207 ucred = lp->lwp_proc->p_ucred;
2210 * Don't let a process set a breakpoint that is not within the
2211 * process's address space. If a process could do this, it
2212 * could halt the system by setting a breakpoint in the kernel
2213 * (if ddb was enabled). Thus, we need to check to make sure
2214 * that no breakpoints are being enabled for addresses outside
2215 * process's address space, unless, perhaps, we were called by
2218 * XXX - what about when the watched area of the user's
2219 * address space is written into from within the kernel
2220 * ... wouldn't that still cause a breakpoint to be generated
2221 * from within kernel mode?
2224 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2225 if (dbregs->dr[7] & 0x3) {
2226 /* dr0 is enabled */
2227 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2231 if (dbregs->dr[7] & (0x3<<2)) {
2232 /* dr1 is enabled */
2233 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2237 if (dbregs->dr[7] & (0x3<<4)) {
2238 /* dr2 is enabled */
2239 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2243 if (dbregs->dr[7] & (0x3<<6)) {
2244 /* dr3 is enabled */
2245 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2250 pcb->pcb_dr0 = dbregs->dr[0];
2251 pcb->pcb_dr1 = dbregs->dr[1];
2252 pcb->pcb_dr2 = dbregs->dr[2];
2253 pcb->pcb_dr3 = dbregs->dr[3];
2254 pcb->pcb_dr6 = dbregs->dr[6];
2255 pcb->pcb_dr7 = dbregs->dr[7];
2257 pcb->pcb_flags |= PCB_DBREGS;
2264 * Return > 0 if a hardware breakpoint has been hit, and the
2265 * breakpoint was in user space. Return 0, otherwise.
2268 user_dbreg_trap(void)
2270 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2271 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2272 int nbp; /* number of breakpoints that triggered */
2273 caddr_t addr[4]; /* breakpoint addresses */
2277 if ((dr7 & 0xff) == 0) {
2279 * all GE and LE bits in the dr7 register are zero,
2280 * thus the trap couldn't have been caused by the
2281 * hardware debug registers
2292 * None of the breakpoint bits are set meaning this
2293 * trap was not caused by any of the debug registers
2299 * at least one of the breakpoints were hit, check to see
2300 * which ones and if any of them are user space addresses
2304 addr[nbp++] = (caddr_t)rdr0();
2307 addr[nbp++] = (caddr_t)rdr1();
2310 addr[nbp++] = (caddr_t)rdr2();
2313 addr[nbp++] = (caddr_t)rdr3();
2316 for (i=0; i<nbp; i++) {
2318 (caddr_t)VM_MAX_USER_ADDRESS) {
2320 * addr[i] is in user space
2327 * None of the breakpoints are in user space.
2335 Debugger(const char *msg)
2337 kprintf("Debugger(\"%s\") called.\n", msg);
2344 * Provide inb() and outb() as functions. They are normally only
2345 * available as macros calling inlined functions, thus cannot be
2346 * called inside DDB.
2348 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2354 /* silence compiler warnings */
2356 void outb(u_int, u_char);
2363 * We use %%dx and not %1 here because i/o is done at %dx and not at
2364 * %edx, while gcc generates inferior code (movw instead of movl)
2365 * if we tell it to load (u_short) port.
2367 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2372 outb(u_int port, u_char data)
2376 * Use an unnecessary assignment to help gcc's register allocator.
2377 * This make a large difference for gcc-1.40 and a tiny difference
2378 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2379 * best results. gcc-2.6.0 can't handle this.
2382 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2389 #include "opt_cpu.h"
2393 * initialize all the SMP locks
2396 /* critical region when masking or unmasking interupts */
2397 struct spinlock_deprecated imen_spinlock;
2399 /* critical region for old style disable_intr/enable_intr */
2400 struct spinlock_deprecated mpintr_spinlock;
2402 /* critical region around INTR() routines */
2403 struct spinlock_deprecated intr_spinlock;
2405 /* lock region used by kernel profiling */
2406 struct spinlock_deprecated mcount_spinlock;
2408 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2409 struct spinlock_deprecated com_spinlock;
2411 /* lock regions around the clock hardware */
2412 struct spinlock_deprecated clock_spinlock;
2419 * Get the initial mplock with a count of 1 for the BSP.
2420 * This uses a LOGICAL cpu ID, ie BSP == 0.
2422 cpu_get_initial_mplock();
2425 spin_lock_init(&mcount_spinlock);
2426 spin_lock_init(&intr_spinlock);
2427 spin_lock_init(&mpintr_spinlock);
2428 spin_lock_init(&imen_spinlock);
2429 spin_lock_init(&com_spinlock);
2430 spin_lock_init(&clock_spinlock);
2432 /* our token pool needs to work early */
2433 lwkt_token_pool_init();