2 * Copyright (c) 1996, by Steve Passe
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6 * modification, are permitted provided that the following conditions
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25 * $FreeBSD: src/sys/i386/include/smptests.h,v 1.33.2.1 2000/05/16 06:58:10 dillon Exp $
26 * $DragonFly: src/sys/i386/include/Attic/smptests.h,v 1.3 2003/07/06 21:23:49 dillon Exp $
29 #ifndef _MACHINE_SMPTESTS_H_
30 #define _MACHINE_SMPTESTS_H_
34 * Various 'tests in progress' and configuration parameters.
39 * Tor's clock improvements.
41 * When the giant kernel lock disappears, a different strategy should
42 * probably be used, thus this patch can only be considered a temporary
45 * This patch causes (NCPU-1)*(128+100) extra IPIs per second.
46 * During profiling, the number is (NCPU-1)*(1024+100) extra IPIs/s
47 * in addition to extra IPIs due to forwarding ASTs to other CPUs.
49 * Having a shared AST flag in an SMP configuration is wrong, and I've
50 * just kludged around it, based upon the kernel lock blocking other
51 * processors from entering the kernel while handling an AST for one
52 * processor. When the giant kernel lock disappers, this kludge breaks.
60 * Control the "giant lock" pushdown by logical steps.
62 #define PUSHDOWN_LEVEL_1
63 #define PUSHDOWN_LEVEL_2
64 #define PUSHDOWN_LEVEL_3_NOT
65 #define PUSHDOWN_LEVEL_4_NOT
68 * Put FAST_INTR() ISRs at an APIC priority above the regular INTs.
69 * Allow the mp_lock() routines to handle FAST interrupts while spinning.
71 #ifdef PUSHDOWN_LEVEL_1
77 * These defines enable critical region locking of areas that were
78 * protected via cli/sti in the UP kernel.
80 * MPINTRLOCK protects all the generic areas.
81 * COMLOCK protects the sio/cy drivers.
82 * CLOCKLOCK protects clock hardware and data
83 * known to be incomplete:
87 #ifdef PUSHDOWN_LEVEL_1
88 #define USE_MPINTRLOCK
95 * INTR_SIMPLELOCK has been removed, as the interrupt mechanism will likely
96 * not use this sort of optimization if we move to interrupt threads.
98 #ifdef PUSHDOWN_LEVEL_4
103 * CPL_AND_CML has been removed. Interrupt threads will eventually not
104 * use either mechanism so there is no point trying to optimize it.
106 #ifdef PUSHDOWN_LEVEL_3
111 * SPL_DEBUG_POSTCODE/INTR_SPL/SPL_DEBUG - removed
113 * These functions were too expensive for the standard case but, more
114 * importantly, we should be able to come up with a much cleaner way
115 * to handle the cpl. Having to do any locking at all is a mistake
116 * for something that is modified as often as cpl is.
120 * FAST_WITHOUTCPL - now made the default (define removed). Text below
121 * contains the current discussion. I am confident we can find a solution
122 * that does not require us to process softints from a hard int, which can
123 * kill serial performance due to the lack of true hardware ipl's.
127 * Ignore the ipending bits when exiting FAST_INTR() routines.
129 * according to Bruce:
131 * setsoft*() may set ipending. setsofttty() is actually used in the
132 * FAST_INTR handler in some serial drivers. This is necessary to get
133 * output completions and other urgent events handled as soon as possible.
134 * The flag(s) could be set in a variable other than ipending, but they
135 * needs to be checked against cpl to decide whether the software interrupt
136 * handler can/should run.
138 * (FAST_INTR used to just return
139 * in all cases until rev.1.7 of vector.s. This worked OK provided there
140 * were no user-mode CPU hogs. CPU hogs caused an average latency of 1/2
141 * clock tick for output completions...)
144 * So I need to restore cpl handling someday, but AFTER
145 * I finish making spl/cpl MP-safe.
147 #ifdef PUSHDOWN_LEVEL_1
152 * FAST_SIMPLELOCK no longer exists, because it doesn't help us. The cpu
153 * is likely to already hold the MP lock and recursive MP locks are now
154 * very cheap, so we do not need this optimization. Eventually *ALL*
155 * interrupts will run in their own thread, so there is no sense complicating
158 #ifdef PUSHDOWN_LEVEL_1
163 * Portions of the old TEST_LOPRIO code, back from the grave!
169 * Send CPUSTOP IPI for stop/restart of other CPUs on DDB break.
171 #define VERBOSE_CPUSTOP_ON_DDBBREAK
173 #define CPUSTOP_ON_DDBBREAK
177 * Bracket code/comments relevant to the current 'giant lock' model.
178 * Everything is now the 'giant lock' model, but we will use this as
179 * we start to "push down" the lock.
186 * Don't assume that slow interrupt handler X is called from vector
189 #define APIC_INTR_REORDER
192 * Redirect clock interrupts to a higher priority (fast intr) vector,
193 * while still using the slow interrupt handler. Only effective when
194 * APIC_INTR_REORDER is defined.
196 #define APIC_INTR_HIGHPRI_CLOCK
203 #define COUNT_XINVLTLB_HITS
208 * Hack to "fake-out" kernel into thinking it is running on a 'default config'.
210 * value == default type
211 #define TEST_DEFAULT_CONFIG 6
216 * Simple test code for IPI interaction, save for future...
219 #define IPI_TARGET_TEST1 1
224 * Address of POST hardware port.
225 * Defining this enables POSTCODE macros.
227 #define POST_ADDR 0x80
232 * POST hardware macros.
235 #define ASMPOSTCODE_INC \
237 movl _current_postcode, %eax ; \
240 movl %eax, _current_postcode ; \
241 outb %al, $POST_ADDR ; \
245 * Overwrite the current_postcode value.
247 #define ASMPOSTCODE(X) \
250 movl %eax, _current_postcode ; \
251 outb %al, $POST_ADDR ; \
255 * Overwrite the current_postcode low nibble.
257 #define ASMPOSTCODE_LO(X) \
259 movl _current_postcode, %eax ; \
262 movl %eax, _current_postcode ; \
263 outb %al, $POST_ADDR ; \
267 * Overwrite the current_postcode high nibble.
269 #define ASMPOSTCODE_HI(X) \
271 movl _current_postcode, %eax ; \
273 orl $(X<<4), %eax ; \
274 movl %eax, _current_postcode ; \
275 outb %al, $POST_ADDR ; \
278 #define ASMPOSTCODE_INC
279 #define ASMPOSTCODE(X)
280 #define ASMPOSTCODE_LO(X)
281 #define ASMPOSTCODE_HI(X)
282 #endif /* POST_ADDR */
286 * These are all temps for debugging...
292 * This macro traps unexpected INTs to a specific CPU, eg. GUARD_CPU.
296 #define MAYBE_PANIC(irq_num) \
297 cmpl $GUARD_CPU, _cpuid ; \
299 cmpl $1, _ok_test1 ; \
316 #define MAYBE_PANIC(irq_num)
317 #endif /* GUARD_INTS */
319 #endif /* _MACHINE_SMPTESTS_H_ */