1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 /* stdio.h must precede rtl.h for FFS. */
30 #include "hard-reg-set.h"
33 #include "insn-config.h"
38 #include "splay-tree.h"
40 /* The basic idea of common subexpression elimination is to go
41 through the code, keeping a record of expressions that would
42 have the same value at the current scan point, and replacing
43 expressions encountered with the cheapest equivalent expression.
45 It is too complicated to keep track of the different possibilities
46 when control paths merge in this code; so, at each label, we forget all
47 that is known and start fresh. This can be described as processing each
48 extended basic block separately. We have a separate pass to perform
51 Note CSE can turn a conditional or computed jump into a nop or
52 an unconditional jump. When this occurs we arrange to run the jump
53 optimizer after CSE to delete the unreachable code.
55 We use two data structures to record the equivalent expressions:
56 a hash table for most expressions, and several vectors together
57 with "quantity numbers" to record equivalent (pseudo) registers.
59 The use of the special data structure for registers is desirable
60 because it is faster. It is possible because registers references
61 contain a fairly small number, the register number, taken from
62 a contiguously allocated series, and two register references are
63 identical if they have the same number. General expressions
64 do not have any such thing, so the only way to retrieve the
65 information recorded on an expression other than a register
66 is to keep it in a hash table.
68 Registers and "quantity numbers":
70 At the start of each basic block, all of the (hardware and pseudo)
71 registers used in the function are given distinct quantity
72 numbers to indicate their contents. During scan, when the code
73 copies one register into another, we copy the quantity number.
74 When a register is loaded in any other way, we allocate a new
75 quantity number to describe the value generated by this operation.
76 `reg_qty' records what quantity a register is currently thought
79 All real quantity numbers are greater than or equal to `max_reg'.
80 If register N has not been assigned a quantity, reg_qty[N] will equal N.
82 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
83 variables should be referenced with an index below `max_reg'.
85 We also maintain a bidirectional chain of registers for each
86 quantity number. `qty_first_reg', `qty_last_reg',
87 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
89 The first register in a chain is the one whose lifespan is least local.
90 Among equals, it is the one that was seen first.
91 We replace any equivalent register with that one.
93 If two registers have the same quantity number, it must be true that
94 REG expressions with `qty_mode' must be in the hash table for both
95 registers and must be in the same class.
97 The converse is not true. Since hard registers may be referenced in
98 any mode, two REG expressions might be equivalent in the hash table
99 but not have the same quantity number if the quantity number of one
100 of the registers is not the same mode as those expressions.
102 Constants and quantity numbers
104 When a quantity has a known constant value, that value is stored
105 in the appropriate element of qty_const. This is in addition to
106 putting the constant in the hash table as is usual for non-regs.
108 Whether a reg or a constant is preferred is determined by the configuration
109 macro CONST_COSTS and will often depend on the constant value. In any
110 event, expressions containing constants can be simplified, by fold_rtx.
112 When a quantity has a known nearly constant value (such as an address
113 of a stack slot), that value is stored in the appropriate element
116 Integer constants don't have a machine mode. However, cse
117 determines the intended machine mode from the destination
118 of the instruction that moves the constant. The machine mode
119 is recorded in the hash table along with the actual RTL
120 constant expression so that different modes are kept separate.
124 To record known equivalences among expressions in general
125 we use a hash table called `table'. It has a fixed number of buckets
126 that contain chains of `struct table_elt' elements for expressions.
127 These chains connect the elements whose expressions have the same
130 Other chains through the same elements connect the elements which
131 currently have equivalent values.
133 Register references in an expression are canonicalized before hashing
134 the expression. This is done using `reg_qty' and `qty_first_reg'.
135 The hash code of a register reference is computed using the quantity
136 number, not the register number.
138 When the value of an expression changes, it is necessary to remove from the
139 hash table not just that expression but all expressions whose values
140 could be different as a result.
142 1. If the value changing is in memory, except in special cases
143 ANYTHING referring to memory could be changed. That is because
144 nobody knows where a pointer does not point.
145 The function `invalidate_memory' removes what is necessary.
147 The special cases are when the address is constant or is
148 a constant plus a fixed register such as the frame pointer
149 or a static chain pointer. When such addresses are stored in,
150 we can tell exactly which other such addresses must be invalidated
151 due to overlap. `invalidate' does this.
152 All expressions that refer to non-constant
153 memory addresses are also invalidated. `invalidate_memory' does this.
155 2. If the value changing is a register, all expressions
156 containing references to that register, and only those,
159 Because searching the entire hash table for expressions that contain
160 a register is very slow, we try to figure out when it isn't necessary.
161 Precisely, this is necessary only when expressions have been
162 entered in the hash table using this register, and then the value has
163 changed, and then another expression wants to be added to refer to
164 the register's new value. This sequence of circumstances is rare
165 within any one basic block.
167 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
168 reg_tick[i] is incremented whenever a value is stored in register i.
169 reg_in_table[i] holds -1 if no references to register i have been
170 entered in the table; otherwise, it contains the value reg_tick[i] had
171 when the references were entered. If we want to enter a reference
172 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
173 Until we want to enter a new entry, the mere fact that the two vectors
174 don't match makes the entries be ignored if anyone tries to match them.
176 Registers themselves are entered in the hash table as well as in
177 the equivalent-register chains. However, the vectors `reg_tick'
178 and `reg_in_table' do not apply to expressions which are simple
179 register references. These expressions are removed from the table
180 immediately when they become invalid, and this can be done even if
181 we do not immediately search for all the expressions that refer to
184 A CLOBBER rtx in an instruction invalidates its operand for further
185 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
186 invalidates everything that resides in memory.
190 Constant expressions that differ only by an additive integer
191 are called related. When a constant expression is put in
192 the table, the related expression with no constant term
193 is also entered. These are made to point at each other
194 so that it is possible to find out if there exists any
195 register equivalent to an expression related to a given expression. */
197 /* One plus largest register number used in this function. */
201 /* One plus largest instruction UID used in this function at time of
204 static int max_insn_uid;
206 /* Length of vectors indexed by quantity number.
207 We know in advance we will not need a quantity number this big. */
211 /* Next quantity number to be allocated.
212 This is 1 + the largest number needed so far. */
216 /* Indexed by quantity number, gives the first (or last) register
217 in the chain of registers that currently contain this quantity. */
219 static int *qty_first_reg;
220 static int *qty_last_reg;
222 /* Index by quantity number, gives the mode of the quantity. */
224 static enum machine_mode *qty_mode;
226 /* Indexed by quantity number, gives the rtx of the constant value of the
227 quantity, or zero if it does not have a known value.
228 A sum of the frame pointer (or arg pointer) plus a constant
229 can also be entered here. */
231 static rtx *qty_const;
233 /* Indexed by qty number, gives the insn that stored the constant value
234 recorded in `qty_const'. */
236 static rtx *qty_const_insn;
238 /* The next three variables are used to track when a comparison between a
239 quantity and some constant or register has been passed. In that case, we
240 know the results of the comparison in case we see it again. These variables
241 record a comparison that is known to be true. */
243 /* Indexed by qty number, gives the rtx code of a comparison with a known
244 result involving this quantity. If none, it is UNKNOWN. */
245 static enum rtx_code *qty_comparison_code;
247 /* Indexed by qty number, gives the constant being compared against in a
248 comparison of known result. If no such comparison, it is undefined.
249 If the comparison is not with a constant, it is zero. */
251 static rtx *qty_comparison_const;
253 /* Indexed by qty number, gives the quantity being compared against in a
254 comparison of known result. If no such comparison, if it undefined.
255 If the comparison is not with a register, it is -1. */
257 static int *qty_comparison_qty;
260 /* For machines that have a CC0, we do not record its value in the hash
261 table since its use is guaranteed to be the insn immediately following
262 its definition and any other insn is presumed to invalidate it.
264 Instead, we store below the value last assigned to CC0. If it should
265 happen to be a constant, it is stored in preference to the actual
266 assigned value. In case it is a constant, we store the mode in which
267 the constant should be interpreted. */
269 static rtx prev_insn_cc0;
270 static enum machine_mode prev_insn_cc0_mode;
273 /* Previous actual insn. 0 if at first insn of basic block. */
275 static rtx prev_insn;
277 /* Insn being scanned. */
279 static rtx this_insn;
281 /* Index by register number, gives the number of the next (or
282 previous) register in the chain of registers sharing the same
285 Or -1 if this register is at the end of the chain.
287 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
289 static int *reg_next_eqv;
290 static int *reg_prev_eqv;
292 struct cse_reg_info {
294 /* The number of times the register has been altered in the current
298 /* The next cse_reg_info structure in the free list. */
299 struct cse_reg_info* next;
302 /* The REG_TICK value at which rtx's containing this register are
303 valid in the hash table. If this does not equal the current
304 reg_tick value, such expressions existing in the hash table are
308 /* The quantity number of the register's current contents. */
312 /* A free list of cse_reg_info entries. */
313 static struct cse_reg_info *cse_reg_info_free_list;
315 /* A mapping from registers to cse_reg_info data structures. */
316 static splay_tree cse_reg_info_tree;
318 /* The last lookup we did into the cse_reg_info_tree. This allows us
319 to cache repeated lookups. */
320 static int cached_regno;
321 static struct cse_reg_info *cached_cse_reg_info;
323 /* A HARD_REG_SET containing all the hard registers for which there is
324 currently a REG expression in the hash table. Note the difference
325 from the above variables, which indicate if the REG is mentioned in some
326 expression in the table. */
328 static HARD_REG_SET hard_regs_in_table;
330 /* A HARD_REG_SET containing all the hard registers that are invalidated
333 static HARD_REG_SET regs_invalidated_by_call;
335 /* CUID of insn that starts the basic block currently being cse-processed. */
337 static int cse_basic_block_start;
339 /* CUID of insn that ends the basic block currently being cse-processed. */
341 static int cse_basic_block_end;
343 /* Vector mapping INSN_UIDs to cuids.
344 The cuids are like uids but increase monotonically always.
345 We use them to see whether a reg is used outside a given basic block. */
347 static int *uid_cuid;
349 /* Highest UID in UID_CUID. */
352 /* Get the cuid of an insn. */
354 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
356 /* Nonzero if cse has altered conditional jump insns
357 in such a way that jump optimization should be redone. */
359 static int cse_jumps_altered;
361 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
362 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
363 to put in the note. */
364 static int recorded_label_ref;
366 /* canon_hash stores 1 in do_not_record
367 if it notices a reference to CC0, PC, or some other volatile
370 static int do_not_record;
372 #ifdef LOAD_EXTEND_OP
374 /* Scratch rtl used when looking for load-extended copy of a MEM. */
375 static rtx memory_extend_rtx;
378 /* canon_hash stores 1 in hash_arg_in_memory
379 if it notices a reference to memory within the expression being hashed. */
381 static int hash_arg_in_memory;
383 /* canon_hash stores 1 in hash_arg_in_struct
384 if it notices a reference to memory that's part of a structure. */
386 static int hash_arg_in_struct;
388 /* The hash table contains buckets which are chains of `struct table_elt's,
389 each recording one expression's information.
390 That expression is in the `exp' field.
392 Those elements with the same hash code are chained in both directions
393 through the `next_same_hash' and `prev_same_hash' fields.
395 Each set of expressions with equivalent values
396 are on a two-way chain through the `next_same_value'
397 and `prev_same_value' fields, and all point with
398 the `first_same_value' field at the first element in
399 that chain. The chain is in order of increasing cost.
400 Each element's cost value is in its `cost' field.
402 The `in_memory' field is nonzero for elements that
403 involve any reference to memory. These elements are removed
404 whenever a write is done to an unidentified location in memory.
405 To be safe, we assume that a memory address is unidentified unless
406 the address is either a symbol constant or a constant plus
407 the frame pointer or argument pointer.
409 The `in_struct' field is nonzero for elements that
410 involve any reference to memory inside a structure or array.
412 The `related_value' field is used to connect related expressions
413 (that differ by adding an integer).
414 The related expressions are chained in a circular fashion.
415 `related_value' is zero for expressions for which this
418 The `cost' field stores the cost of this element's expression.
420 The `is_const' flag is set if the element is a constant (including
423 The `flag' field is used as a temporary during some search routines.
425 The `mode' field is usually the same as GET_MODE (`exp'), but
426 if `exp' is a CONST_INT and has no machine mode then the `mode'
427 field is the mode it was being used as. Each constant is
428 recorded separately for each mode it is used with. */
434 struct table_elt *next_same_hash;
435 struct table_elt *prev_same_hash;
436 struct table_elt *next_same_value;
437 struct table_elt *prev_same_value;
438 struct table_elt *first_same_value;
439 struct table_elt *related_value;
441 enum machine_mode mode;
448 /* We don't want a lot of buckets, because we rarely have very many
449 things stored in the hash table, and a lot of buckets slows
450 down a lot of loops that happen frequently. */
453 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
454 register (hard registers may require `do_not_record' to be set). */
457 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
458 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
459 : canon_hash (X, M) % NBUCKETS)
461 /* Determine whether register number N is considered a fixed register for CSE.
462 It is desirable to replace other regs with fixed regs, to reduce need for
464 A reg wins if it is either the frame pointer or designated as fixed,
465 but not if it is an overlapping register. */
466 #ifdef OVERLAPPING_REGNO_P
467 #define FIXED_REGNO_P(N) \
468 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
469 || fixed_regs[N] || global_regs[N]) \
470 && ! OVERLAPPING_REGNO_P ((N)))
472 #define FIXED_REGNO_P(N) \
473 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
474 || fixed_regs[N] || global_regs[N])
477 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
478 hard registers and pointers into the frame are the cheapest with a cost
479 of 0. Next come pseudos with a cost of one and other hard registers with
480 a cost of 2. Aside from these special cases, call `rtx_cost'. */
482 #define CHEAP_REGNO(N) \
483 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
484 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
485 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
486 || ((N) < FIRST_PSEUDO_REGISTER \
487 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
489 /* A register is cheap if it is a user variable assigned to the register
490 or if its register number always corresponds to a cheap register. */
492 #define CHEAP_REG(N) \
493 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
494 || CHEAP_REGNO (REGNO (N)))
497 (GET_CODE (X) == REG \
498 ? (CHEAP_REG (X) ? 0 \
499 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
503 /* Get the info associated with register N. */
505 #define GET_CSE_REG_INFO(N) \
506 (((N) == cached_regno && cached_cse_reg_info) \
507 ? cached_cse_reg_info : get_cse_reg_info ((N)))
509 /* Get the number of times this register has been updated in this
512 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->variant.reg_tick)
514 /* Get the point at which REG was recorded in the table. */
516 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
518 /* Get the quantity number for REG. */
520 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
522 /* Determine if the quantity number for register X represents a valid index
523 into the `qty_...' variables. */
525 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
528 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
529 during CSE, such nodes are present. Using an ADDRESSOF node which
530 refers to the address of a REG is a good thing because we can then
531 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
532 #define CSE_ADDRESS_COST(RTX) \
533 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
534 ? -1 : ADDRESS_COST(RTX))
537 static struct table_elt *table[NBUCKETS];
539 /* Chain of `struct table_elt's made so far for this function
540 but currently removed from the table. */
542 static struct table_elt *free_element_chain;
544 /* Number of `struct table_elt' structures made so far for this function. */
546 static int n_elements_made;
548 /* Maximum value `n_elements_made' has had so far in this compilation
549 for functions previously processed. */
551 static int max_elements_made;
553 /* Surviving equivalence class when two equivalence classes are merged
554 by recording the effects of a jump in the last insn. Zero if the
555 last insn was not a conditional jump. */
557 static struct table_elt *last_jump_equiv_class;
559 /* Set to the cost of a constant pool reference if one was found for a
560 symbolic constant. If this was found, it means we should try to
561 convert constants into constant pool entries if they don't fit in
564 static int constant_pool_entries_cost;
566 /* Define maximum length of a branch path. */
568 #define PATHLENGTH 10
570 /* This data describes a block that will be processed by cse_basic_block. */
572 struct cse_basic_block_data {
573 /* Lowest CUID value of insns in block. */
575 /* Highest CUID value of insns in block. */
577 /* Total number of SETs in block. */
579 /* Last insn in the block. */
581 /* Size of current branch path, if any. */
583 /* Current branch path, indicating which branches will be taken. */
585 /* The branch insn. */
587 /* Whether it should be taken or not. AROUND is the same as taken
588 except that it is used when the destination label is not preceded
590 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
594 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
595 virtual regs here because the simplify_*_operation routines are called
596 by integrate.c, which is called before virtual register instantiation. */
598 #define FIXED_BASE_PLUS_P(X) \
599 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
600 || (X) == arg_pointer_rtx \
601 || (X) == virtual_stack_vars_rtx \
602 || (X) == virtual_incoming_args_rtx \
603 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
604 && (XEXP (X, 0) == frame_pointer_rtx \
605 || XEXP (X, 0) == hard_frame_pointer_rtx \
606 || XEXP (X, 0) == arg_pointer_rtx \
607 || XEXP (X, 0) == virtual_stack_vars_rtx \
608 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
609 || GET_CODE (X) == ADDRESSOF)
611 /* Similar, but also allows reference to the stack pointer.
613 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
614 arg_pointer_rtx by itself is nonzero, because on at least one machine,
615 the i960, the arg pointer is zero when it is unused. */
617 #define NONZERO_BASE_PLUS_P(X) \
618 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
619 || (X) == virtual_stack_vars_rtx \
620 || (X) == virtual_incoming_args_rtx \
621 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
622 && (XEXP (X, 0) == frame_pointer_rtx \
623 || XEXP (X, 0) == hard_frame_pointer_rtx \
624 || XEXP (X, 0) == arg_pointer_rtx \
625 || XEXP (X, 0) == virtual_stack_vars_rtx \
626 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
627 || (X) == stack_pointer_rtx \
628 || (X) == virtual_stack_dynamic_rtx \
629 || (X) == virtual_outgoing_args_rtx \
630 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
631 && (XEXP (X, 0) == stack_pointer_rtx \
632 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
633 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
634 || GET_CODE (X) == ADDRESSOF)
636 static int notreg_cost PROTO((rtx));
637 static void new_basic_block PROTO((void));
638 static void make_new_qty PROTO((int));
639 static void make_regs_eqv PROTO((int, int));
640 static void delete_reg_equiv PROTO((int));
641 static int mention_regs PROTO((rtx));
642 static int insert_regs PROTO((rtx, struct table_elt *, int));
643 static void free_element PROTO((struct table_elt *));
644 static void remove_from_table PROTO((struct table_elt *, unsigned));
645 static struct table_elt *get_element PROTO((void));
646 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
647 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
648 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
649 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
651 static void merge_equiv_classes PROTO((struct table_elt *,
652 struct table_elt *));
653 static void invalidate PROTO((rtx, enum machine_mode));
654 static int cse_rtx_varies_p PROTO((rtx));
655 static void remove_invalid_refs PROTO((int));
656 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
657 static void rehash_using_reg PROTO((rtx));
658 static void invalidate_memory PROTO((void));
659 static void invalidate_for_call PROTO((void));
660 static rtx use_related_value PROTO((rtx, struct table_elt *));
661 static unsigned canon_hash PROTO((rtx, enum machine_mode));
662 static unsigned safe_hash PROTO((rtx, enum machine_mode));
663 static int exp_equiv_p PROTO((rtx, rtx, int, int));
664 static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
667 static int refers_to_p PROTO((rtx, rtx));
668 static rtx canon_reg PROTO((rtx, rtx));
669 static void find_best_addr PROTO((rtx, rtx *));
670 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
672 enum machine_mode *));
673 static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
675 static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
677 static rtx fold_rtx PROTO((rtx, rtx));
678 static rtx equiv_constant PROTO((rtx));
679 static void record_jump_equiv PROTO((rtx, int));
680 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
682 static void cse_insn PROTO((rtx, rtx));
683 static int note_mem_written PROTO((rtx));
684 static void invalidate_from_clobbers PROTO((rtx));
685 static rtx cse_process_notes PROTO((rtx, rtx));
686 static void cse_around_loop PROTO((rtx));
687 static void invalidate_skipped_set PROTO((rtx, rtx));
688 static void invalidate_skipped_block PROTO((rtx));
689 static void cse_check_loop_start PROTO((rtx, rtx));
690 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
691 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
692 static void count_reg_usage PROTO((rtx, int *, rtx, int));
693 extern void dump_class PROTO((struct table_elt*));
694 static void check_fold_consts PROTO((PTR));
695 static struct cse_reg_info* get_cse_reg_info PROTO((int));
696 static void free_cse_reg_info PROTO((splay_tree_value));
697 static void flush_hash_table PROTO((void));
699 /* Dump the expressions in the equivalence class indicated by CLASSP.
700 This function is used only for debugging. */
703 struct table_elt *classp;
705 struct table_elt *elt;
707 fprintf (stderr, "Equivalence chain for ");
708 print_rtl (stderr, classp->exp);
709 fprintf (stderr, ": \n");
711 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
713 print_rtl (stderr, elt->exp);
714 fprintf (stderr, "\n");
718 /* Return an estimate of the cost of computing rtx X.
719 One use is in cse, to decide which expression to keep in the hash table.
720 Another is in rtl generation, to pick the cheapest way to multiply.
721 Other uses like the latter are expected in the future. */
723 /* Internal function, to compute cost when X is not a register; called
724 from COST macro to keep it simple. */
730 return ((GET_CODE (x) == SUBREG
731 && GET_CODE (SUBREG_REG (x)) == REG
732 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
733 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
734 && (GET_MODE_SIZE (GET_MODE (x))
735 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
736 && subreg_lowpart_p (x)
737 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
738 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
739 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
740 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
742 : rtx_cost (x, SET) * 2);
745 /* Return the right cost to give to an operation
746 to make the cost of the corresponding register-to-register instruction
747 N times that of a fast register-to-register instruction. */
749 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
752 rtx_cost (x, outer_code)
754 enum rtx_code outer_code ATTRIBUTE_UNUSED;
757 register enum rtx_code code;
764 /* Compute the default costs of certain things.
765 Note that RTX_COSTS can override the defaults. */
771 /* Count multiplication by 2**n as a shift,
772 because if we are considering it, we would output it as a shift. */
773 if (GET_CODE (XEXP (x, 1)) == CONST_INT
774 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
777 total = COSTS_N_INSNS (5);
783 total = COSTS_N_INSNS (7);
786 /* Used in loop.c and combine.c as a marker. */
790 /* We don't want these to be used in substitutions because
791 we have no way of validating the resulting insn. So assign
792 anything containing an ASM_OPERANDS a very high cost. */
802 return ! CHEAP_REG (x);
805 /* If we can't tie these modes, make this expensive. The larger
806 the mode, the more expensive it is. */
807 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
808 return COSTS_N_INSNS (2
809 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
812 RTX_COSTS (x, code, outer_code);
815 CONST_COSTS (x, code, outer_code);
819 #ifdef DEFAULT_RTX_COSTS
820 DEFAULT_RTX_COSTS(x, code, outer_code);
825 /* Sum the costs of the sub-rtx's, plus cost of this operation,
826 which is already in total. */
828 fmt = GET_RTX_FORMAT (code);
829 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
831 total += rtx_cost (XEXP (x, i), code);
832 else if (fmt[i] == 'E')
833 for (j = 0; j < XVECLEN (x, i); j++)
834 total += rtx_cost (XVECEXP (x, i, j), code);
839 static struct cse_reg_info *
840 get_cse_reg_info (regno)
843 struct cse_reg_info *cri;
846 /* See if we already have this entry. */
847 n = splay_tree_lookup (cse_reg_info_tree,
848 (splay_tree_key) regno);
850 cri = (struct cse_reg_info *) (n->value);
853 /* Get a new cse_reg_info structure. */
854 if (cse_reg_info_free_list)
856 cri = cse_reg_info_free_list;
857 cse_reg_info_free_list = cri->variant.next;
860 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
863 cri->variant.reg_tick = 0;
864 cri->reg_in_table = -1;
865 cri->reg_qty = regno;
867 splay_tree_insert (cse_reg_info_tree,
868 (splay_tree_key) regno,
869 (splay_tree_value) cri);
872 /* Cache this lookup; we tend to be looking up information about the
873 same register several times in a row. */
874 cached_regno = regno;
875 cached_cse_reg_info = cri;
881 free_cse_reg_info (v)
884 struct cse_reg_info *cri = (struct cse_reg_info *) v;
886 cri->variant.next = cse_reg_info_free_list;
887 cse_reg_info_free_list = cri;
890 /* Clear the hash table and initialize each register with its own quantity,
891 for a new basic block. */
900 if (cse_reg_info_tree)
902 splay_tree_delete (cse_reg_info_tree);
903 cached_cse_reg_info = 0;
906 cse_reg_info_tree = splay_tree_new (splay_tree_compare_ints, 0,
909 CLEAR_HARD_REG_SET (hard_regs_in_table);
911 /* The per-quantity values used to be initialized here, but it is
912 much faster to initialize each as it is made in `make_new_qty'. */
914 for (i = 0; i < NBUCKETS; i++)
916 register struct table_elt *this, *next;
917 for (this = table[i]; this; this = next)
919 next = this->next_same_hash;
924 bzero ((char *) table, sizeof table);
933 /* Say that register REG contains a quantity not in any register before
934 and initialize that quantity. */
942 if (next_qty >= max_qty)
945 q = REG_QTY (reg) = next_qty++;
946 qty_first_reg[q] = reg;
947 qty_last_reg[q] = reg;
948 qty_const[q] = qty_const_insn[q] = 0;
949 qty_comparison_code[q] = UNKNOWN;
951 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
954 /* Make reg NEW equivalent to reg OLD.
955 OLD is not changing; NEW is. */
958 make_regs_eqv (new, old)
959 register int new, old;
961 register int lastr, firstr;
962 register int q = REG_QTY (old);
964 /* Nothing should become eqv until it has a "non-invalid" qty number. */
965 if (! REGNO_QTY_VALID_P (old))
969 firstr = qty_first_reg[q];
970 lastr = qty_last_reg[q];
972 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
973 hard regs. Among pseudos, if NEW will live longer than any other reg
974 of the same qty, and that is beyond the current basic block,
975 make it the new canonical replacement for this qty. */
976 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
977 /* Certain fixed registers might be of the class NO_REGS. This means
978 that not only can they not be allocated by the compiler, but
979 they cannot be used in substitutions or canonicalizations
981 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
982 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
983 || (new >= FIRST_PSEUDO_REGISTER
984 && (firstr < FIRST_PSEUDO_REGISTER
985 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
986 || (uid_cuid[REGNO_FIRST_UID (new)]
987 < cse_basic_block_start))
988 && (uid_cuid[REGNO_LAST_UID (new)]
989 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
991 reg_prev_eqv[firstr] = new;
992 reg_next_eqv[new] = firstr;
993 reg_prev_eqv[new] = -1;
994 qty_first_reg[q] = new;
998 /* If NEW is a hard reg (known to be non-fixed), insert at end.
999 Otherwise, insert before any non-fixed hard regs that are at the
1000 end. Registers of class NO_REGS cannot be used as an
1001 equivalent for anything. */
1002 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1003 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1004 && new >= FIRST_PSEUDO_REGISTER)
1005 lastr = reg_prev_eqv[lastr];
1006 reg_next_eqv[new] = reg_next_eqv[lastr];
1007 if (reg_next_eqv[lastr] >= 0)
1008 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1010 qty_last_reg[q] = new;
1011 reg_next_eqv[lastr] = new;
1012 reg_prev_eqv[new] = lastr;
1016 /* Remove REG from its equivalence class. */
1019 delete_reg_equiv (reg)
1022 register int q = REG_QTY (reg);
1025 /* If invalid, do nothing. */
1029 p = reg_prev_eqv[reg];
1030 n = reg_next_eqv[reg];
1033 reg_prev_eqv[n] = p;
1035 qty_last_reg[q] = p;
1037 reg_next_eqv[p] = n;
1039 qty_first_reg[q] = n;
1041 REG_QTY (reg) = reg;
1044 /* Remove any invalid expressions from the hash table
1045 that refer to any of the registers contained in expression X.
1047 Make sure that newly inserted references to those registers
1048 as subexpressions will be considered valid.
1050 mention_regs is not called when a register itself
1051 is being stored in the table.
1053 Return 1 if we have done something that may have changed the hash code
1060 register enum rtx_code code;
1063 register int changed = 0;
1068 code = GET_CODE (x);
1071 register int regno = REGNO (x);
1072 register int endregno
1073 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1074 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1077 for (i = regno; i < endregno; i++)
1079 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1080 remove_invalid_refs (i);
1082 REG_IN_TABLE (i) = REG_TICK (i);
1088 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1089 pseudo if they don't use overlapping words. We handle only pseudos
1090 here for simplicity. */
1091 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1092 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1094 int i = REGNO (SUBREG_REG (x));
1096 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1098 /* If reg_tick has been incremented more than once since
1099 reg_in_table was last set, that means that the entire
1100 register has been set before, so discard anything memorized
1101 for the entrire register, including all SUBREG expressions. */
1102 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1103 remove_invalid_refs (i);
1105 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1108 REG_IN_TABLE (i) = REG_TICK (i);
1112 /* If X is a comparison or a COMPARE and either operand is a register
1113 that does not have a quantity, give it one. This is so that a later
1114 call to record_jump_equiv won't cause X to be assigned a different
1115 hash code and not found in the table after that call.
1117 It is not necessary to do this here, since rehash_using_reg can
1118 fix up the table later, but doing this here eliminates the need to
1119 call that expensive function in the most common case where the only
1120 use of the register is in the comparison. */
1122 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1124 if (GET_CODE (XEXP (x, 0)) == REG
1125 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1126 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1128 rehash_using_reg (XEXP (x, 0));
1132 if (GET_CODE (XEXP (x, 1)) == REG
1133 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1134 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1136 rehash_using_reg (XEXP (x, 1));
1141 fmt = GET_RTX_FORMAT (code);
1142 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1144 changed |= mention_regs (XEXP (x, i));
1145 else if (fmt[i] == 'E')
1146 for (j = 0; j < XVECLEN (x, i); j++)
1147 changed |= mention_regs (XVECEXP (x, i, j));
1152 /* Update the register quantities for inserting X into the hash table
1153 with a value equivalent to CLASSP.
1154 (If the class does not contain a REG, it is irrelevant.)
1155 If MODIFIED is nonzero, X is a destination; it is being modified.
1156 Note that delete_reg_equiv should be called on a register
1157 before insert_regs is done on that register with MODIFIED != 0.
1159 Nonzero value means that elements of reg_qty have changed
1160 so X's hash code may be different. */
1163 insert_regs (x, classp, modified)
1165 struct table_elt *classp;
1168 if (GET_CODE (x) == REG)
1170 register int regno = REGNO (x);
1172 /* If REGNO is in the equivalence table already but is of the
1173 wrong mode for that equivalence, don't do anything here. */
1175 if (REGNO_QTY_VALID_P (regno)
1176 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1179 if (modified || ! REGNO_QTY_VALID_P (regno))
1182 for (classp = classp->first_same_value;
1184 classp = classp->next_same_value)
1185 if (GET_CODE (classp->exp) == REG
1186 && GET_MODE (classp->exp) == GET_MODE (x))
1188 make_regs_eqv (regno, REGNO (classp->exp));
1192 make_new_qty (regno);
1193 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1200 /* If X is a SUBREG, we will likely be inserting the inner register in the
1201 table. If that register doesn't have an assigned quantity number at
1202 this point but does later, the insertion that we will be doing now will
1203 not be accessible because its hash code will have changed. So assign
1204 a quantity number now. */
1206 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1207 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1209 int regno = REGNO (SUBREG_REG (x));
1211 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1212 /* Mention_regs checks if REG_TICK is exactly one larger than
1213 REG_IN_TABLE to find out if there was only a single preceding
1214 invalidation - for the SUBREG - or another one, which would be
1215 for the full register. Since we don't invalidate the SUBREG
1216 here first, we might have to bump up REG_TICK so that mention_regs
1217 will do the right thing. */
1218 if (REG_IN_TABLE (regno) >= 0
1219 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1225 return mention_regs (x);
1228 /* Look in or update the hash table. */
1230 /* Put the element ELT on the list of free elements. */
1234 struct table_elt *elt;
1236 elt->next_same_hash = free_element_chain;
1237 free_element_chain = elt;
1240 /* Return an element that is free for use. */
1242 static struct table_elt *
1245 struct table_elt *elt = free_element_chain;
1248 free_element_chain = elt->next_same_hash;
1252 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1255 /* Remove table element ELT from use in the table.
1256 HASH is its hash code, made using the HASH macro.
1257 It's an argument because often that is known in advance
1258 and we save much time not recomputing it. */
1261 remove_from_table (elt, hash)
1262 register struct table_elt *elt;
1268 /* Mark this element as removed. See cse_insn. */
1269 elt->first_same_value = 0;
1271 /* Remove the table element from its equivalence class. */
1274 register struct table_elt *prev = elt->prev_same_value;
1275 register struct table_elt *next = elt->next_same_value;
1277 if (next) next->prev_same_value = prev;
1280 prev->next_same_value = next;
1283 register struct table_elt *newfirst = next;
1286 next->first_same_value = newfirst;
1287 next = next->next_same_value;
1292 /* Remove the table element from its hash bucket. */
1295 register struct table_elt *prev = elt->prev_same_hash;
1296 register struct table_elt *next = elt->next_same_hash;
1298 if (next) next->prev_same_hash = prev;
1301 prev->next_same_hash = next;
1302 else if (table[hash] == elt)
1306 /* This entry is not in the proper hash bucket. This can happen
1307 when two classes were merged by `merge_equiv_classes'. Search
1308 for the hash bucket that it heads. This happens only very
1309 rarely, so the cost is acceptable. */
1310 for (hash = 0; hash < NBUCKETS; hash++)
1311 if (table[hash] == elt)
1316 /* Remove the table element from its related-value circular chain. */
1318 if (elt->related_value != 0 && elt->related_value != elt)
1320 register struct table_elt *p = elt->related_value;
1321 while (p->related_value != elt)
1322 p = p->related_value;
1323 p->related_value = elt->related_value;
1324 if (p->related_value == p)
1325 p->related_value = 0;
1331 /* Look up X in the hash table and return its table element,
1332 or 0 if X is not in the table.
1334 MODE is the machine-mode of X, or if X is an integer constant
1335 with VOIDmode then MODE is the mode with which X will be used.
1337 Here we are satisfied to find an expression whose tree structure
1340 static struct table_elt *
1341 lookup (x, hash, mode)
1344 enum machine_mode mode;
1346 register struct table_elt *p;
1348 for (p = table[hash]; p; p = p->next_same_hash)
1349 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1350 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1356 /* Like `lookup' but don't care whether the table element uses invalid regs.
1357 Also ignore discrepancies in the machine mode of a register. */
1359 static struct table_elt *
1360 lookup_for_remove (x, hash, mode)
1363 enum machine_mode mode;
1365 register struct table_elt *p;
1367 if (GET_CODE (x) == REG)
1369 int regno = REGNO (x);
1370 /* Don't check the machine mode when comparing registers;
1371 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1372 for (p = table[hash]; p; p = p->next_same_hash)
1373 if (GET_CODE (p->exp) == REG
1374 && REGNO (p->exp) == regno)
1379 for (p = table[hash]; p; p = p->next_same_hash)
1380 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1387 /* Look for an expression equivalent to X and with code CODE.
1388 If one is found, return that expression. */
1391 lookup_as_function (x, code)
1395 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1397 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1398 long as we are narrowing. So if we looked in vain for a mode narrower
1399 than word_mode before, look for word_mode now. */
1400 if (p == 0 && code == CONST_INT
1401 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1404 PUT_MODE (x, word_mode);
1405 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1411 for (p = p->first_same_value; p; p = p->next_same_value)
1413 if (GET_CODE (p->exp) == code
1414 /* Make sure this is a valid entry in the table. */
1415 && exp_equiv_p (p->exp, p->exp, 1, 0))
1422 /* Insert X in the hash table, assuming HASH is its hash code
1423 and CLASSP is an element of the class it should go in
1424 (or 0 if a new class should be made).
1425 It is inserted at the proper position to keep the class in
1426 the order cheapest first.
1428 MODE is the machine-mode of X, or if X is an integer constant
1429 with VOIDmode then MODE is the mode with which X will be used.
1431 For elements of equal cheapness, the most recent one
1432 goes in front, except that the first element in the list
1433 remains first unless a cheaper element is added. The order of
1434 pseudo-registers does not matter, as canon_reg will be called to
1435 find the cheapest when a register is retrieved from the table.
1437 The in_memory field in the hash table element is set to 0.
1438 The caller must set it nonzero if appropriate.
1440 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1441 and if insert_regs returns a nonzero value
1442 you must then recompute its hash code before calling here.
1444 If necessary, update table showing constant values of quantities. */
1446 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1448 static struct table_elt *
1449 insert (x, classp, hash, mode)
1451 register struct table_elt *classp;
1453 enum machine_mode mode;
1455 register struct table_elt *elt;
1457 /* If X is a register and we haven't made a quantity for it,
1458 something is wrong. */
1459 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1462 /* If X is a hard register, show it is being put in the table. */
1463 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1465 int regno = REGNO (x);
1466 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1469 for (i = regno; i < endregno; i++)
1470 SET_HARD_REG_BIT (hard_regs_in_table, i);
1473 /* If X is a label, show we recorded it. */
1474 if (GET_CODE (x) == LABEL_REF
1475 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1476 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1477 recorded_label_ref = 1;
1479 /* Put an element for X into the right hash bucket. */
1481 elt = get_element ();
1483 elt->cost = COST (x);
1484 elt->next_same_value = 0;
1485 elt->prev_same_value = 0;
1486 elt->next_same_hash = table[hash];
1487 elt->prev_same_hash = 0;
1488 elt->related_value = 0;
1491 elt->is_const = (CONSTANT_P (x)
1492 /* GNU C++ takes advantage of this for `this'
1493 (and other const values). */
1494 || (RTX_UNCHANGING_P (x)
1495 && GET_CODE (x) == REG
1496 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1497 || FIXED_BASE_PLUS_P (x));
1500 table[hash]->prev_same_hash = elt;
1503 /* Put it into the proper value-class. */
1506 classp = classp->first_same_value;
1507 if (CHEAPER (elt, classp))
1508 /* Insert at the head of the class */
1510 register struct table_elt *p;
1511 elt->next_same_value = classp;
1512 classp->prev_same_value = elt;
1513 elt->first_same_value = elt;
1515 for (p = classp; p; p = p->next_same_value)
1516 p->first_same_value = elt;
1520 /* Insert not at head of the class. */
1521 /* Put it after the last element cheaper than X. */
1522 register struct table_elt *p, *next;
1523 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1525 /* Put it after P and before NEXT. */
1526 elt->next_same_value = next;
1528 next->prev_same_value = elt;
1529 elt->prev_same_value = p;
1530 p->next_same_value = elt;
1531 elt->first_same_value = classp;
1535 elt->first_same_value = elt;
1537 /* If this is a constant being set equivalent to a register or a register
1538 being set equivalent to a constant, note the constant equivalence.
1540 If this is a constant, it cannot be equivalent to a different constant,
1541 and a constant is the only thing that can be cheaper than a register. So
1542 we know the register is the head of the class (before the constant was
1545 If this is a register that is not already known equivalent to a
1546 constant, we must check the entire class.
1548 If this is a register that is already known equivalent to an insn,
1549 update `qty_const_insn' to show that `this_insn' is the latest
1550 insn making that quantity equivalent to the constant. */
1552 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1553 && GET_CODE (x) != REG)
1555 qty_const[REG_QTY (REGNO (classp->exp))]
1556 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1557 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1560 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1563 register struct table_elt *p;
1565 for (p = classp; p != 0; p = p->next_same_value)
1567 if (p->is_const && GET_CODE (p->exp) != REG)
1569 qty_const[REG_QTY (REGNO (x))]
1570 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1571 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1577 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1578 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1579 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1581 /* If this is a constant with symbolic value,
1582 and it has a term with an explicit integer value,
1583 link it up with related expressions. */
1584 if (GET_CODE (x) == CONST)
1586 rtx subexp = get_related_value (x);
1588 struct table_elt *subelt, *subelt_prev;
1592 /* Get the integer-free subexpression in the hash table. */
1593 subhash = safe_hash (subexp, mode) % NBUCKETS;
1594 subelt = lookup (subexp, subhash, mode);
1596 subelt = insert (subexp, NULL_PTR, subhash, mode);
1597 /* Initialize SUBELT's circular chain if it has none. */
1598 if (subelt->related_value == 0)
1599 subelt->related_value = subelt;
1600 /* Find the element in the circular chain that precedes SUBELT. */
1601 subelt_prev = subelt;
1602 while (subelt_prev->related_value != subelt)
1603 subelt_prev = subelt_prev->related_value;
1604 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1605 This way the element that follows SUBELT is the oldest one. */
1606 elt->related_value = subelt_prev->related_value;
1607 subelt_prev->related_value = elt;
1614 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1615 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1616 the two classes equivalent.
1618 CLASS1 will be the surviving class; CLASS2 should not be used after this
1621 Any invalid entries in CLASS2 will not be copied. */
1624 merge_equiv_classes (class1, class2)
1625 struct table_elt *class1, *class2;
1627 struct table_elt *elt, *next, *new;
1629 /* Ensure we start with the head of the classes. */
1630 class1 = class1->first_same_value;
1631 class2 = class2->first_same_value;
1633 /* If they were already equal, forget it. */
1634 if (class1 == class2)
1637 for (elt = class2; elt; elt = next)
1641 enum machine_mode mode = elt->mode;
1643 next = elt->next_same_value;
1645 /* Remove old entry, make a new one in CLASS1's class.
1646 Don't do this for invalid entries as we cannot find their
1647 hash code (it also isn't necessary). */
1648 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1650 hash_arg_in_memory = 0;
1651 hash_arg_in_struct = 0;
1652 hash = HASH (exp, mode);
1654 if (GET_CODE (exp) == REG)
1655 delete_reg_equiv (REGNO (exp));
1657 remove_from_table (elt, hash);
1659 if (insert_regs (exp, class1, 0))
1661 rehash_using_reg (exp);
1662 hash = HASH (exp, mode);
1664 new = insert (exp, class1, hash, mode);
1665 new->in_memory = hash_arg_in_memory;
1666 new->in_struct = hash_arg_in_struct;
1672 /* Flush the entire hash table. */
1678 struct table_elt *p;
1680 for (i = 0; i < NBUCKETS; i++)
1681 for (p = table[i]; p; p = table[i])
1683 /* Note that invalidate can remove elements
1684 after P in the current hash chain. */
1685 if (GET_CODE (p->exp) == REG)
1686 invalidate (p->exp, p->mode);
1688 remove_from_table (p, i);
1693 /* Remove from the hash table, or mark as invalid,
1694 all expressions whose values could be altered by storing in X.
1695 X is a register, a subreg, or a memory reference with nonvarying address
1696 (because, when a memory reference with a varying address is stored in,
1697 all memory references are removed by invalidate_memory
1698 so specific invalidation is superfluous).
1699 FULL_MODE, if not VOIDmode, indicates that this much should be invalidated
1700 instead of just the amount indicated by the mode of X. This is only used
1701 for bitfield stores into memory.
1703 A nonvarying address may be just a register or just
1704 a symbol reference, or it may be either of those plus
1705 a numeric offset. */
1708 invalidate (x, full_mode)
1710 enum machine_mode full_mode;
1713 register struct table_elt *p;
1715 /* If X is a register, dependencies on its contents
1716 are recorded through the qty number mechanism.
1717 Just change the qty number of the register,
1718 mark it as invalid for expressions that refer to it,
1719 and remove it itself. */
1721 if (GET_CODE (x) == REG)
1723 register int regno = REGNO (x);
1724 register unsigned hash = HASH (x, GET_MODE (x));
1726 /* Remove REGNO from any quantity list it might be on and indicate
1727 that its value might have changed. If it is a pseudo, remove its
1728 entry from the hash table.
1730 For a hard register, we do the first two actions above for any
1731 additional hard registers corresponding to X. Then, if any of these
1732 registers are in the table, we must remove any REG entries that
1733 overlap these registers. */
1735 delete_reg_equiv (regno);
1738 if (regno >= FIRST_PSEUDO_REGISTER)
1740 /* Because a register can be referenced in more than one mode,
1741 we might have to remove more than one table entry. */
1743 struct table_elt *elt;
1745 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1746 remove_from_table (elt, hash);
1750 HOST_WIDE_INT in_table
1751 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1752 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1753 int tregno, tendregno;
1754 register struct table_elt *p, *next;
1756 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1758 for (i = regno + 1; i < endregno; i++)
1760 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1761 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1762 delete_reg_equiv (i);
1767 for (hash = 0; hash < NBUCKETS; hash++)
1768 for (p = table[hash]; p; p = next)
1770 next = p->next_same_hash;
1772 if (GET_CODE (p->exp) != REG
1773 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1776 tregno = REGNO (p->exp);
1778 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1779 if (tendregno > regno && tregno < endregno)
1780 remove_from_table (p, hash);
1787 if (GET_CODE (x) == SUBREG)
1789 if (GET_CODE (SUBREG_REG (x)) != REG)
1791 invalidate (SUBREG_REG (x), VOIDmode);
1795 /* If X is a parallel, invalidate all of its elements. */
1797 if (GET_CODE (x) == PARALLEL)
1799 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1800 invalidate (XVECEXP (x, 0, i), VOIDmode);
1804 /* If X is an expr_list, this is part of a disjoint return value;
1805 extract the location in question ignoring the offset. */
1807 if (GET_CODE (x) == EXPR_LIST)
1809 invalidate (XEXP (x, 0), VOIDmode);
1813 /* X is not a register; it must be a memory reference with
1814 a nonvarying address. Remove all hash table elements
1815 that refer to overlapping pieces of memory. */
1817 if (GET_CODE (x) != MEM)
1820 if (full_mode == VOIDmode)
1821 full_mode = GET_MODE (x);
1823 for (i = 0; i < NBUCKETS; i++)
1825 register struct table_elt *next;
1826 for (p = table[i]; p; p = next)
1828 next = p->next_same_hash;
1829 /* Invalidate ASM_OPERANDS which reference memory (this is easier
1830 than checking all the aliases). */
1832 && (GET_CODE (p->exp) != MEM
1833 || true_dependence (x, full_mode, p->exp, cse_rtx_varies_p)))
1834 remove_from_table (p, i);
1839 /* Remove all expressions that refer to register REGNO,
1840 since they are already invalid, and we are about to
1841 mark that register valid again and don't want the old
1842 expressions to reappear as valid. */
1845 remove_invalid_refs (regno)
1849 register struct table_elt *p, *next;
1851 for (i = 0; i < NBUCKETS; i++)
1852 for (p = table[i]; p; p = next)
1854 next = p->next_same_hash;
1855 if (GET_CODE (p->exp) != REG
1856 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1857 remove_from_table (p, i);
1861 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1863 remove_invalid_subreg_refs (regno, word, mode)
1866 enum machine_mode mode;
1869 register struct table_elt *p, *next;
1870 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1872 for (i = 0; i < NBUCKETS; i++)
1873 for (p = table[i]; p; p = next)
1876 next = p->next_same_hash;
1879 if (GET_CODE (p->exp) != REG
1880 && (GET_CODE (exp) != SUBREG
1881 || GET_CODE (SUBREG_REG (exp)) != REG
1882 || REGNO (SUBREG_REG (exp)) != regno
1883 || (((SUBREG_WORD (exp)
1884 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1886 && SUBREG_WORD (exp) <= end))
1887 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1888 remove_from_table (p, i);
1892 /* Recompute the hash codes of any valid entries in the hash table that
1893 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1895 This is called when we make a jump equivalence. */
1898 rehash_using_reg (x)
1902 struct table_elt *p, *next;
1905 if (GET_CODE (x) == SUBREG)
1908 /* If X is not a register or if the register is known not to be in any
1909 valid entries in the table, we have no work to do. */
1911 if (GET_CODE (x) != REG
1912 || REG_IN_TABLE (REGNO (x)) < 0
1913 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1916 /* Scan all hash chains looking for valid entries that mention X.
1917 If we find one and it is in the wrong hash chain, move it. We can skip
1918 objects that are registers, since they are handled specially. */
1920 for (i = 0; i < NBUCKETS; i++)
1921 for (p = table[i]; p; p = next)
1923 next = p->next_same_hash;
1924 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1925 && exp_equiv_p (p->exp, p->exp, 1, 0)
1926 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1928 if (p->next_same_hash)
1929 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1931 if (p->prev_same_hash)
1932 p->prev_same_hash->next_same_hash = p->next_same_hash;
1934 table[i] = p->next_same_hash;
1936 p->next_same_hash = table[hash];
1937 p->prev_same_hash = 0;
1939 table[hash]->prev_same_hash = p;
1945 /* Remove from the hash table any expression that is a call-clobbered
1946 register. Also update their TICK values. */
1949 invalidate_for_call ()
1951 int regno, endregno;
1954 struct table_elt *p, *next;
1957 /* Go through all the hard registers. For each that is clobbered in
1958 a CALL_INSN, remove the register from quantity chains and update
1959 reg_tick if defined. Also see if any of these registers is currently
1962 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1963 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1965 delete_reg_equiv (regno);
1966 if (REG_TICK (regno) >= 0)
1969 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1972 /* In the case where we have no call-clobbered hard registers in the
1973 table, we are done. Otherwise, scan the table and remove any
1974 entry that overlaps a call-clobbered register. */
1977 for (hash = 0; hash < NBUCKETS; hash++)
1978 for (p = table[hash]; p; p = next)
1980 next = p->next_same_hash;
1984 remove_from_table (p, hash);
1988 if (GET_CODE (p->exp) != REG
1989 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1992 regno = REGNO (p->exp);
1993 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1995 for (i = regno; i < endregno; i++)
1996 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1998 remove_from_table (p, hash);
2004 /* Given an expression X of type CONST,
2005 and ELT which is its table entry (or 0 if it
2006 is not in the hash table),
2007 return an alternate expression for X as a register plus integer.
2008 If none can be found, return 0. */
2011 use_related_value (x, elt)
2013 struct table_elt *elt;
2015 register struct table_elt *relt = 0;
2016 register struct table_elt *p, *q;
2017 HOST_WIDE_INT offset;
2019 /* First, is there anything related known?
2020 If we have a table element, we can tell from that.
2021 Otherwise, must look it up. */
2023 if (elt != 0 && elt->related_value != 0)
2025 else if (elt == 0 && GET_CODE (x) == CONST)
2027 rtx subexp = get_related_value (x);
2029 relt = lookup (subexp,
2030 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2037 /* Search all related table entries for one that has an
2038 equivalent register. */
2043 /* This loop is strange in that it is executed in two different cases.
2044 The first is when X is already in the table. Then it is searching
2045 the RELATED_VALUE list of X's class (RELT). The second case is when
2046 X is not in the table. Then RELT points to a class for the related
2049 Ensure that, whatever case we are in, that we ignore classes that have
2050 the same value as X. */
2052 if (rtx_equal_p (x, p->exp))
2055 for (q = p->first_same_value; q; q = q->next_same_value)
2056 if (GET_CODE (q->exp) == REG)
2062 p = p->related_value;
2064 /* We went all the way around, so there is nothing to be found.
2065 Alternatively, perhaps RELT was in the table for some other reason
2066 and it has no related values recorded. */
2067 if (p == relt || p == 0)
2074 offset = (get_integer_term (x) - get_integer_term (p->exp));
2075 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2076 return plus_constant (q->exp, offset);
2079 /* Hash an rtx. We are careful to make sure the value is never negative.
2080 Equivalent registers hash identically.
2081 MODE is used in hashing for CONST_INTs only;
2082 otherwise the mode of X is used.
2084 Store 1 in do_not_record if any subexpression is volatile.
2086 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2087 which does not have the RTX_UNCHANGING_P bit set.
2088 In this case, also store 1 in hash_arg_in_struct
2089 if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
2091 Note that cse_insn knows that the hash code of a MEM expression
2092 is just (int) MEM plus the hash code of the address. */
2095 canon_hash (x, mode)
2097 enum machine_mode mode;
2100 register unsigned hash = 0;
2101 register enum rtx_code code;
2104 /* repeat is used to turn tail-recursion into iteration. */
2109 code = GET_CODE (x);
2114 register int regno = REGNO (x);
2116 /* On some machines, we can't record any non-fixed hard register,
2117 because extending its life will cause reload problems. We
2118 consider ap, fp, and sp to be fixed for this purpose.
2120 We also consider CCmode registers to be fixed for this purpose;
2121 failure to do so leads to failure to simplify 0<100 type of
2124 On all machines, we can't record any global registers. */
2126 if (regno < FIRST_PSEUDO_REGISTER
2127 && (global_regs[regno]
2128 || (SMALL_REGISTER_CLASSES
2129 && ! fixed_regs[regno]
2130 && regno != FRAME_POINTER_REGNUM
2131 && regno != HARD_FRAME_POINTER_REGNUM
2132 && regno != ARG_POINTER_REGNUM
2133 && regno != STACK_POINTER_REGNUM
2134 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2139 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2143 /* We handle SUBREG of a REG specially because the underlying
2144 reg changes its hash value with every value change; we don't
2145 want to have to forget unrelated subregs when one subreg changes. */
2148 if (GET_CODE (SUBREG_REG (x)) == REG)
2150 hash += (((unsigned) SUBREG << 7)
2151 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2159 unsigned HOST_WIDE_INT tem = INTVAL (x);
2160 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2165 /* This is like the general case, except that it only counts
2166 the integers representing the constant. */
2167 hash += (unsigned) code + (unsigned) GET_MODE (x);
2168 if (GET_MODE (x) != VOIDmode)
2169 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2171 unsigned tem = XINT (x, i);
2175 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2176 + (unsigned) CONST_DOUBLE_HIGH (x));
2179 /* Assume there is only one rtx object for any given label. */
2182 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2187 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2191 if (MEM_VOLATILE_P (x))
2196 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2198 hash_arg_in_memory = 1;
2199 if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
2201 /* Now that we have already found this special case,
2202 might as well speed it up as much as possible. */
2203 hash += (unsigned) MEM;
2214 case UNSPEC_VOLATILE:
2219 if (MEM_VOLATILE_P (x))
2230 i = GET_RTX_LENGTH (code) - 1;
2231 hash += (unsigned) code + (unsigned) GET_MODE (x);
2232 fmt = GET_RTX_FORMAT (code);
2237 rtx tem = XEXP (x, i);
2239 /* If we are about to do the last recursive call
2240 needed at this level, change it into iteration.
2241 This function is called enough to be worth it. */
2247 hash += canon_hash (tem, 0);
2249 else if (fmt[i] == 'E')
2250 for (j = 0; j < XVECLEN (x, i); j++)
2251 hash += canon_hash (XVECEXP (x, i, j), 0);
2252 else if (fmt[i] == 's')
2254 register unsigned char *p = (unsigned char *) XSTR (x, i);
2259 else if (fmt[i] == 'i')
2261 register unsigned tem = XINT (x, i);
2264 else if (fmt[i] == '0')
2272 /* Like canon_hash but with no side effects. */
2277 enum machine_mode mode;
2279 int save_do_not_record = do_not_record;
2280 int save_hash_arg_in_memory = hash_arg_in_memory;
2281 int save_hash_arg_in_struct = hash_arg_in_struct;
2282 unsigned hash = canon_hash (x, mode);
2283 hash_arg_in_memory = save_hash_arg_in_memory;
2284 hash_arg_in_struct = save_hash_arg_in_struct;
2285 do_not_record = save_do_not_record;
2289 /* Return 1 iff X and Y would canonicalize into the same thing,
2290 without actually constructing the canonicalization of either one.
2291 If VALIDATE is nonzero,
2292 we assume X is an expression being processed from the rtl
2293 and Y was found in the hash table. We check register refs
2294 in Y for being marked as valid.
2296 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2297 that is known to be in the register. Ordinarily, we don't allow them
2298 to match, because letting them match would cause unpredictable results
2299 in all the places that search a hash table chain for an equivalent
2300 for a given value. A possible equivalent that has different structure
2301 has its hash code computed from different data. Whether the hash code
2302 is the same as that of the given value is pure luck. */
2305 exp_equiv_p (x, y, validate, equal_values)
2311 register enum rtx_code code;
2314 /* Note: it is incorrect to assume an expression is equivalent to itself
2315 if VALIDATE is nonzero. */
2316 if (x == y && !validate)
2318 if (x == 0 || y == 0)
2321 code = GET_CODE (x);
2322 if (code != GET_CODE (y))
2327 /* If X is a constant and Y is a register or vice versa, they may be
2328 equivalent. We only have to validate if Y is a register. */
2329 if (CONSTANT_P (x) && GET_CODE (y) == REG
2330 && REGNO_QTY_VALID_P (REGNO (y))
2331 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2332 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2333 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2336 if (CONSTANT_P (y) && code == REG
2337 && REGNO_QTY_VALID_P (REGNO (x))
2338 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2339 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2345 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2346 if (GET_MODE (x) != GET_MODE (y))
2356 return INTVAL (x) == INTVAL (y);
2359 return XEXP (x, 0) == XEXP (y, 0);
2362 return XSTR (x, 0) == XSTR (y, 0);
2366 int regno = REGNO (y);
2368 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2369 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2372 /* If the quantities are not the same, the expressions are not
2373 equivalent. If there are and we are not to validate, they
2374 are equivalent. Otherwise, ensure all regs are up-to-date. */
2376 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2382 for (i = regno; i < endregno; i++)
2383 if (REG_IN_TABLE (i) != REG_TICK (i))
2389 /* For commutative operations, check both orders. */
2397 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2398 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2399 validate, equal_values))
2400 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2401 validate, equal_values)
2402 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2403 validate, equal_values)));
2409 /* Compare the elements. If any pair of corresponding elements
2410 fail to match, return 0 for the whole things. */
2412 fmt = GET_RTX_FORMAT (code);
2413 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2418 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2423 if (XVECLEN (x, i) != XVECLEN (y, i))
2425 for (j = 0; j < XVECLEN (x, i); j++)
2426 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2427 validate, equal_values))
2432 if (strcmp (XSTR (x, i), XSTR (y, i)))
2437 if (XINT (x, i) != XINT (y, i))
2442 if (XWINT (x, i) != XWINT (y, i))
2457 /* Return 1 iff any subexpression of X matches Y.
2458 Here we do not require that X or Y be valid (for registers referred to)
2459 for being in the hash table. */
2466 register enum rtx_code code;
2472 if (x == 0 || y == 0)
2475 code = GET_CODE (x);
2476 /* If X as a whole has the same code as Y, they may match.
2478 if (code == GET_CODE (y))
2480 if (exp_equiv_p (x, y, 0, 1))
2484 /* X does not match, so try its subexpressions. */
2486 fmt = GET_RTX_FORMAT (code);
2487 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2496 if (refers_to_p (XEXP (x, i), y))
2499 else if (fmt[i] == 'E')
2502 for (j = 0; j < XVECLEN (x, i); j++)
2503 if (refers_to_p (XVECEXP (x, i, j), y))
2510 /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2511 set PBASE, PSTART, and PEND which correspond to the base of the address,
2512 the starting offset, and ending offset respectively.
2514 ADDR is known to be a nonvarying address. */
2516 /* ??? Despite what the comments say, this function is in fact frequently
2517 passed varying addresses. This does not appear to cause any problems. */
2520 set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2524 HOST_WIDE_INT *pstart, *pend;
2527 HOST_WIDE_INT start, end;
2533 if (flag_pic && GET_CODE (base) == PLUS
2534 && XEXP (base, 0) == pic_offset_table_rtx)
2535 base = XEXP (base, 1);
2537 /* Registers with nonvarying addresses usually have constant equivalents;
2538 but the frame pointer register is also possible. */
2539 if (GET_CODE (base) == REG
2541 && REGNO_QTY_VALID_P (REGNO (base))
2542 && qty_mode[REG_QTY (REGNO (base))] == GET_MODE (base)
2543 && qty_const[REG_QTY (REGNO (base))] != 0)
2544 base = qty_const[REG_QTY (REGNO (base))];
2545 else if (GET_CODE (base) == PLUS
2546 && GET_CODE (XEXP (base, 1)) == CONST_INT
2547 && GET_CODE (XEXP (base, 0)) == REG
2549 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2550 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2551 == GET_MODE (XEXP (base, 0)))
2552 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))])
2554 start = INTVAL (XEXP (base, 1));
2555 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2557 /* This can happen as the result of virtual register instantiation,
2558 if the initial offset is too large to be a valid address. */
2559 else if (GET_CODE (base) == PLUS
2560 && GET_CODE (XEXP (base, 0)) == REG
2561 && GET_CODE (XEXP (base, 1)) == REG
2563 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2564 && (qty_mode[REG_QTY (REGNO (XEXP (base, 0)))]
2565 == GET_MODE (XEXP (base, 0)))
2566 && qty_const[REG_QTY (REGNO (XEXP (base, 0)))]
2567 && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1)))
2568 && (qty_mode[REG_QTY (REGNO (XEXP (base, 1)))]
2569 == GET_MODE (XEXP (base, 1)))
2570 && qty_const[REG_QTY (REGNO (XEXP (base, 1)))])
2572 rtx tem = qty_const[REG_QTY (REGNO (XEXP (base, 1)))];
2573 base = qty_const[REG_QTY (REGNO (XEXP (base, 0)))];
2575 /* One of the two values must be a constant. */
2576 if (GET_CODE (base) != CONST_INT)
2578 if (GET_CODE (tem) != CONST_INT)
2580 start = INTVAL (tem);
2584 start = INTVAL (base);
2589 /* Handle everything that we can find inside an address that has been
2590 viewed as constant. */
2594 /* If no part of this switch does a "continue", the code outside
2595 will exit this loop. */
2597 switch (GET_CODE (base))
2600 /* By definition, operand1 of a LO_SUM is the associated constant
2601 address. Use the associated constant address as the base
2603 base = XEXP (base, 1);
2607 /* Strip off CONST. */
2608 base = XEXP (base, 0);
2612 if (GET_CODE (XEXP (base, 1)) == CONST_INT)
2614 start += INTVAL (XEXP (base, 1));
2615 base = XEXP (base, 0);
2621 /* Handle the case of an AND which is the negative of a power of
2622 two. This is used to represent unaligned memory operations. */
2623 if (GET_CODE (XEXP (base, 1)) == CONST_INT
2624 && exact_log2 (- INTVAL (XEXP (base, 1))) > 0)
2626 set_nonvarying_address_components (XEXP (base, 0), size,
2627 pbase, pstart, pend);
2629 /* Assume the worst misalignment. START is affected, but not
2630 END, so compensate but adjusting SIZE. Don't lose any
2631 constant we already had. */
2633 size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1;
2634 start += *pstart + INTVAL (XEXP (base, 1)) + 1;
2647 if (GET_CODE (base) == CONST_INT)
2649 start += INTVAL (base);
2655 /* Set the return values. */
2661 /* Return 1 if X has a value that can vary even between two
2662 executions of the program. 0 means X can be compared reliably
2663 against certain constants or near-constants. */
2666 cse_rtx_varies_p (x)
2669 /* We need not check for X and the equivalence class being of the same
2670 mode because if X is equivalent to a constant in some mode, it
2671 doesn't vary in any mode. */
2673 if (GET_CODE (x) == REG
2674 && REGNO_QTY_VALID_P (REGNO (x))
2675 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2676 && qty_const[REG_QTY (REGNO (x))] != 0)
2679 if (GET_CODE (x) == PLUS
2680 && GET_CODE (XEXP (x, 1)) == CONST_INT
2681 && GET_CODE (XEXP (x, 0)) == REG
2682 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2683 && (GET_MODE (XEXP (x, 0))
2684 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2685 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2688 /* This can happen as the result of virtual register instantiation, if
2689 the initial constant is too large to be a valid address. This gives
2690 us a three instruction sequence, load large offset into a register,
2691 load fp minus a constant into a register, then a MEM which is the
2692 sum of the two `constant' registers. */
2693 if (GET_CODE (x) == PLUS
2694 && GET_CODE (XEXP (x, 0)) == REG
2695 && GET_CODE (XEXP (x, 1)) == REG
2696 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2697 && (GET_MODE (XEXP (x, 0))
2698 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2699 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2700 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2701 && (GET_MODE (XEXP (x, 1))
2702 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2703 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2706 return rtx_varies_p (x);
2709 /* Canonicalize an expression:
2710 replace each register reference inside it
2711 with the "oldest" equivalent register.
2713 If INSN is non-zero and we are replacing a pseudo with a hard register
2714 or vice versa, validate_change is used to ensure that INSN remains valid
2715 after we make our substitution. The calls are made with IN_GROUP non-zero
2716 so apply_change_group must be called upon the outermost return from this
2717 function (unless INSN is zero). The result of apply_change_group can
2718 generally be discarded since the changes we are making are optional. */
2726 register enum rtx_code code;
2732 code = GET_CODE (x);
2750 /* Never replace a hard reg, because hard regs can appear
2751 in more than one machine mode, and we must preserve the mode
2752 of each occurrence. Also, some hard regs appear in
2753 MEMs that are shared and mustn't be altered. Don't try to
2754 replace any reg that maps to a reg of class NO_REGS. */
2755 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2756 || ! REGNO_QTY_VALID_P (REGNO (x)))
2759 first = qty_first_reg[REG_QTY (REGNO (x))];
2760 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2761 : REGNO_REG_CLASS (first) == NO_REGS ? x
2762 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2769 fmt = GET_RTX_FORMAT (code);
2770 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2776 rtx new = canon_reg (XEXP (x, i), insn);
2779 /* If replacing pseudo with hard reg or vice versa, ensure the
2780 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2781 if (insn != 0 && new != 0
2782 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2783 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2784 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2785 || (insn_code = recog_memoized (insn)) < 0
2786 || insn_n_dups[insn_code] > 0))
2787 validate_change (insn, &XEXP (x, i), new, 1);
2791 else if (fmt[i] == 'E')
2792 for (j = 0; j < XVECLEN (x, i); j++)
2793 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2799 /* LOC is a location within INSN that is an operand address (the contents of
2800 a MEM). Find the best equivalent address to use that is valid for this
2803 On most CISC machines, complicated address modes are costly, and rtx_cost
2804 is a good approximation for that cost. However, most RISC machines have
2805 only a few (usually only one) memory reference formats. If an address is
2806 valid at all, it is often just as cheap as any other address. Hence, for
2807 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2808 costs of various addresses. For two addresses of equal cost, choose the one
2809 with the highest `rtx_cost' value as that has the potential of eliminating
2810 the most insns. For equal costs, we choose the first in the equivalence
2811 class. Note that we ignore the fact that pseudo registers are cheaper
2812 than hard registers here because we would also prefer the pseudo registers.
2816 find_best_addr (insn, loc)
2820 struct table_elt *elt;
2823 struct table_elt *p;
2824 int found_better = 1;
2826 int save_do_not_record = do_not_record;
2827 int save_hash_arg_in_memory = hash_arg_in_memory;
2828 int save_hash_arg_in_struct = hash_arg_in_struct;
2833 /* Do not try to replace constant addresses or addresses of local and
2834 argument slots. These MEM expressions are made only once and inserted
2835 in many instructions, as well as being used to control symbol table
2836 output. It is not safe to clobber them.
2838 There are some uncommon cases where the address is already in a register
2839 for some reason, but we cannot take advantage of that because we have
2840 no easy way to unshare the MEM. In addition, looking up all stack
2841 addresses is costly. */
2842 if ((GET_CODE (addr) == PLUS
2843 && GET_CODE (XEXP (addr, 0)) == REG
2844 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2845 && (regno = REGNO (XEXP (addr, 0)),
2846 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2847 || regno == ARG_POINTER_REGNUM))
2848 || (GET_CODE (addr) == REG
2849 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2850 || regno == HARD_FRAME_POINTER_REGNUM
2851 || regno == ARG_POINTER_REGNUM))
2852 || GET_CODE (addr) == ADDRESSOF
2853 || CONSTANT_ADDRESS_P (addr))
2856 /* If this address is not simply a register, try to fold it. This will
2857 sometimes simplify the expression. Many simplifications
2858 will not be valid, but some, usually applying the associative rule, will
2859 be valid and produce better code. */
2860 if (GET_CODE (addr) != REG)
2862 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2866 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2867 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2868 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2870 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2872 && validate_change (insn, loc, folded, 0))
2876 /* If this address is not in the hash table, we can't look for equivalences
2877 of the whole address. Also, ignore if volatile. */
2880 hash = HASH (addr, Pmode);
2881 addr_volatile = do_not_record;
2882 do_not_record = save_do_not_record;
2883 hash_arg_in_memory = save_hash_arg_in_memory;
2884 hash_arg_in_struct = save_hash_arg_in_struct;
2889 elt = lookup (addr, hash, Pmode);
2891 #ifndef ADDRESS_COST
2894 int our_cost = elt->cost;
2896 /* Find the lowest cost below ours that works. */
2897 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2898 if (elt->cost < our_cost
2899 && (GET_CODE (elt->exp) == REG
2900 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2901 && validate_change (insn, loc,
2902 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2909 /* We need to find the best (under the criteria documented above) entry
2910 in the class that is valid. We use the `flag' field to indicate
2911 choices that were invalid and iterate until we can't find a better
2912 one that hasn't already been tried. */
2914 for (p = elt->first_same_value; p; p = p->next_same_value)
2917 while (found_better)
2919 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2920 int best_rtx_cost = (elt->cost + 1) >> 1;
2921 struct table_elt *best_elt = elt;
2924 for (p = elt->first_same_value; p; p = p->next_same_value)
2927 if ((GET_CODE (p->exp) == REG
2928 || exp_equiv_p (p->exp, p->exp, 1, 0))
2929 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2930 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2931 && (p->cost + 1) >> 1 > best_rtx_cost)))
2934 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2935 best_rtx_cost = (p->cost + 1) >> 1;
2942 if (validate_change (insn, loc,
2943 canon_reg (copy_rtx (best_elt->exp),
2952 /* If the address is a binary operation with the first operand a register
2953 and the second a constant, do the same as above, but looking for
2954 equivalences of the register. Then try to simplify before checking for
2955 the best address to use. This catches a few cases: First is when we
2956 have REG+const and the register is another REG+const. We can often merge
2957 the constants and eliminate one insn and one register. It may also be
2958 that a machine has a cheap REG+REG+const. Finally, this improves the
2959 code on the Alpha for unaligned byte stores. */
2961 if (flag_expensive_optimizations
2962 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2963 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2964 && GET_CODE (XEXP (*loc, 0)) == REG
2965 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2967 rtx c = XEXP (*loc, 1);
2970 hash = HASH (XEXP (*loc, 0), Pmode);
2971 do_not_record = save_do_not_record;
2972 hash_arg_in_memory = save_hash_arg_in_memory;
2973 hash_arg_in_struct = save_hash_arg_in_struct;
2975 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2979 /* We need to find the best (under the criteria documented above) entry
2980 in the class that is valid. We use the `flag' field to indicate
2981 choices that were invalid and iterate until we can't find a better
2982 one that hasn't already been tried. */
2984 for (p = elt->first_same_value; p; p = p->next_same_value)
2987 while (found_better)
2989 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2990 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2991 struct table_elt *best_elt = elt;
2992 rtx best_rtx = *loc;
2995 /* This is at worst case an O(n^2) algorithm, so limit our search
2996 to the first 32 elements on the list. This avoids trouble
2997 compiling code with very long basic blocks that can easily
2998 call cse_gen_binary so many times that we run out of memory. */
3001 for (p = elt->first_same_value, count = 0;
3003 p = p->next_same_value, count++)
3005 && (GET_CODE (p->exp) == REG
3006 || exp_equiv_p (p->exp, p->exp, 1, 0)))
3008 rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
3010 if ((CSE_ADDRESS_COST (new) < best_addr_cost
3011 || (CSE_ADDRESS_COST (new) == best_addr_cost
3012 && (COST (new) + 1) >> 1 > best_rtx_cost)))
3015 best_addr_cost = CSE_ADDRESS_COST (new);
3016 best_rtx_cost = (COST (new) + 1) >> 1;
3024 if (validate_change (insn, loc,
3025 canon_reg (copy_rtx (best_rtx),
3036 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
3037 operation (EQ, NE, GT, etc.), follow it back through the hash table and
3038 what values are being compared.
3040 *PARG1 and *PARG2 are updated to contain the rtx representing the values
3041 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
3042 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
3043 compared to produce cc0.
3045 The return value is the comparison operator and is either the code of
3046 A or the code corresponding to the inverse of the comparison. */
3048 static enum rtx_code
3049 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
3052 enum machine_mode *pmode1, *pmode2;
3056 arg1 = *parg1, arg2 = *parg2;
3058 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
3060 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
3062 /* Set non-zero when we find something of interest. */
3064 int reverse_code = 0;
3065 struct table_elt *p = 0;
3067 /* If arg1 is a COMPARE, extract the comparison arguments from it.
3068 On machines with CC0, this is the only case that can occur, since
3069 fold_rtx will return the COMPARE or item being compared with zero
3072 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
3075 /* If ARG1 is a comparison operator and CODE is testing for
3076 STORE_FLAG_VALUE, get the inner arguments. */
3078 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
3081 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3082 && code == LT && STORE_FLAG_VALUE == -1)
3083 #ifdef FLOAT_STORE_FLAG_VALUE
3084 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3085 && FLOAT_STORE_FLAG_VALUE < 0)
3090 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
3091 && code == GE && STORE_FLAG_VALUE == -1)
3092 #ifdef FLOAT_STORE_FLAG_VALUE
3093 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
3094 && FLOAT_STORE_FLAG_VALUE < 0)
3097 x = arg1, reverse_code = 1;
3100 /* ??? We could also check for
3102 (ne (and (eq (...) (const_int 1))) (const_int 0))
3104 and related forms, but let's wait until we see them occurring. */
3107 /* Look up ARG1 in the hash table and see if it has an equivalence
3108 that lets us see what is being compared. */
3109 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
3111 if (p) p = p->first_same_value;
3113 for (; p; p = p->next_same_value)
3115 enum machine_mode inner_mode = GET_MODE (p->exp);
3117 /* If the entry isn't valid, skip it. */
3118 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
3121 if (GET_CODE (p->exp) == COMPARE
3122 /* Another possibility is that this machine has a compare insn
3123 that includes the comparison code. In that case, ARG1 would
3124 be equivalent to a comparison operation that would set ARG1 to
3125 either STORE_FLAG_VALUE or zero. If this is an NE operation,
3126 ORIG_CODE is the actual comparison being done; if it is an EQ,
3127 we must reverse ORIG_CODE. On machine with a negative value
3128 for STORE_FLAG_VALUE, also look at LT and GE operations. */
3131 && GET_MODE_CLASS (inner_mode) == MODE_INT
3132 && (GET_MODE_BITSIZE (inner_mode)
3133 <= HOST_BITS_PER_WIDE_INT)
3134 && (STORE_FLAG_VALUE
3135 & ((HOST_WIDE_INT) 1
3136 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3137 #ifdef FLOAT_STORE_FLAG_VALUE
3139 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3140 && FLOAT_STORE_FLAG_VALUE < 0)
3143 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
3148 else if ((code == EQ
3150 && GET_MODE_CLASS (inner_mode) == MODE_INT
3151 && (GET_MODE_BITSIZE (inner_mode)
3152 <= HOST_BITS_PER_WIDE_INT)
3153 && (STORE_FLAG_VALUE
3154 & ((HOST_WIDE_INT) 1
3155 << (GET_MODE_BITSIZE (inner_mode) - 1))))
3156 #ifdef FLOAT_STORE_FLAG_VALUE
3158 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
3159 && FLOAT_STORE_FLAG_VALUE < 0)
3162 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
3169 /* If this is fp + constant, the equivalent is a better operand since
3170 it may let us predict the value of the comparison. */
3171 else if (NONZERO_BASE_PLUS_P (p->exp))
3178 /* If we didn't find a useful equivalence for ARG1, we are done.
3179 Otherwise, set up for the next iteration. */
3183 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3184 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3185 code = GET_CODE (x);
3188 code = reverse_condition (code);
3191 /* Return our results. Return the modes from before fold_rtx
3192 because fold_rtx might produce const_int, and then it's too late. */
3193 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3194 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3199 /* Try to simplify a unary operation CODE whose output mode is to be
3200 MODE with input operand OP whose mode was originally OP_MODE.
3201 Return zero if no simplification can be made. */
3204 simplify_unary_operation (code, mode, op, op_mode)
3206 enum machine_mode mode;
3208 enum machine_mode op_mode;
3210 register int width = GET_MODE_BITSIZE (mode);
3212 /* The order of these tests is critical so that, for example, we don't
3213 check the wrong mode (input vs. output) for a conversion operation,
3214 such as FIX. At some point, this should be simplified. */
3216 #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC)
3218 if (code == FLOAT && GET_MODE (op) == VOIDmode
3219 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3221 HOST_WIDE_INT hv, lv;
3224 if (GET_CODE (op) == CONST_INT)
3225 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3227 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3229 #ifdef REAL_ARITHMETIC
3230 REAL_VALUE_FROM_INT (d, lv, hv, mode);
3234 d = (double) (~ hv);
3235 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3236 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3237 d += (double) (unsigned HOST_WIDE_INT) (~ lv);
3243 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3244 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3245 d += (double) (unsigned HOST_WIDE_INT) lv;
3247 #endif /* REAL_ARITHMETIC */
3248 d = real_value_truncate (mode, d);
3249 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3251 else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode
3252 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3254 HOST_WIDE_INT hv, lv;
3257 if (GET_CODE (op) == CONST_INT)
3258 lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0;
3260 lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op);
3262 if (op_mode == VOIDmode)
3264 /* We don't know how to interpret negative-looking numbers in
3265 this case, so don't try to fold those. */
3269 else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2)
3272 hv = 0, lv &= GET_MODE_MASK (op_mode);
3274 #ifdef REAL_ARITHMETIC
3275 REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv, mode);
3278 d = (double) (unsigned HOST_WIDE_INT) hv;
3279 d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
3280 * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
3281 d += (double) (unsigned HOST_WIDE_INT) lv;
3282 #endif /* REAL_ARITHMETIC */
3283 d = real_value_truncate (mode, d);
3284 return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3288 if (GET_CODE (op) == CONST_INT
3289 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3291 register HOST_WIDE_INT arg0 = INTVAL (op);
3292 register HOST_WIDE_INT val;
3305 val = (arg0 >= 0 ? arg0 : - arg0);
3309 /* Don't use ffs here. Instead, get low order bit and then its
3310 number. If arg0 is zero, this will return 0, as desired. */
3311 arg0 &= GET_MODE_MASK (mode);
3312 val = exact_log2 (arg0 & (- arg0)) + 1;
3320 if (op_mode == VOIDmode)
3322 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3324 /* If we were really extending the mode,
3325 we would have to distinguish between zero-extension
3326 and sign-extension. */
3327 if (width != GET_MODE_BITSIZE (op_mode))
3331 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3332 val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3338 if (op_mode == VOIDmode)
3340 if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
3342 /* If we were really extending the mode,
3343 we would have to distinguish between zero-extension
3344 and sign-extension. */
3345 if (width != GET_MODE_BITSIZE (op_mode))
3349 else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
3352 = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3354 & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3355 val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3368 /* Clear the bits that don't belong in our mode,
3369 unless they and our sign bit are all one.
3370 So we get either a reasonable negative value or a reasonable
3371 unsigned value for this mode. */
3372 if (width < HOST_BITS_PER_WIDE_INT
3373 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3374 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3375 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3377 /* If this would be an entire word for the target, but is not for
3378 the host, then sign-extend on the host so that the number will look
3379 the same way on the host that it would on the target.
3381 For example, when building a 64 bit alpha hosted 32 bit sparc
3382 targeted compiler, then we want the 32 bit unsigned value -1 to be
3383 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3384 The later confuses the sparc backend. */
3386 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3387 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3388 val |= ((HOST_WIDE_INT) (-1) << width);
3390 return GEN_INT (val);
3393 /* We can do some operations on integer CONST_DOUBLEs. Also allow
3394 for a DImode operation on a CONST_INT. */
3395 else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2
3396 && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3398 HOST_WIDE_INT l1, h1, lv, hv;
3400 if (GET_CODE (op) == CONST_DOUBLE)
3401 l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3403 l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3413 neg_double (l1, h1, &lv, &hv);
3418 neg_double (l1, h1, &lv, &hv);
3426 lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
3428 lv = exact_log2 (l1 & (-l1)) + 1;
3432 /* This is just a change-of-mode, so do nothing. */
3437 if (op_mode == VOIDmode
3438 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3442 lv = l1 & GET_MODE_MASK (op_mode);
3446 if (op_mode == VOIDmode
3447 || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3451 lv = l1 & GET_MODE_MASK (op_mode);
3452 if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3453 && (lv & ((HOST_WIDE_INT) 1
3454 << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3455 lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3457 hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3468 return immed_double_const (lv, hv, mode);
3471 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3472 else if (GET_CODE (op) == CONST_DOUBLE
3473 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3479 if (setjmp (handler))
3480 /* There used to be a warning here, but that is inadvisable.
3481 People may want to cause traps, and the natural way
3482 to do it should not get a warning. */
3485 set_float_handler (handler);
3487 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3492 d = REAL_VALUE_NEGATE (d);
3496 if (REAL_VALUE_NEGATIVE (d))
3497 d = REAL_VALUE_NEGATE (d);
3500 case FLOAT_TRUNCATE:
3501 d = real_value_truncate (mode, d);
3505 /* All this does is change the mode. */
3509 d = REAL_VALUE_RNDZINT (d);
3513 d = REAL_VALUE_UNSIGNED_RNDZINT (d);
3523 x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
3524 set_float_handler (NULL_PTR);
3528 else if (GET_CODE (op) == CONST_DOUBLE
3529 && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
3530 && GET_MODE_CLASS (mode) == MODE_INT
3531 && width <= HOST_BITS_PER_WIDE_INT && width > 0)
3537 if (setjmp (handler))
3540 set_float_handler (handler);
3542 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3547 val = REAL_VALUE_FIX (d);
3551 val = REAL_VALUE_UNSIGNED_FIX (d);
3558 set_float_handler (NULL_PTR);
3560 /* Clear the bits that don't belong in our mode,
3561 unless they and our sign bit are all one.
3562 So we get either a reasonable negative value or a reasonable
3563 unsigned value for this mode. */
3564 if (width < HOST_BITS_PER_WIDE_INT
3565 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3566 != ((HOST_WIDE_INT) (-1) << (width - 1))))
3567 val &= ((HOST_WIDE_INT) 1 << width) - 1;
3569 /* If this would be an entire word for the target, but is not for
3570 the host, then sign-extend on the host so that the number will look
3571 the same way on the host that it would on the target.
3573 For example, when building a 64 bit alpha hosted 32 bit sparc
3574 targeted compiler, then we want the 32 bit unsigned value -1 to be
3575 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
3576 The later confuses the sparc backend. */
3578 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
3579 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
3580 val |= ((HOST_WIDE_INT) (-1) << width);
3582 return GEN_INT (val);
3585 /* This was formerly used only for non-IEEE float.
3586 eggert@twinsun.com says it is safe for IEEE also. */
3589 /* There are some simplifications we can do even if the operands
3595 /* (not (not X)) == X, similarly for NEG. */
3596 if (GET_CODE (op) == code)
3597 return XEXP (op, 0);
3601 /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3602 becomes just the MINUS if its mode is MODE. This allows
3603 folding switch statements on machines using casesi (such as
3605 if (GET_CODE (op) == TRUNCATE
3606 && GET_MODE (XEXP (op, 0)) == mode
3607 && GET_CODE (XEXP (op, 0)) == MINUS
3608 && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3609 && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3610 return XEXP (op, 0);
3612 #ifdef POINTERS_EXTEND_UNSIGNED
3613 if (! POINTERS_EXTEND_UNSIGNED
3614 && mode == Pmode && GET_MODE (op) == ptr_mode
3616 return convert_memory_address (Pmode, op);
3620 #ifdef POINTERS_EXTEND_UNSIGNED
3622 if (POINTERS_EXTEND_UNSIGNED
3623 && mode == Pmode && GET_MODE (op) == ptr_mode
3625 return convert_memory_address (Pmode, op);
3637 /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3638 and OP1. Return 0 if no simplification is possible.
3640 Don't use this for relational operations such as EQ or LT.
3641 Use simplify_relational_operation instead. */
3644 simplify_binary_operation (code, mode, op0, op1)
3646 enum machine_mode mode;
3649 register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3651 int width = GET_MODE_BITSIZE (mode);
3654 /* Relational operations don't work here. We must know the mode
3655 of the operands in order to do the comparison correctly.
3656 Assuming a full word can give incorrect results.
3657 Consider comparing 128 with -128 in QImode. */
3659 if (GET_RTX_CLASS (code) == '<')
3662 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3663 if (GET_MODE_CLASS (mode) == MODE_FLOAT
3664 && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3665 && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3667 REAL_VALUE_TYPE f0, f1, value;
3670 if (setjmp (handler))
3673 set_float_handler (handler);
3675 REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3676 REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3677 f0 = real_value_truncate (mode, f0);
3678 f1 = real_value_truncate (mode, f1);
3680 #ifdef REAL_ARITHMETIC
3681 #ifndef REAL_INFINITY
3682 if (code == DIV && REAL_VALUES_EQUAL (f1, dconst0))
3685 REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
3699 #ifndef REAL_INFINITY
3706 value = MIN (f0, f1);
3709 value = MAX (f0, f1);
3716 value = real_value_truncate (mode, value);
3717 set_float_handler (NULL_PTR);
3718 return CONST_DOUBLE_FROM_REAL_VALUE (value, mode);
3720 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3722 /* We can fold some multi-word operations. */
3723 if (GET_MODE_CLASS (mode) == MODE_INT
3724 && width == HOST_BITS_PER_WIDE_INT * 2
3725 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
3726 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3728 HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
3730 if (GET_CODE (op0) == CONST_DOUBLE)
3731 l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3733 l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
3735 if (GET_CODE (op1) == CONST_DOUBLE)
3736 l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3738 l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3743 /* A - B == A + (-B). */
3744 neg_double (l2, h2, &lv, &hv);
3747 /* .. fall through ... */
3750 add_double (l1, h1, l2, h2, &lv, &hv);
3754 mul_double (l1, h1, l2, h2, &lv, &hv);
3757 case DIV: case MOD: case UDIV: case UMOD:
3758 /* We'd need to include tree.h to do this and it doesn't seem worth
3763 lv = l1 & l2, hv = h1 & h2;
3767 lv = l1 | l2, hv = h1 | h2;
3771 lv = l1 ^ l2, hv = h1 ^ h2;
3777 && ((unsigned HOST_WIDE_INT) l1
3778 < (unsigned HOST_WIDE_INT) l2)))
3787 && ((unsigned HOST_WIDE_INT) l1
3788 > (unsigned HOST_WIDE_INT) l2)))
3795 if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3797 && ((unsigned HOST_WIDE_INT) l1
3798 < (unsigned HOST_WIDE_INT) l2)))
3805 if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3807 && ((unsigned HOST_WIDE_INT) l1
3808 > (unsigned HOST_WIDE_INT) l2)))
3814 case LSHIFTRT: case ASHIFTRT:
3816 case ROTATE: case ROTATERT:
3817 #ifdef SHIFT_COUNT_TRUNCATED
3818 if (SHIFT_COUNT_TRUNCATED)
3819 l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3822 if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3825 if (code == LSHIFTRT || code == ASHIFTRT)
3826 rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3828 else if (code == ASHIFT)
3829 lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1);
3830 else if (code == ROTATE)
3831 lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3832 else /* code == ROTATERT */
3833 rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3840 return immed_double_const (lv, hv, mode);
3843 if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3844 || width > HOST_BITS_PER_WIDE_INT || width == 0)
3846 /* Even if we can't compute a constant result,
3847 there are some cases worth simplifying. */
3852 /* In IEEE floating point, x+0 is not the same as x. Similarly
3853 for the other optimizations below. */
3854 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3855 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3858 if (op1 == CONST0_RTX (mode))
3861 /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3862 if (GET_CODE (op0) == NEG)
3863 return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
3864 else if (GET_CODE (op1) == NEG)
3865 return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
3867 /* Handle both-operands-constant cases. We can only add
3868 CONST_INTs to constants since the sum of relocatable symbols
3869 can't be handled by most assemblers. Don't add CONST_INT
3870 to CONST_INT since overflow won't be computed properly if wider
3871 than HOST_BITS_PER_WIDE_INT. */
3873 if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
3874 && GET_CODE (op1) == CONST_INT)
3875 return plus_constant (op0, INTVAL (op1));
3876 else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
3877 && GET_CODE (op0) == CONST_INT)
3878 return plus_constant (op1, INTVAL (op0));
3880 /* See if this is something like X * C - X or vice versa or
3881 if the multiplication is written as a shift. If so, we can
3882 distribute and make a new multiply, shift, or maybe just
3883 have X (if C is 2 in the example above). But don't make
3884 real multiply if we didn't have one before. */
3886 if (! FLOAT_MODE_P (mode))
3888 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
3889 rtx lhs = op0, rhs = op1;
3892 if (GET_CODE (lhs) == NEG)
3893 coeff0 = -1, lhs = XEXP (lhs, 0);
3894 else if (GET_CODE (lhs) == MULT
3895 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
3897 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
3900 else if (GET_CODE (lhs) == ASHIFT
3901 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
3902 && INTVAL (XEXP (lhs, 1)) >= 0
3903 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
3905 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
3906 lhs = XEXP (lhs, 0);
3909 if (GET_CODE (rhs) == NEG)
3910 coeff1 = -1, rhs = XEXP (rhs, 0);
3911 else if (GET_CODE (rhs) == MULT
3912 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
3914 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
3917 else if (GET_CODE (rhs) == ASHIFT
3918 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
3919 && INTVAL (XEXP (rhs, 1)) >= 0
3920 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
3922 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
3923 rhs = XEXP (rhs, 0);
3926 if (rtx_equal_p (lhs, rhs))
3928 tem = cse_gen_binary (MULT, mode, lhs,
3929 GEN_INT (coeff0 + coeff1));
3930 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
3934 /* If one of the operands is a PLUS or a MINUS, see if we can
3935 simplify this by the associative law.
3936 Don't use the associative law for floating point.
3937 The inaccuracy makes it nonassociative,
3938 and subtle programs can break if operations are associated. */
3940 if (INTEGRAL_MODE_P (mode)
3941 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3942 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3943 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3949 /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3950 using cc0, in which case we want to leave it as a COMPARE
3951 so we can distinguish it from a register-register-copy.
3953 In IEEE floating point, x-0 is not the same as x. */
3955 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3956 || ! FLOAT_MODE_P (mode) || flag_fast_math)
3957 && op1 == CONST0_RTX (mode))
3960 /* Do nothing here. */
3965 /* None of these optimizations can be done for IEEE
3967 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3968 && FLOAT_MODE_P (mode) && ! flag_fast_math)
3971 /* We can't assume x-x is 0 even with non-IEEE floating point,
3972 but since it is zero except in very strange circumstances, we
3973 will treat it as zero with -ffast-math. */
3974 if (rtx_equal_p (op0, op1)
3975 && ! side_effects_p (op0)
3976 && (! FLOAT_MODE_P (mode) || flag_fast_math))
3977 return CONST0_RTX (mode);
3979 /* Change subtraction from zero into negation. */
3980 if (op0 == CONST0_RTX (mode))
3981 return gen_rtx_NEG (mode, op1);
3983 /* (-1 - a) is ~a. */
3984 if (op0 == constm1_rtx)
3985 return gen_rtx_NOT (mode, op1);
3987 /* Subtracting 0 has no effect. */
3988 if (op1 == CONST0_RTX (mode))
3991 /* See if this is something like X * C - X or vice versa or
3992 if the multiplication is written as a shift. If so, we can
3993 distribute and make a new multiply, shift, or maybe just
3994 have X (if C is 2 in the example above). But don't make
3995 real multiply if we didn't have one before. */
3997 if (! FLOAT_MODE_P (mode))
3999 HOST_WIDE_INT coeff0 = 1, coeff1 = 1;
4000 rtx lhs = op0, rhs = op1;
4003 if (GET_CODE (lhs) == NEG)
4004 coeff0 = -1, lhs = XEXP (lhs, 0);
4005 else if (GET_CODE (lhs) == MULT
4006 && GET_CODE (XEXP (lhs, 1)) == CONST_INT)
4008 coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0);
4011 else if (GET_CODE (lhs) == ASHIFT
4012 && GET_CODE (XEXP (lhs, 1)) == CONST_INT
4013 && INTVAL (XEXP (lhs, 1)) >= 0
4014 && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT)
4016 coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1));
4017 lhs = XEXP (lhs, 0);
4020 if (GET_CODE (rhs) == NEG)
4021 coeff1 = - 1, rhs = XEXP (rhs, 0);
4022 else if (GET_CODE (rhs) == MULT
4023 && GET_CODE (XEXP (rhs, 1)) == CONST_INT)
4025 coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0);
4028 else if (GET_CODE (rhs) == ASHIFT
4029 && GET_CODE (XEXP (rhs, 1)) == CONST_INT
4030 && INTVAL (XEXP (rhs, 1)) >= 0
4031 && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT)
4033 coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1));
4034 rhs = XEXP (rhs, 0);
4037 if (rtx_equal_p (lhs, rhs))
4039 tem = cse_gen_binary (MULT, mode, lhs,
4040 GEN_INT (coeff0 - coeff1));
4041 return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem;
4045 /* (a - (-b)) -> (a + b). */
4046 if (GET_CODE (op1) == NEG)
4047 return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
4049 /* If one of the operands is a PLUS or a MINUS, see if we can
4050 simplify this by the associative law.
4051 Don't use the associative law for floating point.
4052 The inaccuracy makes it nonassociative,
4053 and subtle programs can break if operations are associated. */
4055 if (INTEGRAL_MODE_P (mode)
4056 && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
4057 || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
4058 && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
4061 /* Don't let a relocatable value get a negative coeff. */
4062 if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode)
4063 return plus_constant (op0, - INTVAL (op1));
4065 /* (x - (x & y)) -> (x & ~y) */
4066 if (GET_CODE (op1) == AND)
4068 if (rtx_equal_p (op0, XEXP (op1, 0)))
4069 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 1)));
4070 if (rtx_equal_p (op0, XEXP (op1, 1)))
4071 return cse_gen_binary (AND, mode, op0, gen_rtx_NOT (mode, XEXP (op1, 0)));
4076 if (op1 == constm1_rtx)
4078 tem = simplify_unary_operation (NEG, mode, op0, mode);
4080 return tem ? tem : gen_rtx_NEG (mode, op0);
4083 /* In IEEE floating point, x*0 is not always 0. */
4084 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4085 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4086 && op1 == CONST0_RTX (mode)
4087 && ! side_effects_p (op0))
4090 /* In IEEE floating point, x*1 is not equivalent to x for nans.
4091 However, ANSI says we can drop signals,
4092 so we can do this anyway. */
4093 if (op1 == CONST1_RTX (mode))
4096 /* Convert multiply by constant power of two into shift unless
4097 we are still generating RTL. This test is a kludge. */
4098 if (GET_CODE (op1) == CONST_INT
4099 && (val = exact_log2 (INTVAL (op1))) >= 0
4100 /* If the mode is larger than the host word size, and the
4101 uppermost bit is set, then this isn't a power of two due
4102 to implicit sign extension. */
4103 && (width <= HOST_BITS_PER_WIDE_INT
4104 || val != HOST_BITS_PER_WIDE_INT - 1)
4105 && ! rtx_equal_function_value_matters)
4106 return gen_rtx_ASHIFT (mode, op0, GEN_INT (val));
4108 if (GET_CODE (op1) == CONST_DOUBLE
4109 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
4113 int op1is2, op1ism1;
4115 if (setjmp (handler))
4118 set_float_handler (handler);
4119 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4120 op1is2 = REAL_VALUES_EQUAL (d, dconst2);
4121 op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
4122 set_float_handler (NULL_PTR);
4124 /* x*2 is x+x and x*(-1) is -x */
4125 if (op1is2 && GET_MODE (op0) == mode)
4126 return gen_rtx_PLUS (mode, op0, copy_rtx (op0));
4128 else if (op1ism1 && GET_MODE (op0) == mode)
4129 return gen_rtx_NEG (mode, op0);
4134 if (op1 == const0_rtx)
4136 if (GET_CODE (op1) == CONST_INT
4137 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4139 if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4141 /* A | (~A) -> -1 */
4142 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4143 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4144 && ! side_effects_p (op0)
4145 && GET_MODE_CLASS (mode) != MODE_CC)
4150 if (op1 == const0_rtx)
4152 if (GET_CODE (op1) == CONST_INT
4153 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4154 return gen_rtx_NOT (mode, op0);
4155 if (op0 == op1 && ! side_effects_p (op0)
4156 && GET_MODE_CLASS (mode) != MODE_CC)
4161 if (op1 == const0_rtx && ! side_effects_p (op0))
4163 if (GET_CODE (op1) == CONST_INT
4164 && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
4166 if (op0 == op1 && ! side_effects_p (op0)
4167 && GET_MODE_CLASS (mode) != MODE_CC)
4170 if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
4171 || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
4172 && ! side_effects_p (op0)
4173 && GET_MODE_CLASS (mode) != MODE_CC)
4178 /* Convert divide by power of two into shift (divide by 1 handled
4180 if (GET_CODE (op1) == CONST_INT
4181 && (arg1 = exact_log2 (INTVAL (op1))) > 0)
4182 return gen_rtx_LSHIFTRT (mode, op0, GEN_INT (arg1));
4184 /* ... fall through ... */
4187 if (op1 == CONST1_RTX (mode))
4190 /* In IEEE floating point, 0/x is not always 0. */
4191 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4192 || ! FLOAT_MODE_P (mode) || flag_fast_math)
4193 && op0 == CONST0_RTX (mode)
4194 && ! side_effects_p (op1))
4197 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4198 /* Change division by a constant into multiplication. Only do
4199 this with -ffast-math until an expert says it is safe in
4201 else if (GET_CODE (op1) == CONST_DOUBLE
4202 && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
4203 && op1 != CONST0_RTX (mode)
4207 REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
4209 if (! REAL_VALUES_EQUAL (d, dconst0))
4211 #if defined (REAL_ARITHMETIC)
4212 REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d);
4213 return gen_rtx_MULT (mode, op0,
4214 CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
4216 return gen_rtx_MULT (mode, op0,
4217 CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
4225 /* Handle modulus by power of two (mod with 1 handled below). */
4226 if (GET_CODE (op1) == CONST_INT
4227 && exact_log2 (INTVAL (op1)) > 0)
4228 return gen_rtx_AND (mode, op0, GEN_INT (INTVAL (op1) - 1));
4230 /* ... fall through ... */
4233 if ((op0 == const0_rtx || op1 == const1_rtx)
4234 && ! side_effects_p (op0) && ! side_effects_p (op1))
4240 /* Rotating ~0 always results in ~0. */
4241 if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
4242 && INTVAL (op0) == GET_MODE_MASK (mode)
4243 && ! side_effects_p (op1))
4246 /* ... fall through ... */
4251 if (op1 == const0_rtx)
4253 if (op0 == const0_rtx && ! side_effects_p (op1))
4258 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4259 && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
4260 && ! side_effects_p (op0))
4262 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4267 if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
4269 == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
4270 && ! side_effects_p (op0))
4272 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4277 if (op1 == const0_rtx && ! side_effects_p (op0))
4279 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4284 if (op1 == constm1_rtx && ! side_effects_p (op0))
4286 else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
4297 /* Get the integer argument values in two forms:
4298 zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4300 arg0 = INTVAL (op0);
4301 arg1 = INTVAL (op1);
4303 if (width < HOST_BITS_PER_WIDE_INT)
4305 arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4306 arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
4309 if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4310 arg0s |= ((HOST_WIDE_INT) (-1) << width);
4313 if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4314 arg1s |= ((HOST_WIDE_INT) (-1) << width);
4322 /* Compute the value of the arithmetic. */
4327 val = arg0s + arg1s;
4331 val = arg0s - arg1s;
4335 val = arg0s * arg1s;
4341 val = arg0s / arg1s;
4347 val = arg0s % arg1s;
4353 val = (unsigned HOST_WIDE_INT) arg0 / arg1;
4359 val = (unsigned HOST_WIDE_INT) arg0 % arg1;
4375 /* If shift count is undefined, don't fold it; let the machine do
4376 what it wants. But truncate it if the machine will do that. */
4380 #ifdef SHIFT_COUNT_TRUNCATED
4381 if (SHIFT_COUNT_TRUNCATED)
4385 val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
4392 #ifdef SHIFT_COUNT_TRUNCATED
4393 if (SHIFT_COUNT_TRUNCATED)
4397 val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
4404 #ifdef SHIFT_COUNT_TRUNCATED
4405 if (SHIFT_COUNT_TRUNCATED)
4409 val = arg0s >> arg1;
4411 /* Bootstrap compiler may not have sign extended the right shift.
4412 Manually extend the sign to insure bootstrap cc matches gcc. */
4413 if (arg0s < 0 && arg1 > 0)
4414 val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
4423 val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
4424 | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
4432 val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
4433 | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
4437 /* Do nothing here. */
4441 val = arg0s <= arg1s ? arg0s : arg1s;
4445 val = ((unsigned HOST_WIDE_INT) arg0
4446 <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4450 val = arg0s > arg1s ? arg0s : arg1s;
4454 val = ((unsigned HOST_WIDE_INT) arg0
4455 > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
4462 /* Clear the bits that don't belong in our mode, unless they and our sign
4463 bit are all one. So we get either a reasonable negative value or a
4464 reasonable unsigned value for this mode. */
4465 if (width < HOST_BITS_PER_WIDE_INT
4466 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4467 != ((HOST_WIDE_INT) (-1) << (width - 1))))
4468 val &= ((HOST_WIDE_INT) 1 << width) - 1;
4470 /* If this would be an entire word for the target, but is not for
4471 the host, then sign-extend on the host so that the number will look
4472 the same way on the host that it would on the target.
4474 For example, when building a 64 bit alpha hosted 32 bit sparc
4475 targeted compiler, then we want the 32 bit unsigned value -1 to be
4476 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
4477 The later confuses the sparc backend. */
4479 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width
4480 && (val & ((HOST_WIDE_INT) 1 << (width - 1))))
4481 val |= ((HOST_WIDE_INT) (-1) << width);
4483 return GEN_INT (val);
4486 /* Simplify a PLUS or MINUS, at least one of whose operands may be another
4489 Rather than test for specific case, we do this by a brute-force method
4490 and do all possible simplifications until no more changes occur. Then
4491 we rebuild the operation. */
4494 simplify_plus_minus (code, mode, op0, op1)
4496 enum machine_mode mode;
4502 int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
4503 int first = 1, negate = 0, changed;
4506 bzero ((char *) ops, sizeof ops);
4508 /* Set up the two operands and then expand them until nothing has been
4509 changed. If we run out of room in our array, give up; this should
4510 almost never happen. */
4512 ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
4519 for (i = 0; i < n_ops; i++)
4520 switch (GET_CODE (ops[i]))
4527 ops[n_ops] = XEXP (ops[i], 1);
4528 negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
4529 ops[i] = XEXP (ops[i], 0);
4535 ops[i] = XEXP (ops[i], 0);
4536 negs[i] = ! negs[i];
4541 ops[i] = XEXP (ops[i], 0);
4547 /* ~a -> (-a - 1) */
4550 ops[n_ops] = constm1_rtx;
4551 negs[n_ops++] = negs[i];
4552 ops[i] = XEXP (ops[i], 0);
4553 negs[i] = ! negs[i];
4560 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4568 /* If we only have two operands, we can't do anything. */
4572 /* Now simplify each pair of operands until nothing changes. The first
4573 time through just simplify constants against each other. */
4580 for (i = 0; i < n_ops - 1; i++)
4581 for (j = i + 1; j < n_ops; j++)
4582 if (ops[i] != 0 && ops[j] != 0
4583 && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4585 rtx lhs = ops[i], rhs = ops[j];
4586 enum rtx_code ncode = PLUS;
4588 if (negs[i] && ! negs[j])
4589 lhs = ops[j], rhs = ops[i], ncode = MINUS;
4590 else if (! negs[i] && negs[j])
4593 tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4596 ops[i] = tem, ops[j] = 0;
4597 negs[i] = negs[i] && negs[j];
4598 if (GET_CODE (tem) == NEG)
4599 ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4601 if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4602 ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4610 /* Pack all the operands to the lower-numbered entries and give up if
4611 we didn't reduce the number of operands we had. Make sure we
4612 count a CONST as two operands. If we have the same number of
4613 operands, but have made more CONSTs than we had, this is also
4614 an improvement, so accept it. */
4616 for (i = 0, j = 0; j < n_ops; j++)
4619 ops[i] = ops[j], negs[i++] = negs[j];
4620 if (GET_CODE (ops[j]) == CONST)
4624 if (i + n_consts > input_ops
4625 || (i + n_consts == input_ops && n_consts <= input_consts))
4630 /* If we have a CONST_INT, put it last. */
4631 for (i = 0; i < n_ops - 1; i++)
4632 if (GET_CODE (ops[i]) == CONST_INT)
4634 tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4635 j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4638 /* Put a non-negated operand first. If there aren't any, make all
4639 operands positive and negate the whole thing later. */
4640 for (i = 0; i < n_ops && negs[i]; i++)
4645 for (i = 0; i < n_ops; i++)
4651 tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4652 j = negs[0], negs[0] = negs[i], negs[i] = j;
4655 /* Now make the result by performing the requested operations. */
4657 for (i = 1; i < n_ops; i++)
4658 result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4660 return negate ? gen_rtx_NEG (mode, result) : result;
4663 /* Make a binary operation by properly ordering the operands and
4664 seeing if the expression folds. */
4667 cse_gen_binary (code, mode, op0, op1)
4669 enum machine_mode mode;
4674 /* Put complex operands first and constants second if commutative. */
4675 if (GET_RTX_CLASS (code) == 'c'
4676 && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4677 || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4678 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4679 || (GET_CODE (op0) == SUBREG
4680 && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4681 && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4682 tem = op0, op0 = op1, op1 = tem;
4684 /* If this simplifies, do it. */
4685 tem = simplify_binary_operation (code, mode, op0, op1);
4690 /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4691 just form the operation. */
4693 if (code == PLUS && GET_CODE (op1) == CONST_INT
4694 && GET_MODE (op0) != VOIDmode)
4695 return plus_constant (op0, INTVAL (op1));
4696 else if (code == MINUS && GET_CODE (op1) == CONST_INT
4697 && GET_MODE (op0) != VOIDmode)
4698 return plus_constant (op0, - INTVAL (op1));
4700 return gen_rtx_fmt_ee (code, mode, op0, op1);
4708 int equal, op0lt, op1lt;
4712 check_fold_consts (data)
4715 struct cfc_args * args = (struct cfc_args *) data;
4716 REAL_VALUE_TYPE d0, d1;
4718 REAL_VALUE_FROM_CONST_DOUBLE (d0, args->op0);
4719 REAL_VALUE_FROM_CONST_DOUBLE (d1, args->op1);
4720 args->equal = REAL_VALUES_EQUAL (d0, d1);
4721 args->op0lt = REAL_VALUES_LESS (d0, d1);
4722 args->op1lt = REAL_VALUES_LESS (d1, d0);
4725 /* Like simplify_binary_operation except used for relational operators.
4726 MODE is the mode of the operands, not that of the result. If MODE
4727 is VOIDmode, both operands must also be VOIDmode and we compare the
4728 operands in "infinite precision".
4730 If no simplification is possible, this function returns zero. Otherwise,
4731 it returns either const_true_rtx or const0_rtx. */
4734 simplify_relational_operation (code, mode, op0, op1)
4736 enum machine_mode mode;
4739 int equal, op0lt, op0ltu, op1lt, op1ltu;
4742 /* If op0 is a compare, extract the comparison arguments from it. */
4743 if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4744 op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4746 /* We can't simplify MODE_CC values since we don't know what the
4747 actual comparison is. */
4748 if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC
4755 /* For integer comparisons of A and B maybe we can simplify A - B and can
4756 then simplify a comparison of that with zero. If A and B are both either
4757 a register or a CONST_INT, this can't help; testing for these cases will
4758 prevent infinite recursion here and speed things up.
4760 If CODE is an unsigned comparison, then we can never do this optimization,
4761 because it gives an incorrect result if the subtraction wraps around zero.
4762 ANSI C defines unsigned operations such that they never overflow, and
4763 thus such cases can not be ignored. */
4765 if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx
4766 && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT)
4767 && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT))
4768 && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1))
4769 && code != GTU && code != GEU && code != LTU && code != LEU)
4770 return simplify_relational_operation (signed_condition (code),
4771 mode, tem, const0_rtx);
4773 /* For non-IEEE floating-point, if the two operands are equal, we know the
4775 if (rtx_equal_p (op0, op1)
4776 && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4777 || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math))
4778 equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0;
4780 /* If the operands are floating-point constants, see if we can fold
4782 #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
4783 else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
4784 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4786 struct cfc_args args;
4788 /* Setup input for check_fold_consts() */
4792 if (do_float_handler(check_fold_consts, (PTR) &args) == 0)
4793 /* We got an exception from check_fold_consts() */
4796 /* Receive output from check_fold_consts() */
4798 op0lt = op0ltu = args.op0lt;
4799 op1lt = op1ltu = args.op1lt;
4801 #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4803 /* Otherwise, see if the operands are both integers. */
4804 else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode)
4805 && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
4806 && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
4808 int width = GET_MODE_BITSIZE (mode);
4809 HOST_WIDE_INT l0s, h0s, l1s, h1s;
4810 unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u;
4812 /* Get the two words comprising each integer constant. */
4813 if (GET_CODE (op0) == CONST_DOUBLE)
4815 l0u = l0s = CONST_DOUBLE_LOW (op0);
4816 h0u = h0s = CONST_DOUBLE_HIGH (op0);
4820 l0u = l0s = INTVAL (op0);
4821 h0u = h0s = l0s < 0 ? -1 : 0;
4824 if (GET_CODE (op1) == CONST_DOUBLE)
4826 l1u = l1s = CONST_DOUBLE_LOW (op1);
4827 h1u = h1s = CONST_DOUBLE_HIGH (op1);
4831 l1u = l1s = INTVAL (op1);
4832 h1u = h1s = l1s < 0 ? -1 : 0;
4835 /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
4836 we have to sign or zero-extend the values. */
4837 if (width != 0 && width <= HOST_BITS_PER_WIDE_INT)
4838 h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0;
4840 if (width != 0 && width < HOST_BITS_PER_WIDE_INT)
4842 l0u &= ((HOST_WIDE_INT) 1 << width) - 1;
4843 l1u &= ((HOST_WIDE_INT) 1 << width) - 1;
4845 if (l0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4846 l0s |= ((HOST_WIDE_INT) (-1) << width);
4848 if (l1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4849 l1s |= ((HOST_WIDE_INT) (-1) << width);
4852 equal = (h0u == h1u && l0u == l1u);
4853 op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s));
4854 op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s));
4855 op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u));
4856 op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u));
4859 /* Otherwise, there are some code-specific tests we can make. */
4865 /* References to the frame plus a constant or labels cannot
4866 be zero, but a SYMBOL_REF can due to #pragma weak. */
4867 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4868 || GET_CODE (op0) == LABEL_REF)
4869 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4870 /* On some machines, the ap reg can be 0 sometimes. */
4871 && op0 != arg_pointer_rtx
4878 if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx)
4879 || GET_CODE (op0) == LABEL_REF)
4880 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4881 && op0 != arg_pointer_rtx
4884 return const_true_rtx;
4888 /* Unsigned values are never negative. */
4889 if (op1 == const0_rtx)
4890 return const_true_rtx;
4894 if (op1 == const0_rtx)
4899 /* Unsigned values are never greater than the largest
4901 if (GET_CODE (op1) == CONST_INT
4902 && INTVAL (op1) == GET_MODE_MASK (mode)
4903 && INTEGRAL_MODE_P (mode))
4904 return const_true_rtx;
4908 if (GET_CODE (op1) == CONST_INT
4909 && INTVAL (op1) == GET_MODE_MASK (mode)
4910 && INTEGRAL_MODE_P (mode))
4921 /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set
4926 return equal ? const_true_rtx : const0_rtx;
4928 return ! equal ? const_true_rtx : const0_rtx;
4930 return op0lt ? const_true_rtx : const0_rtx;
4932 return op1lt ? const_true_rtx : const0_rtx;
4934 return op0ltu ? const_true_rtx : const0_rtx;
4936 return op1ltu ? const_true_rtx : const0_rtx;
4938 return equal || op0lt ? const_true_rtx : const0_rtx;
4940 return equal || op1lt ? const_true_rtx : const0_rtx;
4942 return equal || op0ltu ? const_true_rtx : const0_rtx;
4944 return equal || op1ltu ? const_true_rtx : const0_rtx;
4950 /* Simplify CODE, an operation with result mode MODE and three operands,
4951 OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4952 a constant. Return 0 if no simplifications is possible. */
4955 simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4957 enum machine_mode mode, op0_mode;
4960 int width = GET_MODE_BITSIZE (mode);
4962 /* VOIDmode means "infinite" precision. */
4964 width = HOST_BITS_PER_WIDE_INT;
4970 if (GET_CODE (op0) == CONST_INT
4971 && GET_CODE (op1) == CONST_INT
4972 && GET_CODE (op2) == CONST_INT
4973 && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4974 && width <= HOST_BITS_PER_WIDE_INT)
4976 /* Extracting a bit-field from a constant */
4977 HOST_WIDE_INT val = INTVAL (op0);
4979 if (BITS_BIG_ENDIAN)
4980 val >>= (GET_MODE_BITSIZE (op0_mode)
4981 - INTVAL (op2) - INTVAL (op1));
4983 val >>= INTVAL (op2);
4985 if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
4987 /* First zero-extend. */
4988 val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
4989 /* If desired, propagate sign bit. */
4990 if (code == SIGN_EXTRACT
4991 && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4992 val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
4995 /* Clear the bits that don't belong in our mode,
4996 unless they and our sign bit are all one.
4997 So we get either a reasonable negative value or a reasonable
4998 unsigned value for this mode. */
4999 if (width < HOST_BITS_PER_WIDE_INT
5000 && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
5001 != ((HOST_WIDE_INT) (-1) << (width - 1))))
5002 val &= ((HOST_WIDE_INT) 1 << width) - 1;
5004 return GEN_INT (val);
5009 if (GET_CODE (op0) == CONST_INT)
5010 return op0 != const0_rtx ? op1 : op2;
5012 /* Convert a == b ? b : a to "a". */
5013 if (GET_CODE (op0) == NE && ! side_effects_p (op0)
5014 && rtx_equal_p (XEXP (op0, 0), op1)
5015 && rtx_equal_p (XEXP (op0, 1), op2))
5017 else if (GET_CODE (op0) == EQ && ! side_effects_p (op0)
5018 && rtx_equal_p (XEXP (op0, 1), op1)
5019 && rtx_equal_p (XEXP (op0, 0), op2))
5021 else if (GET_RTX_CLASS (GET_CODE (op0)) == '<' && ! side_effects_p (op0))
5024 temp = simplify_relational_operation (GET_CODE (op0), op0_mode,
5025 XEXP (op0, 0), XEXP (op0, 1));
5026 /* See if any simplifications were possible. */
5027 if (temp == const0_rtx)
5029 else if (temp == const1_rtx)
5041 /* If X is a nontrivial arithmetic operation on an argument
5042 for which a constant value can be determined, return
5043 the result of operating on that value, as a constant.
5044 Otherwise, return X, possibly with one or more operands
5045 modified by recursive calls to this function.
5047 If X is a register whose contents are known, we do NOT
5048 return those contents here. equiv_constant is called to
5051 INSN is the insn that we may be modifying. If it is 0, make a copy
5052 of X before modifying it. */
5059 register enum rtx_code code;
5060 register enum machine_mode mode;
5067 /* Folded equivalents of first two operands of X. */
5071 /* Constant equivalents of first three operands of X;
5072 0 when no such equivalent is known. */
5077 /* The mode of the first operand of X. We need this for sign and zero
5079 enum machine_mode mode_arg0;
5084 mode = GET_MODE (x);
5085 code = GET_CODE (x);
5094 /* No use simplifying an EXPR_LIST
5095 since they are used only for lists of args
5096 in a function call's REG_EQUAL note. */
5098 /* Changing anything inside an ADDRESSOF is incorrect; we don't
5099 want to (e.g.,) make (addressof (const_int 0)) just because
5100 the location is known to be zero. */
5106 return prev_insn_cc0;
5110 /* If the next insn is a CODE_LABEL followed by a jump table,
5111 PC's value is a LABEL_REF pointing to that label. That
5112 lets us fold switch statements on the Vax. */
5113 if (insn && GET_CODE (insn) == JUMP_INSN)
5115 rtx next = next_nonnote_insn (insn);
5117 if (next && GET_CODE (next) == CODE_LABEL
5118 && NEXT_INSN (next) != 0
5119 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
5120 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
5121 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
5122 return gen_rtx_LABEL_REF (Pmode, next);
5127 /* See if we previously assigned a constant value to this SUBREG. */
5128 if ((new = lookup_as_function (x, CONST_INT)) != 0
5129 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
5132 /* If this is a paradoxical SUBREG, we have no idea what value the
5133 extra bits would have. However, if the operand is equivalent
5134 to a SUBREG whose operand is the same as our mode, and all the
5135 modes are within a word, we can just use the inner operand
5136 because these SUBREGs just say how to treat the register.
5138 Similarly if we find an integer constant. */
5140 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
5142 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
5143 struct table_elt *elt;
5145 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
5146 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
5147 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
5149 for (elt = elt->first_same_value;
5150 elt; elt = elt->next_same_value)
5152 if (CONSTANT_P (elt->exp)
5153 && GET_MODE (elt->exp) == VOIDmode)
5156 if (GET_CODE (elt->exp) == SUBREG
5157 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5158 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5159 return copy_rtx (SUBREG_REG (elt->exp));
5165 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
5166 We might be able to if the SUBREG is extracting a single word in an
5167 integral mode or extracting the low part. */
5169 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
5170 const_arg0 = equiv_constant (folded_arg0);
5172 folded_arg0 = const_arg0;
5174 if (folded_arg0 != SUBREG_REG (x))
5178 if (GET_MODE_CLASS (mode) == MODE_INT
5179 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5180 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
5181 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
5182 GET_MODE (SUBREG_REG (x)));
5183 if (new == 0 && subreg_lowpart_p (x))
5184 new = gen_lowpart_if_possible (mode, folded_arg0);
5189 /* If this is a narrowing SUBREG and our operand is a REG, see if
5190 we can find an equivalence for REG that is an arithmetic operation
5191 in a wider mode where both operands are paradoxical SUBREGs
5192 from objects of our result mode. In that case, we couldn't report
5193 an equivalent value for that operation, since we don't know what the
5194 extra bits will be. But we can find an equivalence for this SUBREG
5195 by folding that operation is the narrow mode. This allows us to
5196 fold arithmetic in narrow modes when the machine only supports
5197 word-sized arithmetic.
5199 Also look for a case where we have a SUBREG whose operand is the
5200 same as our result. If both modes are smaller than a word, we
5201 are simply interpreting a register in different modes and we
5202 can use the inner value. */
5204 if (GET_CODE (folded_arg0) == REG
5205 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
5206 && subreg_lowpart_p (x))
5208 struct table_elt *elt;
5210 /* We can use HASH here since we know that canon_hash won't be
5212 elt = lookup (folded_arg0,
5213 HASH (folded_arg0, GET_MODE (folded_arg0)),
5214 GET_MODE (folded_arg0));
5217 elt = elt->first_same_value;
5219 for (; elt; elt = elt->next_same_value)
5221 enum rtx_code eltcode = GET_CODE (elt->exp);
5223 /* Just check for unary and binary operations. */
5224 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
5225 && GET_CODE (elt->exp) != SIGN_EXTEND
5226 && GET_CODE (elt->exp) != ZERO_EXTEND
5227 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5228 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
5230 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
5232 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5233 op0 = fold_rtx (op0, NULL_RTX);
5235 op0 = equiv_constant (op0);
5237 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
5240 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
5241 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
5242 && eltcode != DIV && eltcode != MOD
5243 && eltcode != UDIV && eltcode != UMOD
5244 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
5245 && eltcode != ROTATE && eltcode != ROTATERT
5246 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
5247 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
5249 || CONSTANT_P (XEXP (elt->exp, 0)))
5250 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
5251 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
5253 || CONSTANT_P (XEXP (elt->exp, 1))))
5255 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
5256 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
5258 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
5259 op0 = fold_rtx (op0, NULL_RTX);
5262 op0 = equiv_constant (op0);
5264 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
5265 op1 = fold_rtx (op1, NULL_RTX);
5268 op1 = equiv_constant (op1);
5270 /* If we are looking for the low SImode part of
5271 (ashift:DI c (const_int 32)), it doesn't work
5272 to compute that in SImode, because a 32-bit shift
5273 in SImode is unpredictable. We know the value is 0. */
5275 && GET_CODE (elt->exp) == ASHIFT
5276 && GET_CODE (op1) == CONST_INT
5277 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
5279 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
5281 /* If the count fits in the inner mode's width,
5282 but exceeds the outer mode's width,
5283 the value will get truncated to 0
5287 /* If the count exceeds even the inner mode's width,
5288 don't fold this expression. */
5291 else if (op0 && op1)
5292 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
5296 else if (GET_CODE (elt->exp) == SUBREG
5297 && GET_MODE (SUBREG_REG (elt->exp)) == mode
5298 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
5300 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
5301 new = copy_rtx (SUBREG_REG (elt->exp));
5312 /* If we have (NOT Y), see if Y is known to be (NOT Z).
5313 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
5314 new = lookup_as_function (XEXP (x, 0), code);
5316 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
5320 /* If we are not actually processing an insn, don't try to find the
5321 best address. Not only don't we care, but we could modify the
5322 MEM in an invalid way since we have no insn to validate against. */
5324 find_best_addr (insn, &XEXP (x, 0));
5327 /* Even if we don't fold in the insn itself,
5328 we can safely do so here, in hopes of getting a constant. */
5329 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
5331 HOST_WIDE_INT offset = 0;
5333 if (GET_CODE (addr) == REG
5334 && REGNO_QTY_VALID_P (REGNO (addr))
5335 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
5336 && qty_const[REG_QTY (REGNO (addr))] != 0)
5337 addr = qty_const[REG_QTY (REGNO (addr))];
5339 /* If address is constant, split it into a base and integer offset. */
5340 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
5342 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
5343 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
5345 base = XEXP (XEXP (addr, 0), 0);
5346 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
5348 else if (GET_CODE (addr) == LO_SUM
5349 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
5350 base = XEXP (addr, 1);
5351 else if (GET_CODE (addr) == ADDRESSOF)
5352 return change_address (x, VOIDmode, addr);
5354 /* If this is a constant pool reference, we can fold it into its
5355 constant to allow better value tracking. */
5356 if (base && GET_CODE (base) == SYMBOL_REF
5357 && CONSTANT_POOL_ADDRESS_P (base))
5359 rtx constant = get_pool_constant (base);
5360 enum machine_mode const_mode = get_pool_mode (base);
5363 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
5364 constant_pool_entries_cost = COST (constant);
5366 /* If we are loading the full constant, we have an equivalence. */
5367 if (offset == 0 && mode == const_mode)
5370 /* If this actually isn't a constant (weird!), we can't do
5371 anything. Otherwise, handle the two most common cases:
5372 extracting a word from a multi-word constant, and extracting
5373 the low-order bits. Other cases don't seem common enough to
5375 if (! CONSTANT_P (constant))
5378 if (GET_MODE_CLASS (mode) == MODE_INT
5379 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
5380 && offset % UNITS_PER_WORD == 0
5381 && (new = operand_subword (constant,
5382 offset / UNITS_PER_WORD,
5383 0, const_mode)) != 0)
5386 if (((BYTES_BIG_ENDIAN
5387 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
5388 || (! BYTES_BIG_ENDIAN && offset == 0))
5389 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
5393 /* If this is a reference to a label at a known position in a jump
5394 table, we also know its value. */
5395 if (base && GET_CODE (base) == LABEL_REF)
5397 rtx label = XEXP (base, 0);
5398 rtx table_insn = NEXT_INSN (label);
5400 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5401 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
5403 rtx table = PATTERN (table_insn);
5406 && (offset / GET_MODE_SIZE (GET_MODE (table))
5407 < XVECLEN (table, 0)))
5408 return XVECEXP (table, 0,
5409 offset / GET_MODE_SIZE (GET_MODE (table)));
5411 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
5412 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
5414 rtx table = PATTERN (table_insn);
5417 && (offset / GET_MODE_SIZE (GET_MODE (table))
5418 < XVECLEN (table, 1)))
5420 offset /= GET_MODE_SIZE (GET_MODE (table));
5421 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
5424 if (GET_MODE (table) != Pmode)
5425 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
5427 /* Indicate this is a constant. This isn't a
5428 valid form of CONST, but it will only be used
5429 to fold the next insns and then discarded, so
5432 Note this expression must be explicitly discarded,
5433 by cse_insn, else it may end up in a REG_EQUAL note
5434 and "escape" to cause problems elsewhere. */
5435 return gen_rtx_CONST (GET_MODE (new), new);
5444 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
5445 validate_change (insn, &XVECEXP (x, 3, i),
5446 fold_rtx (XVECEXP (x, 3, i), insn), 0);
5456 mode_arg0 = VOIDmode;
5458 /* Try folding our operands.
5459 Then see which ones have constant values known. */
5461 fmt = GET_RTX_FORMAT (code);
5462 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5465 rtx arg = XEXP (x, i);
5466 rtx folded_arg = arg, const_arg = 0;
5467 enum machine_mode mode_arg = GET_MODE (arg);
5468 rtx cheap_arg, expensive_arg;
5469 rtx replacements[2];
5472 /* Most arguments are cheap, so handle them specially. */
5473 switch (GET_CODE (arg))
5476 /* This is the same as calling equiv_constant; it is duplicated
5478 if (REGNO_QTY_VALID_P (REGNO (arg))
5479 && qty_const[REG_QTY (REGNO (arg))] != 0
5480 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
5481 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
5483 = gen_lowpart_if_possible (GET_MODE (arg),
5484 qty_const[REG_QTY (REGNO (arg))]);
5497 folded_arg = prev_insn_cc0;
5498 mode_arg = prev_insn_cc0_mode;
5499 const_arg = equiv_constant (folded_arg);
5504 folded_arg = fold_rtx (arg, insn);
5505 const_arg = equiv_constant (folded_arg);
5508 /* For the first three operands, see if the operand
5509 is constant or equivalent to a constant. */
5513 folded_arg0 = folded_arg;
5514 const_arg0 = const_arg;
5515 mode_arg0 = mode_arg;
5518 folded_arg1 = folded_arg;
5519 const_arg1 = const_arg;
5522 const_arg2 = const_arg;
5526 /* Pick the least expensive of the folded argument and an
5527 equivalent constant argument. */
5528 if (const_arg == 0 || const_arg == folded_arg
5529 || COST (const_arg) > COST (folded_arg))
5530 cheap_arg = folded_arg, expensive_arg = const_arg;
5532 cheap_arg = const_arg, expensive_arg = folded_arg;
5534 /* Try to replace the operand with the cheapest of the two
5535 possibilities. If it doesn't work and this is either of the first
5536 two operands of a commutative operation, try swapping them.
5537 If THAT fails, try the more expensive, provided it is cheaper
5538 than what is already there. */
5540 if (cheap_arg == XEXP (x, i))
5543 if (insn == 0 && ! copied)
5549 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5551 j < 2 && replacements[j]
5552 && COST (replacements[j]) < COST (XEXP (x, i));
5555 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5558 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5560 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5561 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5563 if (apply_change_group ())
5565 /* Swap them back to be invalid so that this loop can
5566 continue and flag them to be swapped back later. */
5569 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5581 /* Don't try to fold inside of a vector of expressions.
5582 Doing nothing is harmless. */
5586 /* If a commutative operation, place a constant integer as the second
5587 operand unless the first operand is also a constant integer. Otherwise,
5588 place any constant second unless the first operand is also a constant. */
5590 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5592 if (must_swap || (const_arg0
5594 || (GET_CODE (const_arg0) == CONST_INT
5595 && GET_CODE (const_arg1) != CONST_INT))))
5597 register rtx tem = XEXP (x, 0);
5599 if (insn == 0 && ! copied)
5605 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5606 validate_change (insn, &XEXP (x, 1), tem, 1);
5607 if (apply_change_group ())
5609 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5610 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5615 /* If X is an arithmetic operation, see if we can simplify it. */
5617 switch (GET_RTX_CLASS (code))
5623 /* We can't simplify extension ops unless we know the
5625 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5626 && mode_arg0 == VOIDmode)
5629 /* If we had a CONST, strip it off and put it back later if we
5631 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
5632 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
5634 new = simplify_unary_operation (code, mode,
5635 const_arg0 ? const_arg0 : folded_arg0,
5637 if (new != 0 && is_const)
5638 new = gen_rtx_CONST (mode, new);
5643 /* See what items are actually being compared and set FOLDED_ARG[01]
5644 to those values and CODE to the actual comparison code. If any are
5645 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5646 do anything if both operands are already known to be constant. */
5648 if (const_arg0 == 0 || const_arg1 == 0)
5650 struct table_elt *p0, *p1;
5651 rtx true = const_true_rtx, false = const0_rtx;
5652 enum machine_mode mode_arg1;
5654 #ifdef FLOAT_STORE_FLAG_VALUE
5655 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5657 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5659 false = CONST0_RTX (mode);
5663 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5664 &mode_arg0, &mode_arg1);
5665 const_arg0 = equiv_constant (folded_arg0);
5666 const_arg1 = equiv_constant (folded_arg1);
5668 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5669 what kinds of things are being compared, so we can't do
5670 anything with this comparison. */
5672 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5675 /* If we do not now have two constants being compared, see
5676 if we can nevertheless deduce some things about the
5678 if (const_arg0 == 0 || const_arg1 == 0)
5680 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
5681 non-explicit constant? These aren't zero, but we
5682 don't know their sign. */
5683 if (const_arg1 == const0_rtx
5684 && (NONZERO_BASE_PLUS_P (folded_arg0)
5685 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5687 || GET_CODE (folded_arg0) == SYMBOL_REF
5689 || GET_CODE (folded_arg0) == LABEL_REF
5690 || GET_CODE (folded_arg0) == CONST))
5694 else if (code == NE)
5698 /* See if the two operands are the same. We don't do this
5699 for IEEE floating-point since we can't assume x == x
5700 since x might be a NaN. */
5702 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
5703 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
5704 && (folded_arg0 == folded_arg1
5705 || (GET_CODE (folded_arg0) == REG
5706 && GET_CODE (folded_arg1) == REG
5707 && (REG_QTY (REGNO (folded_arg0))
5708 == REG_QTY (REGNO (folded_arg1))))
5709 || ((p0 = lookup (folded_arg0,
5710 (safe_hash (folded_arg0, mode_arg0)
5711 % NBUCKETS), mode_arg0))
5712 && (p1 = lookup (folded_arg1,
5713 (safe_hash (folded_arg1, mode_arg0)
5714 % NBUCKETS), mode_arg0))
5715 && p0->first_same_value == p1->first_same_value)))
5716 return ((code == EQ || code == LE || code == GE
5717 || code == LEU || code == GEU)
5720 /* If FOLDED_ARG0 is a register, see if the comparison we are
5721 doing now is either the same as we did before or the reverse
5722 (we only check the reverse if not floating-point). */
5723 else if (GET_CODE (folded_arg0) == REG)
5725 int qty = REG_QTY (REGNO (folded_arg0));
5727 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5728 && (comparison_dominates_p (qty_comparison_code[qty], code)
5729 || (comparison_dominates_p (qty_comparison_code[qty],
5730 reverse_condition (code))
5731 && ! FLOAT_MODE_P (mode_arg0)))
5732 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5734 && rtx_equal_p (qty_comparison_const[qty],
5736 || (GET_CODE (folded_arg1) == REG
5737 && (REG_QTY (REGNO (folded_arg1))
5738 == qty_comparison_qty[qty]))))
5739 return (comparison_dominates_p (qty_comparison_code[qty],
5746 /* If we are comparing against zero, see if the first operand is
5747 equivalent to an IOR with a constant. If so, we may be able to
5748 determine the result of this comparison. */
5750 if (const_arg1 == const0_rtx)
5752 rtx y = lookup_as_function (folded_arg0, IOR);
5756 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5757 && GET_CODE (inner_const) == CONST_INT
5758 && INTVAL (inner_const) != 0)
5760 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
5761 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5762 && (INTVAL (inner_const)
5763 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5764 rtx true = const_true_rtx, false = const0_rtx;
5766 #ifdef FLOAT_STORE_FLAG_VALUE
5767 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5769 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
5771 false = CONST0_RTX (mode);
5795 new = simplify_relational_operation (code, mode_arg0,
5796 const_arg0 ? const_arg0 : folded_arg0,
5797 const_arg1 ? const_arg1 : folded_arg1);
5798 #ifdef FLOAT_STORE_FLAG_VALUE
5799 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5800 new = ((new == const0_rtx) ? CONST0_RTX (mode)
5801 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
5810 /* If the second operand is a LABEL_REF, see if the first is a MINUS
5811 with that LABEL_REF as its second operand. If so, the result is
5812 the first operand of that MINUS. This handles switches with an
5813 ADDR_DIFF_VEC table. */
5814 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5817 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
5818 : lookup_as_function (folded_arg0, MINUS);
5820 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5821 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5824 /* Now try for a CONST of a MINUS like the above. */
5825 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
5826 : lookup_as_function (folded_arg0, CONST))) != 0
5827 && GET_CODE (XEXP (y, 0)) == MINUS
5828 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5829 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
5830 return XEXP (XEXP (y, 0), 0);
5833 /* Likewise if the operands are in the other order. */
5834 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
5837 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
5838 : lookup_as_function (folded_arg1, MINUS);
5840 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5841 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
5844 /* Now try for a CONST of a MINUS like the above. */
5845 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
5846 : lookup_as_function (folded_arg1, CONST))) != 0
5847 && GET_CODE (XEXP (y, 0)) == MINUS
5848 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
5849 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
5850 return XEXP (XEXP (y, 0), 0);
5853 /* If second operand is a register equivalent to a negative
5854 CONST_INT, see if we can find a register equivalent to the
5855 positive constant. Make a MINUS if so. Don't do this for
5856 a non-negative constant since we might then alternate between
5857 chosing positive and negative constants. Having the positive
5858 constant previously-used is the more common case. Be sure
5859 the resulting constant is non-negative; if const_arg1 were
5860 the smallest negative number this would overflow: depending
5861 on the mode, this would either just be the same value (and
5862 hence not save anything) or be incorrect. */
5863 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
5864 && INTVAL (const_arg1) < 0
5865 /* This used to test
5867 - INTVAL (const_arg1) >= 0
5869 But The Sun V5.0 compilers mis-compiled that test. So
5870 instead we test for the problematic value in a more direct
5871 manner and hope the Sun compilers get it correct. */
5872 && INTVAL (const_arg1) !=
5873 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
5874 && GET_CODE (folded_arg1) == REG)
5876 rtx new_const = GEN_INT (- INTVAL (const_arg1));
5878 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
5882 for (p = p->first_same_value; p; p = p->next_same_value)
5883 if (GET_CODE (p->exp) == REG)
5884 return cse_gen_binary (MINUS, mode, folded_arg0,
5885 canon_reg (p->exp, NULL_RTX));
5890 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5891 If so, produce (PLUS Z C2-C). */
5892 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5894 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5895 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
5896 return fold_rtx (plus_constant (copy_rtx (y),
5897 -INTVAL (const_arg1)),
5901 /* ... fall through ... */
5904 case SMIN: case SMAX: case UMIN: case UMAX:
5905 case IOR: case AND: case XOR:
5906 case MULT: case DIV: case UDIV:
5907 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5908 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5909 is known to be of similar form, we may be able to replace the
5910 operation with a combined operation. This may eliminate the
5911 intermediate operation if every use is simplified in this way.
5912 Note that the similar optimization done by combine.c only works
5913 if the intermediate operation's result has only one reference. */
5915 if (GET_CODE (folded_arg0) == REG
5916 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5919 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5920 rtx y = lookup_as_function (folded_arg0, code);
5922 enum rtx_code associate_code;
5926 || 0 == (inner_const
5927 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5928 || GET_CODE (inner_const) != CONST_INT
5929 /* If we have compiled a statement like
5930 "if (x == (x & mask1))", and now are looking at
5931 "x & mask2", we will have a case where the first operand
5932 of Y is the same as our first operand. Unless we detect
5933 this case, an infinite loop will result. */
5934 || XEXP (y, 0) == folded_arg0)
5937 /* Don't associate these operations if they are a PLUS with the
5938 same constant and it is a power of two. These might be doable
5939 with a pre- or post-increment. Similarly for two subtracts of
5940 identical powers of two with post decrement. */
5942 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5943 && ((HAVE_PRE_INCREMENT
5944 && exact_log2 (INTVAL (const_arg1)) >= 0)
5945 || (HAVE_POST_INCREMENT
5946 && exact_log2 (INTVAL (const_arg1)) >= 0)
5947 || (HAVE_PRE_DECREMENT
5948 && exact_log2 (- INTVAL (const_arg1)) >= 0)
5949 || (HAVE_POST_DECREMENT
5950 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
5953 /* Compute the code used to compose the constants. For example,
5954 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5957 = (code == MULT || code == DIV || code == UDIV ? MULT
5958 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5960 new_const = simplify_binary_operation (associate_code, mode,
5961 const_arg1, inner_const);
5966 /* If we are associating shift operations, don't let this
5967 produce a shift of the size of the object or larger.
5968 This could occur when we follow a sign-extend by a right
5969 shift on a machine that does a sign-extend as a pair
5972 if (is_shift && GET_CODE (new_const) == CONST_INT
5973 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5975 /* As an exception, we can turn an ASHIFTRT of this
5976 form into a shift of the number of bits - 1. */
5977 if (code == ASHIFTRT)
5978 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5983 y = copy_rtx (XEXP (y, 0));
5985 /* If Y contains our first operand (the most common way this
5986 can happen is if Y is a MEM), we would do into an infinite
5987 loop if we tried to fold it. So don't in that case. */
5989 if (! reg_mentioned_p (folded_arg0, y))
5990 y = fold_rtx (y, insn);
5992 return cse_gen_binary (code, mode, y, new_const);
6000 new = simplify_binary_operation (code, mode,
6001 const_arg0 ? const_arg0 : folded_arg0,
6002 const_arg1 ? const_arg1 : folded_arg1);
6006 /* (lo_sum (high X) X) is simply X. */
6007 if (code == LO_SUM && const_arg0 != 0
6008 && GET_CODE (const_arg0) == HIGH
6009 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
6015 new = simplify_ternary_operation (code, mode, mode_arg0,
6016 const_arg0 ? const_arg0 : folded_arg0,
6017 const_arg1 ? const_arg1 : folded_arg1,
6018 const_arg2 ? const_arg2 : XEXP (x, 2));
6022 /* Always eliminate CONSTANT_P_RTX at this stage. */
6023 if (code == CONSTANT_P_RTX)
6024 return (const_arg0 ? const1_rtx : const0_rtx);
6028 return new ? new : x;
6031 /* Return a constant value currently equivalent to X.
6032 Return 0 if we don't know one. */
6038 if (GET_CODE (x) == REG
6039 && REGNO_QTY_VALID_P (REGNO (x))
6040 && qty_const[REG_QTY (REGNO (x))])
6041 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
6043 if (x == 0 || CONSTANT_P (x))
6046 /* If X is a MEM, try to fold it outside the context of any insn to see if
6047 it might be equivalent to a constant. That handles the case where it
6048 is a constant-pool reference. Then try to look it up in the hash table
6049 in case it is something whose value we have seen before. */
6051 if (GET_CODE (x) == MEM)
6053 struct table_elt *elt;
6055 x = fold_rtx (x, NULL_RTX);
6059 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
6063 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
6064 if (elt->is_const && CONSTANT_P (elt->exp))
6071 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
6072 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
6073 least-significant part of X.
6074 MODE specifies how big a part of X to return.
6076 If the requested operation cannot be done, 0 is returned.
6078 This is similar to gen_lowpart in emit-rtl.c. */
6081 gen_lowpart_if_possible (mode, x)
6082 enum machine_mode mode;
6085 rtx result = gen_lowpart_common (mode, x);
6089 else if (GET_CODE (x) == MEM)
6091 /* This is the only other case we handle. */
6092 register int offset = 0;
6095 if (WORDS_BIG_ENDIAN)
6096 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
6097 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
6098 if (BYTES_BIG_ENDIAN)
6099 /* Adjust the address so that the address-after-the-data is
6101 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
6102 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
6103 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
6104 if (! memory_address_p (mode, XEXP (new, 0)))
6106 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
6107 MEM_COPY_ATTRIBUTES (new, x);
6114 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
6115 branch. It will be zero if not.
6117 In certain cases, this can cause us to add an equivalence. For example,
6118 if we are following the taken case of
6120 we can add the fact that `i' and '2' are now equivalent.
6122 In any case, we can record that this comparison was passed. If the same
6123 comparison is seen later, we will know its value. */
6126 record_jump_equiv (insn, taken)
6130 int cond_known_true;
6132 enum machine_mode mode, mode0, mode1;
6133 int reversed_nonequality = 0;
6136 /* Ensure this is the right kind of insn. */
6137 if (! condjump_p (insn) || simplejump_p (insn))
6140 /* See if this jump condition is known true or false. */
6142 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
6144 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
6146 /* Get the type of comparison being done and the operands being compared.
6147 If we had to reverse a non-equality condition, record that fact so we
6148 know that it isn't valid for floating-point. */
6149 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
6150 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
6151 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
6153 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
6154 if (! cond_known_true)
6156 reversed_nonequality = (code != EQ && code != NE);
6157 code = reverse_condition (code);
6160 /* The mode is the mode of the non-constant. */
6162 if (mode1 != VOIDmode)
6165 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
6168 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
6169 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
6170 Make any useful entries we can with that information. Called from
6171 above function and called recursively. */
6174 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
6176 enum machine_mode mode;
6178 int reversed_nonequality;
6180 unsigned op0_hash, op1_hash;
6181 int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
6182 struct table_elt *op0_elt, *op1_elt;
6184 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
6185 we know that they are also equal in the smaller mode (this is also
6186 true for all smaller modes whether or not there is a SUBREG, but
6187 is not worth testing for with no SUBREG). */
6189 /* Note that GET_MODE (op0) may not equal MODE. */
6190 if (code == EQ && GET_CODE (op0) == SUBREG
6191 && (GET_MODE_SIZE (GET_MODE (op0))
6192 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6194 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6195 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6197 record_jump_cond (code, mode, SUBREG_REG (op0),
6198 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6199 reversed_nonequality);
6202 if (code == EQ && GET_CODE (op1) == SUBREG
6203 && (GET_MODE_SIZE (GET_MODE (op1))
6204 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6206 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6207 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6209 record_jump_cond (code, mode, SUBREG_REG (op1),
6210 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6211 reversed_nonequality);
6214 /* Similarly, if this is an NE comparison, and either is a SUBREG
6215 making a smaller mode, we know the whole thing is also NE. */
6217 /* Note that GET_MODE (op0) may not equal MODE;
6218 if we test MODE instead, we can get an infinite recursion
6219 alternating between two modes each wider than MODE. */
6221 if (code == NE && GET_CODE (op0) == SUBREG
6222 && subreg_lowpart_p (op0)
6223 && (GET_MODE_SIZE (GET_MODE (op0))
6224 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
6226 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
6227 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
6229 record_jump_cond (code, mode, SUBREG_REG (op0),
6230 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
6231 reversed_nonequality);
6234 if (code == NE && GET_CODE (op1) == SUBREG
6235 && subreg_lowpart_p (op1)
6236 && (GET_MODE_SIZE (GET_MODE (op1))
6237 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
6239 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
6240 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
6242 record_jump_cond (code, mode, SUBREG_REG (op1),
6243 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
6244 reversed_nonequality);
6247 /* Hash both operands. */
6250 hash_arg_in_memory = 0;
6251 hash_arg_in_struct = 0;
6252 op0_hash = HASH (op0, mode);
6253 op0_in_memory = hash_arg_in_memory;
6254 op0_in_struct = hash_arg_in_struct;
6260 hash_arg_in_memory = 0;
6261 hash_arg_in_struct = 0;
6262 op1_hash = HASH (op1, mode);
6263 op1_in_memory = hash_arg_in_memory;
6264 op1_in_struct = hash_arg_in_struct;
6269 /* Look up both operands. */
6270 op0_elt = lookup (op0, op0_hash, mode);
6271 op1_elt = lookup (op1, op1_hash, mode);
6273 /* If both operands are already equivalent or if they are not in the
6274 table but are identical, do nothing. */
6275 if ((op0_elt != 0 && op1_elt != 0
6276 && op0_elt->first_same_value == op1_elt->first_same_value)
6277 || op0 == op1 || rtx_equal_p (op0, op1))
6280 /* If we aren't setting two things equal all we can do is save this
6281 comparison. Similarly if this is floating-point. In the latter
6282 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
6283 If we record the equality, we might inadvertently delete code
6284 whose intent was to change -0 to +0. */
6286 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
6288 /* If we reversed a floating-point comparison, if OP0 is not a
6289 register, or if OP1 is neither a register or constant, we can't
6292 if (GET_CODE (op1) != REG)
6293 op1 = equiv_constant (op1);
6295 if ((reversed_nonequality && FLOAT_MODE_P (mode))
6296 || GET_CODE (op0) != REG || op1 == 0)
6299 /* Put OP0 in the hash table if it isn't already. This gives it a
6300 new quantity number. */
6303 if (insert_regs (op0, NULL_PTR, 0))
6305 rehash_using_reg (op0);
6306 op0_hash = HASH (op0, mode);
6308 /* If OP0 is contained in OP1, this changes its hash code
6309 as well. Faster to rehash than to check, except
6310 for the simple case of a constant. */
6311 if (! CONSTANT_P (op1))
6312 op1_hash = HASH (op1,mode);
6315 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6316 op0_elt->in_memory = op0_in_memory;
6317 op0_elt->in_struct = op0_in_struct;
6320 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
6321 if (GET_CODE (op1) == REG)
6323 /* Look it up again--in case op0 and op1 are the same. */
6324 op1_elt = lookup (op1, op1_hash, mode);
6326 /* Put OP1 in the hash table so it gets a new quantity number. */
6329 if (insert_regs (op1, NULL_PTR, 0))
6331 rehash_using_reg (op1);
6332 op1_hash = HASH (op1, mode);
6335 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6336 op1_elt->in_memory = op1_in_memory;
6337 op1_elt->in_struct = op1_in_struct;
6340 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
6341 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
6345 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
6346 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
6352 /* If either side is still missing an equivalence, make it now,
6353 then merge the equivalences. */
6357 if (insert_regs (op0, NULL_PTR, 0))
6359 rehash_using_reg (op0);
6360 op0_hash = HASH (op0, mode);
6363 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
6364 op0_elt->in_memory = op0_in_memory;
6365 op0_elt->in_struct = op0_in_struct;
6370 if (insert_regs (op1, NULL_PTR, 0))
6372 rehash_using_reg (op1);
6373 op1_hash = HASH (op1, mode);
6376 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
6377 op1_elt->in_memory = op1_in_memory;
6378 op1_elt->in_struct = op1_in_struct;
6381 merge_equiv_classes (op0_elt, op1_elt);
6382 last_jump_equiv_class = op0_elt;
6385 /* CSE processing for one instruction.
6386 First simplify sources and addresses of all assignments
6387 in the instruction, using previously-computed equivalents values.
6388 Then install the new sources and destinations in the table
6389 of available values.
6391 If LIBCALL_INSN is nonzero, don't record any equivalence made in
6392 the insn. It means that INSN is inside libcall block. In this
6393 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
6395 /* Data on one SET contained in the instruction. */
6399 /* The SET rtx itself. */
6401 /* The SET_SRC of the rtx (the original value, if it is changing). */
6403 /* The hash-table element for the SET_SRC of the SET. */
6404 struct table_elt *src_elt;
6405 /* Hash value for the SET_SRC. */
6407 /* Hash value for the SET_DEST. */
6409 /* The SET_DEST, with SUBREG, etc., stripped. */
6411 /* Place where the pointer to the INNER_DEST was found. */
6412 rtx *inner_dest_loc;
6413 /* Nonzero if the SET_SRC is in memory. */
6415 /* Nonzero if the SET_SRC is in a structure. */
6417 /* Nonzero if the SET_SRC contains something
6418 whose value cannot be predicted and understood. */
6420 /* Original machine mode, in case it becomes a CONST_INT. */
6421 enum machine_mode mode;
6422 /* A constant equivalent for SET_SRC, if any. */
6424 /* Hash value of constant equivalent for SET_SRC. */
6425 unsigned src_const_hash;
6426 /* Table entry for constant equivalent for SET_SRC, if any. */
6427 struct table_elt *src_const_elt;
6431 cse_insn (insn, libcall_insn)
6435 register rtx x = PATTERN (insn);
6438 register int n_sets = 0;
6441 /* Records what this insn does to set CC0. */
6442 rtx this_insn_cc0 = 0;
6443 enum machine_mode this_insn_cc0_mode = VOIDmode;
6447 struct table_elt *src_eqv_elt = 0;
6448 int src_eqv_volatile;
6449 int src_eqv_in_memory;
6450 int src_eqv_in_struct;
6451 unsigned src_eqv_hash;
6457 /* Find all the SETs and CLOBBERs in this instruction.
6458 Record all the SETs in the array `set' and count them.
6459 Also determine whether there is a CLOBBER that invalidates
6460 all memory references, or all references at varying addresses. */
6462 if (GET_CODE (insn) == CALL_INSN)
6464 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
6465 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
6466 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
6469 if (GET_CODE (x) == SET)
6471 sets = (struct set *) alloca (sizeof (struct set));
6474 /* Ignore SETs that are unconditional jumps.
6475 They never need cse processing, so this does not hurt.
6476 The reason is not efficiency but rather
6477 so that we can test at the end for instructions
6478 that have been simplified to unconditional jumps
6479 and not be misled by unchanged instructions
6480 that were unconditional jumps to begin with. */
6481 if (SET_DEST (x) == pc_rtx
6482 && GET_CODE (SET_SRC (x)) == LABEL_REF)
6485 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
6486 The hard function value register is used only once, to copy to
6487 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
6488 Ensure we invalidate the destination register. On the 80386 no
6489 other code would invalidate it since it is a fixed_reg.
6490 We need not check the return of apply_change_group; see canon_reg. */
6492 else if (GET_CODE (SET_SRC (x)) == CALL)
6494 canon_reg (SET_SRC (x), insn);
6495 apply_change_group ();
6496 fold_rtx (SET_SRC (x), insn);
6497 invalidate (SET_DEST (x), VOIDmode);
6502 else if (GET_CODE (x) == PARALLEL)
6504 register int lim = XVECLEN (x, 0);
6506 sets = (struct set *) alloca (lim * sizeof (struct set));
6508 /* Find all regs explicitly clobbered in this insn,
6509 and ensure they are not replaced with any other regs
6510 elsewhere in this insn.
6511 When a reg that is clobbered is also used for input,
6512 we should presume that that is for a reason,
6513 and we should not substitute some other register
6514 which is not supposed to be clobbered.
6515 Therefore, this loop cannot be merged into the one below
6516 because a CALL may precede a CLOBBER and refer to the
6517 value clobbered. We must not let a canonicalization do
6518 anything in that case. */
6519 for (i = 0; i < lim; i++)
6521 register rtx y = XVECEXP (x, 0, i);
6522 if (GET_CODE (y) == CLOBBER)
6524 rtx clobbered = XEXP (y, 0);
6526 if (GET_CODE (clobbered) == REG
6527 || GET_CODE (clobbered) == SUBREG)
6528 invalidate (clobbered, VOIDmode);
6529 else if (GET_CODE (clobbered) == STRICT_LOW_PART
6530 || GET_CODE (clobbered) == ZERO_EXTRACT)
6531 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
6535 for (i = 0; i < lim; i++)
6537 register rtx y = XVECEXP (x, 0, i);
6538 if (GET_CODE (y) == SET)
6540 /* As above, we ignore unconditional jumps and call-insns and
6541 ignore the result of apply_change_group. */
6542 if (GET_CODE (SET_SRC (y)) == CALL)
6544 canon_reg (SET_SRC (y), insn);
6545 apply_change_group ();
6546 fold_rtx (SET_SRC (y), insn);
6547 invalidate (SET_DEST (y), VOIDmode);
6549 else if (SET_DEST (y) == pc_rtx
6550 && GET_CODE (SET_SRC (y)) == LABEL_REF)
6553 sets[n_sets++].rtl = y;
6555 else if (GET_CODE (y) == CLOBBER)
6557 /* If we clobber memory, canon the address.
6558 This does nothing when a register is clobbered
6559 because we have already invalidated the reg. */
6560 if (GET_CODE (XEXP (y, 0)) == MEM)
6561 canon_reg (XEXP (y, 0), NULL_RTX);
6563 else if (GET_CODE (y) == USE
6564 && ! (GET_CODE (XEXP (y, 0)) == REG
6565 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
6566 canon_reg (y, NULL_RTX);
6567 else if (GET_CODE (y) == CALL)
6569 /* The result of apply_change_group can be ignored; see
6571 canon_reg (y, insn);
6572 apply_change_group ();
6577 else if (GET_CODE (x) == CLOBBER)
6579 if (GET_CODE (XEXP (x, 0)) == MEM)
6580 canon_reg (XEXP (x, 0), NULL_RTX);
6583 /* Canonicalize a USE of a pseudo register or memory location. */
6584 else if (GET_CODE (x) == USE
6585 && ! (GET_CODE (XEXP (x, 0)) == REG
6586 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
6587 canon_reg (XEXP (x, 0), NULL_RTX);
6588 else if (GET_CODE (x) == CALL)
6590 /* The result of apply_change_group can be ignored; see canon_reg. */
6591 canon_reg (x, insn);
6592 apply_change_group ();
6596 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
6597 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
6598 is handled specially for this case, and if it isn't set, then there will
6599 be no equivalence for the destination. */
6600 if (n_sets == 1 && REG_NOTES (insn) != 0
6601 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
6602 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
6603 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
6604 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
6606 /* Canonicalize sources and addresses of destinations.
6607 We do this in a separate pass to avoid problems when a MATCH_DUP is
6608 present in the insn pattern. In that case, we want to ensure that
6609 we don't break the duplicate nature of the pattern. So we will replace
6610 both operands at the same time. Otherwise, we would fail to find an
6611 equivalent substitution in the loop calling validate_change below.
6613 We used to suppress canonicalization of DEST if it appears in SRC,
6614 but we don't do this any more. */
6616 for (i = 0; i < n_sets; i++)
6618 rtx dest = SET_DEST (sets[i].rtl);
6619 rtx src = SET_SRC (sets[i].rtl);
6620 rtx new = canon_reg (src, insn);
6623 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
6624 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
6625 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
6626 || (insn_code = recog_memoized (insn)) < 0
6627 || insn_n_dups[insn_code] > 0)
6628 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
6630 SET_SRC (sets[i].rtl) = new;
6632 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
6634 validate_change (insn, &XEXP (dest, 1),
6635 canon_reg (XEXP (dest, 1), insn), 1);
6636 validate_change (insn, &XEXP (dest, 2),
6637 canon_reg (XEXP (dest, 2), insn), 1);
6640 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
6641 || GET_CODE (dest) == ZERO_EXTRACT
6642 || GET_CODE (dest) == SIGN_EXTRACT)
6643 dest = XEXP (dest, 0);
6645 if (GET_CODE (dest) == MEM)
6646 canon_reg (dest, insn);
6649 /* Now that we have done all the replacements, we can apply the change
6650 group and see if they all work. Note that this will cause some
6651 canonicalizations that would have worked individually not to be applied
6652 because some other canonicalization didn't work, but this should not
6655 The result of apply_change_group can be ignored; see canon_reg. */
6657 apply_change_group ();
6659 /* Set sets[i].src_elt to the class each source belongs to.
6660 Detect assignments from or to volatile things
6661 and set set[i] to zero so they will be ignored
6662 in the rest of this function.
6664 Nothing in this loop changes the hash table or the register chains. */
6666 for (i = 0; i < n_sets; i++)
6668 register rtx src, dest;
6669 register rtx src_folded;
6670 register struct table_elt *elt = 0, *p;
6671 enum machine_mode mode;
6674 rtx src_related = 0;
6675 struct table_elt *src_const_elt = 0;
6676 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6677 int src_related_cost = 10000, src_elt_cost = 10000;
6678 /* Set non-zero if we need to call force_const_mem on with the
6679 contents of src_folded before using it. */
6680 int src_folded_force_flag = 0;
6682 dest = SET_DEST (sets[i].rtl);
6683 src = SET_SRC (sets[i].rtl);
6685 /* If SRC is a constant that has no machine mode,
6686 hash it with the destination's machine mode.
6687 This way we can keep different modes separate. */
6689 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6690 sets[i].mode = mode;
6694 enum machine_mode eqvmode = mode;
6695 if (GET_CODE (dest) == STRICT_LOW_PART)
6696 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6698 hash_arg_in_memory = 0;
6699 hash_arg_in_struct = 0;
6700 src_eqv = fold_rtx (src_eqv, insn);
6701 src_eqv_hash = HASH (src_eqv, eqvmode);
6703 /* Find the equivalence class for the equivalent expression. */
6706 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
6708 src_eqv_volatile = do_not_record;
6709 src_eqv_in_memory = hash_arg_in_memory;
6710 src_eqv_in_struct = hash_arg_in_struct;
6713 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6714 value of the INNER register, not the destination. So it is not
6715 a valid substitution for the source. But save it for later. */
6716 if (GET_CODE (dest) == STRICT_LOW_PART)
6719 src_eqv_here = src_eqv;
6721 /* Simplify and foldable subexpressions in SRC. Then get the fully-
6722 simplified result, which may not necessarily be valid. */
6723 src_folded = fold_rtx (src, insn);
6726 /* ??? This caused bad code to be generated for the m68k port with -O2.
6727 Suppose src is (CONST_INT -1), and that after truncation src_folded
6728 is (CONST_INT 3). Suppose src_folded is then used for src_const.
6729 At the end we will add src and src_const to the same equivalence
6730 class. We now have 3 and -1 on the same equivalence class. This
6731 causes later instructions to be mis-optimized. */
6732 /* If storing a constant in a bitfield, pre-truncate the constant
6733 so we will be able to record it later. */
6734 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6735 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6737 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6739 if (GET_CODE (src) == CONST_INT
6740 && GET_CODE (width) == CONST_INT
6741 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6742 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6744 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6745 << INTVAL (width)) - 1));
6749 /* Compute SRC's hash code, and also notice if it
6750 should not be recorded at all. In that case,
6751 prevent any further processing of this assignment. */
6753 hash_arg_in_memory = 0;
6754 hash_arg_in_struct = 0;
6757 sets[i].src_hash = HASH (src, mode);
6758 sets[i].src_volatile = do_not_record;
6759 sets[i].src_in_memory = hash_arg_in_memory;
6760 sets[i].src_in_struct = hash_arg_in_struct;
6762 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
6763 a pseudo that is set more than once, do not record SRC. Using
6764 SRC as a replacement for anything else will be incorrect in that
6765 situation. Note that this usually occurs only for stack slots,
6766 in which case all the RTL would be referring to SRC, so we don't
6767 lose any optimization opportunities by not having SRC in the
6770 if (GET_CODE (src) == MEM
6771 && find_reg_note (insn, REG_EQUIV, src) != 0
6772 && GET_CODE (dest) == REG
6773 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
6774 && REG_N_SETS (REGNO (dest)) != 1)
6775 sets[i].src_volatile = 1;
6778 /* It is no longer clear why we used to do this, but it doesn't
6779 appear to still be needed. So let's try without it since this
6780 code hurts cse'ing widened ops. */
6781 /* If source is a perverse subreg (such as QI treated as an SI),
6782 treat it as volatile. It may do the work of an SI in one context
6783 where the extra bits are not being used, but cannot replace an SI
6785 if (GET_CODE (src) == SUBREG
6786 && (GET_MODE_SIZE (GET_MODE (src))
6787 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6788 sets[i].src_volatile = 1;
6791 /* Locate all possible equivalent forms for SRC. Try to replace
6792 SRC in the insn with each cheaper equivalent.
6794 We have the following types of equivalents: SRC itself, a folded
6795 version, a value given in a REG_EQUAL note, or a value related
6798 Each of these equivalents may be part of an additional class
6799 of equivalents (if more than one is in the table, they must be in
6800 the same class; we check for this).
6802 If the source is volatile, we don't do any table lookups.
6804 We note any constant equivalent for possible later use in a
6807 if (!sets[i].src_volatile)
6808 elt = lookup (src, sets[i].src_hash, mode);
6810 sets[i].src_elt = elt;
6812 if (elt && src_eqv_here && src_eqv_elt)
6814 if (elt->first_same_value != src_eqv_elt->first_same_value)
6816 /* The REG_EQUAL is indicating that two formerly distinct
6817 classes are now equivalent. So merge them. */
6818 merge_equiv_classes (elt, src_eqv_elt);
6819 src_eqv_hash = HASH (src_eqv, elt->mode);
6820 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
6826 else if (src_eqv_elt)
6829 /* Try to find a constant somewhere and record it in `src_const'.
6830 Record its table element, if any, in `src_const_elt'. Look in
6831 any known equivalences first. (If the constant is not in the
6832 table, also set `sets[i].src_const_hash'). */
6834 for (p = elt->first_same_value; p; p = p->next_same_value)
6838 src_const_elt = elt;
6843 && (CONSTANT_P (src_folded)
6844 /* Consider (minus (label_ref L1) (label_ref L2)) as
6845 "constant" here so we will record it. This allows us
6846 to fold switch statements when an ADDR_DIFF_VEC is used. */
6847 || (GET_CODE (src_folded) == MINUS
6848 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6849 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6850 src_const = src_folded, src_const_elt = elt;
6851 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6852 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6854 /* If we don't know if the constant is in the table, get its
6855 hash code and look it up. */
6856 if (src_const && src_const_elt == 0)
6858 sets[i].src_const_hash = HASH (src_const, mode);
6859 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
6862 sets[i].src_const = src_const;
6863 sets[i].src_const_elt = src_const_elt;
6865 /* If the constant and our source are both in the table, mark them as
6866 equivalent. Otherwise, if a constant is in the table but the source
6867 isn't, set ELT to it. */
6868 if (src_const_elt && elt
6869 && src_const_elt->first_same_value != elt->first_same_value)
6870 merge_equiv_classes (elt, src_const_elt);
6871 else if (src_const_elt && elt == 0)
6872 elt = src_const_elt;
6874 /* See if there is a register linearly related to a constant
6875 equivalent of SRC. */
6877 && (GET_CODE (src_const) == CONST
6878 || (src_const_elt && src_const_elt->related_value != 0)))
6880 src_related = use_related_value (src_const, src_const_elt);
6883 struct table_elt *src_related_elt
6884 = lookup (src_related, HASH (src_related, mode), mode);
6885 if (src_related_elt && elt)
6887 if (elt->first_same_value
6888 != src_related_elt->first_same_value)
6889 /* This can occur when we previously saw a CONST
6890 involving a SYMBOL_REF and then see the SYMBOL_REF
6891 twice. Merge the involved classes. */
6892 merge_equiv_classes (elt, src_related_elt);
6895 src_related_elt = 0;
6897 else if (src_related_elt && elt == 0)
6898 elt = src_related_elt;
6902 /* See if we have a CONST_INT that is already in a register in a
6905 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6906 && GET_MODE_CLASS (mode) == MODE_INT
6907 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6909 enum machine_mode wider_mode;
6911 for (wider_mode = GET_MODE_WIDER_MODE (mode);
6912 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6913 && src_related == 0;
6914 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6916 struct table_elt *const_elt
6917 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6922 for (const_elt = const_elt->first_same_value;
6923 const_elt; const_elt = const_elt->next_same_value)
6924 if (GET_CODE (const_elt->exp) == REG)
6926 src_related = gen_lowpart_if_possible (mode,
6933 /* Another possibility is that we have an AND with a constant in
6934 a mode narrower than a word. If so, it might have been generated
6935 as part of an "if" which would narrow the AND. If we already
6936 have done the AND in a wider mode, we can use a SUBREG of that
6939 if (flag_expensive_optimizations && ! src_related
6940 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6941 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6943 enum machine_mode tmode;
6944 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
6946 for (tmode = GET_MODE_WIDER_MODE (mode);
6947 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6948 tmode = GET_MODE_WIDER_MODE (tmode))
6950 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6951 struct table_elt *larger_elt;
6955 PUT_MODE (new_and, tmode);
6956 XEXP (new_and, 0) = inner;
6957 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6958 if (larger_elt == 0)
6961 for (larger_elt = larger_elt->first_same_value;
6962 larger_elt; larger_elt = larger_elt->next_same_value)
6963 if (GET_CODE (larger_elt->exp) == REG)
6966 = gen_lowpart_if_possible (mode, larger_elt->exp);
6976 #ifdef LOAD_EXTEND_OP
6977 /* See if a MEM has already been loaded with a widening operation;
6978 if it has, we can use a subreg of that. Many CISC machines
6979 also have such operations, but this is only likely to be
6980 beneficial these machines. */
6982 if (flag_expensive_optimizations && src_related == 0
6983 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6984 && GET_MODE_CLASS (mode) == MODE_INT
6985 && GET_CODE (src) == MEM && ! do_not_record
6986 && LOAD_EXTEND_OP (mode) != NIL)
6988 enum machine_mode tmode;
6990 /* Set what we are trying to extend and the operation it might
6991 have been extended with. */
6992 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
6993 XEXP (memory_extend_rtx, 0) = src;
6995 for (tmode = GET_MODE_WIDER_MODE (mode);
6996 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6997 tmode = GET_MODE_WIDER_MODE (tmode))
6999 struct table_elt *larger_elt;
7001 PUT_MODE (memory_extend_rtx, tmode);
7002 larger_elt = lookup (memory_extend_rtx,
7003 HASH (memory_extend_rtx, tmode), tmode);
7004 if (larger_elt == 0)
7007 for (larger_elt = larger_elt->first_same_value;
7008 larger_elt; larger_elt = larger_elt->next_same_value)
7009 if (GET_CODE (larger_elt->exp) == REG)
7011 src_related = gen_lowpart_if_possible (mode,
7020 #endif /* LOAD_EXTEND_OP */
7022 if (src == src_folded)
7025 /* At this point, ELT, if non-zero, points to a class of expressions
7026 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
7027 and SRC_RELATED, if non-zero, each contain additional equivalent
7028 expressions. Prune these latter expressions by deleting expressions
7029 already in the equivalence class.
7031 Check for an equivalent identical to the destination. If found,
7032 this is the preferred equivalent since it will likely lead to
7033 elimination of the insn. Indicate this by placing it in
7036 if (elt) elt = elt->first_same_value;
7037 for (p = elt; p; p = p->next_same_value)
7039 enum rtx_code code = GET_CODE (p->exp);
7041 /* If the expression is not valid, ignore it. Then we do not
7042 have to check for validity below. In most cases, we can use
7043 `rtx_equal_p', since canonicalization has already been done. */
7044 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
7047 /* Also skip paradoxical subregs, unless that's what we're
7050 && (GET_MODE_SIZE (GET_MODE (p->exp))
7051 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
7053 && GET_CODE (src) == SUBREG
7054 && GET_MODE (src) == GET_MODE (p->exp)
7055 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7056 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
7059 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
7061 else if (src_folded && GET_CODE (src_folded) == code
7062 && rtx_equal_p (src_folded, p->exp))
7064 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
7065 && rtx_equal_p (src_eqv_here, p->exp))
7067 else if (src_related && GET_CODE (src_related) == code
7068 && rtx_equal_p (src_related, p->exp))
7071 /* This is the same as the destination of the insns, we want
7072 to prefer it. Copy it to src_related. The code below will
7073 then give it a negative cost. */
7074 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
7079 /* Find the cheapest valid equivalent, trying all the available
7080 possibilities. Prefer items not in the hash table to ones
7081 that are when they are equal cost. Note that we can never
7082 worsen an insn as the current contents will also succeed.
7083 If we find an equivalent identical to the destination, use it as best,
7084 since this insn will probably be eliminated in that case. */
7087 if (rtx_equal_p (src, dest))
7090 src_cost = COST (src);
7095 if (rtx_equal_p (src_eqv_here, dest))
7098 src_eqv_cost = COST (src_eqv_here);
7103 if (rtx_equal_p (src_folded, dest))
7104 src_folded_cost = -1;
7106 src_folded_cost = COST (src_folded);
7111 if (rtx_equal_p (src_related, dest))
7112 src_related_cost = -1;
7114 src_related_cost = COST (src_related);
7117 /* If this was an indirect jump insn, a known label will really be
7118 cheaper even though it looks more expensive. */
7119 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
7120 src_folded = src_const, src_folded_cost = -1;
7122 /* Terminate loop when replacement made. This must terminate since
7123 the current contents will be tested and will always be valid. */
7128 /* Skip invalid entries. */
7129 while (elt && GET_CODE (elt->exp) != REG
7130 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7131 elt = elt->next_same_value;
7133 /* A paradoxical subreg would be bad here: it'll be the right
7134 size, but later may be adjusted so that the upper bits aren't
7135 what we want. So reject it. */
7137 && GET_CODE (elt->exp) == SUBREG
7138 && (GET_MODE_SIZE (GET_MODE (elt->exp))
7139 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
7140 /* It is okay, though, if the rtx we're trying to match
7141 will ignore any of the bits we can't predict. */
7143 && GET_CODE (src) == SUBREG
7144 && GET_MODE (src) == GET_MODE (elt->exp)
7145 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
7146 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
7148 elt = elt->next_same_value;
7152 if (elt) src_elt_cost = elt->cost;
7154 /* Find cheapest and skip it for the next time. For items
7155 of equal cost, use this order:
7156 src_folded, src, src_eqv, src_related and hash table entry. */
7157 if (src_folded_cost <= src_cost
7158 && src_folded_cost <= src_eqv_cost
7159 && src_folded_cost <= src_related_cost
7160 && src_folded_cost <= src_elt_cost)
7162 trial = src_folded, src_folded_cost = 10000;
7163 if (src_folded_force_flag)
7164 trial = force_const_mem (mode, trial);
7166 else if (src_cost <= src_eqv_cost
7167 && src_cost <= src_related_cost
7168 && src_cost <= src_elt_cost)
7169 trial = src, src_cost = 10000;
7170 else if (src_eqv_cost <= src_related_cost
7171 && src_eqv_cost <= src_elt_cost)
7172 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
7173 else if (src_related_cost <= src_elt_cost)
7174 trial = copy_rtx (src_related), src_related_cost = 10000;
7177 trial = copy_rtx (elt->exp);
7178 elt = elt->next_same_value;
7179 src_elt_cost = 10000;
7182 /* We don't normally have an insn matching (set (pc) (pc)), so
7183 check for this separately here. We will delete such an
7186 Tablejump insns contain a USE of the table, so simply replacing
7187 the operand with the constant won't match. This is simply an
7188 unconditional branch, however, and is therefore valid. Just
7189 insert the substitution here and we will delete and re-emit
7192 /* Keep track of the original SET_SRC so that we can fix notes
7193 on libcall instructions. */
7194 old_src = SET_SRC (sets[i].rtl);
7196 if (n_sets == 1 && dest == pc_rtx
7198 || (GET_CODE (trial) == LABEL_REF
7199 && ! condjump_p (insn))))
7201 /* If TRIAL is a label in front of a jump table, we are
7202 really falling through the switch (this is how casesi
7203 insns work), so we must branch around the table. */
7204 if (GET_CODE (trial) == CODE_LABEL
7205 && NEXT_INSN (trial) != 0
7206 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
7207 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
7208 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
7210 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
7212 SET_SRC (sets[i].rtl) = trial;
7213 cse_jumps_altered = 1;
7217 /* Look for a substitution that makes a valid insn. */
7218 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
7220 /* If we just made a substitution inside a libcall, then we
7221 need to make the same substitution in any notes attached
7222 to the RETVAL insn. */
7224 && (GET_CODE (old_src) == REG
7225 || GET_CODE (old_src) == SUBREG
7226 || GET_CODE (old_src) == MEM))
7227 replace_rtx (REG_NOTES (libcall_insn), old_src,
7228 canon_reg (SET_SRC (sets[i].rtl), insn));
7230 /* The result of apply_change_group can be ignored; see
7233 validate_change (insn, &SET_SRC (sets[i].rtl),
7234 canon_reg (SET_SRC (sets[i].rtl), insn),
7236 apply_change_group ();
7240 /* If we previously found constant pool entries for
7241 constants and this is a constant, try making a
7242 pool entry. Put it in src_folded unless we already have done
7243 this since that is where it likely came from. */
7245 else if (constant_pool_entries_cost
7246 && CONSTANT_P (trial)
7247 && ! (GET_CODE (trial) == CONST
7248 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
7250 || (GET_CODE (src_folded) != MEM
7251 && ! src_folded_force_flag))
7252 && GET_MODE_CLASS (mode) != MODE_CC
7253 && mode != VOIDmode)
7255 src_folded_force_flag = 1;
7257 src_folded_cost = constant_pool_entries_cost;
7261 src = SET_SRC (sets[i].rtl);
7263 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
7264 However, there is an important exception: If both are registers
7265 that are not the head of their equivalence class, replace SET_SRC
7266 with the head of the class. If we do not do this, we will have
7267 both registers live over a portion of the basic block. This way,
7268 their lifetimes will likely abut instead of overlapping. */
7269 if (GET_CODE (dest) == REG
7270 && REGNO_QTY_VALID_P (REGNO (dest))
7271 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
7272 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
7273 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
7274 /* Don't do this if the original insn had a hard reg as
7276 && (GET_CODE (sets[i].src) != REG
7277 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
7278 /* We can't call canon_reg here because it won't do anything if
7279 SRC is a hard register. */
7281 int first = qty_first_reg[REG_QTY (REGNO (src))];
7283 = (first >= FIRST_PSEUDO_REGISTER
7284 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
7286 /* We must use validate-change even for this, because this
7287 might be a special no-op instruction, suitable only to
7289 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
7292 /* If we had a constant that is cheaper than what we are now
7293 setting SRC to, use that constant. We ignored it when we
7294 thought we could make this into a no-op. */
7295 if (src_const && COST (src_const) < COST (src)
7296 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
7302 /* If we made a change, recompute SRC values. */
7303 if (src != sets[i].src)
7306 hash_arg_in_memory = 0;
7307 hash_arg_in_struct = 0;
7309 sets[i].src_hash = HASH (src, mode);
7310 sets[i].src_volatile = do_not_record;
7311 sets[i].src_in_memory = hash_arg_in_memory;
7312 sets[i].src_in_struct = hash_arg_in_struct;
7313 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
7316 /* If this is a single SET, we are setting a register, and we have an
7317 equivalent constant, we want to add a REG_NOTE. We don't want
7318 to write a REG_EQUAL note for a constant pseudo since verifying that
7319 that pseudo hasn't been eliminated is a pain. Such a note also
7320 won't help anything.
7322 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
7323 which can be created for a reference to a compile time computable
7324 entry in a jump table. */
7326 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
7327 && GET_CODE (src_const) != REG
7328 && ! (GET_CODE (src_const) == CONST
7329 && GET_CODE (XEXP (src_const, 0)) == MINUS
7330 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
7331 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
7333 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7335 /* Make sure that the rtx is not shared with any other insn. */
7336 src_const = copy_rtx (src_const);
7338 /* Record the actual constant value in a REG_EQUAL note, making
7339 a new one if one does not already exist. */
7341 XEXP (tem, 0) = src_const;
7343 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
7344 src_const, REG_NOTES (insn));
7346 /* If storing a constant value in a register that
7347 previously held the constant value 0,
7348 record this fact with a REG_WAS_0 note on this insn.
7350 Note that the *register* is required to have previously held 0,
7351 not just any register in the quantity and we must point to the
7352 insn that set that register to zero.
7354 Rather than track each register individually, we just see if
7355 the last set for this quantity was for this register. */
7357 if (REGNO_QTY_VALID_P (REGNO (dest))
7358 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
7360 /* See if we previously had a REG_WAS_0 note. */
7361 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7362 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
7364 if ((tem = single_set (const_insn)) != 0
7365 && rtx_equal_p (SET_DEST (tem), dest))
7368 XEXP (note, 0) = const_insn;
7370 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_WAS_0,
7377 /* Now deal with the destination. */
7379 sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
7381 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
7382 to the MEM or REG within it. */
7383 while (GET_CODE (dest) == SIGN_EXTRACT
7384 || GET_CODE (dest) == ZERO_EXTRACT
7385 || GET_CODE (dest) == SUBREG
7386 || GET_CODE (dest) == STRICT_LOW_PART)
7388 sets[i].inner_dest_loc = &XEXP (dest, 0);
7389 dest = XEXP (dest, 0);
7392 sets[i].inner_dest = dest;
7394 if (GET_CODE (dest) == MEM)
7396 #ifdef PUSH_ROUNDING
7397 /* Stack pushes invalidate the stack pointer. */
7398 rtx addr = XEXP (dest, 0);
7399 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7400 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7401 && XEXP (addr, 0) == stack_pointer_rtx)
7402 invalidate (stack_pointer_rtx, Pmode);
7404 dest = fold_rtx (dest, insn);
7407 /* Compute the hash code of the destination now,
7408 before the effects of this instruction are recorded,
7409 since the register values used in the address computation
7410 are those before this instruction. */
7411 sets[i].dest_hash = HASH (dest, mode);
7413 /* Don't enter a bit-field in the hash table
7414 because the value in it after the store
7415 may not equal what was stored, due to truncation. */
7417 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
7418 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
7420 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
7422 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
7423 && GET_CODE (width) == CONST_INT
7424 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
7425 && ! (INTVAL (src_const)
7426 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
7427 /* Exception: if the value is constant,
7428 and it won't be truncated, record it. */
7432 /* This is chosen so that the destination will be invalidated
7433 but no new value will be recorded.
7434 We must invalidate because sometimes constant
7435 values can be recorded for bitfields. */
7436 sets[i].src_elt = 0;
7437 sets[i].src_volatile = 1;
7443 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
7445 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
7447 PUT_CODE (insn, NOTE);
7448 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7449 NOTE_SOURCE_FILE (insn) = 0;
7450 cse_jumps_altered = 1;
7451 /* One less use of the label this insn used to jump to. */
7452 if (JUMP_LABEL (insn) != 0)
7453 --LABEL_NUSES (JUMP_LABEL (insn));
7454 /* No more processing for this set. */
7458 /* If this SET is now setting PC to a label, we know it used to
7459 be a conditional or computed branch. So we see if we can follow
7460 it. If it was a computed branch, delete it and re-emit. */
7461 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
7465 /* If this is not in the format for a simple branch and
7466 we are the only SET in it, re-emit it. */
7467 if (! simplejump_p (insn) && n_sets == 1)
7469 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
7470 JUMP_LABEL (new) = XEXP (src, 0);
7471 LABEL_NUSES (XEXP (src, 0))++;
7475 /* Otherwise, force rerecognition, since it probably had
7476 a different pattern before.
7477 This shouldn't really be necessary, since whatever
7478 changed the source value above should have done this.
7479 Until the right place is found, might as well do this here. */
7480 INSN_CODE (insn) = -1;
7482 /* Now emit a BARRIER after the unconditional jump. Do not bother
7483 deleting any unreachable code, let jump/flow do that. */
7484 if (NEXT_INSN (insn) != 0
7485 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
7486 emit_barrier_after (insn);
7488 cse_jumps_altered = 1;
7492 /* If destination is volatile, invalidate it and then do no further
7493 processing for this assignment. */
7495 else if (do_not_record)
7497 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7498 || GET_CODE (dest) == MEM)
7499 invalidate (dest, VOIDmode);
7500 else if (GET_CODE (dest) == STRICT_LOW_PART
7501 || GET_CODE (dest) == ZERO_EXTRACT)
7502 invalidate (XEXP (dest, 0), GET_MODE (dest));
7506 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
7507 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
7510 /* If setting CC0, record what it was set to, or a constant, if it
7511 is equivalent to a constant. If it is being set to a floating-point
7512 value, make a COMPARE with the appropriate constant of 0. If we
7513 don't do this, later code can interpret this as a test against
7514 const0_rtx, which can cause problems if we try to put it into an
7515 insn as a floating-point operand. */
7516 if (dest == cc0_rtx)
7518 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
7519 this_insn_cc0_mode = mode;
7520 if (FLOAT_MODE_P (mode))
7521 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
7527 /* Now enter all non-volatile source expressions in the hash table
7528 if they are not already present.
7529 Record their equivalence classes in src_elt.
7530 This way we can insert the corresponding destinations into
7531 the same classes even if the actual sources are no longer in them
7532 (having been invalidated). */
7534 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
7535 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
7537 register struct table_elt *elt;
7538 register struct table_elt *classp = sets[0].src_elt;
7539 rtx dest = SET_DEST (sets[0].rtl);
7540 enum machine_mode eqvmode = GET_MODE (dest);
7542 if (GET_CODE (dest) == STRICT_LOW_PART)
7544 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
7547 if (insert_regs (src_eqv, classp, 0))
7549 rehash_using_reg (src_eqv);
7550 src_eqv_hash = HASH (src_eqv, eqvmode);
7552 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
7553 elt->in_memory = src_eqv_in_memory;
7554 elt->in_struct = src_eqv_in_struct;
7557 /* Check to see if src_eqv_elt is the same as a set source which
7558 does not yet have an elt, and if so set the elt of the set source
7560 for (i = 0; i < n_sets; i++)
7561 if (sets[i].rtl && sets[i].src_elt == 0
7562 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
7563 sets[i].src_elt = src_eqv_elt;
7566 for (i = 0; i < n_sets; i++)
7567 if (sets[i].rtl && ! sets[i].src_volatile
7568 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
7570 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
7572 /* REG_EQUAL in setting a STRICT_LOW_PART
7573 gives an equivalent for the entire destination register,
7574 not just for the subreg being stored in now.
7575 This is a more interesting equivalence, so we arrange later
7576 to treat the entire reg as the destination. */
7577 sets[i].src_elt = src_eqv_elt;
7578 sets[i].src_hash = src_eqv_hash;
7582 /* Insert source and constant equivalent into hash table, if not
7584 register struct table_elt *classp = src_eqv_elt;
7585 register rtx src = sets[i].src;
7586 register rtx dest = SET_DEST (sets[i].rtl);
7587 enum machine_mode mode
7588 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
7590 /* Don't put a hard register source into the table if this is
7591 the last insn of a libcall. */
7592 if (sets[i].src_elt == 0
7593 && (GET_CODE (src) != REG
7594 || REGNO (src) >= FIRST_PSEUDO_REGISTER
7595 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX)))
7597 register struct table_elt *elt;
7599 /* Note that these insert_regs calls cannot remove
7600 any of the src_elt's, because they would have failed to
7601 match if not still valid. */
7602 if (insert_regs (src, classp, 0))
7604 rehash_using_reg (src);
7605 sets[i].src_hash = HASH (src, mode);
7607 elt = insert (src, classp, sets[i].src_hash, mode);
7608 elt->in_memory = sets[i].src_in_memory;
7609 elt->in_struct = sets[i].src_in_struct;
7610 sets[i].src_elt = classp = elt;
7613 if (sets[i].src_const && sets[i].src_const_elt == 0
7614 && src != sets[i].src_const
7615 && ! rtx_equal_p (sets[i].src_const, src))
7616 sets[i].src_elt = insert (sets[i].src_const, classp,
7617 sets[i].src_const_hash, mode);
7620 else if (sets[i].src_elt == 0)
7621 /* If we did not insert the source into the hash table (e.g., it was
7622 volatile), note the equivalence class for the REG_EQUAL value, if any,
7623 so that the destination goes into that class. */
7624 sets[i].src_elt = src_eqv_elt;
7626 invalidate_from_clobbers (x);
7628 /* Some registers are invalidated by subroutine calls. Memory is
7629 invalidated by non-constant calls. */
7631 if (GET_CODE (insn) == CALL_INSN)
7633 if (! CONST_CALL_P (insn))
7634 invalidate_memory ();
7635 invalidate_for_call ();
7638 /* Now invalidate everything set by this instruction.
7639 If a SUBREG or other funny destination is being set,
7640 sets[i].rtl is still nonzero, so here we invalidate the reg
7641 a part of which is being set. */
7643 for (i = 0; i < n_sets; i++)
7646 /* We can't use the inner dest, because the mode associated with
7647 a ZERO_EXTRACT is significant. */
7648 register rtx dest = SET_DEST (sets[i].rtl);
7650 /* Needed for registers to remove the register from its
7651 previous quantity's chain.
7652 Needed for memory if this is a nonvarying address, unless
7653 we have just done an invalidate_memory that covers even those. */
7654 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7655 || GET_CODE (dest) == MEM)
7656 invalidate (dest, VOIDmode);
7657 else if (GET_CODE (dest) == STRICT_LOW_PART
7658 || GET_CODE (dest) == ZERO_EXTRACT)
7659 invalidate (XEXP (dest, 0), GET_MODE (dest));
7662 /* A volatile ASM invalidates everything. */
7663 if (GET_CODE (insn) == INSN
7664 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
7665 && MEM_VOLATILE_P (PATTERN (insn)))
7666 flush_hash_table ();
7668 /* Make sure registers mentioned in destinations
7669 are safe for use in an expression to be inserted.
7670 This removes from the hash table
7671 any invalid entry that refers to one of these registers.
7673 We don't care about the return value from mention_regs because
7674 we are going to hash the SET_DEST values unconditionally. */
7676 for (i = 0; i < n_sets; i++)
7680 rtx x = SET_DEST (sets[i].rtl);
7682 if (GET_CODE (x) != REG)
7686 /* We used to rely on all references to a register becoming
7687 inaccessible when a register changes to a new quantity,
7688 since that changes the hash code. However, that is not
7689 safe, since after NBUCKETS new quantities we get a
7690 hash 'collision' of a register with its own invalid
7691 entries. And since SUBREGs have been changed not to
7692 change their hash code with the hash code of the register,
7693 it wouldn't work any longer at all. So we have to check
7694 for any invalid references lying around now.
7695 This code is similar to the REG case in mention_regs,
7696 but it knows that reg_tick has been incremented, and
7697 it leaves reg_in_table as -1 . */
7698 register int regno = REGNO (x);
7699 register int endregno
7700 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
7701 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
7704 for (i = regno; i < endregno; i++)
7706 if (REG_IN_TABLE (i) >= 0)
7708 remove_invalid_refs (i);
7709 REG_IN_TABLE (i) = -1;
7716 /* We may have just removed some of the src_elt's from the hash table.
7717 So replace each one with the current head of the same class. */
7719 for (i = 0; i < n_sets; i++)
7722 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
7723 /* If elt was removed, find current head of same class,
7724 or 0 if nothing remains of that class. */
7726 register struct table_elt *elt = sets[i].src_elt;
7728 while (elt && elt->prev_same_value)
7729 elt = elt->prev_same_value;
7731 while (elt && elt->first_same_value == 0)
7732 elt = elt->next_same_value;
7733 sets[i].src_elt = elt ? elt->first_same_value : 0;
7737 /* Now insert the destinations into their equivalence classes. */
7739 for (i = 0; i < n_sets; i++)
7742 register rtx dest = SET_DEST (sets[i].rtl);
7743 rtx inner_dest = sets[i].inner_dest;
7744 register struct table_elt *elt;
7746 /* Don't record value if we are not supposed to risk allocating
7747 floating-point values in registers that might be wider than
7749 if ((flag_float_store
7750 && GET_CODE (dest) == MEM
7751 && FLOAT_MODE_P (GET_MODE (dest)))
7752 /* Don't record BLKmode values, because we don't know the
7753 size of it, and can't be sure that other BLKmode values
7754 have the same or smaller size. */
7755 || GET_MODE (dest) == BLKmode
7756 /* Don't record values of destinations set inside a libcall block
7757 since we might delete the libcall. Things should have been set
7758 up so we won't want to reuse such a value, but we play it safe
7761 /* If we didn't put a REG_EQUAL value or a source into the hash
7762 table, there is no point is recording DEST. */
7763 || sets[i].src_elt == 0
7764 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
7765 or SIGN_EXTEND, don't record DEST since it can cause
7766 some tracking to be wrong.
7768 ??? Think about this more later. */
7769 || (GET_CODE (dest) == SUBREG
7770 && (GET_MODE_SIZE (GET_MODE (dest))
7771 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7772 && (GET_CODE (sets[i].src) == SIGN_EXTEND
7773 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
7776 /* STRICT_LOW_PART isn't part of the value BEING set,
7777 and neither is the SUBREG inside it.
7778 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
7779 if (GET_CODE (dest) == STRICT_LOW_PART)
7780 dest = SUBREG_REG (XEXP (dest, 0));
7782 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
7783 /* Registers must also be inserted into chains for quantities. */
7784 if (insert_regs (dest, sets[i].src_elt, 1))
7786 /* If `insert_regs' changes something, the hash code must be
7788 rehash_using_reg (dest);
7789 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
7792 if (GET_CODE (inner_dest) == MEM
7793 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
7794 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
7795 that (MEM (ADDRESSOF (X))) is equivalent to Y.
7796 Consider the case in which the address of the MEM is
7797 passed to a function, which alters the MEM. Then, if we
7798 later use Y instead of the MEM we'll miss the update. */
7799 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
7801 elt = insert (dest, sets[i].src_elt,
7802 sets[i].dest_hash, GET_MODE (dest));
7804 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
7805 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
7806 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
7811 /* This implicitly assumes a whole struct
7812 need not have MEM_IN_STRUCT_P.
7813 But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
7814 elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
7815 || sets[i].inner_dest != SET_DEST (sets[i].rtl));
7818 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
7819 narrower than M2, and both M1 and M2 are the same number of words,
7820 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
7821 make that equivalence as well.
7823 However, BAR may have equivalences for which gen_lowpart_if_possible
7824 will produce a simpler value than gen_lowpart_if_possible applied to
7825 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
7826 BAR's equivalences. If we don't get a simplified form, make
7827 the SUBREG. It will not be used in an equivalence, but will
7828 cause two similar assignments to be detected.
7830 Note the loop below will find SUBREG_REG (DEST) since we have
7831 already entered SRC and DEST of the SET in the table. */
7833 if (GET_CODE (dest) == SUBREG
7834 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
7836 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
7837 && (GET_MODE_SIZE (GET_MODE (dest))
7838 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
7839 && sets[i].src_elt != 0)
7841 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
7842 struct table_elt *elt, *classp = 0;
7844 for (elt = sets[i].src_elt->first_same_value; elt;
7845 elt = elt->next_same_value)
7849 struct table_elt *src_elt;
7851 /* Ignore invalid entries. */
7852 if (GET_CODE (elt->exp) != REG
7853 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7856 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7858 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
7860 src_hash = HASH (new_src, new_mode);
7861 src_elt = lookup (new_src, src_hash, new_mode);
7863 /* Put the new source in the hash table is if isn't
7867 if (insert_regs (new_src, classp, 0))
7869 rehash_using_reg (new_src);
7870 src_hash = HASH (new_src, new_mode);
7872 src_elt = insert (new_src, classp, src_hash, new_mode);
7873 src_elt->in_memory = elt->in_memory;
7874 src_elt->in_struct = elt->in_struct;
7876 else if (classp && classp != src_elt->first_same_value)
7877 /* Show that two things that we've seen before are
7878 actually the same. */
7879 merge_equiv_classes (src_elt, classp);
7881 classp = src_elt->first_same_value;
7882 /* Ignore invalid entries. */
7884 && GET_CODE (classp->exp) != REG
7885 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
7886 classp = classp->next_same_value;
7891 /* Special handling for (set REG0 REG1)
7892 where REG0 is the "cheapest", cheaper than REG1.
7893 After cse, REG1 will probably not be used in the sequel,
7894 so (if easily done) change this insn to (set REG1 REG0) and
7895 replace REG1 with REG0 in the previous insn that computed their value.
7896 Then REG1 will become a dead store and won't cloud the situation
7897 for later optimizations.
7899 Do not make this change if REG1 is a hard register, because it will
7900 then be used in the sequel and we may be changing a two-operand insn
7901 into a three-operand insn.
7903 Also do not do this if we are operating on a copy of INSN.
7905 Also don't do this if INSN ends a libcall; this would cause an unrelated
7906 register to be set in the middle of a libcall, and we then get bad code
7907 if the libcall is deleted. */
7909 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7910 && NEXT_INSN (PREV_INSN (insn)) == insn
7911 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7912 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7913 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7914 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
7915 == REGNO (SET_DEST (sets[0].rtl)))
7916 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
7918 rtx prev = PREV_INSN (insn);
7919 while (prev && GET_CODE (prev) == NOTE)
7920 prev = PREV_INSN (prev);
7922 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7923 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7925 rtx dest = SET_DEST (sets[0].rtl);
7926 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
7928 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7929 validate_change (insn, & SET_DEST (sets[0].rtl),
7930 SET_SRC (sets[0].rtl), 1);
7931 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7932 apply_change_group ();
7934 /* If REG1 was equivalent to a constant, REG0 is not. */
7936 PUT_REG_NOTE_KIND (note, REG_EQUAL);
7938 /* If there was a REG_WAS_0 note on PREV, remove it. Move
7939 any REG_WAS_0 note on INSN to PREV. */
7940 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
7942 remove_note (prev, note);
7944 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
7947 remove_note (insn, note);
7948 XEXP (note, 1) = REG_NOTES (prev);
7949 REG_NOTES (prev) = note;
7952 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
7953 then we must delete it, because the value in REG0 has changed. */
7954 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7955 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
7956 remove_note (insn, note);
7960 /* If this is a conditional jump insn, record any known equivalences due to
7961 the condition being tested. */
7963 last_jump_equiv_class = 0;
7964 if (GET_CODE (insn) == JUMP_INSN
7965 && n_sets == 1 && GET_CODE (x) == SET
7966 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7967 record_jump_equiv (insn, 0);
7970 /* If the previous insn set CC0 and this insn no longer references CC0,
7971 delete the previous insn. Here we use the fact that nothing expects CC0
7972 to be valid over an insn, which is true until the final pass. */
7973 if (prev_insn && GET_CODE (prev_insn) == INSN
7974 && (tem = single_set (prev_insn)) != 0
7975 && SET_DEST (tem) == cc0_rtx
7976 && ! reg_mentioned_p (cc0_rtx, x))
7978 PUT_CODE (prev_insn, NOTE);
7979 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7980 NOTE_SOURCE_FILE (prev_insn) = 0;
7983 prev_insn_cc0 = this_insn_cc0;
7984 prev_insn_cc0_mode = this_insn_cc0_mode;
7990 /* Remove from the hash table all expressions that reference memory. */
7992 invalidate_memory ()
7995 register struct table_elt *p, *next;
7997 for (i = 0; i < NBUCKETS; i++)
7998 for (p = table[i]; p; p = next)
8000 next = p->next_same_hash;
8002 remove_from_table (p, i);
8006 /* XXX ??? The name of this function bears little resemblance to
8007 what this function actually does. FIXME. */
8009 note_mem_written (addr)
8012 /* Pushing or popping the stack invalidates just the stack pointer. */
8013 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
8014 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
8015 && GET_CODE (XEXP (addr, 0)) == REG
8016 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
8018 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
8019 REG_TICK (STACK_POINTER_REGNUM)++;
8021 /* This should be *very* rare. */
8022 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
8023 invalidate (stack_pointer_rtx, VOIDmode);
8029 /* Perform invalidation on the basis of everything about an insn
8030 except for invalidating the actual places that are SET in it.
8031 This includes the places CLOBBERed, and anything that might
8032 alias with something that is SET or CLOBBERed.
8034 X is the pattern of the insn. */
8037 invalidate_from_clobbers (x)
8040 if (GET_CODE (x) == CLOBBER)
8042 rtx ref = XEXP (x, 0);
8045 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8046 || GET_CODE (ref) == MEM)
8047 invalidate (ref, VOIDmode);
8048 else if (GET_CODE (ref) == STRICT_LOW_PART
8049 || GET_CODE (ref) == ZERO_EXTRACT)
8050 invalidate (XEXP (ref, 0), GET_MODE (ref));
8053 else if (GET_CODE (x) == PARALLEL)
8056 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
8058 register rtx y = XVECEXP (x, 0, i);
8059 if (GET_CODE (y) == CLOBBER)
8061 rtx ref = XEXP (y, 0);
8062 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
8063 || GET_CODE (ref) == MEM)
8064 invalidate (ref, VOIDmode);
8065 else if (GET_CODE (ref) == STRICT_LOW_PART
8066 || GET_CODE (ref) == ZERO_EXTRACT)
8067 invalidate (XEXP (ref, 0), GET_MODE (ref));
8073 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
8074 and replace any registers in them with either an equivalent constant
8075 or the canonical form of the register. If we are inside an address,
8076 only do this if the address remains valid.
8078 OBJECT is 0 except when within a MEM in which case it is the MEM.
8080 Return the replacement for X. */
8083 cse_process_notes (x, object)
8087 enum rtx_code code = GET_CODE (x);
8088 char *fmt = GET_RTX_FORMAT (code);
8104 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
8109 if (REG_NOTE_KIND (x) == REG_EQUAL)
8110 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
8112 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
8119 rtx new = cse_process_notes (XEXP (x, 0), object);
8120 /* We don't substitute VOIDmode constants into these rtx,
8121 since they would impede folding. */
8122 if (GET_MODE (new) != VOIDmode)
8123 validate_change (object, &XEXP (x, 0), new, 0);
8128 i = REG_QTY (REGNO (x));
8130 /* Return a constant or a constant register. */
8131 if (REGNO_QTY_VALID_P (REGNO (x))
8132 && qty_const[i] != 0
8133 && (CONSTANT_P (qty_const[i])
8134 || GET_CODE (qty_const[i]) == REG))
8136 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
8141 /* Otherwise, canonicalize this register. */
8142 return canon_reg (x, NULL_RTX);
8148 for (i = 0; i < GET_RTX_LENGTH (code); i++)
8150 validate_change (object, &XEXP (x, i),
8151 cse_process_notes (XEXP (x, i), object), 0);
8156 /* Find common subexpressions between the end test of a loop and the beginning
8157 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
8159 Often we have a loop where an expression in the exit test is used
8160 in the body of the loop. For example "while (*p) *q++ = *p++;".
8161 Because of the way we duplicate the loop exit test in front of the loop,
8162 however, we don't detect that common subexpression. This will be caught
8163 when global cse is implemented, but this is a quite common case.
8165 This function handles the most common cases of these common expressions.
8166 It is called after we have processed the basic block ending with the
8167 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
8168 jumps to a label used only once. */
8171 cse_around_loop (loop_start)
8176 struct table_elt *p;
8178 /* If the jump at the end of the loop doesn't go to the start, we don't
8180 for (insn = PREV_INSN (loop_start);
8181 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
8182 insn = PREV_INSN (insn))
8186 || GET_CODE (insn) != NOTE
8187 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
8190 /* If the last insn of the loop (the end test) was an NE comparison,
8191 we will interpret it as an EQ comparison, since we fell through
8192 the loop. Any equivalences resulting from that comparison are
8193 therefore not valid and must be invalidated. */
8194 if (last_jump_equiv_class)
8195 for (p = last_jump_equiv_class->first_same_value; p;
8196 p = p->next_same_value)
8198 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
8199 || (GET_CODE (p->exp) == SUBREG
8200 && GET_CODE (SUBREG_REG (p->exp)) == REG))
8201 invalidate (p->exp, VOIDmode);
8202 else if (GET_CODE (p->exp) == STRICT_LOW_PART
8203 || GET_CODE (p->exp) == ZERO_EXTRACT)
8204 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
8207 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
8208 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
8210 The only thing we do with SET_DEST is invalidate entries, so we
8211 can safely process each SET in order. It is slightly less efficient
8212 to do so, but we only want to handle the most common cases.
8214 The gen_move_insn call in cse_set_around_loop may create new pseudos.
8215 These pseudos won't have valid entries in any of the tables indexed
8216 by register number, such as reg_qty. We avoid out-of-range array
8217 accesses by not processing any instructions created after cse started. */
8219 for (insn = NEXT_INSN (loop_start);
8220 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
8221 && INSN_UID (insn) < max_insn_uid
8222 && ! (GET_CODE (insn) == NOTE
8223 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
8224 insn = NEXT_INSN (insn))
8226 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8227 && (GET_CODE (PATTERN (insn)) == SET
8228 || GET_CODE (PATTERN (insn)) == CLOBBER))
8229 cse_set_around_loop (PATTERN (insn), insn, loop_start);
8230 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
8231 && GET_CODE (PATTERN (insn)) == PARALLEL)
8232 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8233 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
8234 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
8235 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
8240 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
8241 since they are done elsewhere. This function is called via note_stores. */
8244 invalidate_skipped_set (dest, set)
8248 enum rtx_code code = GET_CODE (dest);
8251 && ! note_mem_written (dest) /* If this is not a stack push ... */
8252 /* There are times when an address can appear varying and be a PLUS
8253 during this scan when it would be a fixed address were we to know
8254 the proper equivalences. So invalidate all memory if there is
8255 a BLKmode or nonscalar memory reference or a reference to a
8256 variable address. */
8257 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
8258 || cse_rtx_varies_p (XEXP (dest, 0))))
8260 invalidate_memory ();
8264 if (GET_CODE (set) == CLOBBER
8271 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
8272 invalidate (XEXP (dest, 0), GET_MODE (dest));
8273 else if (code == REG || code == SUBREG || code == MEM)
8274 invalidate (dest, VOIDmode);
8277 /* Invalidate all insns from START up to the end of the function or the
8278 next label. This called when we wish to CSE around a block that is
8279 conditionally executed. */
8282 invalidate_skipped_block (start)
8287 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
8288 insn = NEXT_INSN (insn))
8290 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
8293 if (GET_CODE (insn) == CALL_INSN)
8295 if (! CONST_CALL_P (insn))
8296 invalidate_memory ();
8297 invalidate_for_call ();
8300 invalidate_from_clobbers (PATTERN (insn));
8301 note_stores (PATTERN (insn), invalidate_skipped_set);
8305 /* Used for communication between the following two routines; contains a
8306 value to be checked for modification. */
8308 static rtx cse_check_loop_start_value;
8310 /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
8311 indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
8314 cse_check_loop_start (x, set)
8316 rtx set ATTRIBUTE_UNUSED;
8318 if (cse_check_loop_start_value == 0
8319 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
8322 if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
8323 || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
8324 cse_check_loop_start_value = 0;
8327 /* X is a SET or CLOBBER contained in INSN that was found near the start of
8328 a loop that starts with the label at LOOP_START.
8330 If X is a SET, we see if its SET_SRC is currently in our hash table.
8331 If so, we see if it has a value equal to some register used only in the
8332 loop exit code (as marked by jump.c).
8334 If those two conditions are true, we search backwards from the start of
8335 the loop to see if that same value was loaded into a register that still
8336 retains its value at the start of the loop.
8338 If so, we insert an insn after the load to copy the destination of that
8339 load into the equivalent register and (try to) replace our SET_SRC with that
8342 In any event, we invalidate whatever this SET or CLOBBER modifies. */
8345 cse_set_around_loop (x, insn, loop_start)
8350 struct table_elt *src_elt;
8352 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
8353 are setting PC or CC0 or whose SET_SRC is already a register. */
8354 if (GET_CODE (x) == SET
8355 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
8356 && GET_CODE (SET_SRC (x)) != REG)
8358 src_elt = lookup (SET_SRC (x),
8359 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
8360 GET_MODE (SET_DEST (x)));
8363 for (src_elt = src_elt->first_same_value; src_elt;
8364 src_elt = src_elt->next_same_value)
8365 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
8366 && COST (src_elt->exp) < COST (SET_SRC (x)))
8370 /* Look for an insn in front of LOOP_START that sets
8371 something in the desired mode to SET_SRC (x) before we hit
8372 a label or CALL_INSN. */
8374 for (p = prev_nonnote_insn (loop_start);
8375 p && GET_CODE (p) != CALL_INSN
8376 && GET_CODE (p) != CODE_LABEL;
8377 p = prev_nonnote_insn (p))
8378 if ((set = single_set (p)) != 0
8379 && GET_CODE (SET_DEST (set)) == REG
8380 && GET_MODE (SET_DEST (set)) == src_elt->mode
8381 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
8383 /* We now have to ensure that nothing between P
8384 and LOOP_START modified anything referenced in
8385 SET_SRC (x). We know that nothing within the loop
8386 can modify it, or we would have invalidated it in
8390 cse_check_loop_start_value = SET_SRC (x);
8391 for (q = p; q != loop_start; q = NEXT_INSN (q))
8392 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
8393 note_stores (PATTERN (q), cse_check_loop_start);
8395 /* If nothing was changed and we can replace our
8396 SET_SRC, add an insn after P to copy its destination
8397 to what we will be replacing SET_SRC with. */
8398 if (cse_check_loop_start_value
8399 && validate_change (insn, &SET_SRC (x),
8402 /* If this creates new pseudos, this is unsafe,
8403 because the regno of new pseudo is unsuitable
8404 to index into reg_qty when cse_insn processes
8405 the new insn. Therefore, if a new pseudo was
8406 created, discard this optimization. */
8407 int nregs = max_reg_num ();
8409 = gen_move_insn (src_elt->exp, SET_DEST (set));
8410 if (nregs != max_reg_num ())
8412 if (! validate_change (insn, &SET_SRC (x),
8417 emit_insn_after (move, p);
8424 /* Now invalidate anything modified by X. */
8425 note_mem_written (SET_DEST (x));
8427 /* See comment on similar code in cse_insn for explanation of these tests. */
8428 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
8429 || GET_CODE (SET_DEST (x)) == MEM)
8430 invalidate (SET_DEST (x), VOIDmode);
8431 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
8432 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
8433 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
8436 /* Find the end of INSN's basic block and return its range,
8437 the total number of SETs in all the insns of the block, the last insn of the
8438 block, and the branch path.
8440 The branch path indicates which branches should be followed. If a non-zero
8441 path size is specified, the block should be rescanned and a different set
8442 of branches will be taken. The branch path is only used if
8443 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
8445 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
8446 used to describe the block. It is filled in with the information about
8447 the current block. The incoming structure's branch path, if any, is used
8448 to construct the output branch path. */
8451 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
8453 struct cse_basic_block_data *data;
8460 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
8461 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
8462 int path_size = data->path_size;
8466 /* Update the previous branch path, if any. If the last branch was
8467 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
8468 shorten the path by one and look at the previous branch. We know that
8469 at least one branch must have been taken if PATH_SIZE is non-zero. */
8470 while (path_size > 0)
8472 if (data->path[path_size - 1].status != NOT_TAKEN)
8474 data->path[path_size - 1].status = NOT_TAKEN;
8481 /* Scan to end of this basic block. */
8482 while (p && GET_CODE (p) != CODE_LABEL)
8484 /* Don't cse out the end of a loop. This makes a difference
8485 only for the unusual loops that always execute at least once;
8486 all other loops have labels there so we will stop in any case.
8487 Cse'ing out the end of the loop is dangerous because it
8488 might cause an invariant expression inside the loop
8489 to be reused after the end of the loop. This would make it
8490 hard to move the expression out of the loop in loop.c,
8491 especially if it is one of several equivalent expressions
8492 and loop.c would like to eliminate it.
8494 If we are running after loop.c has finished, we can ignore
8495 the NOTE_INSN_LOOP_END. */
8497 if (! after_loop && GET_CODE (p) == NOTE
8498 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
8501 /* Don't cse over a call to setjmp; on some machines (eg vax)
8502 the regs restored by the longjmp come from
8503 a later time than the setjmp. */
8504 if (GET_CODE (p) == NOTE
8505 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
8508 /* A PARALLEL can have lots of SETs in it,
8509 especially if it is really an ASM_OPERANDS. */
8510 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
8511 && GET_CODE (PATTERN (p)) == PARALLEL)
8512 nsets += XVECLEN (PATTERN (p), 0);
8513 else if (GET_CODE (p) != NOTE)
8516 /* Ignore insns made by CSE; they cannot affect the boundaries of
8519 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
8520 high_cuid = INSN_CUID (p);
8521 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
8522 low_cuid = INSN_CUID (p);
8524 /* See if this insn is in our branch path. If it is and we are to
8526 if (path_entry < path_size && data->path[path_entry].branch == p)
8528 if (data->path[path_entry].status != NOT_TAKEN)
8531 /* Point to next entry in path, if any. */
8535 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
8536 was specified, we haven't reached our maximum path length, there are
8537 insns following the target of the jump, this is the only use of the
8538 jump label, and the target label is preceded by a BARRIER.
8540 Alternatively, we can follow the jump if it branches around a
8541 block of code and there are no other branches into the block.
8542 In this case invalidate_skipped_block will be called to invalidate any
8543 registers set in the block when following the jump. */
8545 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
8546 && GET_CODE (p) == JUMP_INSN
8547 && GET_CODE (PATTERN (p)) == SET
8548 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
8549 && JUMP_LABEL (p) != 0
8550 && LABEL_NUSES (JUMP_LABEL (p)) == 1
8551 && NEXT_INSN (JUMP_LABEL (p)) != 0)
8553 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
8554 if ((GET_CODE (q) != NOTE
8555 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
8556 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
8557 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
8560 /* If we ran into a BARRIER, this code is an extension of the
8561 basic block when the branch is taken. */
8562 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
8564 /* Don't allow ourself to keep walking around an
8565 always-executed loop. */
8566 if (next_real_insn (q) == next)
8572 /* Similarly, don't put a branch in our path more than once. */
8573 for (i = 0; i < path_entry; i++)
8574 if (data->path[i].branch == p)
8577 if (i != path_entry)
8580 data->path[path_entry].branch = p;
8581 data->path[path_entry++].status = TAKEN;
8583 /* This branch now ends our path. It was possible that we
8584 didn't see this branch the last time around (when the
8585 insn in front of the target was a JUMP_INSN that was
8586 turned into a no-op). */
8587 path_size = path_entry;
8590 /* Mark block so we won't scan it again later. */
8591 PUT_MODE (NEXT_INSN (p), QImode);
8593 /* Detect a branch around a block of code. */
8594 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
8598 if (next_real_insn (q) == next)
8604 for (i = 0; i < path_entry; i++)
8605 if (data->path[i].branch == p)
8608 if (i != path_entry)
8611 /* This is no_labels_between_p (p, q) with an added check for
8612 reaching the end of a function (in case Q precedes P). */
8613 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
8614 if (GET_CODE (tmp) == CODE_LABEL)
8619 data->path[path_entry].branch = p;
8620 data->path[path_entry++].status = AROUND;
8622 path_size = path_entry;
8625 /* Mark block so we won't scan it again later. */
8626 PUT_MODE (NEXT_INSN (p), QImode);
8633 data->low_cuid = low_cuid;
8634 data->high_cuid = high_cuid;
8635 data->nsets = nsets;
8638 /* If all jumps in the path are not taken, set our path length to zero
8639 so a rescan won't be done. */
8640 for (i = path_size - 1; i >= 0; i--)
8641 if (data->path[i].status != NOT_TAKEN)
8645 data->path_size = 0;
8647 data->path_size = path_size;
8649 /* End the current branch path. */
8650 data->path[path_size].branch = 0;
8653 /* Perform cse on the instructions of a function.
8654 F is the first instruction.
8655 NREGS is one plus the highest pseudo-reg number used in the instruction.
8657 AFTER_LOOP is 1 if this is the cse call done after loop optimization
8658 (only if -frerun-cse-after-loop).
8660 Returns 1 if jump_optimize should be redone due to simplifications
8661 in conditional jump instructions. */
8664 cse_main (f, nregs, after_loop, file)
8670 struct cse_basic_block_data val;
8671 register rtx insn = f;
8674 cse_jumps_altered = 0;
8675 recorded_label_ref = 0;
8676 constant_pool_entries_cost = 0;
8680 init_alias_analysis ();
8684 max_insn_uid = get_max_uid ();
8686 reg_next_eqv = (int *) alloca (nregs * sizeof (int));
8687 reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
8689 #ifdef LOAD_EXTEND_OP
8691 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
8692 and change the code and mode as appropriate. */
8693 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
8696 /* Discard all the free elements of the previous function
8697 since they are allocated in the temporarily obstack. */
8698 bzero ((char *) table, sizeof table);
8699 free_element_chain = 0;
8700 n_elements_made = 0;
8702 /* Find the largest uid. */
8704 max_uid = get_max_uid ();
8705 uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
8706 bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int));
8708 /* Compute the mapping from uids to cuids.
8709 CUIDs are numbers assigned to insns, like uids,
8710 except that cuids increase monotonically through the code.
8711 Don't assign cuids to line-number NOTEs, so that the distance in cuids
8712 between two insns is not affected by -g. */
8714 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
8716 if (GET_CODE (insn) != NOTE
8717 || NOTE_LINE_NUMBER (insn) < 0)
8718 INSN_CUID (insn) = ++i;
8720 /* Give a line number note the same cuid as preceding insn. */
8721 INSN_CUID (insn) = i;
8724 /* Initialize which registers are clobbered by calls. */
8726 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
8728 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
8729 if ((call_used_regs[i]
8730 /* Used to check !fixed_regs[i] here, but that isn't safe;
8731 fixed regs are still call-clobbered, and sched can get
8732 confused if they can "live across calls".
8734 The frame pointer is always preserved across calls. The arg
8735 pointer is if it is fixed. The stack pointer usually is, unless
8736 RETURN_POPS_ARGS, in which case an explicit CLOBBER
8737 will be present. If we are generating PIC code, the PIC offset
8738 table register is preserved across calls. */
8740 && i != STACK_POINTER_REGNUM
8741 && i != FRAME_POINTER_REGNUM
8742 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
8743 && i != HARD_FRAME_POINTER_REGNUM
8745 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
8746 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
8748 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
8749 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
8753 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
8755 /* Loop over basic blocks.
8756 Compute the maximum number of qty's needed for each basic block
8757 (which is 2 for each SET). */
8761 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
8762 flag_cse_skip_blocks);
8764 /* If this basic block was already processed or has no sets, skip it. */
8765 if (val.nsets == 0 || GET_MODE (insn) == QImode)
8767 PUT_MODE (insn, VOIDmode);
8768 insn = (val.last ? NEXT_INSN (val.last) : 0);
8773 cse_basic_block_start = val.low_cuid;
8774 cse_basic_block_end = val.high_cuid;
8775 max_qty = val.nsets * 2;
8778 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
8779 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
8782 /* Make MAX_QTY bigger to give us room to optimize
8783 past the end of this basic block, if that should prove useful. */
8789 /* If this basic block is being extended by following certain jumps,
8790 (see `cse_end_of_basic_block'), we reprocess the code from the start.
8791 Otherwise, we start after this basic block. */
8792 if (val.path_size > 0)
8793 cse_basic_block (insn, val.last, val.path, 0);
8796 int old_cse_jumps_altered = cse_jumps_altered;
8799 /* When cse changes a conditional jump to an unconditional
8800 jump, we want to reprocess the block, since it will give
8801 us a new branch path to investigate. */
8802 cse_jumps_altered = 0;
8803 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
8804 if (cse_jumps_altered == 0
8805 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
8808 cse_jumps_altered |= old_cse_jumps_altered;
8816 /* Tell refers_to_mem_p that qty_const info is not available. */
8819 if (max_elements_made < n_elements_made)
8820 max_elements_made = n_elements_made;
8822 return cse_jumps_altered || recorded_label_ref;
8825 /* Process a single basic block. FROM and TO and the limits of the basic
8826 block. NEXT_BRANCH points to the branch path when following jumps or
8827 a null path when not following jumps.
8829 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
8830 loop. This is true when we are being called for the last time on a
8831 block and this CSE pass is before loop.c. */
8834 cse_basic_block (from, to, next_branch, around_loop)
8835 register rtx from, to;
8836 struct branch_path *next_branch;
8841 rtx libcall_insn = NULL_RTX;
8844 /* Each of these arrays is undefined before max_reg, so only allocate
8845 the space actually needed and adjust the start below. */
8847 qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8848 qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8849 qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
8850 qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8851 qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8853 = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
8854 qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
8855 qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
8857 qty_first_reg -= max_reg;
8858 qty_last_reg -= max_reg;
8859 qty_mode -= max_reg;
8860 qty_const -= max_reg;
8861 qty_const_insn -= max_reg;
8862 qty_comparison_code -= max_reg;
8863 qty_comparison_qty -= max_reg;
8864 qty_comparison_const -= max_reg;
8868 /* TO might be a label. If so, protect it from being deleted. */
8869 if (to != 0 && GET_CODE (to) == CODE_LABEL)
8872 for (insn = from; insn != to; insn = NEXT_INSN (insn))
8874 register enum rtx_code code = GET_CODE (insn);
8876 /* If we have processed 1,000 insns, flush the hash table to
8877 avoid extreme quadratic behavior. We must not include NOTEs
8878 in the count since there may be more or them when generating
8879 debugging information. If we clear the table at different
8880 times, code generated with -g -O might be different than code
8881 generated with -O but not -g.
8883 ??? This is a real kludge and needs to be done some other way.
8885 if (code != NOTE && num_insns++ > 1000)
8887 flush_hash_table ();
8891 /* See if this is a branch that is part of the path. If so, and it is
8892 to be taken, do so. */
8893 if (next_branch->branch == insn)
8895 enum taken status = next_branch++->status;
8896 if (status != NOT_TAKEN)
8898 if (status == TAKEN)
8899 record_jump_equiv (insn, 1);
8901 invalidate_skipped_block (NEXT_INSN (insn));
8903 /* Set the last insn as the jump insn; it doesn't affect cc0.
8904 Then follow this branch. */
8909 insn = JUMP_LABEL (insn);
8914 if (GET_MODE (insn) == QImode)
8915 PUT_MODE (insn, VOIDmode);
8917 if (GET_RTX_CLASS (code) == 'i')
8921 /* Process notes first so we have all notes in canonical forms when
8922 looking for duplicate operations. */
8924 if (REG_NOTES (insn))
8925 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
8927 /* Track when we are inside in LIBCALL block. Inside such a block,
8928 we do not want to record destinations. The last insn of a
8929 LIBCALL block is not considered to be part of the block, since
8930 its destination is the result of the block and hence should be
8933 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
8934 libcall_insn = XEXP (p, 0);
8935 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
8936 libcall_insn = NULL_RTX;
8938 cse_insn (insn, libcall_insn);
8941 /* If INSN is now an unconditional jump, skip to the end of our
8942 basic block by pretending that we just did the last insn in the
8943 basic block. If we are jumping to the end of our block, show
8944 that we can have one usage of TO. */
8946 if (simplejump_p (insn))
8951 if (JUMP_LABEL (insn) == to)
8954 /* Maybe TO was deleted because the jump is unconditional.
8955 If so, there is nothing left in this basic block. */
8956 /* ??? Perhaps it would be smarter to set TO
8957 to whatever follows this insn,
8958 and pretend the basic block had always ended here. */
8959 if (INSN_DELETED_P (to))
8962 insn = PREV_INSN (to);
8965 /* See if it is ok to keep on going past the label
8966 which used to end our basic block. Remember that we incremented
8967 the count of that label, so we decrement it here. If we made
8968 a jump unconditional, TO_USAGE will be one; in that case, we don't
8969 want to count the use in that jump. */
8971 if (to != 0 && NEXT_INSN (insn) == to
8972 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8974 struct cse_basic_block_data val;
8977 insn = NEXT_INSN (to);
8979 /* If TO was the last insn in the function, we are done. */
8983 /* If TO was preceded by a BARRIER we are done with this block
8984 because it has no continuation. */
8985 prev = prev_nonnote_insn (to);
8986 if (prev && GET_CODE (prev) == BARRIER)
8989 /* Find the end of the following block. Note that we won't be
8990 following branches in this case. */
8993 cse_end_of_basic_block (insn, &val, 0, 0, 0);
8995 /* If the tables we allocated have enough space left
8996 to handle all the SETs in the next basic block,
8997 continue through it. Otherwise, return,
8998 and that block will be scanned individually. */
8999 if (val.nsets * 2 + next_qty > max_qty)
9002 cse_basic_block_start = val.low_cuid;
9003 cse_basic_block_end = val.high_cuid;
9006 /* Prevent TO from being deleted if it is a label. */
9007 if (to != 0 && GET_CODE (to) == CODE_LABEL)
9010 /* Back up so we process the first insn in the extension. */
9011 insn = PREV_INSN (insn);
9015 if (next_qty > max_qty)
9018 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
9019 the previous insn is the only insn that branches to the head of a loop,
9020 we can cse into the loop. Don't do this if we changed the jump
9021 structure of a loop unless we aren't going to be following jumps. */
9023 if ((cse_jumps_altered == 0
9024 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
9025 && around_loop && to != 0
9026 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
9027 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
9028 && JUMP_LABEL (PREV_INSN (to)) != 0
9029 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
9030 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
9032 return to ? NEXT_INSN (to) : 0;
9035 /* Count the number of times registers are used (not set) in X.
9036 COUNTS is an array in which we accumulate the count, INCR is how much
9037 we count each register usage.
9039 Don't count a usage of DEST, which is the SET_DEST of a SET which
9040 contains X in its SET_SRC. This is because such a SET does not
9041 modify the liveness of DEST. */
9044 count_reg_usage (x, counts, dest, incr)
9057 switch (code = GET_CODE (x))
9061 counts[REGNO (x)] += incr;
9074 /* If we are clobbering a MEM, mark any registers inside the address
9076 if (GET_CODE (XEXP (x, 0)) == MEM)
9077 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
9081 /* Unless we are setting a REG, count everything in SET_DEST. */
9082 if (GET_CODE (SET_DEST (x)) != REG)
9083 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
9085 /* If SRC has side-effects, then we can't delete this insn, so the
9086 usage of SET_DEST inside SRC counts.
9088 ??? Strictly-speaking, we might be preserving this insn
9089 because some other SET has side-effects, but that's hard
9090 to do and can't happen now. */
9091 count_reg_usage (SET_SRC (x), counts,
9092 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
9097 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
9099 /* ... falls through ... */
9102 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
9104 /* Things used in a REG_EQUAL note aren't dead since loop may try to
9107 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
9112 if (REG_NOTE_KIND (x) == REG_EQUAL
9113 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
9114 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
9115 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
9122 fmt = GET_RTX_FORMAT (code);
9123 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
9126 count_reg_usage (XEXP (x, i), counts, dest, incr);
9127 else if (fmt[i] == 'E')
9128 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
9129 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
9133 /* Scan all the insns and delete any that are dead; i.e., they store a register
9134 that is never used or they copy a register to itself.
9136 This is used to remove insns made obviously dead by cse, loop or other
9137 optimizations. It improves the heuristics in loop since it won't try to
9138 move dead invariants out of loops or make givs for dead quantities. The
9139 remaining passes of the compilation are also sped up. */
9142 delete_trivially_dead_insns (insns, nreg)
9146 int *counts = (int *) alloca (nreg * sizeof (int));
9152 int in_libcall = 0, dead_libcall = 0;
9154 /* First count the number of times each register is used. */
9155 bzero ((char *) counts, sizeof (int) * nreg);
9156 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
9157 count_reg_usage (insn, counts, NULL_RTX, 1);
9159 /* Go from the last insn to the first and delete insns that only set unused
9160 registers or copy a register to itself. As we delete an insn, remove
9161 usage counts for registers it uses. */
9162 for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
9167 prev = prev_real_insn (insn);
9169 /* Don't delete any insns that are part of a libcall block unless
9170 we can delete the whole libcall block.
9172 Flow or loop might get confused if we did that. Remember
9173 that we are scanning backwards. */
9174 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
9180 /* See if there's a REG_EQUAL note on this insn and try to
9181 replace the source with the REG_EQUAL expression.
9183 We assume that insns with REG_RETVALs can only be reg->reg
9184 copies at this point. */
9185 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
9188 rtx set = single_set (insn);
9190 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
9193 find_reg_note (insn, REG_RETVAL, NULL_RTX));
9198 else if (in_libcall)
9199 live_insn = ! dead_libcall;
9200 else if (GET_CODE (PATTERN (insn)) == SET)
9202 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
9203 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
9207 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
9208 && ! side_effects_p (SET_SRC (PATTERN (insn)))
9209 && ((tem = next_nonnote_insn (insn)) == 0
9210 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9211 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9214 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
9215 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
9216 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
9217 || side_effects_p (SET_SRC (PATTERN (insn))))
9220 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
9221 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
9223 rtx elt = XVECEXP (PATTERN (insn), 0, i);
9225 if (GET_CODE (elt) == SET)
9227 if (GET_CODE (SET_DEST (elt)) == REG
9228 && SET_DEST (elt) == SET_SRC (elt))
9232 else if (GET_CODE (SET_DEST (elt)) == CC0
9233 && ! side_effects_p (SET_SRC (elt))
9234 && ((tem = next_nonnote_insn (insn)) == 0
9235 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
9236 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
9239 else if (GET_CODE (SET_DEST (elt)) != REG
9240 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
9241 || counts[REGNO (SET_DEST (elt))] != 0
9242 || side_effects_p (SET_SRC (elt)))
9245 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
9251 /* If this is a dead insn, delete it and show registers in it aren't
9256 count_reg_usage (insn, counts, NULL_RTX, -1);
9260 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))