2 * Copyright (c) 2001 Wind River Systems
3 * Copyright (c) 1997, 1998, 1999, 2000, 2001
4 * Bill Paul <wpaul@bsdi.com>. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Bill Paul.
17 * 4. Neither the name of the author nor the names of any co-contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
33 * $FreeBSD: src/sys/dev/nge/if_nge.c,v 1.13.2.13 2003/02/05 22:03:57 mbr Exp $
37 * National Semiconductor DP83820/DP83821 gigabit ethernet driver
38 * for FreeBSD. Datasheets are available from:
40 * http://www.national.com/ds/DP/DP83820.pdf
41 * http://www.national.com/ds/DP/DP83821.pdf
43 * These chips are used on several low cost gigabit ethernet NICs
44 * sold by D-Link, Addtron, SMC and Asante. Both parts are
45 * virtually the same, except the 83820 is a 64-bit/32-bit part,
46 * while the 83821 is 32-bit only.
48 * Many cards also use National gigE transceivers, such as the
49 * DP83891, DP83861 and DP83862 gigPHYTER parts. The DP83861 datasheet
50 * contains a full register description that applies to all of these
53 * http://www.national.com/ds/DP/DP83861.pdf
55 * Written by Bill Paul <wpaul@bsdi.com>
56 * BSDi Open Source Solutions
60 * The NatSemi DP83820 and 83821 controllers are enhanced versions
61 * of the NatSemi MacPHYTER 10/100 devices. They support 10, 100
62 * and 1000Mbps speeds with 1000baseX (ten bit interface), MII and GMII
63 * ports. Other features include 8K TX FIFO and 32K RX FIFO, TCP/IP
64 * hardware checksum offload (IPv4 only), VLAN tagging and filtering,
65 * priority TX and RX queues, a 2048 bit multicast hash filter, 4 RX pattern
66 * matching buffers, one perfect address filter buffer and interrupt
67 * moderation. The 83820 supports both 64-bit and 32-bit addressing
68 * and data transfers: the 64-bit support can be toggled on or off
69 * via software. This affects the size of certain fields in the DMA
72 * There are two bugs/misfeatures in the 83820/83821 that I have
75 * - Receive buffers must be aligned on 64-bit boundaries, which means
76 * you must resort to copying data in order to fix up the payload
79 * - In order to transmit jumbo frames larger than 8170 bytes, you have
80 * to turn off transmit checksum offloading, because the chip can't
81 * compute the checksum on an outgoing frame unless it fits entirely
82 * within the TX FIFO, which is only 8192 bytes in size. If you have
83 * TX checksum offload enabled and you transmit attempt to transmit a
84 * frame larger than 8170 bytes, the transmitter will wedge.
86 * To work around the latter problem, TX checksum offload is disabled
87 * if the user selects an MTU larger than 8152 (8170 - 18).
90 #include <sys/param.h>
91 #include <sys/systm.h>
92 #include <sys/sockio.h>
94 #include <sys/malloc.h>
95 #include <sys/kernel.h>
96 #include <sys/socket.h>
99 #include <net/if_arp.h>
100 #include <net/ethernet.h>
101 #include <net/if_dl.h>
102 #include <net/if_media.h>
103 #include <net/if_types.h>
104 #include <net/if_vlan_var.h>
108 #include <vm/vm.h> /* for vtophys */
109 #include <vm/pmap.h> /* for vtophys */
110 #include <machine/clock.h> /* for DELAY */
111 #include <machine/bus_pio.h>
112 #include <machine/bus_memio.h>
113 #include <machine/bus.h>
114 #include <machine/resource.h>
116 #include <sys/rman.h>
118 #include <dev/mii/mii.h>
119 #include <dev/mii/miivar.h>
121 #include <pci/pcireg.h>
122 #include <pci/pcivar.h>
124 #define NGE_USEIOSPACE
126 #include <dev/nge/if_ngereg.h>
128 MODULE_DEPEND(nge, miibus, 1, 1, 1);
130 /* "controller miibus0" required. See GENERIC if you get errors here. */
131 #include "miibus_if.h"
134 static const char rcsid[] =
135 "$FreeBSD: src/sys/dev/nge/if_nge.c,v 1.13.2.13 2003/02/05 22:03:57 mbr Exp $";
138 #define NGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP)
141 * Various supported device vendors/types and their names.
143 static struct nge_type nge_devs[] = {
144 { NGE_VENDORID, NGE_DEVICEID,
145 "National Semiconductor Gigabit Ethernet" },
149 static int nge_probe (device_t);
150 static int nge_attach (device_t);
151 static int nge_detach (device_t);
153 static int nge_alloc_jumbo_mem (struct nge_softc *);
154 static void nge_free_jumbo_mem (struct nge_softc *);
155 static void *nge_jalloc (struct nge_softc *);
156 static void nge_jfree (caddr_t, u_int);
157 static void nge_jref (caddr_t, u_int);
159 static int nge_newbuf (struct nge_softc *,
160 struct nge_desc *, struct mbuf *);
161 static int nge_encap (struct nge_softc *,
162 struct mbuf *, u_int32_t *);
163 static void nge_rxeof (struct nge_softc *);
164 static void nge_txeof (struct nge_softc *);
165 static void nge_intr (void *);
166 static void nge_tick (void *);
167 static void nge_start (struct ifnet *);
168 static int nge_ioctl (struct ifnet *, u_long, caddr_t);
169 static void nge_init (void *);
170 static void nge_stop (struct nge_softc *);
171 static void nge_watchdog (struct ifnet *);
172 static void nge_shutdown (device_t);
173 static int nge_ifmedia_upd (struct ifnet *);
174 static void nge_ifmedia_sts (struct ifnet *, struct ifmediareq *);
176 static void nge_delay (struct nge_softc *);
177 static void nge_eeprom_idle (struct nge_softc *);
178 static void nge_eeprom_putbyte (struct nge_softc *, int);
179 static void nge_eeprom_getword (struct nge_softc *, int, u_int16_t *);
180 static void nge_read_eeprom (struct nge_softc *, caddr_t, int, int, int);
182 static void nge_mii_sync (struct nge_softc *);
183 static void nge_mii_send (struct nge_softc *, u_int32_t, int);
184 static int nge_mii_readreg (struct nge_softc *, struct nge_mii_frame *);
185 static int nge_mii_writereg (struct nge_softc *, struct nge_mii_frame *);
187 static int nge_miibus_readreg (device_t, int, int);
188 static int nge_miibus_writereg (device_t, int, int, int);
189 static void nge_miibus_statchg (device_t);
191 static void nge_setmulti (struct nge_softc *);
192 static u_int32_t nge_crc (struct nge_softc *, caddr_t);
193 static void nge_reset (struct nge_softc *);
194 static int nge_list_rx_init (struct nge_softc *);
195 static int nge_list_tx_init (struct nge_softc *);
197 #ifdef NGE_USEIOSPACE
198 #define NGE_RES SYS_RES_IOPORT
199 #define NGE_RID NGE_PCI_LOIO
201 #define NGE_RES SYS_RES_MEMORY
202 #define NGE_RID NGE_PCI_LOMEM
205 static device_method_t nge_methods[] = {
206 /* Device interface */
207 DEVMETHOD(device_probe, nge_probe),
208 DEVMETHOD(device_attach, nge_attach),
209 DEVMETHOD(device_detach, nge_detach),
210 DEVMETHOD(device_shutdown, nge_shutdown),
213 DEVMETHOD(bus_print_child, bus_generic_print_child),
214 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
217 DEVMETHOD(miibus_readreg, nge_miibus_readreg),
218 DEVMETHOD(miibus_writereg, nge_miibus_writereg),
219 DEVMETHOD(miibus_statchg, nge_miibus_statchg),
224 static driver_t nge_driver = {
227 sizeof(struct nge_softc)
230 static devclass_t nge_devclass;
232 DRIVER_MODULE(if_nge, pci, nge_driver, nge_devclass, 0, 0);
233 DRIVER_MODULE(miibus, nge, miibus_driver, miibus_devclass, 0, 0);
235 #define NGE_SETBIT(sc, reg, x) \
236 CSR_WRITE_4(sc, reg, \
237 CSR_READ_4(sc, reg) | (x))
239 #define NGE_CLRBIT(sc, reg, x) \
240 CSR_WRITE_4(sc, reg, \
241 CSR_READ_4(sc, reg) & ~(x))
244 CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) | x)
247 CSR_WRITE_4(sc, NGE_MEAR, CSR_READ_4(sc, NGE_MEAR) & ~x)
249 static void nge_delay(sc)
250 struct nge_softc *sc;
254 for (idx = (300 / 33) + 1; idx > 0; idx--)
255 CSR_READ_4(sc, NGE_CSR);
260 static void nge_eeprom_idle(sc)
261 struct nge_softc *sc;
265 SIO_SET(NGE_MEAR_EE_CSEL);
267 SIO_SET(NGE_MEAR_EE_CLK);
270 for (i = 0; i < 25; i++) {
271 SIO_CLR(NGE_MEAR_EE_CLK);
273 SIO_SET(NGE_MEAR_EE_CLK);
277 SIO_CLR(NGE_MEAR_EE_CLK);
279 SIO_CLR(NGE_MEAR_EE_CSEL);
281 CSR_WRITE_4(sc, NGE_MEAR, 0x00000000);
287 * Send a read command and address to the EEPROM, check for ACK.
289 static void nge_eeprom_putbyte(sc, addr)
290 struct nge_softc *sc;
295 d = addr | NGE_EECMD_READ;
298 * Feed in each bit and stobe the clock.
300 for (i = 0x400; i; i >>= 1) {
302 SIO_SET(NGE_MEAR_EE_DIN);
304 SIO_CLR(NGE_MEAR_EE_DIN);
307 SIO_SET(NGE_MEAR_EE_CLK);
309 SIO_CLR(NGE_MEAR_EE_CLK);
317 * Read a word of data stored in the EEPROM at address 'addr.'
319 static void nge_eeprom_getword(sc, addr, dest)
320 struct nge_softc *sc;
327 /* Force EEPROM to idle state. */
330 /* Enter EEPROM access mode. */
332 SIO_CLR(NGE_MEAR_EE_CLK);
334 SIO_SET(NGE_MEAR_EE_CSEL);
338 * Send address of word we want to read.
340 nge_eeprom_putbyte(sc, addr);
343 * Start reading bits from EEPROM.
345 for (i = 0x8000; i; i >>= 1) {
346 SIO_SET(NGE_MEAR_EE_CLK);
348 if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_EE_DOUT)
351 SIO_CLR(NGE_MEAR_EE_CLK);
355 /* Turn off EEPROM access mode. */
364 * Read a sequence of words from the EEPROM.
366 static void nge_read_eeprom(sc, dest, off, cnt, swap)
367 struct nge_softc *sc;
374 u_int16_t word = 0, *ptr;
376 for (i = 0; i < cnt; i++) {
377 nge_eeprom_getword(sc, off + i, &word);
378 ptr = (u_int16_t *)(dest + (i * 2));
389 * Sync the PHYs by setting data bit and strobing the clock 32 times.
391 static void nge_mii_sync(sc)
392 struct nge_softc *sc;
396 SIO_SET(NGE_MEAR_MII_DIR|NGE_MEAR_MII_DATA);
398 for (i = 0; i < 32; i++) {
399 SIO_SET(NGE_MEAR_MII_CLK);
401 SIO_CLR(NGE_MEAR_MII_CLK);
409 * Clock a series of bits through the MII.
411 static void nge_mii_send(sc, bits, cnt)
412 struct nge_softc *sc;
418 SIO_CLR(NGE_MEAR_MII_CLK);
420 for (i = (0x1 << (cnt - 1)); i; i >>= 1) {
422 SIO_SET(NGE_MEAR_MII_DATA);
424 SIO_CLR(NGE_MEAR_MII_DATA);
427 SIO_CLR(NGE_MEAR_MII_CLK);
429 SIO_SET(NGE_MEAR_MII_CLK);
434 * Read an PHY register through the MII.
436 static int nge_mii_readreg(sc, frame)
437 struct nge_softc *sc;
438 struct nge_mii_frame *frame;
446 * Set up frame for RX.
448 frame->mii_stdelim = NGE_MII_STARTDELIM;
449 frame->mii_opcode = NGE_MII_READOP;
450 frame->mii_turnaround = 0;
453 CSR_WRITE_4(sc, NGE_MEAR, 0);
458 SIO_SET(NGE_MEAR_MII_DIR);
463 * Send command/address info.
465 nge_mii_send(sc, frame->mii_stdelim, 2);
466 nge_mii_send(sc, frame->mii_opcode, 2);
467 nge_mii_send(sc, frame->mii_phyaddr, 5);
468 nge_mii_send(sc, frame->mii_regaddr, 5);
471 SIO_CLR((NGE_MEAR_MII_CLK|NGE_MEAR_MII_DATA));
473 SIO_SET(NGE_MEAR_MII_CLK);
477 SIO_CLR(NGE_MEAR_MII_DIR);
479 SIO_CLR(NGE_MEAR_MII_CLK);
481 ack = CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA;
482 SIO_SET(NGE_MEAR_MII_CLK);
486 * Now try reading data bits. If the ack failed, we still
487 * need to clock through 16 cycles to keep the PHY(s) in sync.
490 for(i = 0; i < 16; i++) {
491 SIO_CLR(NGE_MEAR_MII_CLK);
493 SIO_SET(NGE_MEAR_MII_CLK);
499 for (i = 0x8000; i; i >>= 1) {
500 SIO_CLR(NGE_MEAR_MII_CLK);
503 if (CSR_READ_4(sc, NGE_MEAR) & NGE_MEAR_MII_DATA)
504 frame->mii_data |= i;
507 SIO_SET(NGE_MEAR_MII_CLK);
513 SIO_CLR(NGE_MEAR_MII_CLK);
515 SIO_SET(NGE_MEAR_MII_CLK);
526 * Write to a PHY register through the MII.
528 static int nge_mii_writereg(sc, frame)
529 struct nge_softc *sc;
530 struct nge_mii_frame *frame;
537 * Set up frame for TX.
540 frame->mii_stdelim = NGE_MII_STARTDELIM;
541 frame->mii_opcode = NGE_MII_WRITEOP;
542 frame->mii_turnaround = NGE_MII_TURNAROUND;
545 * Turn on data output.
547 SIO_SET(NGE_MEAR_MII_DIR);
551 nge_mii_send(sc, frame->mii_stdelim, 2);
552 nge_mii_send(sc, frame->mii_opcode, 2);
553 nge_mii_send(sc, frame->mii_phyaddr, 5);
554 nge_mii_send(sc, frame->mii_regaddr, 5);
555 nge_mii_send(sc, frame->mii_turnaround, 2);
556 nge_mii_send(sc, frame->mii_data, 16);
559 SIO_SET(NGE_MEAR_MII_CLK);
561 SIO_CLR(NGE_MEAR_MII_CLK);
567 SIO_CLR(NGE_MEAR_MII_DIR);
574 static int nge_miibus_readreg(dev, phy, reg)
578 struct nge_softc *sc;
579 struct nge_mii_frame frame;
581 sc = device_get_softc(dev);
583 bzero((char *)&frame, sizeof(frame));
585 frame.mii_phyaddr = phy;
586 frame.mii_regaddr = reg;
587 nge_mii_readreg(sc, &frame);
589 return(frame.mii_data);
592 static int nge_miibus_writereg(dev, phy, reg, data)
596 struct nge_softc *sc;
597 struct nge_mii_frame frame;
599 sc = device_get_softc(dev);
601 bzero((char *)&frame, sizeof(frame));
603 frame.mii_phyaddr = phy;
604 frame.mii_regaddr = reg;
605 frame.mii_data = data;
606 nge_mii_writereg(sc, &frame);
611 static void nge_miibus_statchg(dev)
615 struct nge_softc *sc;
616 struct mii_data *mii;
618 sc = device_get_softc(dev);
620 if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media)
622 status = CSR_READ_4(sc, NGE_TBI_ANLPAR);
623 if (status == 0 || status & NGE_TBIANAR_FDX) {
624 NGE_SETBIT(sc, NGE_TX_CFG,
625 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
626 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
628 NGE_CLRBIT(sc, NGE_TX_CFG,
629 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
630 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
633 } else if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK)
635 NGE_CLRBIT(sc, NGE_TX_CFG,
636 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
637 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
639 NGE_SETBIT(sc, NGE_TX_CFG,
640 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
641 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
644 mii = device_get_softc(sc->nge_miibus);
646 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
647 NGE_SETBIT(sc, NGE_TX_CFG,
648 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
649 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
651 NGE_CLRBIT(sc, NGE_TX_CFG,
652 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
653 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
656 /* If we have a 1000Mbps link, set the mode_1000 bit. */
657 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_TX ||
658 IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX) {
659 NGE_SETBIT(sc, NGE_CFG, NGE_CFG_MODE_1000);
661 NGE_CLRBIT(sc, NGE_CFG, NGE_CFG_MODE_1000);
667 static u_int32_t nge_crc(sc, addr)
668 struct nge_softc *sc;
671 u_int32_t crc, carry;
675 /* Compute CRC for the address value. */
676 crc = 0xFFFFFFFF; /* initial value */
678 for (i = 0; i < 6; i++) {
680 for (j = 0; j < 8; j++) {
681 carry = ((crc & 0x80000000) ? 1 : 0) ^ (c & 0x01);
685 crc = (crc ^ 0x04c11db6) | carry;
690 * return the filter bit position
693 return((crc >> 21) & 0x00000FFF);
696 static void nge_setmulti(sc)
697 struct nge_softc *sc;
700 struct ifmultiaddr *ifma;
701 u_int32_t h = 0, i, filtsave;
704 ifp = &sc->arpcom.ac_if;
706 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
707 NGE_CLRBIT(sc, NGE_RXFILT_CTL,
708 NGE_RXFILTCTL_MCHASH|NGE_RXFILTCTL_UCHASH);
709 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLMULTI);
714 * We have to explicitly enable the multicast hash table
715 * on the NatSemi chip if we want to use it, which we do.
716 * We also have to tell it that we don't want to use the
717 * hash table for matching unicast addresses.
719 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_MCHASH);
720 NGE_CLRBIT(sc, NGE_RXFILT_CTL,
721 NGE_RXFILTCTL_ALLMULTI|NGE_RXFILTCTL_UCHASH);
723 filtsave = CSR_READ_4(sc, NGE_RXFILT_CTL);
725 /* first, zot all the existing hash bits */
726 for (i = 0; i < NGE_MCAST_FILTER_LEN; i += 2) {
727 CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_MCAST_LO + i);
728 CSR_WRITE_4(sc, NGE_RXFILT_DATA, 0);
732 * From the 11 bits returned by the crc routine, the top 7
733 * bits represent the 16-bit word in the mcast hash table
734 * that needs to be updated, and the lower 4 bits represent
735 * which bit within that byte needs to be set.
737 LIST_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
738 if (ifma->ifma_addr->sa_family != AF_LINK)
740 h = nge_crc(sc, LLADDR((struct sockaddr_dl *)ifma->ifma_addr));
741 index = (h >> 4) & 0x7F;
743 CSR_WRITE_4(sc, NGE_RXFILT_CTL,
744 NGE_FILTADDR_MCAST_LO + (index * 2));
745 NGE_SETBIT(sc, NGE_RXFILT_DATA, (1 << bit));
748 CSR_WRITE_4(sc, NGE_RXFILT_CTL, filtsave);
753 static void nge_reset(sc)
754 struct nge_softc *sc;
758 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RESET);
760 for (i = 0; i < NGE_TIMEOUT; i++) {
761 if (!(CSR_READ_4(sc, NGE_CSR) & NGE_CSR_RESET))
765 if (i == NGE_TIMEOUT)
766 printf("nge%d: reset never completed\n", sc->nge_unit);
768 /* Wait a little while for the chip to get its brains in order. */
772 * If this is a NetSemi chip, make sure to clear
775 CSR_WRITE_4(sc, NGE_CLKRUN, NGE_CLKRUN_PMESTS);
776 CSR_WRITE_4(sc, NGE_CLKRUN, 0);
782 * Probe for an NatSemi chip. Check the PCI vendor and device
783 * IDs against our list and return a device name if we find a match.
785 static int nge_probe(dev)
792 while(t->nge_name != NULL) {
793 if ((pci_get_vendor(dev) == t->nge_vid) &&
794 (pci_get_device(dev) == t->nge_did)) {
795 device_set_desc(dev, t->nge_name);
805 * Attach the interface. Allocate softc structures, do ifmedia
806 * setup and ethernet/BPF attach.
808 static int nge_attach(dev)
812 u_char eaddr[ETHER_ADDR_LEN];
814 struct nge_softc *sc;
816 int unit, error = 0, rid;
817 const char *sep = "";
821 sc = device_get_softc(dev);
822 unit = device_get_unit(dev);
823 bzero(sc, sizeof(struct nge_softc));
826 * Handle power management nonsense.
830 command = pci_read_config(dev, NGE_PCI_CAPID, 4) & 0x000000FF;
831 if (command == 0x01) {
833 command = pci_read_config(dev, NGE_PCI_PWRMGMTCTRL, 4);
834 if (command & NGE_PSTATE_MASK) {
835 u_int32_t iobase, membase, irq;
837 /* Save important PCI config data. */
838 iobase = pci_read_config(dev, NGE_PCI_LOIO, 4);
839 membase = pci_read_config(dev, NGE_PCI_LOMEM, 4);
840 irq = pci_read_config(dev, NGE_PCI_INTLINE, 4);
842 /* Reset the power state. */
843 printf("nge%d: chip is in D%d power mode "
844 "-- setting to D0\n", unit, command & NGE_PSTATE_MASK);
845 command &= 0xFFFFFFFC;
846 pci_write_config(dev, NGE_PCI_PWRMGMTCTRL, command, 4);
848 /* Restore PCI config data. */
849 pci_write_config(dev, NGE_PCI_LOIO, iobase, 4);
850 pci_write_config(dev, NGE_PCI_LOMEM, membase, 4);
851 pci_write_config(dev, NGE_PCI_INTLINE, irq, 4);
856 * Map control/status registers.
858 command = pci_read_config(dev, PCIR_COMMAND, 4);
859 command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN);
860 pci_write_config(dev, PCIR_COMMAND, command, 4);
861 command = pci_read_config(dev, PCIR_COMMAND, 4);
863 #ifdef NGE_USEIOSPACE
864 if (!(command & PCIM_CMD_PORTEN)) {
865 printf("nge%d: failed to enable I/O ports!\n", unit);
870 if (!(command & PCIM_CMD_MEMEN)) {
871 printf("nge%d: failed to enable memory mapping!\n", unit);
878 sc->nge_res = bus_alloc_resource(dev, NGE_RES, &rid,
879 0, ~0, 1, RF_ACTIVE);
881 if (sc->nge_res == NULL) {
882 printf("nge%d: couldn't map ports/memory\n", unit);
887 sc->nge_btag = rman_get_bustag(sc->nge_res);
888 sc->nge_bhandle = rman_get_bushandle(sc->nge_res);
890 /* Allocate interrupt */
892 sc->nge_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1,
893 RF_SHAREABLE | RF_ACTIVE);
895 if (sc->nge_irq == NULL) {
896 printf("nge%d: couldn't map interrupt\n", unit);
897 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
902 error = bus_setup_intr(dev, sc->nge_irq, INTR_TYPE_NET,
903 nge_intr, sc, &sc->nge_intrhand);
906 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
907 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
908 printf("nge%d: couldn't set up irq\n", unit);
912 /* Reset the adapter. */
916 * Get station address from the EEPROM.
918 nge_read_eeprom(sc, (caddr_t)&eaddr[4], NGE_EE_NODEADDR, 1, 0);
919 nge_read_eeprom(sc, (caddr_t)&eaddr[2], NGE_EE_NODEADDR + 1, 1, 0);
920 nge_read_eeprom(sc, (caddr_t)&eaddr[0], NGE_EE_NODEADDR + 2, 1, 0);
923 * A NatSemi chip was detected. Inform the world.
925 printf("nge%d: Ethernet address: %6D\n", unit, eaddr, ":");
928 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
930 sc->nge_ldata = contigmalloc(sizeof(struct nge_list_data), M_DEVBUF,
931 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
933 if (sc->nge_ldata == NULL) {
934 printf("nge%d: no memory for list buffers!\n", unit);
935 bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
936 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
937 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
941 bzero(sc->nge_ldata, sizeof(struct nge_list_data));
943 /* Try to allocate memory for jumbo buffers. */
944 if (nge_alloc_jumbo_mem(sc)) {
945 printf("nge%d: jumbo buffer allocation failed\n",
947 contigfree(sc->nge_ldata,
948 sizeof(struct nge_list_data), M_DEVBUF);
949 bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
950 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
951 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
956 ifp = &sc->arpcom.ac_if;
959 ifp->if_name = "nge";
960 ifp->if_mtu = ETHERMTU;
961 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
962 ifp->if_ioctl = nge_ioctl;
963 ifp->if_output = ether_output;
964 ifp->if_start = nge_start;
965 ifp->if_watchdog = nge_watchdog;
966 ifp->if_init = nge_init;
967 ifp->if_baudrate = 1000000000;
968 ifp->if_snd.ifq_maxlen = NGE_TX_LIST_CNT - 1;
969 ifp->if_hwassist = NGE_CSUM_FEATURES;
970 ifp->if_capabilities = IFCAP_HWCSUM;
971 ifp->if_capenable = ifp->if_capabilities;
976 if (mii_phy_probe(dev, &sc->nge_miibus,
977 nge_ifmedia_upd, nge_ifmedia_sts)) {
978 if (CSR_READ_4(sc, NGE_CFG) & NGE_CFG_TBI_EN) {
980 device_printf(dev, "Using TBI\n");
982 sc->nge_miibus = dev;
984 ifmedia_init(&sc->nge_ifmedia, 0, nge_ifmedia_upd,
986 #define ADD(m, c) ifmedia_add(&sc->nge_ifmedia, (m), (c), NULL)
987 #define PRINT(s) printf("%s%s", sep, s); sep = ", "
988 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, 0), 0);
989 device_printf(dev, " ");
990 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, 0, 0), 0);
992 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_SX, IFM_FDX, 0),0);
993 PRINT("1000baseSX-FDX");
994 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0), 0);
1000 ifmedia_set(&sc->nge_ifmedia,
1001 IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, 0));
1003 CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
1005 | NGE_GPIO_GP1_OUTENB | NGE_GPIO_GP2_OUTENB
1006 | NGE_GPIO_GP3_OUTENB
1007 | NGE_GPIO_GP3_IN | NGE_GPIO_GP4_IN);
1010 printf("nge%d: MII without any PHY!\n", sc->nge_unit);
1011 nge_free_jumbo_mem(sc);
1012 bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
1013 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
1014 bus_release_resource(dev, NGE_RES, NGE_RID,
1022 * Call MI attach routine.
1024 ether_ifattach(ifp, ETHER_BPF_SUPPORTED);
1025 callout_handle_init(&sc->nge_stat_ch);
1033 static int nge_detach(dev)
1036 struct nge_softc *sc;
1042 sc = device_get_softc(dev);
1043 ifp = &sc->arpcom.ac_if;
1047 ether_ifdetach(ifp, ETHER_BPF_SUPPORTED);
1049 bus_generic_detach(dev);
1051 device_delete_child(dev, sc->nge_miibus);
1053 bus_teardown_intr(dev, sc->nge_irq, sc->nge_intrhand);
1054 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->nge_irq);
1055 bus_release_resource(dev, NGE_RES, NGE_RID, sc->nge_res);
1057 contigfree(sc->nge_ldata, sizeof(struct nge_list_data), M_DEVBUF);
1058 nge_free_jumbo_mem(sc);
1066 * Initialize the transmit descriptors.
1068 static int nge_list_tx_init(sc)
1069 struct nge_softc *sc;
1071 struct nge_list_data *ld;
1072 struct nge_ring_data *cd;
1075 cd = &sc->nge_cdata;
1078 for (i = 0; i < NGE_TX_LIST_CNT; i++) {
1079 if (i == (NGE_TX_LIST_CNT - 1)) {
1080 ld->nge_tx_list[i].nge_nextdesc =
1081 &ld->nge_tx_list[0];
1082 ld->nge_tx_list[i].nge_next =
1083 vtophys(&ld->nge_tx_list[0]);
1085 ld->nge_tx_list[i].nge_nextdesc =
1086 &ld->nge_tx_list[i + 1];
1087 ld->nge_tx_list[i].nge_next =
1088 vtophys(&ld->nge_tx_list[i + 1]);
1090 ld->nge_tx_list[i].nge_mbuf = NULL;
1091 ld->nge_tx_list[i].nge_ptr = 0;
1092 ld->nge_tx_list[i].nge_ctl = 0;
1095 cd->nge_tx_prod = cd->nge_tx_cons = cd->nge_tx_cnt = 0;
1102 * Initialize the RX descriptors and allocate mbufs for them. Note that
1103 * we arrange the descriptors in a closed ring, so that the last descriptor
1104 * points back to the first.
1106 static int nge_list_rx_init(sc)
1107 struct nge_softc *sc;
1109 struct nge_list_data *ld;
1110 struct nge_ring_data *cd;
1114 cd = &sc->nge_cdata;
1116 for (i = 0; i < NGE_RX_LIST_CNT; i++) {
1117 if (nge_newbuf(sc, &ld->nge_rx_list[i], NULL) == ENOBUFS)
1119 if (i == (NGE_RX_LIST_CNT - 1)) {
1120 ld->nge_rx_list[i].nge_nextdesc =
1121 &ld->nge_rx_list[0];
1122 ld->nge_rx_list[i].nge_next =
1123 vtophys(&ld->nge_rx_list[0]);
1125 ld->nge_rx_list[i].nge_nextdesc =
1126 &ld->nge_rx_list[i + 1];
1127 ld->nge_rx_list[i].nge_next =
1128 vtophys(&ld->nge_rx_list[i + 1]);
1132 cd->nge_rx_prod = 0;
1138 * Initialize an RX descriptor and attach an MBUF cluster.
1140 static int nge_newbuf(sc, c, m)
1141 struct nge_softc *sc;
1145 struct mbuf *m_new = NULL;
1146 caddr_t *buf = NULL;
1149 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1150 if (m_new == NULL) {
1151 printf("nge%d: no memory for rx list "
1152 "-- packet dropped!\n", sc->nge_unit);
1156 /* Allocate the jumbo buffer */
1157 buf = nge_jalloc(sc);
1160 printf("nge%d: jumbo allocation failed "
1161 "-- packet dropped!\n", sc->nge_unit);
1166 /* Attach the buffer to the mbuf */
1167 m_new->m_data = m_new->m_ext.ext_buf = (void *)buf;
1168 m_new->m_flags |= M_EXT;
1169 m_new->m_ext.ext_size = m_new->m_pkthdr.len =
1170 m_new->m_len = NGE_MCLBYTES;
1171 m_new->m_ext.ext_free = nge_jfree;
1172 m_new->m_ext.ext_ref = nge_jref;
1175 m_new->m_len = m_new->m_pkthdr.len = NGE_MCLBYTES;
1176 m_new->m_data = m_new->m_ext.ext_buf;
1179 m_adj(m_new, sizeof(u_int64_t));
1181 c->nge_mbuf = m_new;
1182 c->nge_ptr = vtophys(mtod(m_new, caddr_t));
1183 c->nge_ctl = m_new->m_len;
1189 static int nge_alloc_jumbo_mem(sc)
1190 struct nge_softc *sc;
1194 struct nge_jpool_entry *entry;
1196 /* Grab a big chunk o' storage. */
1197 sc->nge_cdata.nge_jumbo_buf = contigmalloc(NGE_JMEM, M_DEVBUF,
1198 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
1200 if (sc->nge_cdata.nge_jumbo_buf == NULL) {
1201 printf("nge%d: no memory for jumbo buffers!\n", sc->nge_unit);
1205 SLIST_INIT(&sc->nge_jfree_listhead);
1206 SLIST_INIT(&sc->nge_jinuse_listhead);
1209 * Now divide it up into 9K pieces and save the addresses
1212 ptr = sc->nge_cdata.nge_jumbo_buf;
1213 for (i = 0; i < NGE_JSLOTS; i++) {
1215 aptr = (u_int64_t **)ptr;
1216 aptr[0] = (u_int64_t *)sc;
1217 ptr += sizeof(u_int64_t);
1218 sc->nge_cdata.nge_jslots[i].nge_buf = ptr;
1219 sc->nge_cdata.nge_jslots[i].nge_inuse = 0;
1220 ptr += NGE_MCLBYTES;
1221 entry = malloc(sizeof(struct nge_jpool_entry),
1222 M_DEVBUF, M_NOWAIT);
1223 if (entry == NULL) {
1224 printf("nge%d: no memory for jumbo "
1225 "buffer queue!\n", sc->nge_unit);
1229 SLIST_INSERT_HEAD(&sc->nge_jfree_listhead,
1230 entry, jpool_entries);
1236 static void nge_free_jumbo_mem(sc)
1237 struct nge_softc *sc;
1240 struct nge_jpool_entry *entry;
1242 for (i = 0; i < NGE_JSLOTS; i++) {
1243 entry = SLIST_FIRST(&sc->nge_jfree_listhead);
1244 SLIST_REMOVE_HEAD(&sc->nge_jfree_listhead, jpool_entries);
1245 free(entry, M_DEVBUF);
1248 contigfree(sc->nge_cdata.nge_jumbo_buf, NGE_JMEM, M_DEVBUF);
1254 * Allocate a jumbo buffer.
1256 static void *nge_jalloc(sc)
1257 struct nge_softc *sc;
1259 struct nge_jpool_entry *entry;
1261 entry = SLIST_FIRST(&sc->nge_jfree_listhead);
1263 if (entry == NULL) {
1265 printf("nge%d: no free jumbo buffers\n", sc->nge_unit);
1270 SLIST_REMOVE_HEAD(&sc->nge_jfree_listhead, jpool_entries);
1271 SLIST_INSERT_HEAD(&sc->nge_jinuse_listhead, entry, jpool_entries);
1272 sc->nge_cdata.nge_jslots[entry->slot].nge_inuse = 1;
1273 return(sc->nge_cdata.nge_jslots[entry->slot].nge_buf);
1277 * Adjust usage count on a jumbo buffer. In general this doesn't
1278 * get used much because our jumbo buffers don't get passed around
1279 * a lot, but it's implemented for correctness.
1281 static void nge_jref(buf, size)
1285 struct nge_softc *sc;
1289 /* Extract the softc struct pointer. */
1290 aptr = (u_int64_t **)(buf - sizeof(u_int64_t));
1291 sc = (struct nge_softc *)(aptr[0]);
1294 panic("nge_jref: can't find softc pointer!");
1296 if (size != NGE_MCLBYTES)
1297 panic("nge_jref: adjusting refcount of buf of wrong size!");
1299 /* calculate the slot this buffer belongs to */
1301 i = ((vm_offset_t)aptr
1302 - (vm_offset_t)sc->nge_cdata.nge_jumbo_buf) / NGE_JLEN;
1304 if ((i < 0) || (i >= NGE_JSLOTS))
1305 panic("nge_jref: asked to reference buffer "
1306 "that we don't manage!");
1307 else if (sc->nge_cdata.nge_jslots[i].nge_inuse == 0)
1308 panic("nge_jref: buffer already free!");
1310 sc->nge_cdata.nge_jslots[i].nge_inuse++;
1316 * Release a jumbo buffer.
1318 static void nge_jfree(buf, size)
1322 struct nge_softc *sc;
1325 struct nge_jpool_entry *entry;
1327 /* Extract the softc struct pointer. */
1328 aptr = (u_int64_t **)(buf - sizeof(u_int64_t));
1329 sc = (struct nge_softc *)(aptr[0]);
1332 panic("nge_jfree: can't find softc pointer!");
1334 if (size != NGE_MCLBYTES)
1335 panic("nge_jfree: freeing buffer of wrong size!");
1337 /* calculate the slot this buffer belongs to */
1339 i = ((vm_offset_t)aptr
1340 - (vm_offset_t)sc->nge_cdata.nge_jumbo_buf) / NGE_JLEN;
1342 if ((i < 0) || (i >= NGE_JSLOTS))
1343 panic("nge_jfree: asked to free buffer that we don't manage!");
1344 else if (sc->nge_cdata.nge_jslots[i].nge_inuse == 0)
1345 panic("nge_jfree: buffer already free!");
1347 sc->nge_cdata.nge_jslots[i].nge_inuse--;
1348 if(sc->nge_cdata.nge_jslots[i].nge_inuse == 0) {
1349 entry = SLIST_FIRST(&sc->nge_jinuse_listhead);
1351 panic("nge_jfree: buffer not in use!");
1353 SLIST_REMOVE_HEAD(&sc->nge_jinuse_listhead,
1355 SLIST_INSERT_HEAD(&sc->nge_jfree_listhead,
1356 entry, jpool_entries);
1363 * A frame has been uploaded: pass the resulting mbuf chain up to
1364 * the higher level protocols.
1366 static void nge_rxeof(sc)
1367 struct nge_softc *sc;
1369 struct ether_header *eh;
1372 struct nge_desc *cur_rx;
1373 int i, total_len = 0;
1376 ifp = &sc->arpcom.ac_if;
1377 i = sc->nge_cdata.nge_rx_prod;
1379 while(NGE_OWNDESC(&sc->nge_ldata->nge_rx_list[i])) {
1380 struct mbuf *m0 = NULL;
1383 #ifdef DEVICE_POLLING
1384 if (ifp->if_ipending & IFF_POLLING) {
1385 if (sc->rxcycles <= 0)
1389 #endif /* DEVICE_POLLING */
1391 cur_rx = &sc->nge_ldata->nge_rx_list[i];
1392 rxstat = cur_rx->nge_rxstat;
1393 extsts = cur_rx->nge_extsts;
1394 m = cur_rx->nge_mbuf;
1395 cur_rx->nge_mbuf = NULL;
1396 total_len = NGE_RXBYTES(cur_rx);
1397 NGE_INC(i, NGE_RX_LIST_CNT);
1399 * If an error occurs, update stats, clear the
1400 * status word and leave the mbuf cluster in place:
1401 * it should simply get re-used next time this descriptor
1402 * comes up in the ring.
1404 if (!(rxstat & NGE_CMDSTS_PKT_OK)) {
1406 nge_newbuf(sc, cur_rx, m);
1411 * Ok. NatSemi really screwed up here. This is the
1412 * only gigE chip I know of with alignment constraints
1413 * on receive buffers. RX buffers must be 64-bit aligned.
1417 * By popular demand, ignore the alignment problems
1418 * on the Intel x86 platform. The performance hit
1419 * incurred due to unaligned accesses is much smaller
1420 * than the hit produced by forcing buffer copies all
1421 * the time, especially with jumbo frames. We still
1422 * need to fix up the alignment everywhere else though.
1424 if (nge_newbuf(sc, cur_rx, NULL) == ENOBUFS) {
1426 m0 = m_devget(mtod(m, char *) - ETHER_ALIGN,
1427 total_len + ETHER_ALIGN, 0, ifp, NULL);
1428 nge_newbuf(sc, cur_rx, m);
1430 printf("nge%d: no receive buffers "
1431 "available -- packet dropped!\n",
1436 m_adj(m0, ETHER_ALIGN);
1440 m->m_pkthdr.rcvif = ifp;
1441 m->m_pkthdr.len = m->m_len = total_len;
1446 eh = mtod(m, struct ether_header *);
1448 /* Remove header from mbuf and pass it on. */
1449 m_adj(m, sizeof(struct ether_header));
1451 /* Do IP checksum checking. */
1452 if (extsts & NGE_RXEXTSTS_IPPKT)
1453 m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
1454 if (!(extsts & NGE_RXEXTSTS_IPCSUMERR))
1455 m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
1456 if ((extsts & NGE_RXEXTSTS_TCPPKT &&
1457 !(extsts & NGE_RXEXTSTS_TCPCSUMERR)) ||
1458 (extsts & NGE_RXEXTSTS_UDPPKT &&
1459 !(extsts & NGE_RXEXTSTS_UDPCSUMERR))) {
1460 m->m_pkthdr.csum_flags |=
1461 CSUM_DATA_VALID|CSUM_PSEUDO_HDR;
1462 m->m_pkthdr.csum_data = 0xffff;
1466 * If we received a packet with a vlan tag, pass it
1467 * to vlan_input() instead of ether_input().
1469 if (extsts & NGE_RXEXTSTS_VLANPKT) {
1470 VLAN_INPUT_TAG(eh, m, extsts & NGE_RXEXTSTS_VTCI);
1474 ether_input(ifp, eh, m);
1477 sc->nge_cdata.nge_rx_prod = i;
1483 * A frame was downloaded to the chip. It's safe for us to clean up
1487 static void nge_txeof(sc)
1488 struct nge_softc *sc;
1490 struct nge_desc *cur_tx = NULL;
1494 ifp = &sc->arpcom.ac_if;
1496 /* Clear the timeout timer. */
1500 * Go through our tx list and free mbufs for those
1501 * frames that have been transmitted.
1503 idx = sc->nge_cdata.nge_tx_cons;
1504 while (idx != sc->nge_cdata.nge_tx_prod) {
1505 cur_tx = &sc->nge_ldata->nge_tx_list[idx];
1507 if (NGE_OWNDESC(cur_tx))
1510 if (cur_tx->nge_ctl & NGE_CMDSTS_MORE) {
1511 sc->nge_cdata.nge_tx_cnt--;
1512 NGE_INC(idx, NGE_TX_LIST_CNT);
1516 if (!(cur_tx->nge_ctl & NGE_CMDSTS_PKT_OK)) {
1518 if (cur_tx->nge_txstat & NGE_TXSTAT_EXCESSCOLLS)
1519 ifp->if_collisions++;
1520 if (cur_tx->nge_txstat & NGE_TXSTAT_OUTOFWINCOLL)
1521 ifp->if_collisions++;
1524 ifp->if_collisions +=
1525 (cur_tx->nge_txstat & NGE_TXSTAT_COLLCNT) >> 16;
1528 if (cur_tx->nge_mbuf != NULL) {
1529 m_freem(cur_tx->nge_mbuf);
1530 cur_tx->nge_mbuf = NULL;
1533 sc->nge_cdata.nge_tx_cnt--;
1534 NGE_INC(idx, NGE_TX_LIST_CNT);
1538 sc->nge_cdata.nge_tx_cons = idx;
1541 ifp->if_flags &= ~IFF_OACTIVE;
1546 static void nge_tick(xsc)
1549 struct nge_softc *sc;
1550 struct mii_data *mii;
1557 ifp = &sc->arpcom.ac_if;
1560 if (!sc->nge_link) {
1561 if (CSR_READ_4(sc, NGE_TBI_BMSR)
1562 & NGE_TBIBMSR_ANEG_DONE) {
1563 printf("nge%d: gigabit link up\n",
1565 nge_miibus_statchg(sc->nge_miibus);
1567 if (ifp->if_snd.ifq_head != NULL)
1572 mii = device_get_softc(sc->nge_miibus);
1575 if (!sc->nge_link) {
1576 if (mii->mii_media_status & IFM_ACTIVE &&
1577 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
1579 if (IFM_SUBTYPE(mii->mii_media_active)
1581 printf("nge%d: gigabit link up\n",
1583 if (ifp->if_snd.ifq_head != NULL)
1588 sc->nge_stat_ch = timeout(nge_tick, sc, hz);
1595 #ifdef DEVICE_POLLING
1596 static poll_handler_t nge_poll;
1599 nge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1601 struct nge_softc *sc = ifp->if_softc;
1603 if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */
1604 CSR_WRITE_4(sc, NGE_IER, 1);
1609 * On the nge, reading the status register also clears it.
1610 * So before returning to intr mode we must make sure that all
1611 * possible pending sources of interrupts have been served.
1612 * In practice this means run to completion the *eof routines,
1613 * and then call the interrupt routine
1615 sc->rxcycles = count;
1618 if (ifp->if_snd.ifq_head != NULL)
1621 if (sc->rxcycles > 0 || cmd == POLL_AND_CHECK_STATUS) {
1624 /* Reading the ISR register clears all interrupts. */
1625 status = CSR_READ_4(sc, NGE_ISR);
1627 if (status & (NGE_ISR_RX_ERR|NGE_ISR_RX_OFLOW))
1630 if (status & (NGE_ISR_RX_IDLE))
1631 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
1633 if (status & NGE_ISR_SYSERR) {
1639 #endif /* DEVICE_POLLING */
1641 static void nge_intr(arg)
1644 struct nge_softc *sc;
1649 ifp = &sc->arpcom.ac_if;
1651 #ifdef DEVICE_POLLING
1652 if (ifp->if_ipending & IFF_POLLING)
1654 if (ether_poll_register(nge_poll, ifp)) { /* ok, disable interrupts */
1655 CSR_WRITE_4(sc, NGE_IER, 0);
1656 nge_poll(ifp, 0, 1);
1659 #endif /* DEVICE_POLLING */
1661 /* Supress unwanted interrupts */
1662 if (!(ifp->if_flags & IFF_UP)) {
1667 /* Disable interrupts. */
1668 CSR_WRITE_4(sc, NGE_IER, 0);
1670 /* Data LED on for TBI mode */
1672 CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
1673 | NGE_GPIO_GP3_OUT);
1676 /* Reading the ISR register clears all interrupts. */
1677 status = CSR_READ_4(sc, NGE_ISR);
1679 if ((status & NGE_INTRS) == 0)
1682 if ((status & NGE_ISR_TX_DESC_OK) ||
1683 (status & NGE_ISR_TX_ERR) ||
1684 (status & NGE_ISR_TX_OK) ||
1685 (status & NGE_ISR_TX_IDLE))
1688 if ((status & NGE_ISR_RX_DESC_OK) ||
1689 (status & NGE_ISR_RX_ERR) ||
1690 (status & NGE_ISR_RX_OFLOW) ||
1691 (status & NGE_ISR_RX_FIFO_OFLOW) ||
1692 (status & NGE_ISR_RX_IDLE) ||
1693 (status & NGE_ISR_RX_OK))
1696 if ((status & NGE_ISR_RX_IDLE))
1697 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
1699 if (status & NGE_ISR_SYSERR) {
1701 ifp->if_flags &= ~IFF_RUNNING;
1706 /* mii_tick should only be called once per second */
1707 if (status & NGE_ISR_PHY_INTR) {
1714 /* Re-enable interrupts. */
1715 CSR_WRITE_4(sc, NGE_IER, 1);
1717 if (ifp->if_snd.ifq_head != NULL)
1720 /* Data LED off for TBI mode */
1723 CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
1724 & ~NGE_GPIO_GP3_OUT);
1730 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1731 * pointers to the fragment pointers.
1733 static int nge_encap(sc, m_head, txidx)
1734 struct nge_softc *sc;
1735 struct mbuf *m_head;
1738 struct nge_desc *f = NULL;
1740 int frag, cur, cnt = 0;
1741 struct ifvlan *ifv = NULL;
1743 if ((m_head->m_flags & (M_PROTO1|M_PKTHDR)) == (M_PROTO1|M_PKTHDR) &&
1744 m_head->m_pkthdr.rcvif != NULL &&
1745 m_head->m_pkthdr.rcvif->if_type == IFT_L2VLAN)
1746 ifv = m_head->m_pkthdr.rcvif->if_softc;
1749 * Start packing the mbufs in this chain into
1750 * the fragment pointers. Stop when we run out
1751 * of fragments or hit the end of the mbuf chain.
1754 cur = frag = *txidx;
1756 for (m = m_head; m != NULL; m = m->m_next) {
1757 if (m->m_len != 0) {
1758 if ((NGE_TX_LIST_CNT -
1759 (sc->nge_cdata.nge_tx_cnt + cnt)) < 2)
1761 f = &sc->nge_ldata->nge_tx_list[frag];
1762 f->nge_ctl = NGE_CMDSTS_MORE | m->m_len;
1763 f->nge_ptr = vtophys(mtod(m, vm_offset_t));
1765 f->nge_ctl |= NGE_CMDSTS_OWN;
1767 NGE_INC(frag, NGE_TX_LIST_CNT);
1775 sc->nge_ldata->nge_tx_list[*txidx].nge_extsts = 0;
1776 if (m_head->m_pkthdr.csum_flags) {
1777 if (m_head->m_pkthdr.csum_flags & CSUM_IP)
1778 sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |=
1779 NGE_TXEXTSTS_IPCSUM;
1780 if (m_head->m_pkthdr.csum_flags & CSUM_TCP)
1781 sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |=
1782 NGE_TXEXTSTS_TCPCSUM;
1783 if (m_head->m_pkthdr.csum_flags & CSUM_UDP)
1784 sc->nge_ldata->nge_tx_list[*txidx].nge_extsts |=
1785 NGE_TXEXTSTS_UDPCSUM;
1789 sc->nge_ldata->nge_tx_list[cur].nge_extsts |=
1790 (NGE_TXEXTSTS_VLANPKT|ifv->ifv_tag);
1793 sc->nge_ldata->nge_tx_list[cur].nge_mbuf = m_head;
1794 sc->nge_ldata->nge_tx_list[cur].nge_ctl &= ~NGE_CMDSTS_MORE;
1795 sc->nge_ldata->nge_tx_list[*txidx].nge_ctl |= NGE_CMDSTS_OWN;
1796 sc->nge_cdata.nge_tx_cnt += cnt;
1803 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
1804 * to the mbuf data regions directly in the transmit lists. We also save a
1805 * copy of the pointers since the transmit list fragment pointers are
1806 * physical addresses.
1809 static void nge_start(ifp)
1812 struct nge_softc *sc;
1813 struct mbuf *m_head = NULL;
1821 idx = sc->nge_cdata.nge_tx_prod;
1823 if (ifp->if_flags & IFF_OACTIVE)
1826 while(sc->nge_ldata->nge_tx_list[idx].nge_mbuf == NULL) {
1827 IF_DEQUEUE(&ifp->if_snd, m_head);
1831 if (nge_encap(sc, m_head, &idx)) {
1832 IF_PREPEND(&ifp->if_snd, m_head);
1833 ifp->if_flags |= IFF_OACTIVE;
1838 * If there's a BPF listener, bounce a copy of this frame
1842 bpf_mtap(ifp, m_head);
1847 sc->nge_cdata.nge_tx_prod = idx;
1848 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_ENABLE);
1851 * Set a timeout in case the chip goes out to lunch.
1858 static void nge_init(xsc)
1861 struct nge_softc *sc = xsc;
1862 struct ifnet *ifp = &sc->arpcom.ac_if;
1863 struct mii_data *mii;
1866 if (ifp->if_flags & IFF_RUNNING)
1872 * Cancel pending I/O and free all RX/TX buffers.
1875 sc->nge_stat_ch = timeout(nge_tick, sc, hz);
1880 mii = device_get_softc(sc->nge_miibus);
1883 /* Set MAC address */
1884 CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR0);
1885 CSR_WRITE_4(sc, NGE_RXFILT_DATA,
1886 ((u_int16_t *)sc->arpcom.ac_enaddr)[0]);
1887 CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR1);
1888 CSR_WRITE_4(sc, NGE_RXFILT_DATA,
1889 ((u_int16_t *)sc->arpcom.ac_enaddr)[1]);
1890 CSR_WRITE_4(sc, NGE_RXFILT_CTL, NGE_FILTADDR_PAR2);
1891 CSR_WRITE_4(sc, NGE_RXFILT_DATA,
1892 ((u_int16_t *)sc->arpcom.ac_enaddr)[2]);
1894 /* Init circular RX list. */
1895 if (nge_list_rx_init(sc) == ENOBUFS) {
1896 printf("nge%d: initialization failed: no "
1897 "memory for rx buffers\n", sc->nge_unit);
1904 * Init tx descriptors.
1906 nge_list_tx_init(sc);
1909 * For the NatSemi chip, we have to explicitly enable the
1910 * reception of ARP frames, as well as turn on the 'perfect
1911 * match' filter where we store the station address, otherwise
1912 * we won't receive unicasts meant for this host.
1914 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ARP);
1915 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_PERFECT);
1917 /* If we want promiscuous mode, set the allframes bit. */
1918 if (ifp->if_flags & IFF_PROMISC) {
1919 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLPHYS);
1921 NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ALLPHYS);
1925 * Set the capture broadcast bit to capture broadcast frames.
1927 if (ifp->if_flags & IFF_BROADCAST) {
1928 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD);
1930 NGE_CLRBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_BROAD);
1934 * Load the multicast filter.
1938 /* Turn the receive filter on */
1939 NGE_SETBIT(sc, NGE_RXFILT_CTL, NGE_RXFILTCTL_ENABLE);
1942 * Load the address of the RX and TX lists.
1944 CSR_WRITE_4(sc, NGE_RX_LISTPTR,
1945 vtophys(&sc->nge_ldata->nge_rx_list[0]));
1946 CSR_WRITE_4(sc, NGE_TX_LISTPTR,
1947 vtophys(&sc->nge_ldata->nge_tx_list[0]));
1949 /* Set RX configuration */
1950 CSR_WRITE_4(sc, NGE_RX_CFG, NGE_RXCFG);
1952 * Enable hardware checksum validation for all IPv4
1953 * packets, do not reject packets with bad checksums.
1955 CSR_WRITE_4(sc, NGE_VLAN_IP_RXCTL, NGE_VIPRXCTL_IPCSUM_ENB);
1958 * Tell the chip to detect and strip VLAN tag info from
1959 * received frames. The tag will be provided in the extsts
1960 * field in the RX descriptors.
1962 NGE_SETBIT(sc, NGE_VLAN_IP_RXCTL,
1963 NGE_VIPRXCTL_TAG_DETECT_ENB|NGE_VIPRXCTL_TAG_STRIP_ENB);
1965 /* Set TX configuration */
1966 CSR_WRITE_4(sc, NGE_TX_CFG, NGE_TXCFG);
1969 * Enable TX IPv4 checksumming on a per-packet basis.
1971 CSR_WRITE_4(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_CSUM_PER_PKT);
1974 * Tell the chip to insert VLAN tags on a per-packet basis as
1975 * dictated by the code in the frame encapsulation routine.
1977 NGE_SETBIT(sc, NGE_VLAN_IP_TXCTL, NGE_VIPTXCTL_TAG_PER_PKT);
1979 /* Set full/half duplex mode. */
1981 if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK)
1983 NGE_SETBIT(sc, NGE_TX_CFG,
1984 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
1985 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
1987 NGE_CLRBIT(sc, NGE_TX_CFG,
1988 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
1989 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
1992 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
1993 NGE_SETBIT(sc, NGE_TX_CFG,
1994 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
1995 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
1997 NGE_CLRBIT(sc, NGE_TX_CFG,
1998 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
1999 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
2004 * Enable the delivery of PHY interrupts based on
2005 * link/speed/duplex status changes. Also enable the
2006 * extsts field in the DMA descriptors (needed for
2007 * TCP/IP checksum offload on transmit).
2009 NGE_SETBIT(sc, NGE_CFG, NGE_CFG_PHYINTR_SPD|
2010 NGE_CFG_PHYINTR_LNK|NGE_CFG_PHYINTR_DUP|NGE_CFG_EXTSTS_ENB);
2013 * Configure interrupt holdoff (moderation). We can
2014 * have the chip delay interrupt delivery for a certain
2015 * period. Units are in 100us, and the max setting
2016 * is 25500us (0xFF x 100us). Default is a 100us holdoff.
2018 CSR_WRITE_4(sc, NGE_IHR, 0x01);
2021 * Enable interrupts.
2023 CSR_WRITE_4(sc, NGE_IMR, NGE_INTRS);
2024 #ifdef DEVICE_POLLING
2026 * ... only enable interrupts if we are not polling, make sure
2027 * they are off otherwise.
2029 if (ifp->if_ipending & IFF_POLLING)
2030 CSR_WRITE_4(sc, NGE_IER, 0);
2032 #endif /* DEVICE_POLLING */
2033 CSR_WRITE_4(sc, NGE_IER, 1);
2035 /* Enable receiver and transmitter. */
2036 NGE_CLRBIT(sc, NGE_CSR, NGE_CSR_TX_DISABLE|NGE_CSR_RX_DISABLE);
2037 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_RX_ENABLE);
2039 nge_ifmedia_upd(ifp);
2041 ifp->if_flags |= IFF_RUNNING;
2042 ifp->if_flags &= ~IFF_OACTIVE;
2050 * Set media options.
2052 static int nge_ifmedia_upd(ifp)
2055 struct nge_softc *sc;
2056 struct mii_data *mii;
2061 if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media)
2063 CSR_WRITE_4(sc, NGE_TBI_ANAR,
2064 CSR_READ_4(sc, NGE_TBI_ANAR)
2065 | NGE_TBIANAR_HDX | NGE_TBIANAR_FDX
2066 | NGE_TBIANAR_PS1 | NGE_TBIANAR_PS2);
2067 CSR_WRITE_4(sc, NGE_TBI_BMCR, NGE_TBIBMCR_ENABLE_ANEG
2068 | NGE_TBIBMCR_RESTART_ANEG);
2069 CSR_WRITE_4(sc, NGE_TBI_BMCR, NGE_TBIBMCR_ENABLE_ANEG);
2070 } else if ((sc->nge_ifmedia.ifm_cur->ifm_media
2071 & IFM_GMASK) == IFM_FDX) {
2072 NGE_SETBIT(sc, NGE_TX_CFG,
2073 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
2074 NGE_SETBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
2076 CSR_WRITE_4(sc, NGE_TBI_ANAR, 0);
2077 CSR_WRITE_4(sc, NGE_TBI_BMCR, 0);
2079 NGE_CLRBIT(sc, NGE_TX_CFG,
2080 (NGE_TXCFG_IGN_HBEAT|NGE_TXCFG_IGN_CARR));
2081 NGE_CLRBIT(sc, NGE_RX_CFG, NGE_RXCFG_RX_FDX);
2083 CSR_WRITE_4(sc, NGE_TBI_ANAR, 0);
2084 CSR_WRITE_4(sc, NGE_TBI_BMCR, 0);
2087 CSR_WRITE_4(sc, NGE_GPIO, CSR_READ_4(sc, NGE_GPIO)
2088 & ~NGE_GPIO_GP3_OUT);
2090 mii = device_get_softc(sc->nge_miibus);
2092 if (mii->mii_instance) {
2093 struct mii_softc *miisc;
2094 for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL;
2095 miisc = LIST_NEXT(miisc, mii_list))
2096 mii_phy_reset(miisc);
2105 * Report current media status.
2107 static void nge_ifmedia_sts(ifp, ifmr)
2109 struct ifmediareq *ifmr;
2111 struct nge_softc *sc;
2112 struct mii_data *mii;
2117 ifmr->ifm_status = IFM_AVALID;
2118 ifmr->ifm_active = IFM_ETHER;
2120 if (CSR_READ_4(sc, NGE_TBI_BMSR) & NGE_TBIBMSR_ANEG_DONE) {
2121 ifmr->ifm_status |= IFM_ACTIVE;
2123 if (CSR_READ_4(sc, NGE_TBI_BMCR) & NGE_TBIBMCR_LOOPBACK)
2124 ifmr->ifm_active |= IFM_LOOP;
2125 if (!CSR_READ_4(sc, NGE_TBI_BMSR) & NGE_TBIBMSR_ANEG_DONE) {
2126 ifmr->ifm_active |= IFM_NONE;
2127 ifmr->ifm_status = 0;
2130 ifmr->ifm_active |= IFM_1000_SX;
2131 if (IFM_SUBTYPE(sc->nge_ifmedia.ifm_cur->ifm_media)
2133 ifmr->ifm_active |= IFM_AUTO;
2134 if (CSR_READ_4(sc, NGE_TBI_ANLPAR)
2135 & NGE_TBIANAR_FDX) {
2136 ifmr->ifm_active |= IFM_FDX;
2137 }else if (CSR_READ_4(sc, NGE_TBI_ANLPAR)
2138 & NGE_TBIANAR_HDX) {
2139 ifmr->ifm_active |= IFM_HDX;
2141 } else if ((sc->nge_ifmedia.ifm_cur->ifm_media & IFM_GMASK)
2143 ifmr->ifm_active |= IFM_FDX;
2145 ifmr->ifm_active |= IFM_HDX;
2148 mii = device_get_softc(sc->nge_miibus);
2150 ifmr->ifm_active = mii->mii_media_active;
2151 ifmr->ifm_status = mii->mii_media_status;
2157 static int nge_ioctl(ifp, command, data)
2162 struct nge_softc *sc = ifp->if_softc;
2163 struct ifreq *ifr = (struct ifreq *) data;
2164 struct mii_data *mii;
2172 error = ether_ioctl(ifp, command, data);
2175 if (ifr->ifr_mtu > NGE_JUMBO_MTU)
2178 ifp->if_mtu = ifr->ifr_mtu;
2180 * Workaround: if the MTU is larger than
2181 * 8152 (TX FIFO size minus 64 minus 18), turn off
2182 * TX checksum offloading.
2184 if (ifr->ifr_mtu >= 8152)
2185 ifp->if_hwassist = 0;
2187 ifp->if_hwassist = NGE_CSUM_FEATURES;
2191 if (ifp->if_flags & IFF_UP) {
2192 if (ifp->if_flags & IFF_RUNNING &&
2193 ifp->if_flags & IFF_PROMISC &&
2194 !(sc->nge_if_flags & IFF_PROMISC)) {
2195 NGE_SETBIT(sc, NGE_RXFILT_CTL,
2196 NGE_RXFILTCTL_ALLPHYS|
2197 NGE_RXFILTCTL_ALLMULTI);
2198 } else if (ifp->if_flags & IFF_RUNNING &&
2199 !(ifp->if_flags & IFF_PROMISC) &&
2200 sc->nge_if_flags & IFF_PROMISC) {
2201 NGE_CLRBIT(sc, NGE_RXFILT_CTL,
2202 NGE_RXFILTCTL_ALLPHYS);
2203 if (!(ifp->if_flags & IFF_ALLMULTI))
2204 NGE_CLRBIT(sc, NGE_RXFILT_CTL,
2205 NGE_RXFILTCTL_ALLMULTI);
2207 ifp->if_flags &= ~IFF_RUNNING;
2211 if (ifp->if_flags & IFF_RUNNING)
2214 sc->nge_if_flags = ifp->if_flags;
2225 error = ifmedia_ioctl(ifp, ifr, &sc->nge_ifmedia,
2228 mii = device_get_softc(sc->nge_miibus);
2229 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media,
2243 static void nge_watchdog(ifp)
2246 struct nge_softc *sc;
2251 printf("nge%d: watchdog timeout\n", sc->nge_unit);
2255 ifp->if_flags &= ~IFF_RUNNING;
2258 if (ifp->if_snd.ifq_head != NULL)
2265 * Stop the adapter and free any mbufs allocated to the
2268 static void nge_stop(sc)
2269 struct nge_softc *sc;
2273 struct ifmedia_entry *ifm;
2274 struct mii_data *mii;
2277 ifp = &sc->arpcom.ac_if;
2282 mii = device_get_softc(sc->nge_miibus);
2285 untimeout(nge_tick, sc, sc->nge_stat_ch);
2286 #ifdef DEVICE_POLLING
2287 ether_poll_deregister(ifp);
2289 CSR_WRITE_4(sc, NGE_IER, 0);
2290 CSR_WRITE_4(sc, NGE_IMR, 0);
2291 NGE_SETBIT(sc, NGE_CSR, NGE_CSR_TX_DISABLE|NGE_CSR_RX_DISABLE);
2293 CSR_WRITE_4(sc, NGE_TX_LISTPTR, 0);
2294 CSR_WRITE_4(sc, NGE_RX_LISTPTR, 0);
2297 * Isolate/power down the PHY, but leave the media selection
2298 * unchanged so that things will be put back to normal when
2299 * we bring the interface back up.
2301 itmp = ifp->if_flags;
2302 ifp->if_flags |= IFF_UP;
2305 ifm = sc->nge_ifmedia.ifm_cur;
2307 ifm = mii->mii_media.ifm_cur;
2309 mtmp = ifm->ifm_media;
2310 ifm->ifm_media = IFM_ETHER|IFM_NONE;
2314 ifm->ifm_media = mtmp;
2315 ifp->if_flags = itmp;
2320 * Free data in the RX lists.
2322 for (i = 0; i < NGE_RX_LIST_CNT; i++) {
2323 if (sc->nge_ldata->nge_rx_list[i].nge_mbuf != NULL) {
2324 m_freem(sc->nge_ldata->nge_rx_list[i].nge_mbuf);
2325 sc->nge_ldata->nge_rx_list[i].nge_mbuf = NULL;
2328 bzero((char *)&sc->nge_ldata->nge_rx_list,
2329 sizeof(sc->nge_ldata->nge_rx_list));
2332 * Free the TX list buffers.
2334 for (i = 0; i < NGE_TX_LIST_CNT; i++) {
2335 if (sc->nge_ldata->nge_tx_list[i].nge_mbuf != NULL) {
2336 m_freem(sc->nge_ldata->nge_tx_list[i].nge_mbuf);
2337 sc->nge_ldata->nge_tx_list[i].nge_mbuf = NULL;
2341 bzero((char *)&sc->nge_ldata->nge_tx_list,
2342 sizeof(sc->nge_ldata->nge_tx_list));
2344 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2350 * Stop all chip I/O so that the kernel's probe routines don't
2351 * get confused by errant DMAs when rebooting.
2353 static void nge_shutdown(dev)
2356 struct nge_softc *sc;
2358 sc = device_get_softc(dev);