2 * Copyright (c) 2008, Pyun YongHyeon <yongari@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/dev/jme/if_jmevar.h,v 1.1 2008/05/27 01:42:01 yongari Exp $
28 * $DragonFly: src/sys/dev/netif/jme/if_jmevar.h,v 1.8 2008/11/26 11:55:18 sephe Exp $
34 #include <sys/queue.h>
35 #include <sys/callout.h>
36 #include <sys/taskqueue.h>
39 * JMC250 supports upto JME_NDESC_MAX descriptors and the number of
40 * descriptors should be multiple of JME_NDESC_ALIGN.
42 #define JME_TX_DESC_CNT_DEF 512
43 #define JME_RX_DESC_CNT_DEF 512
45 #define JME_NDESC_ALIGN 16
46 #define JME_NDESC_MAX 1024
48 #define JME_NRXRING_1 1
49 #define JME_NRXRING_2 2
50 #define JME_NRXRING_4 4
52 #define JME_NRXRING_MIN JME_NRXRING_1
53 #define JME_NRXRING_MAX JME_NRXRING_4
55 #define JME_NSERIALIZE (JME_NRXRING_MAX + 2)
57 #define JME_NMSIX (JME_NRXRING_MAX + 1)
60 * Tx/Rx descriptor queue base should be 16bytes aligned and
61 * should not cross 4G bytes boundary on the 64bits address
64 #define JME_TX_RING_ALIGN __VM_CACHELINE_SIZE
65 #define JME_RX_RING_ALIGN __VM_CACHELINE_SIZE
66 #define JME_MAXSEGSIZE 4096
67 #define JME_TSO_MAXSIZE (IP_MAXPACKET + sizeof(struct ether_vlan_header))
68 #define JME_MAXTXSEGS 40
69 #define JME_RX_BUF_ALIGN sizeof(uint64_t)
70 #define JME_SSB_ALIGN __VM_CACHELINE_SIZE
72 #if (BUS_SPACE_MAXADDR != BUS_SPACE_MAXADDR_32BIT)
73 #define JME_RING_BOUNDARY 0x100000000ULL
75 #define JME_RING_BOUNDARY 0
78 #define JME_ADDR_LO(x) ((uint64_t) (x) & 0xFFFFFFFF)
79 #define JME_ADDR_HI(x) ((uint64_t) (x) >> 32)
81 /* Water mark to kick reclaiming Tx buffers. */
82 #define JME_TX_DESC_HIWAT(sc) \
83 ((sc)->jme_cdata.jme_tx_desc_cnt - \
84 (((sc)->jme_cdata.jme_tx_desc_cnt * 3) / 10))
87 * JMC250 can send 9K jumbo frame on Tx path and can receive
90 #define JME_JUMBO_FRAMELEN 9216
91 #define JME_JUMBO_MTU \
92 (JME_JUMBO_FRAMELEN - sizeof(struct ether_vlan_header) - \
93 ETHER_HDR_LEN - ETHER_CRC_LEN)
95 (ETHER_MAX_LEN + sizeof(struct ether_vlan_header) - \
96 ETHER_HDR_LEN - ETHER_CRC_LEN)
98 * JMC250 can't handle Tx checksum offload/TSO if frame length
99 * is larger than its FIFO size(2K). It's also good idea to not
100 * use jumbo frame if hardware is running at half-duplex media.
101 * Because the jumbo frame may not fit into the Tx FIFO,
102 * collisions make hardware fetch frame from host memory with
103 * DMA again which in turn slows down Tx performance
106 #define JME_TX_FIFO_SIZE 2000
108 * JMC250 has just 4K Rx FIFO. To support jumbo frame that is
109 * larger than 4K bytes in length, Rx FIFO threshold should be
110 * adjusted to minimize Rx FIFO overrun.
112 #define JME_RX_FIFO_SIZE 4000
114 #define JME_DESC_INC(x, y) ((x) = ((x) + 1) % (y))
115 #define JME_DESC_ADD(x, d, y) ((x) = ((x) + (d)) % (y))
119 bus_dmamap_t tx_dmamap;
121 struct jme_desc *tx_desc;
127 bus_dmamap_t rx_dmamap;
128 struct jme_desc *rx_desc;
137 struct lwkt_serialize jme_rx_serialize;
138 struct jme_softc *jme_sc;
140 uint32_t jme_rx_coal;
141 uint32_t jme_rx_comp;
142 uint32_t jme_rx_empty;
145 bus_dma_tag_t jme_rx_tag; /* RX mbuf tag */
146 bus_dmamap_t jme_rx_sparemap;
147 struct jme_rxdesc *jme_rxdesc;
149 struct jme_desc *jme_rx_ring;
150 bus_addr_t jme_rx_ring_paddr;
151 bus_dma_tag_t jme_rx_ring_tag;
152 bus_dmamap_t jme_rx_ring_map;
158 struct mbuf *jme_rxhead;
159 struct mbuf *jme_rxtail;
165 struct jme_chain_data {
169 bus_dma_tag_t jme_ring_tag; /* parent ring tag */
170 bus_dma_tag_t jme_buffer_tag; /* parent mbuf/ssb tag */
173 * Shadow status block
175 struct jme_ssb *jme_ssb_block;
176 bus_addr_t jme_ssb_block_paddr;
177 bus_dma_tag_t jme_ssb_tag;
178 bus_dmamap_t jme_ssb_map;
183 struct lwkt_serialize jme_tx_serialize;
184 struct jme_softc *jme_sc;
185 bus_dma_tag_t jme_tx_tag; /* TX mbuf tag */
186 struct jme_txdesc *jme_txdesc;
188 struct jme_desc *jme_tx_ring;
189 bus_addr_t jme_tx_ring_paddr;
190 bus_dma_tag_t jme_tx_ring_tag;
191 bus_dmamap_t jme_tx_ring_map;
199 struct jme_rxdata jme_rx_data[JME_NRXRING_MAX];
202 struct jme_msix_data {
205 u_int jme_msix_vector;
206 uint32_t jme_msix_intrs;
207 struct resource *jme_msix_res;
208 void *jme_msix_handle;
209 struct lwkt_serialize *jme_msix_serialize;
210 char jme_msix_desc[64];
212 driver_intr_t *jme_msix_func;
216 #define JME_TX_RING_SIZE(sc) \
217 (sizeof(struct jme_desc) * (sc)->jme_cdata.jme_tx_desc_cnt)
218 #define JME_RX_RING_SIZE(rdata) \
219 (sizeof(struct jme_desc) * (rdata)->jme_rx_desc_cnt)
220 #define JME_SSB_SIZE sizeof(struct jme_ssb)
223 * Software state per device.
226 struct arpcom arpcom;
230 struct resource *jme_mem_res;
231 bus_space_tag_t jme_mem_bt;
232 bus_space_handle_t jme_mem_bh;
236 struct resource *jme_irq_res;
237 void *jme_irq_handle;
238 struct jme_msix_data jme_msix[JME_NMSIX];
240 uint32_t jme_msinum[JME_MSINUM_CNT];
248 bus_addr_t jme_lowaddr;
251 uint32_t jme_clksrc_1000;
252 uint32_t jme_tx_dma_size;
253 uint32_t jme_rx_dma_size;
256 #define JME_CAP_FPGA 0x0001
257 #define JME_CAP_PCIE 0x0002
258 #define JME_CAP_PMCAP 0x0004
259 #define JME_CAP_FASTETH 0x0008
260 #define JME_CAP_JUMBO 0x0010
262 uint32_t jme_workaround;
263 #define JME_WA_EXTFIFO 0x0001
264 #define JME_WA_HDX 0x0002
266 boolean_t jme_has_link;
267 boolean_t jme_in_tick;
269 struct lwkt_serialize jme_serialize;
270 struct lwkt_serialize *jme_serialize_arr[JME_NSERIALIZE];
271 int jme_serialize_cnt;
273 struct callout jme_tick_ch;
274 struct jme_chain_data jme_cdata;
279 struct sysctl_ctx_list jme_sysctl_ctx;
280 struct sysctl_oid *jme_sysctl_tree;
292 /* Register access macros. */
293 #define CSR_WRITE_4(_sc, reg, val) \
294 bus_space_write_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg), (val))
295 #define CSR_READ_4(_sc, reg) \
296 bus_space_read_4((_sc)->jme_mem_bt, (_sc)->jme_mem_bh, (reg))
300 #define JME_RXCHAIN_RESET(rdata) \
302 (rdata)->jme_rxhead = NULL; \
303 (rdata)->jme_rxtail = NULL; \
304 (rdata)->jme_rxlen = 0; \
307 #define JME_TX_TIMEOUT 5
308 #define JME_TIMEOUT 1000
309 #define JME_PHY_TIMEOUT 1000
310 #define JME_EEPROM_TIMEOUT 1000
312 #define JME_TXD_RSVD 1
313 /* Large enough to cooperate 64K TSO segment and one spare TX descriptor */
314 #define JME_TXD_SPARE 34
316 #define JME_ENABLE_HWRSS(sc) \
317 ((sc)->jme_cdata.jme_rx_ring_cnt > JME_NRXRING_MIN)