2 * Copyright (c) 1990 The Regents of the University of California.
5 * This code is derived from software contributed to Berkeley by
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by the University of
19 * California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * from: @(#)tss.h 5.4 (Berkeley) 1/18/91
37 * $FreeBSD: src/sys/amd64/include/tss.h,v 1.15 2003/11/17 08:58:14 peter Exp $
38 * $DragonFly: src/sys/cpu/amd64/include/tss.h,v 1.1 2007/08/21 19:40:24 corecode Exp $
45 * amd64 Context Data Type
47 * The alignment is pretty messed up here due to reuse of the original 32 bit
48 * fields. It might be worth trying to set the tss on a +4 byte offset to
49 * make the 64 bit fields aligned in practice.
53 u_int64_t tss_rsp0 __packed; /* kernel stack pointer ring 0 */
54 u_int64_t tss_rsp1 __packed; /* kernel stack pointer ring 1 */
55 u_int64_t tss_rsp2 __packed; /* kernel stack pointer ring 2 */
59 u_int64_t tss_ist1 __packed; /* Interrupt stack table 1 */
60 u_int64_t tss_ist2 __packed; /* Interrupt stack table 2 */
61 u_int64_t tss_ist3 __packed; /* Interrupt stack table 3 */
62 u_int64_t tss_ist4 __packed; /* Interrupt stack table 4 */
63 u_int64_t tss_ist5 __packed; /* Interrupt stack table 5 */
64 u_int64_t tss_ist6 __packed; /* Interrupt stack table 6 */
65 u_int64_t tss_ist7 __packed; /* Interrupt stack table 7 */
69 u_int16_t tss_iobase; /* io bitmap offset */
72 #endif /* _CPU_TSS_H_ */