2 * Copyright 2009 Jerome Glisse.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Authors: Jerome Glisse
24 * $FreeBSD: head/sys/dev/drm2/radeon/radeon_benchmark.c 254885 2013-08-25 19:37:15Z dumbbell $
28 #include <uapi_drm/radeon_drm.h>
29 #include "radeon_reg.h"
32 #define RADEON_BENCHMARK_COPY_BLIT 1
33 #define RADEON_BENCHMARK_COPY_DMA 0
35 #define RADEON_BENCHMARK_ITERATIONS 1024
36 #define RADEON_BENCHMARK_COMMON_MODES_N 17
38 static int radeon_benchmark_do_move(struct radeon_device *rdev, unsigned size,
39 uint64_t saddr, uint64_t daddr,
42 unsigned long start_jiffies;
43 unsigned long end_jiffies;
44 struct radeon_fence *fence = NULL;
47 start_jiffies = jiffies;
48 for (i = 0; i < n; i++) {
50 case RADEON_BENCHMARK_COPY_DMA:
51 r = radeon_copy_dma(rdev, saddr, daddr,
52 size / RADEON_GPU_PAGE_SIZE,
55 case RADEON_BENCHMARK_COPY_BLIT:
56 r = radeon_copy_blit(rdev, saddr, daddr,
57 size / RADEON_GPU_PAGE_SIZE,
61 DRM_ERROR("Unknown copy method\n");
66 r = radeon_fence_wait(fence, false);
69 radeon_fence_unref(&fence);
71 end_jiffies = jiffies;
72 r = jiffies_to_msecs(end_jiffies - start_jiffies);
76 radeon_fence_unref(&fence);
81 static void radeon_benchmark_log_results(int n, unsigned size,
83 unsigned sdomain, unsigned ddomain,
86 unsigned int throughput = (n * (size >> 10)) / time;
87 DRM_INFO("radeon: %s %u bo moves of %u kB from"
88 " %d to %d in %u ms, throughput: %u Mb/s or %u MB/s\n",
89 kind, n, size >> 10, sdomain, ddomain, time,
90 throughput * 8, throughput);
93 static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size,
94 unsigned sdomain, unsigned ddomain)
96 struct radeon_bo *dobj = NULL;
97 struct radeon_bo *sobj = NULL;
98 uint64_t saddr, daddr;
102 n = RADEON_BENCHMARK_ITERATIONS;
103 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, NULL, &sobj);
107 r = radeon_bo_reserve(sobj, false);
108 if (unlikely(r != 0))
110 r = radeon_bo_pin(sobj, sdomain, &saddr);
111 radeon_bo_unreserve(sobj);
115 r = radeon_bo_create(rdev, size, PAGE_SIZE, true, ddomain, NULL, &dobj);
119 r = radeon_bo_reserve(dobj, false);
120 if (unlikely(r != 0))
122 r = radeon_bo_pin(dobj, ddomain, &daddr);
123 radeon_bo_unreserve(dobj);
128 if (rdev->asic->copy.dma) {
129 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
130 RADEON_BENCHMARK_COPY_DMA, n);
134 radeon_benchmark_log_results(n, size, time,
135 sdomain, ddomain, "dma");
138 if (rdev->asic->copy.blit) {
139 time = radeon_benchmark_do_move(rdev, size, saddr, daddr,
140 RADEON_BENCHMARK_COPY_BLIT, n);
144 radeon_benchmark_log_results(n, size, time,
145 sdomain, ddomain, "blit");
150 r = radeon_bo_reserve(sobj, false);
151 if (likely(r == 0)) {
152 radeon_bo_unpin(sobj);
153 radeon_bo_unreserve(sobj);
155 radeon_bo_unref(&sobj);
158 r = radeon_bo_reserve(dobj, false);
159 if (likely(r == 0)) {
160 radeon_bo_unpin(dobj);
161 radeon_bo_unreserve(dobj);
163 radeon_bo_unref(&dobj);
167 DRM_ERROR("Error while benchmarking BO move.\n");
171 void radeon_benchmark(struct radeon_device *rdev, int test_number)
174 int common_modes[RADEON_BENCHMARK_COMMON_MODES_N] = {
194 switch (test_number) {
196 /* simple test, VRAM to GTT and GTT to VRAM */
197 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_GTT,
198 RADEON_GEM_DOMAIN_VRAM);
199 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
200 RADEON_GEM_DOMAIN_GTT);
203 /* simple test, VRAM to VRAM */
204 radeon_benchmark_move(rdev, 1024*1024, RADEON_GEM_DOMAIN_VRAM,
205 RADEON_GEM_DOMAIN_VRAM);
208 /* GTT to VRAM, buffer size sweep, powers of 2 */
209 for (i = 1; i <= 16384; i <<= 1)
210 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
211 RADEON_GEM_DOMAIN_GTT,
212 RADEON_GEM_DOMAIN_VRAM);
215 /* VRAM to GTT, buffer size sweep, powers of 2 */
216 for (i = 1; i <= 16384; i <<= 1)
217 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
218 RADEON_GEM_DOMAIN_VRAM,
219 RADEON_GEM_DOMAIN_GTT);
222 /* VRAM to VRAM, buffer size sweep, powers of 2 */
223 for (i = 1; i <= 16384; i <<= 1)
224 radeon_benchmark_move(rdev, i * RADEON_GPU_PAGE_SIZE,
225 RADEON_GEM_DOMAIN_VRAM,
226 RADEON_GEM_DOMAIN_VRAM);
229 /* GTT to VRAM, buffer size sweep, common modes */
230 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
231 radeon_benchmark_move(rdev, common_modes[i],
232 RADEON_GEM_DOMAIN_GTT,
233 RADEON_GEM_DOMAIN_VRAM);
236 /* VRAM to GTT, buffer size sweep, common modes */
237 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
238 radeon_benchmark_move(rdev, common_modes[i],
239 RADEON_GEM_DOMAIN_VRAM,
240 RADEON_GEM_DOMAIN_GTT);
243 /* VRAM to VRAM, buffer size sweep, common modes */
244 for (i = 0; i < RADEON_BENCHMARK_COMMON_MODES_N; i++)
245 radeon_benchmark_move(rdev, common_modes[i],
246 RADEON_GEM_DOMAIN_VRAM,
247 RADEON_GEM_DOMAIN_VRAM);
251 DRM_ERROR("Unknown benchmark\n");