2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
8 * This code is derived from software contributed to Berkeley by
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
43 #include "use_ether.h"
44 //#include "use_npx.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_msgbuf.h"
56 #include <sys/param.h>
57 #include <sys/systm.h>
58 #include <sys/sysproto.h>
59 #include <sys/signalvar.h>
60 #include <sys/kernel.h>
61 #include <sys/linker.h>
62 #include <sys/malloc.h>
66 #include <sys/reboot.h>
68 #include <sys/msgbuf.h>
69 #include <sys/sysent.h>
70 #include <sys/sysctl.h>
71 #include <sys/vmmeter.h>
73 #include <sys/upcall.h>
74 #include <sys/usched.h>
78 #include <vm/vm_param.h>
80 #include <vm/vm_kern.h>
81 #include <vm/vm_object.h>
82 #include <vm/vm_page.h>
83 #include <vm/vm_map.h>
84 #include <vm/vm_pager.h>
85 #include <vm/vm_extern.h>
87 #include <sys/thread2.h>
88 #include <sys/mplock2.h>
96 #include <machine/cpu.h>
97 #include <machine/clock.h>
98 #include <machine/specialreg.h>
100 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/metadata.h>
104 #include <machine/pc/bios.h>
105 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
106 #include <machine/globaldata.h> /* CPU_prvspace */
107 #include <machine/smp.h>
109 #include <machine/perfmon.h>
111 #include <machine/cputypes.h>
114 #include <bus/isa/isa_device.h>
116 #include <machine_base/isa/intr_machdep.h>
117 #include <bus/isa/rtc.h>
118 #include <sys/random.h>
119 #include <sys/ptrace.h>
120 #include <machine/sigframe.h>
122 #include <sys/machintr.h>
124 #define PHYSMAP_ENTRIES 10
126 extern void init386(int first);
127 extern void dblfault_handler(void);
128 extern u_int64_t hammer_time(u_int64_t, u_int64_t);
130 extern void printcpuinfo(void); /* XXX header file */
131 extern void identify_cpu(void);
133 extern void finishidentcpu(void);
135 extern void panicifcpuunsupported(void);
137 static void cpu_startup(void *);
138 #ifndef CPU_DISABLE_SSE
139 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
140 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
141 #endif /* CPU_DISABLE_SSE */
143 extern void ffs_rawread_setup(void);
144 #endif /* DIRECTIO */
145 static void init_locks(void);
147 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
150 extern vm_offset_t ksym_start, ksym_end;
157 struct privatespace CPU_prvspace[MAXCPU];
159 int _udatasel, _ucodesel, _ucode32sel;
162 int64_t tsc_offsets[MAXCPU];
164 int64_t tsc_offsets[1];
167 #if defined(SWTCH_OPTIM_STATS)
168 extern int swtch_optim_stats;
169 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
170 CTLFLAG_RD, &swtch_optim_stats, 0, "");
171 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
172 CTLFLAG_RD, &tlb_flush_count, 0, "");
177 u_long ebda_addr = 0;
180 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
182 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
186 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
187 0, 0, sysctl_hw_physmem, "IU", "");
190 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
192 int error = sysctl_handle_int(oidp, 0,
193 ctob(physmem - vmstats.v_wire_count), req);
197 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
198 0, 0, sysctl_hw_usermem, "IU", "");
201 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
203 int error = sysctl_handle_int(oidp, 0,
204 x86_64_btop(avail_end - avail_start), req);
208 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
209 0, 0, sysctl_hw_availpages, "I", "");
215 * The number of PHYSMAP entries must be one less than the number of
216 * PHYSSEG entries because the PHYSMAP entry that spans the largest
217 * physical address that is accessible by ISA DMA is split into two
220 #define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
222 vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
223 vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
225 /* must be 2 less so 0 0 can signal end of chunks */
226 #define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
227 #define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
229 static vm_offset_t buffer_sva, buffer_eva;
230 vm_offset_t clean_sva, clean_eva;
231 static vm_offset_t pager_sva, pager_eva;
232 static struct trapframe proc0_tf;
235 cpu_startup(void *dummy)
239 vm_offset_t firstaddr;
241 if (boothowto & RB_VERBOSE)
245 * Good {morning,afternoon,evening,night}.
247 kprintf("%s", version);
250 panicifcpuunsupported();
254 kprintf("real memory = %ju (%ju MB)\n",
256 (intmax_t)Realmem / 1024 / 1024);
258 * Display any holes after the first chunk of extended memory.
263 kprintf("Physical memory chunk(s):\n");
264 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
265 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
267 kprintf("0x%08jx - 0x%08jx, %ju bytes (%ju pages)\n",
268 (intmax_t)phys_avail[indx],
269 (intmax_t)phys_avail[indx + 1] - 1,
271 (intmax_t)(size1 / PAGE_SIZE));
276 * Allocate space for system data structures.
277 * The first available kernel virtual address is in "v".
278 * As pages of kernel virtual memory are allocated, "v" is incremented.
279 * As pages of memory are allocated and cleared,
280 * "firstaddr" is incremented.
281 * An index into the kernel page table corresponding to the
282 * virtual memory address maintained in "v" is kept in "mapaddr".
286 * Make two passes. The first pass calculates how much memory is
287 * needed and allocates it. The second pass assigns virtual
288 * addresses to the various data structures.
292 v = (caddr_t)firstaddr;
294 #define valloc(name, type, num) \
295 (name) = (type *)v; v = (caddr_t)((name)+(num))
296 #define valloclim(name, type, num, lim) \
297 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
300 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
301 * For the first 64MB of ram nominally allocate sufficient buffers to
302 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
303 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
304 * the buffer cache we limit the eventual kva reservation to
307 * factor represents the 1/4 x ram conversion.
310 int factor = 4 * BKVASIZE / 1024;
311 int kbytes = physmem * (PAGE_SIZE / 1024);
315 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
317 nbuf += (kbytes - 65536) * 2 / (factor * 5);
318 if (maxbcache && nbuf > maxbcache / BKVASIZE)
319 nbuf = maxbcache / BKVASIZE;
323 * Do not allow the buffer_map to be more then 1/2 the size of the
326 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
327 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
328 kprintf("Warning: nbufs capped at %d\n", nbuf);
331 nswbuf = max(min(nbuf/4, 256), 16);
333 if (nswbuf < NSWBUF_MIN)
340 valloc(swbuf, struct buf, nswbuf);
341 valloc(buf, struct buf, nbuf);
344 * End of first pass, size has been calculated so allocate memory
346 if (firstaddr == 0) {
347 size = (vm_size_t)(v - firstaddr);
348 firstaddr = kmem_alloc(&kernel_map, round_page(size));
350 panic("startup: no room for tables");
355 * End of second pass, addresses have been assigned
357 if ((vm_size_t)(v - firstaddr) != size)
358 panic("startup: table size inconsistency");
360 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
361 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
362 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
364 buffer_map.system_map = 1;
365 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
366 (nswbuf*MAXPHYS) + pager_map_size);
367 pager_map.system_map = 1;
369 #if defined(USERCONFIG)
371 cninit(); /* the preferred console may have changed */
374 kprintf("avail memory = %ju (%ju MB)\n",
375 (uintmax_t)ptoa(vmstats.v_free_count),
376 (uintmax_t)ptoa(vmstats.v_free_count) / 1024 / 1024);
379 * Set up buffers, so they can be used to read disk labels.
382 vm_pager_bufferinit();
386 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
388 mp_start(); /* fire up the APs and APICs */
395 * Send an interrupt to process.
397 * Stack is set up to allow sigcode stored
398 * at top to call routine, followed by kcall
399 * to sigreturn routine below. After sigreturn
400 * resets the signal mask, the stack, and the
401 * frame pointer, it returns to the user
405 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
407 struct lwp *lp = curthread->td_lwp;
408 struct proc *p = lp->lwp_proc;
409 struct trapframe *regs;
410 struct sigacts *psp = p->p_sigacts;
411 struct sigframe sf, *sfp;
415 regs = lp->lwp_md.md_regs;
416 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
418 /* Save user context */
419 bzero(&sf, sizeof(struct sigframe));
420 sf.sf_uc.uc_sigmask = *mask;
421 sf.sf_uc.uc_stack = lp->lwp_sigstk;
422 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
423 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
424 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
426 /* Make the size of the saved context visible to userland */
427 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
429 /* Save mailbox pending state for syscall interlock semantics */
430 if (p->p_flag & P_MAILBOX)
431 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
433 /* Allocate and validate space for the signal handler context. */
434 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
435 SIGISMEMBER(psp->ps_sigonstack, sig)) {
436 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
437 sizeof(struct sigframe));
438 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
440 /* We take red zone into account */
441 sp = (char *)regs->tf_rsp - sizeof(struct sigframe) - 128;
444 /* Align to 16 bytes */
445 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL);
447 /* Translate the signal is appropriate */
448 if (p->p_sysent->sv_sigtbl) {
449 if (sig <= p->p_sysent->sv_sigsize)
450 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
454 * Build the argument list for the signal handler.
456 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
458 regs->tf_rdi = sig; /* argument 1 */
459 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
461 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
463 * Signal handler installed with SA_SIGINFO.
465 * action(signo, siginfo, ucontext)
467 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
468 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
469 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
471 /* fill siginfo structure */
472 sf.sf_si.si_signo = sig;
473 sf.sf_si.si_code = code;
474 sf.sf_si.si_addr = (void *)regs->tf_addr;
477 * Old FreeBSD-style arguments.
479 * handler (signo, code, [uc], addr)
481 regs->tf_rsi = (register_t)code; /* argument 2 */
482 regs->tf_rcx = (register_t)regs->tf_addr; /* argument 4 */
483 sf.sf_ahu.sf_handler = catcher;
487 * If we're a vm86 process, we want to save the segment registers.
488 * We also change eflags to be our emulated eflags, not the actual
492 if (regs->tf_eflags & PSL_VM) {
493 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
494 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
496 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
497 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
498 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
499 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
501 if (vm86->vm86_has_vme == 0)
502 sf.sf_uc.uc_mcontext.mc_eflags =
503 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
504 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
507 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
508 * syscalls made by the signal handler. This just avoids
509 * wasting time for our lazy fixup of such faults. PSL_NT
510 * does nothing in vm86 mode, but vm86 programs can set it
511 * almost legitimately in probes for old cpu types.
513 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
518 * Save the FPU state and reinit the FP unit
520 npxpush(&sf.sf_uc.uc_mcontext);
523 * Copy the sigframe out to the user's stack.
525 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
527 * Something is wrong with the stack pointer.
528 * ...Kill the process.
533 regs->tf_rsp = (register_t)sfp;
534 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
537 * i386 abi specifies that the direction flag must be cleared
540 regs->tf_rflags &= ~(PSL_T|PSL_D);
543 * 64 bit mode has a code and stack selector but
544 * no data or extra selector. %fs and %gs are not
547 regs->tf_cs = _ucodesel;
548 regs->tf_ss = _udatasel;
552 * Sanitize the trapframe for a virtual kernel passing control to a custom
553 * VM context. Remove any items that would otherwise create a privilage
556 * XXX at the moment we allow userland to set the resume flag. Is this a
560 cpu_sanitize_frame(struct trapframe *frame)
562 frame->tf_cs = _ucodesel;
563 frame->tf_ss = _udatasel;
564 /* XXX VM (8086) mode not supported? */
565 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
566 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
572 * Sanitize the tls so loading the descriptor does not blow up
573 * on us. For x86_64 we don't have to do anything.
576 cpu_sanitize_tls(struct savetls *tls)
582 * sigreturn(ucontext_t *sigcntxp)
584 * System call to cleanup state after a signal
585 * has been taken. Reset signal mask and
586 * stack state from context left by sendsig (above).
587 * Return to previous pc and psl as specified by
588 * context left by sendsig. Check carefully to
589 * make sure that the user has not modified the
590 * state to gain improper privileges.
594 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
595 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
598 sys_sigreturn(struct sigreturn_args *uap)
600 struct lwp *lp = curthread->td_lwp;
601 struct proc *p = lp->lwp_proc;
602 struct trapframe *regs;
610 * We have to copy the information into kernel space so userland
611 * can't modify it while we are sniffing it.
613 regs = lp->lwp_md.md_regs;
614 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
618 rflags = ucp->uc_mcontext.mc_rflags;
620 /* VM (8086) mode not supported */
621 rflags &= ~PSL_VM_UNSUPP;
624 if (eflags & PSL_VM) {
625 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
626 struct vm86_kernel *vm86;
629 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
630 * set up the vm86 area, and we can't enter vm86 mode.
632 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
634 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
635 if (vm86->vm86_inited == 0)
638 /* go back to user mode if both flags are set */
639 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
640 trapsignal(lp, SIGBUS, 0);
642 if (vm86->vm86_has_vme) {
643 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
644 (eflags & VME_USERCHANGE) | PSL_VM;
646 vm86->vm86_eflags = eflags; /* save VIF, VIP */
647 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
648 (eflags & VM_USERCHANGE) | PSL_VM;
650 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
651 tf->tf_eflags = eflags;
652 tf->tf_vm86_ds = tf->tf_ds;
653 tf->tf_vm86_es = tf->tf_es;
654 tf->tf_vm86_fs = tf->tf_fs;
655 tf->tf_vm86_gs = tf->tf_gs;
656 tf->tf_ds = _udatasel;
657 tf->tf_es = _udatasel;
658 tf->tf_fs = _udatasel;
659 tf->tf_gs = _udatasel;
664 * Don't allow users to change privileged or reserved flags.
667 * XXX do allow users to change the privileged flag PSL_RF.
668 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
669 * should sometimes set it there too. tf_eflags is kept in
670 * the signal context during signal handling and there is no
671 * other place to remember it, so the PSL_RF bit may be
672 * corrupted by the signal handler without us knowing.
673 * Corruption of the PSL_RF bit at worst causes one more or
674 * one less debugger trap, so allowing it is fairly harmless.
676 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
677 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
682 * Don't allow users to load a valid privileged %cs. Let the
683 * hardware check for invalid selectors, excess privilege in
684 * other selectors, invalid %eip's and invalid %esp's.
686 cs = ucp->uc_mcontext.mc_cs;
687 if (!CS_SECURE(cs)) {
688 kprintf("sigreturn: cs = 0x%x\n", cs);
689 trapsignal(lp, SIGBUS, T_PROTFLT);
692 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
696 * Restore the FPU state from the frame
699 npxpop(&ucp->uc_mcontext);
702 * Merge saved signal mailbox pending flag to maintain interlock
703 * semantics against system calls.
705 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
706 p->p_flag |= P_MAILBOX;
708 if (ucp->uc_mcontext.mc_onstack & 1)
709 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
711 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
713 lp->lwp_sigmask = ucp->uc_sigmask;
714 SIG_CANTMASK(lp->lwp_sigmask);
720 * Stack frame on entry to function. %rax will contain the function vector,
721 * %rcx will contain the function data. flags, rcx, and rax will have
722 * already been pushed on the stack.
733 sendupcall(struct vmupcall *vu, int morepending)
735 struct lwp *lp = curthread->td_lwp;
736 struct trapframe *regs;
737 struct upcall upcall;
738 struct upc_frame upc_frame;
742 * If we are a virtual kernel running an emulated user process
743 * context, switch back to the virtual kernel context before
744 * trying to post the signal.
746 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
747 lp->lwp_md.md_regs->tf_trapno = 0;
748 vkernel_trap(lp, lp->lwp_md.md_regs);
752 * Get the upcall data structure
754 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
755 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
758 kprintf("bad upcall address\n");
763 * If the data structure is already marked pending or has a critical
764 * section count, mark the data structure as pending and return
765 * without doing an upcall. vu_pending is left set.
767 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
768 if (upcall.upc_pending < vu->vu_pending) {
769 upcall.upc_pending = vu->vu_pending;
770 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
771 sizeof(upcall.upc_pending));
777 * We can run this upcall now, clear vu_pending.
779 * Bump our critical section count and set or clear the
780 * user pending flag depending on whether more upcalls are
781 * pending. The user will be responsible for calling
782 * upc_dispatch(-1) to process remaining upcalls.
785 upcall.upc_pending = morepending;
787 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
788 sizeof(upcall.upc_pending));
789 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
793 * Construct a stack frame and issue the upcall
795 regs = lp->lwp_md.md_regs;
796 upc_frame.rax = regs->tf_rax;
797 upc_frame.rcx = regs->tf_rcx;
798 upc_frame.rdx = regs->tf_rdx;
799 upc_frame.flags = regs->tf_rflags;
800 upc_frame.oldip = regs->tf_rip;
801 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
802 sizeof(upc_frame)) != 0) {
803 kprintf("bad stack on upcall\n");
805 regs->tf_rax = (register_t)vu->vu_func;
806 regs->tf_rcx = (register_t)vu->vu_data;
807 regs->tf_rdx = (register_t)lp->lwp_upcall;
808 regs->tf_rip = (register_t)vu->vu_ctx;
809 regs->tf_rsp -= sizeof(upc_frame);
814 * fetchupcall occurs in the context of a system call, which means that
815 * we have to return EJUSTRETURN in order to prevent eax and edx from
816 * being overwritten by the syscall return value.
818 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
819 * and the function pointer in %eax.
822 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
824 struct upc_frame upc_frame;
825 struct lwp *lp = curthread->td_lwp;
826 struct trapframe *regs;
828 struct upcall upcall;
831 regs = lp->lwp_md.md_regs;
833 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
837 * This jumps us to the next ready context.
840 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
843 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
846 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
847 regs->tf_rax = (register_t)vu->vu_func;
848 regs->tf_rcx = (register_t)vu->vu_data;
849 regs->tf_rdx = (register_t)lp->lwp_upcall;
850 regs->tf_rip = (register_t)vu->vu_ctx;
851 regs->tf_rsp = (register_t)rsp;
854 * This returns us to the originally interrupted code.
856 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
857 regs->tf_rax = upc_frame.rax;
858 regs->tf_rcx = upc_frame.rcx;
859 regs->tf_rdx = upc_frame.rdx;
860 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
861 (upc_frame.flags & PSL_USERCHANGE);
862 regs->tf_rip = upc_frame.oldip;
863 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
872 * Machine dependent boot() routine
874 * I haven't seen anything to put here yet
875 * Possibly some stuff might be grafted back here from boot()
883 * Shutdown the CPU as much as possible
889 __asm__ __volatile("hlt");
893 * cpu_idle() represents the idle LWKT. You cannot return from this function
894 * (unless you want to blow things up!). Instead we look for runnable threads
895 * and loop or halt as appropriate. Giant is not held on entry to the thread.
897 * The main loop is entered with a critical section held, we must release
898 * the critical section before doing anything else. lwkt_switch() will
899 * check for pending interrupts due to entering and exiting its own
902 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
903 * to wake a HLTed cpu up. However, there are cases where the idlethread
904 * will be entered with the possibility that no IPI will occur and in such
905 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
907 static int cpu_idle_hlt = 1;
908 static int cpu_idle_hltcnt;
909 static int cpu_idle_spincnt;
910 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
911 &cpu_idle_hlt, 0, "Idle loop HLT enable");
912 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
913 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
914 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
915 &cpu_idle_spincnt, 0, "Idle loop entry spins");
918 cpu_idle_default_hook(void)
921 * We must guarentee that hlt is exactly the instruction
924 __asm __volatile("sti; hlt");
927 /* Other subsystems (e.g., ACPI) can hook this later. */
928 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
933 struct thread *td = curthread;
936 KKASSERT(td->td_critcount == 0);
939 * See if there are any LWKTs ready to go.
944 * If we are going to halt call splz unconditionally after
945 * CLIing to catch any interrupt races. Note that we are
946 * at SPL0 and interrupts are enabled.
948 if (cpu_idle_hlt && !lwkt_runnable() &&
949 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
950 __asm __volatile("cli");
952 if (!lwkt_runnable())
956 handle_cpu_contention_mask();
960 td->td_flags &= ~TDF_IDLE_NOHLT;
963 __asm __volatile("sti");
964 handle_cpu_contention_mask();
966 __asm __volatile("sti");
976 * This routine is called when the only runnable threads require
977 * the MP lock, and the scheduler couldn't get it. On a real cpu
978 * we let the scheduler spin.
981 handle_cpu_contention_mask(void)
985 mask = cpu_contention_mask;
987 if (mask && bsfl(mask) != mycpu->gd_cpuid)
992 * This routine is called if a spinlock has been held through the
993 * exponential backoff period and is seriously contested. On a real cpu
997 cpu_spinlock_contested(void)
1005 * Clear registers on exec
1008 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1010 struct thread *td = curthread;
1011 struct lwp *lp = td->td_lwp;
1012 struct pcb *pcb = td->td_pcb;
1013 struct trapframe *regs = lp->lwp_md.md_regs;
1015 /* was i386_user_cleanup() in NetBSD */
1018 bzero((char *)regs, sizeof(struct trapframe));
1019 regs->tf_rip = entry;
1020 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1021 regs->tf_rdi = stack; /* argv */
1022 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1023 regs->tf_ss = _udatasel;
1024 regs->tf_cs = _ucodesel;
1025 regs->tf_rbx = ps_strings;
1028 * Reset the hardware debug registers if they were in use.
1029 * They won't have any meaning for the newly exec'd process.
1031 if (pcb->pcb_flags & PCB_DBREGS) {
1037 pcb->pcb_dr7 = 0; /* JG set bit 10? */
1038 if (pcb == td->td_pcb) {
1040 * Clear the debug registers on the running
1041 * CPU, otherwise they will end up affecting
1042 * the next process we switch to.
1046 pcb->pcb_flags &= ~PCB_DBREGS;
1050 * Initialize the math emulator (if any) for the current process.
1051 * Actually, just clear the bit that says that the emulator has
1052 * been initialized. Initialization is delayed until the process
1053 * traps to the emulator (if it is done at all) mainly because
1054 * emulators don't provide an entry point for initialization.
1056 pcb->pcb_flags &= ~FP_SOFTFP;
1059 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1060 * gd_npxthread. Otherwise a preemptive interrupt thread
1061 * may panic in npxdna().
1064 load_cr0(rcr0() | CR0_MP);
1067 * NOTE: The MSR values must be correct so we can return to
1068 * userland. gd_user_fs/gs must be correct so the switch
1069 * code knows what the current MSR values are.
1071 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
1072 pcb->pcb_gsbase = 0;
1073 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1074 mdcpu->gd_user_gs = 0;
1075 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1076 wrmsr(MSR_KGSBASE, 0);
1078 /* Initialize the npx (if any) for the current process. */
1079 npxinit(__INITIAL_NPXCW__);
1082 pcb->pcb_ds = _udatasel;
1083 pcb->pcb_es = _udatasel;
1084 pcb->pcb_fs = _udatasel;
1085 pcb->pcb_gs = _udatasel;
1094 cr0 |= CR0_NE; /* Done by npxinit() */
1095 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1096 cr0 |= CR0_WP | CR0_AM;
1102 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1105 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1107 if (!error && req->newptr)
1112 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1113 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1115 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1116 CTLFLAG_RW, &disable_rtc_set, 0, "");
1119 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1120 CTLFLAG_RD, &bootinfo, bootinfo, "");
1123 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1124 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1126 extern u_long bootdev; /* not a cdev_t - encoding is different */
1127 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1128 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1131 * Initialize 386 and configure to run kernel
1135 * Initialize segments & interrupt table
1139 struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1140 static struct gate_descriptor idt0[NIDT];
1141 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1143 union descriptor ldt[NLDT]; /* local descriptor table */
1146 /* table descriptors - used to load tables by cpu */
1147 struct region_descriptor r_gdt, r_idt;
1149 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1150 extern int has_f00f_bug;
1153 static char dblfault_stack[PAGE_SIZE] __aligned(16);
1155 /* JG proc0paddr is a virtual address */
1158 char proc0paddr_buff[LWKT_THREAD_STACK];
1161 /* software prototypes -- in more palatable form */
1162 struct soft_segment_descriptor gdt_segs[] = {
1163 /* GNULL_SEL 0 Null Descriptor */
1164 { 0x0, /* segment base address */
1166 0, /* segment type */
1167 0, /* segment descriptor priority level */
1168 0, /* segment descriptor present */
1170 0, /* default 32 vs 16 bit size */
1171 0 /* limit granularity (byte/page units)*/ },
1172 /* GCODE_SEL 1 Code Descriptor for kernel */
1173 { 0x0, /* segment base address */
1174 0xfffff, /* length - all address space */
1175 SDT_MEMERA, /* segment type */
1176 SEL_KPL, /* segment descriptor priority level */
1177 1, /* segment descriptor present */
1179 0, /* default 32 vs 16 bit size */
1180 1 /* limit granularity (byte/page units)*/ },
1181 /* GDATA_SEL 2 Data Descriptor for kernel */
1182 { 0x0, /* segment base address */
1183 0xfffff, /* length - all address space */
1184 SDT_MEMRWA, /* segment type */
1185 SEL_KPL, /* segment descriptor priority level */
1186 1, /* segment descriptor present */
1188 0, /* default 32 vs 16 bit size */
1189 1 /* limit granularity (byte/page units)*/ },
1190 /* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1191 { 0x0, /* segment base address */
1192 0xfffff, /* length - all address space */
1193 SDT_MEMERA, /* segment type */
1194 SEL_UPL, /* segment descriptor priority level */
1195 1, /* segment descriptor present */
1197 1, /* default 32 vs 16 bit size */
1198 1 /* limit granularity (byte/page units)*/ },
1199 /* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1200 { 0x0, /* segment base address */
1201 0xfffff, /* length - all address space */
1202 SDT_MEMRWA, /* segment type */
1203 SEL_UPL, /* segment descriptor priority level */
1204 1, /* segment descriptor present */
1206 1, /* default 32 vs 16 bit size */
1207 1 /* limit granularity (byte/page units)*/ },
1208 /* GUCODE_SEL 5 64 bit Code Descriptor for user */
1209 { 0x0, /* segment base address */
1210 0xfffff, /* length - all address space */
1211 SDT_MEMERA, /* segment type */
1212 SEL_UPL, /* segment descriptor priority level */
1213 1, /* segment descriptor present */
1215 0, /* default 32 vs 16 bit size */
1216 1 /* limit granularity (byte/page units)*/ },
1217 /* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1219 0x0, /* segment base address */
1220 sizeof(struct x86_64tss)-1,/* length - all address space */
1221 SDT_SYSTSS, /* segment type */
1222 SEL_KPL, /* segment descriptor priority level */
1223 1, /* segment descriptor present */
1225 0, /* unused - default 32 vs 16 bit size */
1226 0 /* limit granularity (byte/page units)*/ },
1227 /* Actually, the TSS is a system descriptor which is double size */
1228 { 0x0, /* segment base address */
1230 0, /* segment type */
1231 0, /* segment descriptor priority level */
1232 0, /* segment descriptor present */
1234 0, /* default 32 vs 16 bit size */
1235 0 /* limit granularity (byte/page units)*/ },
1236 /* GUGS32_SEL 8 32 bit GS Descriptor for user */
1237 { 0x0, /* segment base address */
1238 0xfffff, /* length - all address space */
1239 SDT_MEMRWA, /* segment type */
1240 SEL_UPL, /* segment descriptor priority level */
1241 1, /* segment descriptor present */
1243 1, /* default 32 vs 16 bit size */
1244 1 /* limit granularity (byte/page units)*/ },
1248 setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1250 struct gate_descriptor *ip;
1253 ip->gd_looffset = (uintptr_t)func;
1254 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1260 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1263 #define IDTVEC(name) __CONCAT(X,name)
1266 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1267 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1268 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1269 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1270 IDTVEC(xmm), IDTVEC(dblfault),
1271 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1273 #ifdef DEBUG_INTERRUPTS
1274 extern inthand_t *Xrsvdary[256];
1278 sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1280 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1281 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1282 ssd->ssd_type = sd->sd_type;
1283 ssd->ssd_dpl = sd->sd_dpl;
1284 ssd->ssd_p = sd->sd_p;
1285 ssd->ssd_def32 = sd->sd_def32;
1286 ssd->ssd_gran = sd->sd_gran;
1290 ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1293 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1294 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1295 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1296 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1297 sd->sd_type = ssd->ssd_type;
1298 sd->sd_dpl = ssd->ssd_dpl;
1299 sd->sd_p = ssd->ssd_p;
1300 sd->sd_long = ssd->ssd_long;
1301 sd->sd_def32 = ssd->ssd_def32;
1302 sd->sd_gran = ssd->ssd_gran;
1306 ssdtosyssd(struct soft_segment_descriptor *ssd,
1307 struct system_segment_descriptor *sd)
1310 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1311 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1312 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1313 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1314 sd->sd_type = ssd->ssd_type;
1315 sd->sd_dpl = ssd->ssd_dpl;
1316 sd->sd_p = ssd->ssd_p;
1317 sd->sd_gran = ssd->ssd_gran;
1323 * Populate the (physmap) array with base/bound pairs describing the
1324 * available physical memory in the system, then test this memory and
1325 * build the phys_avail array describing the actually-available memory.
1327 * If we cannot accurately determine the physical memory map, then use
1328 * value from the 0xE801 call, and failing that, the RTC.
1330 * Total memory size may be set by the kernel environment variable
1331 * hw.physmem or the compile-time define MAXMEM.
1333 * XXX first should be vm_paddr_t.
1336 getmemsize(caddr_t kmdp, u_int64_t first)
1338 int i, off, physmap_idx, pa_indx, da_indx;
1339 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1340 u_long physmem_tunable;
1342 struct bios_smap *smapbase, *smap, *smapend;
1344 quad_t dcons_addr, dcons_size;
1346 bzero(physmap, sizeof(physmap));
1351 * get memory map from INT 15:E820, kindly supplied by the loader.
1353 * subr_module.c says:
1354 * "Consumer may safely assume that size value precedes data."
1355 * ie: an int32_t immediately precedes smap.
1357 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1358 MODINFO_METADATA | MODINFOMD_SMAP);
1359 if (smapbase == NULL)
1360 panic("No BIOS smap info from loader!");
1362 smapsize = *((u_int32_t *)smapbase - 1);
1363 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1365 for (smap = smapbase; smap < smapend; smap++) {
1366 if (boothowto & RB_VERBOSE)
1367 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1368 smap->type, smap->base, smap->length);
1370 if (smap->type != SMAP_TYPE_MEMORY)
1373 if (smap->length == 0)
1376 for (i = 0; i <= physmap_idx; i += 2) {
1377 if (smap->base < physmap[i + 1]) {
1378 if (boothowto & RB_VERBOSE) {
1379 kprintf("Overlapping or non-monotonic "
1380 "memory region, ignoring "
1386 Realmem += smap->length;
1388 if (smap->base == physmap[physmap_idx + 1]) {
1389 physmap[physmap_idx + 1] += smap->length;
1394 if (physmap_idx == PHYSMAP_SIZE) {
1395 kprintf("Too many segments in the physical "
1396 "address map, giving up\n");
1399 physmap[physmap_idx] = smap->base;
1400 physmap[physmap_idx + 1] = smap->base + smap->length;
1404 * Find the 'base memory' segment for SMP
1407 for (i = 0; i <= physmap_idx; i += 2) {
1408 if (physmap[i] == 0x00000000) {
1409 basemem = physmap[i + 1] / 1024;
1414 panic("BIOS smap did not include a basemem segment!");
1417 /* make hole for AP bootstrap code */
1418 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1420 /* Save EBDA address, if any */
1421 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1426 * Maxmem isn't the "maximum memory", it's one larger than the
1427 * highest page of the physical address space. It should be
1428 * called something like "Maxphyspage". We may adjust this
1429 * based on ``hw.physmem'' and the results of the memory test.
1431 Maxmem = atop(physmap[physmap_idx + 1]);
1434 Maxmem = MAXMEM / 4;
1437 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1438 Maxmem = atop(physmem_tunable);
1441 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1444 if (Maxmem > atop(physmap[physmap_idx + 1]))
1445 Maxmem = atop(physmap[physmap_idx + 1]);
1447 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1448 (boothowto & RB_VERBOSE))
1449 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1451 /* call pmap initialization to make new kernel address space */
1452 pmap_bootstrap(&first);
1455 * Size up each available chunk of physical memory.
1457 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1460 phys_avail[pa_indx++] = physmap[0];
1461 phys_avail[pa_indx] = physmap[0];
1462 dump_avail[da_indx] = physmap[0];
1466 * Get dcons buffer address
1468 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1469 kgetenv_quad("dcons.size", &dcons_size) == 0)
1473 * physmap is in bytes, so when converting to page boundaries,
1474 * round up the start address and round down the end address.
1476 for (i = 0; i <= physmap_idx; i += 2) {
1479 end = ptoa((vm_paddr_t)Maxmem);
1480 if (physmap[i + 1] < end)
1481 end = trunc_page(physmap[i + 1]);
1482 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1483 int tmp, page_bad, full;
1484 int *ptr = (int *)CADDR1;
1488 * block out kernel memory as not available.
1490 if (pa >= 0x100000 && pa < first)
1494 * block out dcons buffer
1497 && pa >= trunc_page(dcons_addr)
1498 && pa < dcons_addr + dcons_size)
1504 * map page into kernel: valid, read/write,non-cacheable
1506 *pte = pa | PG_V | PG_RW | PG_N;
1511 * Test for alternating 1's and 0's
1513 *(volatile int *)ptr = 0xaaaaaaaa;
1514 if (*(volatile int *)ptr != 0xaaaaaaaa)
1517 * Test for alternating 0's and 1's
1519 *(volatile int *)ptr = 0x55555555;
1520 if (*(volatile int *)ptr != 0x55555555)
1525 *(volatile int *)ptr = 0xffffffff;
1526 if (*(volatile int *)ptr != 0xffffffff)
1531 *(volatile int *)ptr = 0x0;
1532 if (*(volatile int *)ptr != 0x0)
1535 * Restore original value.
1540 * Adjust array of valid/good pages.
1542 if (page_bad == TRUE)
1545 * If this good page is a continuation of the
1546 * previous set of good pages, then just increase
1547 * the end pointer. Otherwise start a new chunk.
1548 * Note that "end" points one higher than end,
1549 * making the range >= start and < end.
1550 * If we're also doing a speculative memory
1551 * test and we at or past the end, bump up Maxmem
1552 * so that we keep going. The first bad page
1553 * will terminate the loop.
1555 if (phys_avail[pa_indx] == pa) {
1556 phys_avail[pa_indx] += PAGE_SIZE;
1559 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1561 "Too many holes in the physical address space, giving up\n");
1566 phys_avail[pa_indx++] = pa; /* start */
1567 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1571 if (dump_avail[da_indx] == pa) {
1572 dump_avail[da_indx] += PAGE_SIZE;
1575 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1579 dump_avail[da_indx++] = pa; /* start */
1580 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1592 * The last chunk must contain at least one page plus the message
1593 * buffer to avoid complicating other code (message buffer address
1594 * calculation, etc.).
1596 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1597 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1598 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1599 phys_avail[pa_indx--] = 0;
1600 phys_avail[pa_indx--] = 0;
1603 Maxmem = atop(phys_avail[pa_indx]);
1605 /* Trim off space for the message buffer. */
1606 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1608 avail_end = phys_avail[pa_indx];
1610 /* Map the message buffer. */
1611 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1612 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1617 int apic_io_enable = 1; /* Enabled by default */
1618 TUNABLE_INT("hw.apic_io_enable", &apic_io_enable);
1619 extern struct machintr_abi MachIntrABI_APIC;
1622 extern struct machintr_abi MachIntrABI_ICU;
1623 struct machintr_abi MachIntrABI;
1634 * 7 Device Not Available (x87)
1636 * 9 Coprocessor Segment overrun (unsupported, reserved)
1638 * 11 Segment not present
1640 * 13 General Protection
1643 * 16 x87 FP Exception pending
1644 * 17 Alignment Check
1646 * 19 SIMD floating point
1648 * 32-255 INTn/external sources
1651 hammer_time(u_int64_t modulep, u_int64_t physfree)
1656 int metadata_missing, off;
1658 struct mdglobaldata *gd;
1662 * Prevent lowering of the ipl if we call tsleep() early.
1664 gd = &CPU_prvspace[0].mdglobaldata;
1665 bzero(gd, sizeof(*gd));
1668 * Note: on both UP and SMP curthread must be set non-NULL
1669 * early in the boot sequence because the system assumes
1670 * that 'curthread' is never NULL.
1673 gd->mi.gd_curthread = &thread0;
1674 thread0.td_gd = &gd->mi;
1676 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1679 metadata_missing = 0;
1680 if (bootinfo.bi_modulep) {
1681 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1682 preload_bootstrap_relocate(KERNBASE);
1684 metadata_missing = 1;
1686 if (bootinfo.bi_envp)
1687 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1690 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1691 preload_bootstrap_relocate(PTOV_OFFSET);
1692 kmdp = preload_search_by_type("elf kernel");
1694 kmdp = preload_search_by_type("elf64 kernel");
1695 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1696 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1698 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1699 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1704 * XXX: Where is the correct place for it?
1706 MachIntrABI = MachIntrABI_ICU;
1708 TUNABLE_INT_FETCH("hw.apic_io_enable", &apic_io_enable);
1710 MachIntrABI = MachIntrABI_APIC;
1714 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1715 * and ncpus_fit_mask remain 0.
1720 /* Init basic tunables, hz etc */
1724 * make gdt memory segments
1726 gdt_segs[GPROC0_SEL].ssd_base =
1727 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1729 gd->mi.gd_prvspace = &CPU_prvspace[0];
1731 for (x = 0; x < NGDT; x++) {
1732 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1733 ssdtosd(&gdt_segs[x], &gdt[x]);
1735 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1736 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
1738 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1739 r_gdt.rd_base = (long) gdt;
1742 wrmsr(MSR_FSBASE, 0); /* User value */
1743 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1744 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1746 mi_gdinit(&gd->mi, 0);
1748 proc0paddr = proc0paddr_buff;
1749 mi_proc0init(&gd->mi, proc0paddr);
1750 safepri = TDPRI_MAX;
1752 /* spinlocks and the BGL */
1756 for (x = 0; x < NIDT; x++)
1757 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1758 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1759 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1760 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1761 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1762 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1763 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1764 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1765 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1766 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1767 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1768 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1769 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1770 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1771 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1772 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1773 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1774 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1775 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1776 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1778 r_idt.rd_limit = sizeof(idt0) - 1;
1779 r_idt.rd_base = (long) idt;
1783 * Initialize the console before we print anything out.
1788 if (metadata_missing)
1789 kprintf("WARNING: loader(8) metadata is missing!\n");
1799 if (boothowto & RB_KDB)
1800 Debugger("Boot flags requested debugger");
1804 finishidentcpu(); /* Final stage of CPU initialization */
1805 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1806 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1808 identify_cpu(); /* Final stage of CPU initialization */
1809 initializecpu(); /* Initialize CPU registers */
1811 /* make an initial tss so cpu can get interrupt stack on syscall! */
1812 gd->gd_common_tss.tss_rsp0 =
1813 (register_t)(thread0.td_kstack +
1814 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
1815 /* Ensure the stack is aligned to 16 bytes */
1816 gd->gd_common_tss.tss_rsp0 &= ~0xFul;
1817 gd->gd_rsp0 = gd->gd_common_tss.tss_rsp0;
1819 /* doublefault stack space, runs on ist1 */
1820 gd->gd_common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1822 /* Set the IO permission bitmap (empty due to tss seg limit) */
1823 gd->gd_common_tss.tss_iobase = sizeof(struct x86_64tss);
1825 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1826 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1827 gd->gd_common_tssd = *gd->gd_tss_gdt;
1830 /* Set up the fast syscall stuff */
1831 msr = rdmsr(MSR_EFER) | EFER_SCE;
1832 wrmsr(MSR_EFER, msr);
1833 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1834 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1835 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1836 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1837 wrmsr(MSR_STAR, msr);
1838 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1840 getmemsize(kmdp, physfree);
1841 init_param2(physmem);
1843 /* now running on new page tables, configured,and u/iom is accessible */
1845 /* Map the message buffer. */
1847 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1848 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1851 msgbufinit(msgbufp, MSGBUF_SIZE);
1854 /* transfer to user mode */
1856 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1857 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1858 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1864 /* setup proc 0's pcb */
1865 thread0.td_pcb->pcb_flags = 0;
1866 thread0.td_pcb->pcb_cr3 = KPML4phys;
1867 thread0.td_pcb->pcb_ext = 0;
1868 lwp0.lwp_md.md_regs = &proc0_tf;
1870 /* Location of kernel stack for locore */
1871 return ((u_int64_t)thread0.td_pcb);
1875 * Initialize machine-dependant portions of the global data structure.
1876 * Note that the global data area and cpu0's idlestack in the private
1877 * data space were allocated in locore.
1879 * Note: the idlethread's cpl is 0
1881 * WARNING! Called from early boot, 'mycpu' may not work yet.
1884 cpu_gdinit(struct mdglobaldata *gd, int cpu)
1887 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1889 lwkt_init_thread(&gd->mi.gd_idlethread,
1890 gd->mi.gd_prvspace->idlestack,
1891 sizeof(gd->mi.gd_prvspace->idlestack),
1893 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1894 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1895 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1896 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1900 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1902 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1903 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1910 globaldata_find(int cpu)
1912 KKASSERT(cpu >= 0 && cpu < ncpus);
1913 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1916 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1917 static void f00f_hack(void *unused);
1918 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1921 f00f_hack(void *unused)
1923 struct gate_descriptor *new_idt;
1929 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1931 r_idt.rd_limit = sizeof(idt0) - 1;
1933 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1935 panic("kmem_alloc returned 0");
1936 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1937 panic("kmem_alloc returned non-page-aligned memory");
1938 /* Put the first seven entries in the lower page */
1939 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1940 bcopy(idt, new_idt, sizeof(idt0));
1941 r_idt.rd_base = (int)new_idt;
1944 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1945 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1946 panic("vm_map_protect failed");
1949 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
1952 ptrace_set_pc(struct lwp *lp, unsigned long addr)
1954 lp->lwp_md.md_regs->tf_rip = addr;
1959 ptrace_single_step(struct lwp *lp)
1961 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
1966 fill_regs(struct lwp *lp, struct reg *regs)
1968 struct trapframe *tp;
1970 tp = lp->lwp_md.md_regs;
1971 bcopy(&tp->tf_rdi, ®s->r_rdi, sizeof(*regs));
1976 set_regs(struct lwp *lp, struct reg *regs)
1978 struct trapframe *tp;
1980 tp = lp->lwp_md.md_regs;
1981 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
1982 !CS_SECURE(regs->r_cs))
1984 bcopy(®s->r_rdi, &tp->tf_rdi, sizeof(*regs));
1988 #ifndef CPU_DISABLE_SSE
1990 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
1992 struct env87 *penv_87 = &sv_87->sv_env;
1993 struct envxmm *penv_xmm = &sv_xmm->sv_env;
1996 /* FPU control/status */
1997 penv_87->en_cw = penv_xmm->en_cw;
1998 penv_87->en_sw = penv_xmm->en_sw;
1999 penv_87->en_tw = penv_xmm->en_tw;
2000 penv_87->en_fip = penv_xmm->en_fip;
2001 penv_87->en_fcs = penv_xmm->en_fcs;
2002 penv_87->en_opcode = penv_xmm->en_opcode;
2003 penv_87->en_foo = penv_xmm->en_foo;
2004 penv_87->en_fos = penv_xmm->en_fos;
2007 for (i = 0; i < 8; ++i)
2008 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2010 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2014 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2016 struct env87 *penv_87 = &sv_87->sv_env;
2017 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2020 /* FPU control/status */
2021 penv_xmm->en_cw = penv_87->en_cw;
2022 penv_xmm->en_sw = penv_87->en_sw;
2023 penv_xmm->en_tw = penv_87->en_tw;
2024 penv_xmm->en_fip = penv_87->en_fip;
2025 penv_xmm->en_fcs = penv_87->en_fcs;
2026 penv_xmm->en_opcode = penv_87->en_opcode;
2027 penv_xmm->en_foo = penv_87->en_foo;
2028 penv_xmm->en_fos = penv_87->en_fos;
2031 for (i = 0; i < 8; ++i)
2032 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2034 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2036 #endif /* CPU_DISABLE_SSE */
2039 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2041 #ifndef CPU_DISABLE_SSE
2043 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2044 (struct save87 *)fpregs);
2047 #endif /* CPU_DISABLE_SSE */
2048 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2053 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2055 #ifndef CPU_DISABLE_SSE
2057 set_fpregs_xmm((struct save87 *)fpregs,
2058 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2061 #endif /* CPU_DISABLE_SSE */
2062 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2067 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2070 dbregs->dr[0] = rdr0();
2071 dbregs->dr[1] = rdr1();
2072 dbregs->dr[2] = rdr2();
2073 dbregs->dr[3] = rdr3();
2074 dbregs->dr[4] = rdr4();
2075 dbregs->dr[5] = rdr5();
2076 dbregs->dr[6] = rdr6();
2077 dbregs->dr[7] = rdr7();
2081 pcb = lp->lwp_thread->td_pcb;
2082 dbregs->dr[0] = pcb->pcb_dr0;
2083 dbregs->dr[1] = pcb->pcb_dr1;
2084 dbregs->dr[2] = pcb->pcb_dr2;
2085 dbregs->dr[3] = pcb->pcb_dr3;
2088 dbregs->dr[6] = pcb->pcb_dr6;
2089 dbregs->dr[7] = pcb->pcb_dr7;
2095 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2098 load_dr0(dbregs->dr[0]);
2099 load_dr1(dbregs->dr[1]);
2100 load_dr2(dbregs->dr[2]);
2101 load_dr3(dbregs->dr[3]);
2102 load_dr4(dbregs->dr[4]);
2103 load_dr5(dbregs->dr[5]);
2104 load_dr6(dbregs->dr[6]);
2105 load_dr7(dbregs->dr[7]);
2108 struct ucred *ucred;
2110 uint64_t mask1, mask2;
2113 * Don't let an illegal value for dr7 get set. Specifically,
2114 * check for undefined settings. Setting these bit patterns
2115 * result in undefined behaviour and can lead to an unexpected
2118 /* JG this loop looks unreadable */
2119 /* Check 4 2-bit fields for invalid patterns.
2120 * These fields are R/Wi, for i = 0..3
2122 /* Is 10 in LENi allowed when running in compatibility mode? */
2123 /* Pattern 10 in R/Wi might be used to indicate
2124 * breakpoint on I/O. Further analysis should be
2125 * carried to decide if it is safe and useful to
2126 * provide access to that capability
2128 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2129 i++, mask1 <<= 4, mask2 <<= 4)
2130 if ((dbregs->dr[7] & mask1) == mask2)
2133 pcb = lp->lwp_thread->td_pcb;
2134 ucred = lp->lwp_proc->p_ucred;
2137 * Don't let a process set a breakpoint that is not within the
2138 * process's address space. If a process could do this, it
2139 * could halt the system by setting a breakpoint in the kernel
2140 * (if ddb was enabled). Thus, we need to check to make sure
2141 * that no breakpoints are being enabled for addresses outside
2142 * process's address space, unless, perhaps, we were called by
2145 * XXX - what about when the watched area of the user's
2146 * address space is written into from within the kernel
2147 * ... wouldn't that still cause a breakpoint to be generated
2148 * from within kernel mode?
2151 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2152 if (dbregs->dr[7] & 0x3) {
2153 /* dr0 is enabled */
2154 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
2158 if (dbregs->dr[7] & (0x3<<2)) {
2159 /* dr1 is enabled */
2160 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
2164 if (dbregs->dr[7] & (0x3<<4)) {
2165 /* dr2 is enabled */
2166 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
2170 if (dbregs->dr[7] & (0x3<<6)) {
2171 /* dr3 is enabled */
2172 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
2177 pcb->pcb_dr0 = dbregs->dr[0];
2178 pcb->pcb_dr1 = dbregs->dr[1];
2179 pcb->pcb_dr2 = dbregs->dr[2];
2180 pcb->pcb_dr3 = dbregs->dr[3];
2181 pcb->pcb_dr6 = dbregs->dr[6];
2182 pcb->pcb_dr7 = dbregs->dr[7];
2184 pcb->pcb_flags |= PCB_DBREGS;
2191 * Return > 0 if a hardware breakpoint has been hit, and the
2192 * breakpoint was in user space. Return 0, otherwise.
2195 user_dbreg_trap(void)
2197 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2198 u_int64_t bp; /* breakpoint bits extracted from dr6 */
2199 int nbp; /* number of breakpoints that triggered */
2200 caddr_t addr[4]; /* breakpoint addresses */
2204 if ((dr7 & 0xff) == 0) {
2206 * all GE and LE bits in the dr7 register are zero,
2207 * thus the trap couldn't have been caused by the
2208 * hardware debug registers
2219 * None of the breakpoint bits are set meaning this
2220 * trap was not caused by any of the debug registers
2226 * at least one of the breakpoints were hit, check to see
2227 * which ones and if any of them are user space addresses
2231 addr[nbp++] = (caddr_t)rdr0();
2234 addr[nbp++] = (caddr_t)rdr1();
2237 addr[nbp++] = (caddr_t)rdr2();
2240 addr[nbp++] = (caddr_t)rdr3();
2243 for (i=0; i<nbp; i++) {
2245 (caddr_t)VM_MAX_USER_ADDRESS) {
2247 * addr[i] is in user space
2254 * None of the breakpoints are in user space.
2262 Debugger(const char *msg)
2264 kprintf("Debugger(\"%s\") called.\n", msg);
2271 * Provide inb() and outb() as functions. They are normally only
2272 * available as macros calling inlined functions, thus cannot be
2273 * called inside DDB.
2275 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2281 /* silence compiler warnings */
2283 void outb(u_int, u_char);
2290 * We use %%dx and not %1 here because i/o is done at %dx and not at
2291 * %edx, while gcc generates inferior code (movw instead of movl)
2292 * if we tell it to load (u_short) port.
2294 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2299 outb(u_int port, u_char data)
2303 * Use an unnecessary assignment to help gcc's register allocator.
2304 * This make a large difference for gcc-1.40 and a tiny difference
2305 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2306 * best results. gcc-2.6.0 can't handle this.
2309 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2316 #include "opt_cpu.h"
2320 * initialize all the SMP locks
2323 /* critical region when masking or unmasking interupts */
2324 struct spinlock_deprecated imen_spinlock;
2326 /* critical region for old style disable_intr/enable_intr */
2327 struct spinlock_deprecated mpintr_spinlock;
2329 /* critical region around INTR() routines */
2330 struct spinlock_deprecated intr_spinlock;
2332 /* lock region used by kernel profiling */
2333 struct spinlock_deprecated mcount_spinlock;
2335 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2336 struct spinlock_deprecated com_spinlock;
2338 /* lock regions around the clock hardware */
2339 struct spinlock_deprecated clock_spinlock;
2345 * mp_lock = 0; BSP already owns the MP lock
2348 * Get the initial mp_lock with a count of 1 for the BSP.
2349 * This uses a LOGICAL cpu ID, ie BSP == 0.
2352 cpu_get_initial_mplock();
2355 spin_lock_init(&mcount_spinlock);
2356 spin_lock_init(&intr_spinlock);
2357 spin_lock_init(&mpintr_spinlock);
2358 spin_lock_init(&imen_spinlock);
2359 spin_lock_init(&com_spinlock);
2360 spin_lock_init(&clock_spinlock);
2362 /* our token pool needs to work early */
2363 lwkt_token_pool_init();