x86_64: Prepare mp_enable() for multi-stage procedure segmentation
authorSepherosa Ziehau <sephe@dragonflybsd.org>
Wed, 1 Jun 2011 08:06:54 +0000 (16:06 +0800)
committerSepherosa Ziehau <sephe@dragonflybsd.org>
Wed, 1 Jun 2011 09:31:02 +0000 (17:31 +0800)
sys/platform/pc64/apic/lapic.c
sys/platform/pc64/apic/lapic.h
sys/platform/pc64/x86_64/machdep.c
sys/platform/pc64/x86_64/mp_machdep.c

index 255d96f..5d6e079 100644 (file)
@@ -92,6 +92,7 @@ static const uint32_t lapic_timer_divisors[] = {
  */
 int    cpu_id_to_apic_id[NAPICID];
 int    apic_id_to_cpu_id[NAPICID];
+int    lapic_enable = 1;
 
 void
 lapic_eoi(void)
@@ -708,18 +709,13 @@ int
 lapic_config(void)
 {
        struct lapic_enumerator *e;
-       int error, i, enable, ap_max;
+       int error, i, ap_max;
+
+       KKASSERT(lapic_enable);
 
        for (i = 0; i < NAPICID; ++i)
                APICID_TO_CPUID(i) = -1;
 
-       enable = 1;
-       TUNABLE_INT_FETCH("hw.lapic_enable", &enable);
-       if (!enable) {
-               kprintf("LAPIC: Warning LAPIC is disabled\n");
-               return ENXIO;
-       }
-
        TAILQ_FOREACH(e, &lapic_enumerators, lapic_link) {
                error = e->lapic_probe(e);
                if (!error)
index 4e6e03d..97c0144 100644 (file)
@@ -57,6 +57,7 @@ struct lapic_enumerator {
 extern volatile lapic_t                *lapic;
 extern int                     cpu_id_to_apic_id[];
 extern int                     apic_id_to_cpu_id[];
+extern int                     lapic_enable;
 
 void   apic_dump(char*);
 void   lapic_init(boolean_t);
index 88bda85..763beee 100644 (file)
 #include <sys/machintr.h>
 #include <machine_base/icu/icu_abi.h>
 #include <machine_base/icu/elcr_var.h>
+#include <machine_base/apic/lapic.h>
 #include <machine_base/apic/ioapic.h>
 #include <machine_base/apic/ioapic_abi.h>
 
@@ -1769,6 +1770,7 @@ hammer_time(u_int64_t modulep, u_int64_t physfree)
 #ifdef SMP
        TUNABLE_INT_FETCH("hw.apic_io_enable", &ioapic_enable); /* for compat */
        TUNABLE_INT_FETCH("hw.ioapic_enable", &ioapic_enable);
+       TUNABLE_INT_FETCH("hw.lapic_enable", &lapic_enable);
 #endif
 
        /*
index bcbcc44..2ba384a 100644 (file)
@@ -338,23 +338,30 @@ mp_enable(u_int boot_addr)
 
        POSTCODE(MP_ENABLE_POST);
 
-       error = lapic_config();
-       if (error) {
-               if (ioapic_enable) {
-                       ioapic_enable = 0;
-                       icu_reinit_noioapic();
-               }
-               cpu_simple_setup();
-               return;
+       if (lapic_enable) {
+               error = lapic_config();
+               if (error)
+                       lapic_enable = 0;
        }
 
-       /* Initialize BSP's local APIC */
-       lapic_init(TRUE);
+       if (lapic_enable) {
+               /* Initialize BSP's local APIC */
+               lapic_init(TRUE);
+       } else if (ioapic_enable) {
+               ioapic_enable = 0;
+               icu_reinit_noioapic();
+       }
 
-       /* start each Application Processor */
-       start_all_aps(boot_addr);
+       if (lapic_enable) {
+               /* start each Application Processor */
+               start_all_aps(boot_addr);
+       } else {
+               cpu_simple_setup();
+       }
 
        if (ioapic_enable) {
+               KASSERT(lapic_enable,
+                   ("I/O APIC is enabled, but LAPIC is disabled\n"));
                error = ioapic_config();
                if (error) {
                        ioapic_enable = 0;