i386/lapic: Use pmap_mapdev_uncacheable() to map LAPIC
authorSepherosa Ziehau <sephe@dragonflybsd.org>
Wed, 4 May 2011 06:08:57 +0000 (14:08 +0800)
committerSepherosa Ziehau <sephe@dragonflybsd.org>
Wed, 4 May 2011 06:10:13 +0000 (14:10 +0800)
sys/platform/pc32/acpica5/acpi_madt.c
sys/platform/pc32/apic/apic_vector.s
sys/platform/pc32/apic/lapic.c
sys/platform/pc32/apic/lapic.h
sys/platform/pc32/i386/genassym.c
sys/platform/pc32/i386/globals.s
sys/platform/pc32/i386/mp_machdep.c
sys/platform/pc32/i386/mpboot.s
sys/platform/pc32/i386/trap.c

index d497a4f..1320114 100644 (file)
@@ -42,6 +42,7 @@
 #include <machine/md_var.h>
 #include <machine/specialreg.h>
 #include <machine_base/apic/lapic.h>
+#include <machine_base/apic/ioapic.h>
 
 #include "acpi_sdt.h"
 #include "acpi_sdt_var.h"
@@ -459,7 +460,7 @@ madt_lapic_enumerate(struct lapic_enumerator *e)
 
        lapic_map(lapic_addr);
 
-       bsp_apic_id = APIC_ID(lapic.id);
+       bsp_apic_id = APIC_ID(lapic->id);
        if (madt_lapic_pass2(bsp_apic_id))
                panic("madt_lapic_enumerate: madt_lapic_pass2 failed\n");
 }
index eb5c19a..1837fe0 100644 (file)
@@ -138,7 +138,8 @@ IDTVEC(ioapic_intr##irq_num) ;                                              \
        PUSH_FRAME ;                                                    \
        FAKE_MCOUNT(15*4(%esp)) ;                                       \
        MASK_LEVEL_IRQ(irq_num) ;                                       \
-       movl    $0, lapic_eoi ;                                         \
+       movl    lapic,%eax ;                                            \
+       movl    $0,LA_EOI(%eax) ;                                       \
        movl    PCPU(curthread),%ebx ;                                  \
        movl    $0,%eax ;       /* CURRENT CPL IN FRAME (REMOVED) */    \
        pushl   %eax ;                                                  \
@@ -198,7 +199,8 @@ Xspuriousint:
        .globl  Xinvltlb
 Xinvltlb:
        PUSH_FRAME
-       movl    $0, lapic_eoi           /* End Of Interrupt to APIC */
+       movl    lapic,%eax
+       movl    $0,LA_EOI(%eax)         /* End Of Interrupt to APIC */
        FAKE_MCOUNT(15*4(%esp))
 
        subl    $8,%esp                 /* make same as interrupt frame */
@@ -235,7 +237,8 @@ Xcpustop:
        movl    $KPSEL, %eax
        mov     %ax, %fs
 
-       movl    $0, lapic_eoi           /* End Of Interrupt to APIC */
+       movl    lapic, %eax
+       movl    $0, LA_EOI(%eax)        /* End Of Interrupt to APIC */
 
        movl    PCPU(cpuid), %eax
        imull   $PCB_SIZE, %eax
@@ -300,7 +303,8 @@ Xcpustop:
        .globl Xipiq
 Xipiq:
        PUSH_FRAME
-       movl    $0, lapic_eoi           /* End Of Interrupt to APIC */
+       movl    lapic,%eax
+       movl    $0,LA_EOI(%eax)         /* End Of Interrupt to APIC */
        FAKE_MCOUNT(15*4(%esp))
 
        incl    PCPU(cnt) + V_IPI
@@ -329,7 +333,8 @@ Xipiq:
        .globl Xtimer
 Xtimer:
        PUSH_FRAME
-       movl    $0, lapic_eoi           /* End Of Interrupt to APIC */
+       movl    lapic,%eax
+       movl    $0,LA_EOI(%eax)         /* End Of Interrupt to APIC */
        FAKE_MCOUNT(15*4(%esp))
 
        incl    PCPU(cnt) + V_TIMER
index 9fd3f18..c6a9129 100644 (file)
@@ -42,8 +42,7 @@
 
 #include <machine/intr_machdep.h>
 
-/* XXX */
-extern pt_entry_t *SMPpt;
+volatile lapic_t       *lapic;
 
 static void    lapic_timer_calibrate(void);
 static void    lapic_timer_set_divisor(int);
@@ -133,7 +132,7 @@ lapic_init(boolean_t bsp)
         * Disable LINT0 on the APs.  It doesn't matter what delivery
         * mode we use because we leave it masked.
         */
-       temp = lapic.lvt_lint0;
+       temp = lapic->lvt_lint0;
        temp &= ~(APIC_LVT_MASKED | APIC_LVT_TRIG_MASK | 
                  APIC_LVT_POLARITY_MASK | APIC_LVT_DM_MASK);
        if (bsp) {
@@ -143,7 +142,7 @@ lapic_init(boolean_t bsp)
        } else {
                temp |= APIC_LVT_DM_FIXED | APIC_LVT_MASKED;
        }
-       lapic.lvt_lint0 = temp;
+       lapic->lvt_lint0 = temp;
 
        /*
         * Setup LINT1 as NMI.
@@ -154,29 +153,29 @@ lapic_init(boolean_t bsp)
         *
         * Disable LINT1 on the APs.
         */
-       temp = lapic.lvt_lint1;
+       temp = lapic->lvt_lint1;
        temp &= ~(APIC_LVT_MASKED | APIC_LVT_TRIG_MASK | 
                  APIC_LVT_POLARITY_MASK | APIC_LVT_DM_MASK);
        temp |= APIC_LVT_MASKED | APIC_LVT_DM_NMI;
        if (bsp && apic_io_enable)
                temp &= ~APIC_LVT_MASKED;
-       lapic.lvt_lint1 = temp;
+       lapic->lvt_lint1 = temp;
 
        /*
         * Mask the LAPIC error interrupt, LAPIC performance counter
         * interrupt.
         */
-       lapic.lvt_error = lapic.lvt_error | APIC_LVT_MASKED;
-       lapic.lvt_pcint = lapic.lvt_pcint | APIC_LVT_MASKED;
+       lapic->lvt_error = lapic->lvt_error | APIC_LVT_MASKED;
+       lapic->lvt_pcint = lapic->lvt_pcint | APIC_LVT_MASKED;
 
        /*
         * Set LAPIC timer vector and mask the LAPIC timer interrupt.
         */
-       timer = lapic.lvt_timer;
+       timer = lapic->lvt_timer;
        timer &= ~APIC_LVTT_VECTOR;
        timer |= XTIMER_OFFSET;
        timer |= APIC_LVTT_MASKED;
-       lapic.lvt_timer = timer;
+       lapic->lvt_timer = timer;
 
        /*
         * Set the Task Priority Register as needed.   At the moment allow
@@ -184,7 +183,7 @@ lapic_init(boolean_t bsp)
         * ready to deal).  We could disable all but IPIs by setting
         * temp |= TPR_IPI for cpu != 0.
         */
-       temp = lapic.tpr;
+       temp = lapic->tpr;
        temp &= ~APIC_TPR_PRIO;         /* clear priority field */
 #ifdef SMP /* APIC-IO */
 if (!apic_io_enable) {
@@ -198,12 +197,12 @@ if (!apic_io_enable) {
 }
 #endif
 
-       lapic.tpr = temp;
+       lapic->tpr = temp;
 
        /* 
         * Enable the LAPIC 
         */
-       temp = lapic.svr;
+       temp = lapic->svr;
        temp |= APIC_SVR_ENABLE;        /* enable the LAPIC */
        temp &= ~APIC_SVR_FOCUS_DISABLE; /* enable lopri focus processor */
 
@@ -216,15 +215,15 @@ if (!apic_io_enable) {
        temp &= ~APIC_SVR_VECTOR;
        temp |= XSPURIOUSINT_OFFSET;
 
-       lapic.svr = temp;
+       lapic->svr = temp;
 
        /*
         * Pump out a few EOIs to clean out interrupts that got through
         * before we were able to set the TPR.
         */
-       lapic.eoi = 0;
-       lapic.eoi = 0;
-       lapic.eoi = 0;
+       lapic->eoi = 0;
+       lapic->eoi = 0;
+       lapic->eoi = 0;
 
        if (bsp) {
                lapic_timer_calibrate();
@@ -244,7 +243,7 @@ static void
 lapic_timer_set_divisor(int divisor_idx)
 {
        KKASSERT(divisor_idx >= 0 && divisor_idx < APIC_TIMER_NDIVISORS);
-       lapic.dcr_timer = lapic_timer_divisors[divisor_idx];
+       lapic->dcr_timer = lapic_timer_divisors[divisor_idx];
 }
 
 static void
@@ -252,16 +251,16 @@ lapic_timer_oneshot(u_int count)
 {
        uint32_t value;
 
-       value = lapic.lvt_timer;
+       value = lapic->lvt_timer;
        value &= ~APIC_LVTT_PERIODIC;
-       lapic.lvt_timer = value;
-       lapic.icr_timer = count;
+       lapic->lvt_timer = value;
+       lapic->icr_timer = count;
 }
 
 static void
 lapic_timer_oneshot_quick(u_int count)
 {
-       lapic.icr_timer = count;
+       lapic->icr_timer = count;
 }
 
 static void
@@ -276,7 +275,7 @@ lapic_timer_calibrate(void)
                lapic_timer_set_divisor(lapic_timer_divisor_idx);
                lapic_timer_oneshot(APIC_TIMER_MAX_COUNT);
                DELAY(2000000);
-               value = APIC_TIMER_MAX_COUNT - lapic.ccr_timer;
+               value = APIC_TIMER_MAX_COUNT - lapic->ccr_timer;
                if (value != APIC_TIMER_MAX_COUNT)
                        break;
        }
@@ -322,7 +321,7 @@ lapic_timer_intr_reload(struct cputimer_intr *cti, sysclock_t reload)
                reload = 2;
 
        if (gd->gd_timer_running) {
-               if (reload < lapic.ccr_timer)
+               if (reload < lapic->ccr_timer)
                        lapic_timer_oneshot_quick(reload);
        } else {
                gd->gd_timer_running = 1;
@@ -335,9 +334,9 @@ lapic_timer_intr_enable(struct cputimer_intr *cti __unused)
 {
        uint32_t timer;
 
-       timer = lapic.lvt_timer;
+       timer = lapic->lvt_timer;
        timer &= ~(APIC_LVTT_MASKED | APIC_LVTT_PERIODIC);
-       lapic.lvt_timer = timer;
+       lapic->lvt_timer = timer;
 
        lapic_timer_fixup_handler(NULL);
 }
@@ -431,7 +430,7 @@ apic_dump(char* str)
 {
        kprintf("SMP: CPU%d %s:\n", mycpu->gd_cpuid, str);
        kprintf("     lint0: 0x%08x lint1: 0x%08x TPR: 0x%08x SVR: 0x%08x\n",
-               lapic.lvt_lint0, lapic.lvt_lint1, lapic.tpr, lapic.svr);
+               lapic->lvt_lint0, lapic->lvt_lint1, lapic->tpr, lapic->svr);
 }
 
 /*
@@ -458,20 +457,20 @@ apic_ipi(int dest_type, int vector, int delivery_mode)
        u_long  icr_lo;
 
        crit_enter();
-       if ((lapic.icr_lo & APIC_DELSTAT_MASK) != 0) {
+       if ((lapic->icr_lo & APIC_DELSTAT_MASK) != 0) {
            unsigned int eflags = read_eflags();
            cpu_enable_intr();
            DEBUG_PUSH_INFO("apic_ipi");
-           while ((lapic.icr_lo & APIC_DELSTAT_MASK) != 0) {
+           while ((lapic->icr_lo & APIC_DELSTAT_MASK) != 0) {
                lwkt_process_ipiq();
            }
            DEBUG_POP_INFO();
            write_eflags(eflags);
        }
 
-       icr_lo = (lapic.icr_lo & APIC_ICRLO_RESV_MASK) | dest_type | 
+       icr_lo = (lapic->icr_lo & APIC_ICRLO_RESV_MASK) | dest_type | 
                delivery_mode | vector;
-       lapic.icr_lo = icr_lo;
+       lapic->icr_lo = icr_lo;
        crit_exit();
        return 0;
 }
@@ -483,26 +482,26 @@ single_apic_ipi(int cpu, int vector, int delivery_mode)
        u_long  icr_hi;
 
        crit_enter();
-       if ((lapic.icr_lo & APIC_DELSTAT_MASK) != 0) {
+       if ((lapic->icr_lo & APIC_DELSTAT_MASK) != 0) {
            unsigned int eflags = read_eflags();
            cpu_enable_intr();
            DEBUG_PUSH_INFO("single_apic_ipi");
-           while ((lapic.icr_lo & APIC_DELSTAT_MASK) != 0) {
+           while ((lapic->icr_lo & APIC_DELSTAT_MASK) != 0) {
                lwkt_process_ipiq();
            }
            DEBUG_POP_INFO();
            write_eflags(eflags);
        }
-       icr_hi = lapic.icr_hi & ~APIC_ID_MASK;
+       icr_hi = lapic->icr_hi & ~APIC_ID_MASK;
        icr_hi |= (CPU_TO_ID(cpu) << 24);
-       lapic.icr_hi = icr_hi;
+       lapic->icr_hi = icr_hi;
 
        /* build ICR_LOW */
-       icr_lo = (lapic.icr_lo & APIC_ICRLO_RESV_MASK)
+       icr_lo = (lapic->icr_lo & APIC_ICRLO_RESV_MASK)
            | APIC_DEST_DESTFLD | delivery_mode | vector;
 
        /* write APIC ICR */
-       lapic.icr_lo = icr_lo;
+       lapic->icr_lo = icr_lo;
        crit_exit();
 }
 
@@ -521,20 +520,20 @@ single_apic_ipi_passive(int cpu, int vector, int delivery_mode)
        u_long  icr_hi;
 
        crit_enter();
-       if ((lapic.icr_lo & APIC_DELSTAT_MASK) != 0) {
+       if ((lapic->icr_lo & APIC_DELSTAT_MASK) != 0) {
            crit_exit();
            return(0);
        }
-       icr_hi = lapic.icr_hi & ~APIC_ID_MASK;
+       icr_hi = lapic->icr_hi & ~APIC_ID_MASK;
        icr_hi |= (CPU_TO_ID(cpu) << 24);
-       lapic.icr_hi = icr_hi;
+       lapic->icr_hi = icr_hi;
 
        /* build IRC_LOW */
-       icr_lo = (lapic.icr_lo & APIC_RESV2_MASK)
+       icr_lo = (lapic->icr_lo & APIC_RESV2_MASK)
            | APIC_DEST_DESTFLD | delivery_mode | vector;
 
        /* write APIC ICR */
-       lapic.icr_lo = icr_lo;
+       lapic->icr_lo = icr_lo;
        crit_exit();
        return(1);
 }
@@ -603,7 +602,7 @@ read_apic_timer(void)
          *         for now we just return the remaining count.
          */
 #else
-       return lapic.ccr_timer;
+       return lapic->ccr_timer;
 #endif
 }
 
@@ -634,9 +633,7 @@ lapic_unused_apic_id(int start)
 void
 lapic_map(vm_offset_t lapic_addr)
 {
-       /* Local apic is mapped on last page */
-       SMPpt[NPTEPG - 1] = (pt_entry_t)(PG_V | PG_RW | PG_N |
-           pmap_get_pgeflag() | (lapic_addr & PG_FRAME));
+       lapic = pmap_mapdev_uncacheable(lapic_addr, sizeof(struct LAPIC));
 
        kprintf("lapic: at %p\n", (void *)lapic_addr);
 }
index 4125b2a..28c08b2 100644 (file)
@@ -53,7 +53,7 @@ struct lapic_enumerator {
 
 #ifdef SMP
 
-extern volatile lapic_t                lapic;
+extern volatile lapic_t                *lapic;
 
 void   apic_dump(char*);
 void   lapic_init(boolean_t);
index 67464fb..c22d2f6 100644 (file)
@@ -234,6 +234,8 @@ ASSYM(KPSEL, GSEL(GPRIV_SEL, SEL_KPL));
 ASSYM(BC32SEL, GSEL(GBIOSCODE32_SEL, SEL_KPL));
 ASSYM(VM86_FRAMESIZE, sizeof(struct vm86frame));
 
+ASSYM(LA_EOI, offsetof(struct LAPIC, eoi));
+
 #ifdef SMP
 ASSYM(IOAPIC_IM_ADDR, offsetof(struct apic_intmapinfo, apic_address));
 ASSYM(IOAPIC_IM_ENTIDX, offsetof(struct apic_intmapinfo, redirindex));
index 4e703b5..e5a87f7 100644 (file)
@@ -41,9 +41,8 @@
         * segment.
         */
        .data
-       .globl  CPU_prvspace, lapic
+       .globl  CPU_prvspace
        .set    CPU_prvspace,(MPPTDI << PDRSHIFT)
-       .set    lapic,CPU_prvspace + (NPTEPG-1) * PAGE_SIZE
 
        .globl  globaldata
        .set    globaldata,0
        .set    gd_ipending,globaldata + GD_IPENDING
        .set    gd_spending,globaldata + GD_SPENDING
        .set    gd_cnt,globaldata + GD_CNT
-
-#ifdef SMP
-       .globl  lapic_eoi, lapic_svr, lapic_tpr, lapic_irr1, lapic_ver
-       .globl  lapic_icr_lo,lapic_icr_hi,lapic_isr1
-/*
- * Do not clutter our namespace with these unless we need them in other
- * assembler code.  The C code uses different definitions.
- */
-#if 0
-       .globl  lapic_id,lapic_ver,lapic_tpr,lapic_apr,lapic_ppr,lapic_eoi
-       .globl  lapic_ldr,lapic_dfr,lapic_svr,lapic_isr,lapic_isr0
-       .globl  lapic_isr2,lapic_isr3,lapic_isr4,lapic_isr5,lapic_isr6
-       .globl  lapic_isr7,lapic_tmr,lapic_tmr0,lapic_tmr1,lapic_tmr2
-       .globl  lapic_tmr3,lapic_tmr4,lapic_tmr5,lapic_tmr6,lapic_tmr7
-       .globl  lapic_irr,lapic_irr0,lapic_irr1,lapic_irr2,lapic_irr3
-       .globl  lapic_irr4,lapic_irr5,lapic_irr6,lapic_irr7,lapic_esr
-       .globl  lapic_lvtt,lapic_pcint,lapic_lvt1
-       .globl  lapic_lvt2,lapic_lvt3,lapic_ticr,lapic_tccr,lapic_tdcr
-#endif
-       .set    lapic_id,       lapic + 0x020
-       .set    lapic_ver,      lapic + 0x030
-       .set    lapic_tpr,      lapic + 0x080
-       .set    lapic_apr,      lapic + 0x090
-       .set    lapic_ppr,      lapic + 0x0a0
-       .set    lapic_eoi,      lapic + 0x0b0
-       .set    lapic_ldr,      lapic + 0x0d0
-       .set    lapic_dfr,      lapic + 0x0e0
-       .set    lapic_svr,      lapic + 0x0f0
-       .set    lapic_isr,      lapic + 0x100
-       .set    lapic_isr0,     lapic + 0x100
-       .set    lapic_isr1,     lapic + 0x110
-       .set    lapic_isr2,     lapic + 0x120
-       .set    lapic_isr3,     lapic + 0x130
-       .set    lapic_isr4,     lapic + 0x140
-       .set    lapic_isr5,     lapic + 0x150
-       .set    lapic_isr6,     lapic + 0x160
-       .set    lapic_isr7,     lapic + 0x170
-       .set    lapic_tmr,      lapic + 0x180
-       .set    lapic_tmr0,     lapic + 0x180
-       .set    lapic_tmr1,     lapic + 0x190
-       .set    lapic_tmr2,     lapic + 0x1a0
-       .set    lapic_tmr3,     lapic + 0x1b0
-       .set    lapic_tmr4,     lapic + 0x1c0
-       .set    lapic_tmr5,     lapic + 0x1d0
-       .set    lapic_tmr6,     lapic + 0x1e0
-       .set    lapic_tmr7,     lapic + 0x1f0
-       .set    lapic_irr,      lapic + 0x200
-       .set    lapic_irr0,     lapic + 0x200
-       .set    lapic_irr1,     lapic + 0x210
-       .set    lapic_irr2,     lapic + 0x220
-       .set    lapic_irr3,     lapic + 0x230
-       .set    lapic_irr4,     lapic + 0x240
-       .set    lapic_irr5,     lapic + 0x250
-       .set    lapic_irr6,     lapic + 0x260
-       .set    lapic_irr7,     lapic + 0x270
-       .set    lapic_esr,      lapic + 0x280
-       .set    lapic_icr_lo,   lapic + 0x300
-       .set    lapic_icr_hi,   lapic + 0x310
-       .set    lapic_lvtt,     lapic + 0x320
-       .set    lapic_pcint,    lapic + 0x340
-       .set    lapic_lvt1,     lapic + 0x350
-       .set    lapic_lvt2,     lapic + 0x360
-       .set    lapic_lvt3,     lapic + 0x370
-       .set    lapic_ticr,     lapic + 0x380
-       .set    lapic_tccr,     lapic + 0x390
-       .set    lapic_tdcr,     lapic + 0x3e0
-#endif
-
index 613625b..0d2d3f7 100644 (file)
@@ -1046,7 +1046,7 @@ start_all_aps(u_int boot_addr)
        bzero(mycpu->gd_ipiq, sizeof(lwkt_ipiq) * ncpus);
 
        /* fill in our (BSP) APIC version */
-       cpu_apic_versions[0] = lapic.version;
+       cpu_apic_versions[0] = lapic->version;
 
        /* restore the warmstart vector */
        *(u_long *) WARMBOOT_OFF = mpbioswarmvec;
@@ -1212,18 +1212,18 @@ start_ap(struct mdglobaldata *gd, u_int boot_addr, int smibest)
         * icr_hi once and then just trigger operations with
         * icr_lo.
         */
-       icr_hi = lapic.icr_hi & ~APIC_ID_MASK;
+       icr_hi = lapic->icr_hi & ~APIC_ID_MASK;
        icr_hi |= (physical_cpu << 24);
-       icr_lo = lapic.icr_lo & 0xfff00000;
-       lapic.icr_hi = icr_hi;
+       icr_lo = lapic->icr_lo & 0xfff00000;
+       lapic->icr_hi = icr_hi;
 
        /*
         * Do an INIT IPI: assert RESET
         *
         * Use edge triggered mode to assert INIT
         */
-       lapic.icr_lo = icr_lo | 0x0000c500;
-       while (lapic.icr_lo & APIC_DELSTAT_MASK)
+       lapic->icr_lo = icr_lo | 0x0000c500;
+       while (lapic->icr_lo & APIC_DELSTAT_MASK)
                 /* spin */ ;
 
        /*
@@ -1251,8 +1251,8 @@ start_ap(struct mdglobaldata *gd, u_int boot_addr, int smibest)
         * Use level triggered mode to deassert.  It is unclear
         * why we need to do this.
         */
-       lapic.icr_lo = icr_lo | 0x00008500;
-       while (lapic.icr_lo & APIC_DELSTAT_MASK)
+       lapic->icr_lo = icr_lo | 0x00008500;
+       while (lapic->icr_lo & APIC_DELSTAT_MASK)
                 /* spin */ ;
        u_sleep(150);                           /* wait 150us */
 
@@ -1264,8 +1264,8 @@ start_ap(struct mdglobaldata *gd, u_int boot_addr, int smibest)
         * run. OR the previous INIT IPI was ignored. and this STARTUP IPI
         * will run.
         */
-       lapic.icr_lo = icr_lo | 0x00000600 | vector;
-       while (lapic.icr_lo & APIC_DELSTAT_MASK)
+       lapic->icr_lo = icr_lo | 0x00000600 | vector;
+       while (lapic->icr_lo & APIC_DELSTAT_MASK)
                 /* spin */ ;
        u_sleep(200);           /* wait ~200uS */
 
@@ -1275,8 +1275,8 @@ start_ap(struct mdglobaldata *gd, u_int boot_addr, int smibest)
         * this STARTUP IPI will be ignored, as only ONE STARTUP IPI is
         * recognized after hardware RESET or INIT IPI.
         */
-       lapic.icr_lo = icr_lo | 0x00000600 | vector;
-       while (lapic.icr_lo & APIC_DELSTAT_MASK)
+       lapic->icr_lo = icr_lo | 0x00000600 | vector;
+       while (lapic->icr_lo & APIC_DELSTAT_MASK)
                 /* spin */ ;
 
        /* Resume normal operation */
@@ -1542,7 +1542,7 @@ ap_init(void)
        mycpu->gd_other_cpus = smp_startup_mask & ~CPUMASK(mycpu->gd_cpuid);
 
        /* A quick check from sanity claus */
-       apic_id = (apic_id_to_logical[(lapic.id & 0xff000000) >> 24]);
+       apic_id = (apic_id_to_logical[(lapic->id & 0xff000000) >> 24]);
        if (mycpu->gd_cpuid != apic_id) {
                kprintf("SMP: cpuid = %d\n", mycpu->gd_cpuid);
                kprintf("SMP: apic_id = %d\n", apic_id);
@@ -1808,7 +1808,7 @@ mptable_lapic_default(void)
        /* Map local apic before the id field is accessed */
        lapic_map(DEFAULT_APIC_BASE);
 
-       bsp_apicid = APIC_ID(lapic.id);
+       bsp_apicid = APIC_ID(lapic->id);
        ap_apicid = (bsp_apicid == 0) ? 1 : 0;
 
        /* BSP */
index 91a4e9d..0cfab2d 100644 (file)
@@ -107,15 +107,6 @@ mp_begin:  /* now running relocated at KERNBASE */
        movl    %eax, %cr4
 1:
 
-       /* disable the APIC, just to be SURE */
-       movl    lapic_svr, %eax                 /* get spurious vector reg. */
-       andl    $~APIC_SVR_ENABLE, %eax         /* clear software enable bit */
-       movl    %eax, lapic_svr
-
-       /* data returned to BSP */
-       movl    lapic_ver, %eax                 /* our version reg contents */
-       movl    %eax, cpu_apic_versions         /* into [ 0 ] */
-
        CHECKPOINT(0x39, $6)
 
        /*
index 96b8af2..2e2e502 100644 (file)
@@ -95,6 +95,7 @@
 #include <machine/intr_machdep.h>
 
 #include <machine_base/isa/isa_intr.h>
+#include <machine_base/apic/lapic.h>
 
 #ifdef POWERFAIL_NMI
 #include <sys/syslog.h>
@@ -1045,7 +1046,7 @@ trap_fatal(struct trapframe *frame, vm_offset_t eva)
 #ifdef SMP
        /* three separate prints in case of a trap on an unmapped page */
        kprintf("cpuid = %d; ", mycpu->gd_cpuid);
-       kprintf("lapic.id = %08x\n", lapic.id);
+       kprintf("lapic.id = %08x\n", lapic->id);
 #endif
        if (type == T_PAGEFLT) {
                kprintf("fault virtual address  = %p\n", (void *)eva);
@@ -1161,7 +1162,7 @@ dblfault_handler(void)
 #ifdef SMP
        /* three separate prints in case of a trap on an unmapped page */
        kprintf("cpuid = %d; ", gd->mi.gd_cpuid);
-       kprintf("lapic.id = %08x\n", lapic.id);
+       kprintf("lapic.id = %08x\n", lapic->id);
 #endif
        panic("double fault");
 }