From 54d63b2f263f78d2b8c3db20aecdb2b76449a32b Mon Sep 17 00:00:00 2001
From: Michael Neumann <mneumann@ntecs.de>
Date: Thu, 14 Oct 2010 00:22:41 +0200
Subject: [PATCH] IO APIC: Get rid of apic_pin_trigger

- Add flags field in apic_intmapinfo, which now records irq's trigger mode

Similar to commit 0f54693073cef9158dd5df73eb8d5ed890e9da82.
---
 sys/platform/pc64/apic/apic_vector.s | 10 ++++------
 sys/platform/pc64/apic/mpapic.c      |  8 +-------
 sys/platform/pc64/include/smp.h      |  4 ++++
 sys/platform/pc64/x86_64/genassym.c  |  2 ++
 4 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/sys/platform/pc64/apic/apic_vector.s b/sys/platform/pc64/apic/apic_vector.s
index e83d5aa6d3..7cccf9aa8b 100644
--- a/sys/platform/pc64/apic/apic_vector.s
+++ b/sys/platform/pc64/apic/apic_vector.s
@@ -57,7 +57,9 @@
 	CNAME(int_to_apicintpin) + AIMI_SIZE * (irq_num) + AIMI_APIC_ADDRESS
 #define REDIRIDX(irq_num) \
 	CNAME(int_to_apicintpin) + AIMI_SIZE * (irq_num) + AIMI_REDIRINDEX
-
+#define IOAPICFLAGS(irq_num) \
+	CNAME(int_to_apicintpin) + AIMI_SIZE * (irq_num) + AIMI_FLAGS
+ 
 #define MASK_IRQ(irq_num)						\
 	APIC_IMASK_LOCK ;			/* into critical reg */	\
 	testl	$IRQ_LBIT(irq_num), apic_imen ;				\
@@ -76,7 +78,7 @@
  *  and the EOI cycle would cause redundant INTs to occur.
  */
 #define MASK_LEVEL_IRQ(irq_num)						\
-	testl	$IRQ_LBIT(irq_num), apic_pin_trigger ;			\
+	testl	$AIMI_FLAG_LEVEL, IOAPICFLAGS(irq_num) ;		\
 	jz	9f ;				/* edge, don't mask */	\
 	MASK_IRQ(irq_num) ;						\
 9: ;									\
@@ -395,9 +397,5 @@ started_cpus:
 CNAME(cpustop_restartfunc):
 	.quad 0
 		
-	.globl	apic_pin_trigger
-apic_pin_trigger:
-	.long	0
-
 	.text
 
diff --git a/sys/platform/pc64/apic/mpapic.c b/sys/platform/pc64/apic/mpapic.c
index c4a70babbc..b2b42ce346 100644
--- a/sys/platform/pc64/apic/mpapic.c
+++ b/sys/platform/pc64/apic/mpapic.c
@@ -465,9 +465,6 @@ io_apic_get_id(int apic)
 /*
  * Setup the IO APIC.
  */
-
-extern int	apic_pin_trigger;	/* 'opaque' */
-
 void
 io_apic_setup_intpin(int apic, int pin)
 {
@@ -553,7 +550,7 @@ io_apic_setup_intpin(int apic, int pin)
 		flags = DEFAULT_FLAGS;
 		level = trigger(apic, pin, &flags);
 		if (level == 1)
-			apic_pin_trigger |= (1 << irq);
+			int_to_apicintpin[irq].flags |= AIMI_FLAG_LEVEL;
 		polarity(apic, pin, &flags, level);
 	}
 
@@ -599,9 +596,6 @@ io_apic_setup(int apic)
 	int		maxpin;
 	int		pin;
 
-	if (apic == 0)
-		apic_pin_trigger = 0;	/* default to edge-triggered */
-
 	maxpin = REDIRCNT_IOAPIC(apic);		/* pins in APIC */
 	kprintf("Programming %d pins in IOAPIC #%d\n", maxpin, apic);
 	
diff --git a/sys/platform/pc64/include/smp.h b/sys/platform/pc64/include/smp.h
index a9c3507555..77ddf4b6d4 100644
--- a/sys/platform/pc64/include/smp.h
+++ b/sys/platform/pc64/include/smp.h
@@ -79,7 +79,11 @@ struct apic_intmapinfo {
 	int int_pin;
 	volatile void *apic_address;
 	int redirindex;
+	u_int flags;		/* AIMI_FLAG */
 };
+
+#define AIMI_FLAG_LEVEL	0x1	/* default to edge trigger */
+
 extern struct apic_intmapinfo	int_to_apicintpin[];
 extern struct pcb		stoppcbs[];
 
diff --git a/sys/platform/pc64/x86_64/genassym.c b/sys/platform/pc64/x86_64/genassym.c
index d7a169b413..a934110219 100644
--- a/sys/platform/pc64/x86_64/genassym.c
+++ b/sys/platform/pc64/x86_64/genassym.c
@@ -245,5 +245,7 @@ ASSYM(CPUMASK_LOCK, CPUMASK_LOCK);
 #ifdef SMP
 ASSYM(AIMI_APIC_ADDRESS, offsetof(struct apic_intmapinfo, apic_address));
 ASSYM(AIMI_REDIRINDEX, offsetof(struct apic_intmapinfo, redirindex));
+ASSYM(AIMI_FLAGS, offsetof(struct apic_intmapinfo, flags));
 ASSYM(AIMI_SIZE, sizeof(struct apic_intmapinfo));
+ASSYM(AIMI_FLAG_LEVEL, AIMI_FLAG_LEVEL);
 #endif
-- 
2.41.0