2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
6 * This code is derived from software contributed to Berkeley by
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by the University of
20 * California, Berkeley and its contributors.
21 * 4. Neither the name of the University nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
38 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
39 * $DragonFly: src/sys/platform/pc32/i386/machdep.c,v 1.135 2008/08/02 01:14:43 dillon Exp $
43 #include "use_ether.h"
46 #include "opt_atalk.h"
47 #include "opt_compat.h"
50 #include "opt_directio.h"
53 #include "opt_maxmem.h"
54 #include "opt_msgbuf.h"
55 #include "opt_perfmon.h"
57 #include "opt_userconfig.h"
59 #include <sys/param.h>
60 #include <sys/systm.h>
61 #include <sys/sysproto.h>
62 #include <sys/signalvar.h>
63 #include <sys/kernel.h>
64 #include <sys/linker.h>
65 #include <sys/malloc.h>
69 #include <sys/reboot.h>
71 #include <sys/msgbuf.h>
72 #include <sys/sysent.h>
73 #include <sys/sysctl.h>
74 #include <sys/vmmeter.h>
76 #include <sys/upcall.h>
77 #include <sys/usched.h>
81 #include <vm/vm_param.h>
83 #include <vm/vm_kern.h>
84 #include <vm/vm_object.h>
85 #include <vm/vm_page.h>
86 #include <vm/vm_map.h>
87 #include <vm/vm_pager.h>
88 #include <vm/vm_extern.h>
90 #include <sys/thread2.h>
98 #include <machine/cpu.h>
99 #include <machine/clock.h>
100 #include <machine/specialreg.h>
101 #include <machine/bootinfo.h>
102 #include <machine/md_var.h>
103 #include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
104 #include <machine/globaldata.h> /* CPU_prvspace */
105 #include <machine/smp.h>
107 #include <machine/perfmon.h>
109 #include <machine/cputypes.h>
112 #include <bus/isa/isa_device.h>
114 #include <machine_base/isa/intr_machdep.h>
115 #include <bus/isa/rtc.h>
116 #include <machine/vm86.h>
117 #include <sys/random.h>
118 #include <sys/ptrace.h>
119 #include <machine/sigframe.h>
121 #define PHYSMAP_ENTRIES 10
123 extern void init386(int first);
124 extern void dblfault_handler(void);
126 extern void printcpuinfo(void); /* XXX header file */
127 extern void finishidentcpu(void);
128 extern void panicifcpuunsupported(void);
129 extern void initializecpu(void);
131 static void cpu_startup(void *);
132 #ifndef CPU_DISABLE_SSE
133 static void set_fpregs_xmm(struct save87 *, struct savexmm *);
134 static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
135 #endif /* CPU_DISABLE_SSE */
137 extern void ffs_rawread_setup(void);
138 #endif /* DIRECTIO */
139 static void init_locks(void);
141 SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
143 int _udatasel, _ucodesel;
146 int64_t tsc_offsets[MAXCPU];
148 int64_t tsc_offsets[1];
151 #if defined(SWTCH_OPTIM_STATS)
152 extern int swtch_optim_stats;
153 SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
154 CTLFLAG_RD, &swtch_optim_stats, 0, "");
155 SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
156 CTLFLAG_RD, &tlb_flush_count, 0, "");
161 u_long ebda_addr = 0;
164 sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
166 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
170 SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
171 0, 0, sysctl_hw_physmem, "IU", "");
174 sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
176 int error = sysctl_handle_int(oidp, 0,
177 ctob(physmem - vmstats.v_wire_count), req);
181 SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
182 0, 0, sysctl_hw_usermem, "IU", "");
185 sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
187 int error = sysctl_handle_int(oidp, 0,
188 i386_btop(avail_end - avail_start), req);
192 SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
193 0, 0, sysctl_hw_availpages, "I", "");
195 vm_paddr_t Maxmem = 0;
197 vm_paddr_t phys_avail[PHYSMAP_ENTRIES*2+2];
198 vm_paddr_t dump_avail[PHYSMAP_ENTRIES*2+2];
201 static vm_offset_t buffer_sva, buffer_eva;
202 vm_offset_t clean_sva, clean_eva;
203 static vm_offset_t pager_sva, pager_eva;
204 static struct trapframe proc0_tf;
207 cpu_startup(void *dummy)
211 vm_offset_t firstaddr;
213 if (boothowto & RB_VERBOSE)
217 * Good {morning,afternoon,evening,night}.
219 kprintf("%s", version);
222 panicifcpuunsupported();
226 kprintf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
228 * Display any holes after the first chunk of extended memory.
233 kprintf("Physical memory chunk(s):\n");
234 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
235 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
237 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
238 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
244 * Allocate space for system data structures.
245 * The first available kernel virtual address is in "v".
246 * As pages of kernel virtual memory are allocated, "v" is incremented.
247 * As pages of memory are allocated and cleared,
248 * "firstaddr" is incremented.
249 * An index into the kernel page table corresponding to the
250 * virtual memory address maintained in "v" is kept in "mapaddr".
254 * Make two passes. The first pass calculates how much memory is
255 * needed and allocates it. The second pass assigns virtual
256 * addresses to the various data structures.
260 v = (caddr_t)firstaddr;
262 #define valloc(name, type, num) \
263 (name) = (type *)v; v = (caddr_t)((name)+(num))
264 #define valloclim(name, type, num, lim) \
265 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
268 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
269 * For the first 64MB of ram nominally allocate sufficient buffers to
270 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
271 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
272 * the buffer cache we limit the eventual kva reservation to
275 * factor represents the 1/4 x ram conversion.
278 int factor = 4 * BKVASIZE / 1024;
279 int kbytes = physmem * (PAGE_SIZE / 1024);
283 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
285 nbuf += (kbytes - 65536) * 2 / (factor * 5);
286 if (maxbcache && nbuf > maxbcache / BKVASIZE)
287 nbuf = maxbcache / BKVASIZE;
291 * Do not allow the buffer_map to be more then 1/2 the size of the
294 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
295 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
296 kprintf("Warning: nbufs capped at %d\n", nbuf);
299 nswbuf = max(min(nbuf/4, 256), 16);
301 if (nswbuf < NSWBUF_MIN)
308 valloc(swbuf, struct buf, nswbuf);
309 valloc(buf, struct buf, nbuf);
312 * End of first pass, size has been calculated so allocate memory
314 if (firstaddr == 0) {
315 size = (vm_size_t)(v - firstaddr);
316 firstaddr = kmem_alloc(&kernel_map, round_page(size));
318 panic("startup: no room for tables");
323 * End of second pass, addresses have been assigned
325 if ((vm_size_t)(v - firstaddr) != size)
326 panic("startup: table size inconsistency");
328 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
329 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
330 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
332 buffer_map.system_map = 1;
333 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
334 (nswbuf*MAXPHYS) + pager_map_size);
335 pager_map.system_map = 1;
337 #if defined(USERCONFIG)
339 cninit(); /* the preferred console may have changed */
342 kprintf("avail memory = %u (%uK bytes)\n", ptoa(vmstats.v_free_count),
343 ptoa(vmstats.v_free_count) / 1024);
346 * Set up buffers, so they can be used to read disk labels.
349 vm_pager_bufferinit();
353 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
355 mp_start(); /* fire up the APs and APICs */
362 * Send an interrupt to process.
364 * Stack is set up to allow sigcode stored
365 * at top to call routine, followed by kcall
366 * to sigreturn routine below. After sigreturn
367 * resets the signal mask, the stack, and the
368 * frame pointer, it returns to the user
372 sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
374 struct lwp *lp = curthread->td_lwp;
375 struct proc *p = lp->lwp_proc;
376 struct trapframe *regs;
377 struct sigacts *psp = p->p_sigacts;
378 struct sigframe sf, *sfp;
381 regs = lp->lwp_md.md_regs;
382 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
384 /* save user context */
385 bzero(&sf, sizeof(struct sigframe));
386 sf.sf_uc.uc_sigmask = *mask;
387 sf.sf_uc.uc_stack = lp->lwp_sigstk;
388 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
389 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
391 /* make the size of the saved context visible to userland */
392 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
394 /* save mailbox pending state for syscall interlock semantics */
395 if (p->p_flag & P_MAILBOX)
396 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
398 /* Allocate and validate space for the signal handler context. */
399 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
400 SIGISMEMBER(psp->ps_sigonstack, sig)) {
401 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
402 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
403 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
405 sfp = (struct sigframe *)regs->tf_esp - 1;
408 /* Translate the signal is appropriate */
409 if (p->p_sysent->sv_sigtbl) {
410 if (sig <= p->p_sysent->sv_sigsize)
411 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
414 /* Build the argument list for the signal handler. */
416 sf.sf_ucontext = (register_t)&sfp->sf_uc;
417 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
418 /* Signal handler installed with SA_SIGINFO. */
419 sf.sf_siginfo = (register_t)&sfp->sf_si;
420 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
422 /* fill siginfo structure */
423 sf.sf_si.si_signo = sig;
424 sf.sf_si.si_code = code;
425 sf.sf_si.si_addr = (void*)regs->tf_err;
428 /* Old FreeBSD-style arguments. */
429 sf.sf_siginfo = code;
430 sf.sf_addr = regs->tf_err;
431 sf.sf_ahu.sf_handler = catcher;
435 * If we're a vm86 process, we want to save the segment registers.
436 * We also change eflags to be our emulated eflags, not the actual
439 if (regs->tf_eflags & PSL_VM) {
440 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
441 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
443 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
444 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
445 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
446 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
448 if (vm86->vm86_has_vme == 0)
449 sf.sf_uc.uc_mcontext.mc_eflags =
450 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
451 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
454 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
455 * syscalls made by the signal handler. This just avoids
456 * wasting time for our lazy fixup of such faults. PSL_NT
457 * does nothing in vm86 mode, but vm86 programs can set it
458 * almost legitimately in probes for old cpu types.
460 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
464 * Save the FPU state and reinit the FP unit
466 npxpush(&sf.sf_uc.uc_mcontext);
469 * Copy the sigframe out to the user's stack.
471 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
473 * Something is wrong with the stack pointer.
474 * ...Kill the process.
479 regs->tf_esp = (int)sfp;
480 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
483 * i386 abi specifies that the direction flag must be cleared
486 regs->tf_eflags &= ~(PSL_T|PSL_D);
488 regs->tf_cs = _ucodesel;
489 regs->tf_ds = _udatasel;
490 regs->tf_es = _udatasel;
493 * Allow the signal handler to inherit %fs in addition to %gs as
494 * the userland program might be using both.
496 * However, if a T_PROTFLT occured the segment registers could be
497 * totally broken. They must be reset in order to be able to
498 * return to userland.
500 if (regs->tf_trapno == T_PROTFLT) {
501 regs->tf_fs = _udatasel;
502 regs->tf_gs = _udatasel;
504 regs->tf_ss = _udatasel;
508 * Sanitize the trapframe for a virtual kernel passing control to a custom
509 * VM context. Remove any items that would otherwise create a privilage
512 * XXX at the moment we allow userland to set the resume flag. Is this a
516 cpu_sanitize_frame(struct trapframe *frame)
518 frame->tf_cs = _ucodesel;
519 frame->tf_ds = _udatasel;
520 frame->tf_es = _udatasel; /* XXX allow userland this one too? */
522 frame->tf_fs = _udatasel;
523 frame->tf_gs = _udatasel;
525 frame->tf_ss = _udatasel;
526 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
527 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
532 cpu_sanitize_tls(struct savetls *tls)
534 struct segment_descriptor *desc;
537 for (i = 0; i < NGTLS; ++i) {
539 if (desc->sd_dpl == 0 && desc->sd_type == 0)
541 if (desc->sd_def32 == 0)
543 if (desc->sd_type != SDT_MEMRWA)
545 if (desc->sd_dpl != SEL_UPL)
547 if (desc->sd_xx != 0 || desc->sd_p != 1)
554 * sigreturn(ucontext_t *sigcntxp)
556 * System call to cleanup state after a signal
557 * has been taken. Reset signal mask and
558 * stack state from context left by sendsig (above).
559 * Return to previous pc and psl as specified by
560 * context left by sendsig. Check carefully to
561 * make sure that the user has not modified the
562 * state to gain improper privileges.
564 #define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
565 #define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
568 sys_sigreturn(struct sigreturn_args *uap)
570 struct lwp *lp = curthread->td_lwp;
571 struct proc *p = lp->lwp_proc;
572 struct trapframe *regs;
580 * We have to copy the information into kernel space so userland
581 * can't modify it while we are sniffing it.
583 regs = lp->lwp_md.md_regs;
584 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
588 eflags = ucp->uc_mcontext.mc_eflags;
590 if (eflags & PSL_VM) {
591 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
592 struct vm86_kernel *vm86;
595 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
596 * set up the vm86 area, and we can't enter vm86 mode.
598 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
600 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
601 if (vm86->vm86_inited == 0)
604 /* go back to user mode if both flags are set */
605 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
606 trapsignal(lp, SIGBUS, 0);
608 if (vm86->vm86_has_vme) {
609 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
610 (eflags & VME_USERCHANGE) | PSL_VM;
612 vm86->vm86_eflags = eflags; /* save VIF, VIP */
613 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
614 (eflags & VM_USERCHANGE) | PSL_VM;
616 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
617 tf->tf_eflags = eflags;
618 tf->tf_vm86_ds = tf->tf_ds;
619 tf->tf_vm86_es = tf->tf_es;
620 tf->tf_vm86_fs = tf->tf_fs;
621 tf->tf_vm86_gs = tf->tf_gs;
622 tf->tf_ds = _udatasel;
623 tf->tf_es = _udatasel;
625 tf->tf_fs = _udatasel;
626 tf->tf_gs = _udatasel;
630 * Don't allow users to change privileged or reserved flags.
633 * XXX do allow users to change the privileged flag PSL_RF.
634 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
635 * should sometimes set it there too. tf_eflags is kept in
636 * the signal context during signal handling and there is no
637 * other place to remember it, so the PSL_RF bit may be
638 * corrupted by the signal handler without us knowing.
639 * Corruption of the PSL_RF bit at worst causes one more or
640 * one less debugger trap, so allowing it is fairly harmless.
642 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
643 kprintf("sigreturn: eflags = 0x%x\n", eflags);
648 * Don't allow users to load a valid privileged %cs. Let the
649 * hardware check for invalid selectors, excess privilege in
650 * other selectors, invalid %eip's and invalid %esp's.
652 cs = ucp->uc_mcontext.mc_cs;
653 if (!CS_SECURE(cs)) {
654 kprintf("sigreturn: cs = 0x%x\n", cs);
655 trapsignal(lp, SIGBUS, T_PROTFLT);
658 bcopy(&ucp->uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
662 * Restore the FPU state from the frame
664 npxpop(&ucp->uc_mcontext);
667 * Merge saved signal mailbox pending flag to maintain interlock
668 * semantics against system calls.
670 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
671 p->p_flag |= P_MAILBOX;
673 if (ucp->uc_mcontext.mc_onstack & 1)
674 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
676 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
678 lp->lwp_sigmask = ucp->uc_sigmask;
679 SIG_CANTMASK(lp->lwp_sigmask);
684 * Stack frame on entry to function. %eax will contain the function vector,
685 * %ecx will contain the function data. flags, ecx, and eax will have
686 * already been pushed on the stack.
697 sendupcall(struct vmupcall *vu, int morepending)
699 struct lwp *lp = curthread->td_lwp;
700 struct trapframe *regs;
701 struct upcall upcall;
702 struct upc_frame upc_frame;
706 * If we are a virtual kernel running an emulated user process
707 * context, switch back to the virtual kernel context before
708 * trying to post the signal.
710 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
711 lp->lwp_md.md_regs->tf_trapno = 0;
712 vkernel_trap(lp, lp->lwp_md.md_regs);
716 * Get the upcall data structure
718 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
719 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
722 kprintf("bad upcall address\n");
727 * If the data structure is already marked pending or has a critical
728 * section count, mark the data structure as pending and return
729 * without doing an upcall. vu_pending is left set.
731 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
732 if (upcall.upc_pending < vu->vu_pending) {
733 upcall.upc_pending = vu->vu_pending;
734 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
735 sizeof(upcall.upc_pending));
741 * We can run this upcall now, clear vu_pending.
743 * Bump our critical section count and set or clear the
744 * user pending flag depending on whether more upcalls are
745 * pending. The user will be responsible for calling
746 * upc_dispatch(-1) to process remaining upcalls.
749 upcall.upc_pending = morepending;
750 crit_count += TDPRI_CRIT;
751 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
752 sizeof(upcall.upc_pending));
753 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
757 * Construct a stack frame and issue the upcall
759 regs = lp->lwp_md.md_regs;
760 upc_frame.eax = regs->tf_eax;
761 upc_frame.ecx = regs->tf_ecx;
762 upc_frame.edx = regs->tf_edx;
763 upc_frame.flags = regs->tf_eflags;
764 upc_frame.oldip = regs->tf_eip;
765 if (copyout(&upc_frame, (void *)(regs->tf_esp - sizeof(upc_frame)),
766 sizeof(upc_frame)) != 0) {
767 kprintf("bad stack on upcall\n");
769 regs->tf_eax = (register_t)vu->vu_func;
770 regs->tf_ecx = (register_t)vu->vu_data;
771 regs->tf_edx = (register_t)lp->lwp_upcall;
772 regs->tf_eip = (register_t)vu->vu_ctx;
773 regs->tf_esp -= sizeof(upc_frame);
778 * fetchupcall occurs in the context of a system call, which means that
779 * we have to return EJUSTRETURN in order to prevent eax and edx from
780 * being overwritten by the syscall return value.
782 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
783 * and the function pointer in %eax.
786 fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
788 struct upc_frame upc_frame;
789 struct lwp *lp = curthread->td_lwp;
790 struct trapframe *regs;
792 struct upcall upcall;
795 regs = lp->lwp_md.md_regs;
797 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
801 * This jumps us to the next ready context.
804 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
807 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
808 crit_count += TDPRI_CRIT;
810 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
811 regs->tf_eax = (register_t)vu->vu_func;
812 regs->tf_ecx = (register_t)vu->vu_data;
813 regs->tf_edx = (register_t)lp->lwp_upcall;
814 regs->tf_eip = (register_t)vu->vu_ctx;
815 regs->tf_esp = (register_t)rsp;
818 * This returns us to the originally interrupted code.
820 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
821 regs->tf_eax = upc_frame.eax;
822 regs->tf_ecx = upc_frame.ecx;
823 regs->tf_edx = upc_frame.edx;
824 regs->tf_eflags = (regs->tf_eflags & ~PSL_USERCHANGE) |
825 (upc_frame.flags & PSL_USERCHANGE);
826 regs->tf_eip = upc_frame.oldip;
827 regs->tf_esp = (register_t)((char *)rsp + sizeof(upc_frame));
836 * Machine dependent boot() routine
838 * I haven't seen anything to put here yet
839 * Possibly some stuff might be grafted back here from boot()
847 * Shutdown the CPU as much as possible
853 __asm__ __volatile("hlt");
857 * cpu_idle() represents the idle LWKT. You cannot return from this function
858 * (unless you want to blow things up!). Instead we look for runnable threads
859 * and loop or halt as appropriate. Giant is not held on entry to the thread.
861 * The main loop is entered with a critical section held, we must release
862 * the critical section before doing anything else. lwkt_switch() will
863 * check for pending interrupts due to entering and exiting its own
866 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
867 * to wake a HLTed cpu up. However, there are cases where the idlethread
868 * will be entered with the possibility that no IPI will occur and in such
869 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
871 static int cpu_idle_hlt = 1;
872 static int cpu_idle_hltcnt;
873 static int cpu_idle_spincnt;
874 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
875 &cpu_idle_hlt, 0, "Idle loop HLT enable");
876 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
877 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
878 SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
879 &cpu_idle_spincnt, 0, "Idle loop entry spins");
882 cpu_idle_default_hook(void)
885 * We must guarentee that hlt is exactly the instruction
888 __asm __volatile("sti; hlt");
891 /* Other subsystems (e.g., ACPI) can hook this later. */
892 void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
897 struct thread *td = curthread;
900 KKASSERT(td->td_pri < TDPRI_CRIT);
903 * See if there are any LWKTs ready to go.
908 * If we are going to halt call splz unconditionally after
909 * CLIing to catch any interrupt races. Note that we are
910 * at SPL0 and interrupts are enabled.
912 if (cpu_idle_hlt && !lwkt_runnable() &&
913 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
914 __asm __volatile("cli");
916 if (!lwkt_runnable())
920 __asm __volatile("pause");
924 td->td_flags &= ~TDF_IDLE_NOHLT;
927 __asm __volatile("sti; pause");
929 __asm __volatile("sti");
937 * This routine is called when the only runnable threads require
938 * the MP lock, and the scheduler couldn't get it. On a real cpu
939 * we let the scheduler spin.
942 cpu_mplock_contested(void)
948 * This routine is called if a spinlock has been held through the
949 * exponential backoff period and is seriously contested. On a real cpu
953 cpu_spinlock_contested(void)
959 * Clear registers on exec
962 exec_setregs(u_long entry, u_long stack, u_long ps_strings)
964 struct thread *td = curthread;
965 struct lwp *lp = td->td_lwp;
966 struct pcb *pcb = td->td_pcb;
967 struct trapframe *regs = lp->lwp_md.md_regs;
969 /* was i386_user_cleanup() in NetBSD */
972 bzero((char *)regs, sizeof(struct trapframe));
973 regs->tf_eip = entry;
974 regs->tf_esp = stack;
975 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
976 regs->tf_ss = _udatasel;
977 regs->tf_ds = _udatasel;
978 regs->tf_es = _udatasel;
979 regs->tf_fs = _udatasel;
980 regs->tf_gs = _udatasel;
981 regs->tf_cs = _ucodesel;
983 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
984 regs->tf_ebx = ps_strings;
987 * Reset the hardware debug registers if they were in use.
988 * They won't have any meaning for the newly exec'd process.
990 if (pcb->pcb_flags & PCB_DBREGS) {
997 if (pcb == td->td_pcb) {
999 * Clear the debug registers on the running
1000 * CPU, otherwise they will end up affecting
1001 * the next process we switch to.
1005 pcb->pcb_flags &= ~PCB_DBREGS;
1009 * Initialize the math emulator (if any) for the current process.
1010 * Actually, just clear the bit that says that the emulator has
1011 * been initialized. Initialization is delayed until the process
1012 * traps to the emulator (if it is done at all) mainly because
1013 * emulators don't provide an entry point for initialization.
1015 pcb->pcb_flags &= ~FP_SOFTFP;
1018 * note: do not set CR0_TS here. npxinit() must do it after clearing
1019 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
1023 load_cr0(rcr0() | CR0_MP);
1026 /* Initialize the npx (if any) for the current process. */
1027 npxinit(__INITIAL_NPXCW__);
1032 * note: linux emulator needs edx to be 0x0 on entry, which is
1033 * handled in execve simply by setting the 64 bit syscall
1034 * return value to 0.
1044 cr0 |= CR0_NE; /* Done by npxinit() */
1045 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1046 cr0 |= CR0_WP | CR0_AM;
1052 sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1055 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1057 if (!error && req->newptr)
1062 SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1063 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1065 SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1066 CTLFLAG_RW, &disable_rtc_set, 0, "");
1068 SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1069 CTLFLAG_RD, &bootinfo, bootinfo, "");
1071 SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1072 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1074 extern u_long bootdev; /* not a cdev_t - encoding is different */
1075 SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1076 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1079 * Initialize 386 and configure to run kernel
1083 * Initialize segments & interrupt table
1087 union descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1088 static struct gate_descriptor idt0[NIDT];
1089 struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1090 union descriptor ldt[NLDT]; /* local descriptor table */
1092 /* table descriptors - used to load tables by cpu */
1093 struct region_descriptor r_gdt, r_idt;
1095 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
1096 extern int has_f00f_bug;
1099 static struct i386tss dblfault_tss;
1100 static char dblfault_stack[PAGE_SIZE];
1102 extern struct user *proc0paddr;
1105 /* software prototypes -- in more palatable form */
1106 struct soft_segment_descriptor gdt_segs[] = {
1107 /* GNULL_SEL 0 Null Descriptor */
1108 { 0x0, /* segment base address */
1110 0, /* segment type */
1111 0, /* segment descriptor priority level */
1112 0, /* segment descriptor present */
1114 0, /* default 32 vs 16 bit size */
1115 0 /* limit granularity (byte/page units)*/ },
1116 /* GCODE_SEL 1 Code Descriptor for kernel */
1117 { 0x0, /* segment base address */
1118 0xfffff, /* length - all address space */
1119 SDT_MEMERA, /* segment type */
1120 0, /* segment descriptor priority level */
1121 1, /* segment descriptor present */
1123 1, /* default 32 vs 16 bit size */
1124 1 /* limit granularity (byte/page units)*/ },
1125 /* GDATA_SEL 2 Data Descriptor for kernel */
1126 { 0x0, /* segment base address */
1127 0xfffff, /* length - all address space */
1128 SDT_MEMRWA, /* segment type */
1129 0, /* segment descriptor priority level */
1130 1, /* segment descriptor present */
1132 1, /* default 32 vs 16 bit size */
1133 1 /* limit granularity (byte/page units)*/ },
1134 /* GPRIV_SEL 3 SMP Per-Processor Private Data Descriptor */
1135 { 0x0, /* segment base address */
1136 0xfffff, /* length - all address space */
1137 SDT_MEMRWA, /* segment type */
1138 0, /* segment descriptor priority level */
1139 1, /* segment descriptor present */
1141 1, /* default 32 vs 16 bit size */
1142 1 /* limit granularity (byte/page units)*/ },
1143 /* GPROC0_SEL 4 Proc 0 Tss Descriptor */
1145 0x0, /* segment base address */
1146 sizeof(struct i386tss)-1,/* length - all address space */
1147 SDT_SYS386TSS, /* segment type */
1148 0, /* segment descriptor priority level */
1149 1, /* segment descriptor present */
1151 0, /* unused - default 32 vs 16 bit size */
1152 0 /* limit granularity (byte/page units)*/ },
1153 /* GLDT_SEL 5 LDT Descriptor */
1154 { (int) ldt, /* segment base address */
1155 sizeof(ldt)-1, /* length - all address space */
1156 SDT_SYSLDT, /* segment type */
1157 SEL_UPL, /* segment descriptor priority level */
1158 1, /* segment descriptor present */
1160 0, /* unused - default 32 vs 16 bit size */
1161 0 /* limit granularity (byte/page units)*/ },
1162 /* GUSERLDT_SEL 6 User LDT Descriptor per process */
1163 { (int) ldt, /* segment base address */
1164 (512 * sizeof(union descriptor)-1), /* length */
1165 SDT_SYSLDT, /* segment type */
1166 0, /* segment descriptor priority level */
1167 1, /* segment descriptor present */
1169 0, /* unused - default 32 vs 16 bit size */
1170 0 /* limit granularity (byte/page units)*/ },
1171 /* GTGATE_SEL 7 Null Descriptor - Placeholder */
1172 { 0x0, /* segment base address */
1173 0x0, /* length - all address space */
1174 0, /* segment type */
1175 0, /* segment descriptor priority level */
1176 0, /* segment descriptor present */
1178 0, /* default 32 vs 16 bit size */
1179 0 /* limit granularity (byte/page units)*/ },
1180 /* GBIOSLOWMEM_SEL 8 BIOS access to realmode segment 0x40, must be #8 in GDT */
1181 { 0x400, /* segment base address */
1182 0xfffff, /* length */
1183 SDT_MEMRWA, /* segment type */
1184 0, /* segment descriptor priority level */
1185 1, /* segment descriptor present */
1187 1, /* default 32 vs 16 bit size */
1188 1 /* limit granularity (byte/page units)*/ },
1189 /* GPANIC_SEL 9 Panic Tss Descriptor */
1190 { (int) &dblfault_tss, /* segment base address */
1191 sizeof(struct i386tss)-1,/* length - all address space */
1192 SDT_SYS386TSS, /* segment type */
1193 0, /* segment descriptor priority level */
1194 1, /* segment descriptor present */
1196 0, /* unused - default 32 vs 16 bit size */
1197 0 /* limit granularity (byte/page units)*/ },
1198 /* GBIOSCODE32_SEL 10 BIOS 32-bit interface (32bit Code) */
1199 { 0, /* segment base address (overwritten) */
1200 0xfffff, /* length */
1201 SDT_MEMERA, /* segment type */
1202 0, /* segment descriptor priority level */
1203 1, /* segment descriptor present */
1205 0, /* default 32 vs 16 bit size */
1206 1 /* limit granularity (byte/page units)*/ },
1207 /* GBIOSCODE16_SEL 11 BIOS 32-bit interface (16bit Code) */
1208 { 0, /* segment base address (overwritten) */
1209 0xfffff, /* length */
1210 SDT_MEMERA, /* segment type */
1211 0, /* segment descriptor priority level */
1212 1, /* segment descriptor present */
1214 0, /* default 32 vs 16 bit size */
1215 1 /* limit granularity (byte/page units)*/ },
1216 /* GBIOSDATA_SEL 12 BIOS 32-bit interface (Data) */
1217 { 0, /* segment base address (overwritten) */
1218 0xfffff, /* length */
1219 SDT_MEMRWA, /* segment type */
1220 0, /* segment descriptor priority level */
1221 1, /* segment descriptor present */
1223 1, /* default 32 vs 16 bit size */
1224 1 /* limit granularity (byte/page units)*/ },
1225 /* GBIOSUTIL_SEL 13 BIOS 16-bit interface (Utility) */
1226 { 0, /* segment base address (overwritten) */
1227 0xfffff, /* length */
1228 SDT_MEMRWA, /* segment type */
1229 0, /* segment descriptor priority level */
1230 1, /* segment descriptor present */
1232 0, /* default 32 vs 16 bit size */
1233 1 /* limit granularity (byte/page units)*/ },
1234 /* GBIOSARGS_SEL 14 BIOS 16-bit interface (Arguments) */
1235 { 0, /* segment base address (overwritten) */
1236 0xfffff, /* length */
1237 SDT_MEMRWA, /* segment type */
1238 0, /* segment descriptor priority level */
1239 1, /* segment descriptor present */
1241 0, /* default 32 vs 16 bit size */
1242 1 /* limit granularity (byte/page units)*/ },
1243 /* GTLS_START 15 TLS */
1244 { 0x0, /* segment base address */
1246 0, /* segment type */
1247 0, /* segment descriptor priority level */
1248 0, /* segment descriptor present */
1250 0, /* default 32 vs 16 bit size */
1251 0 /* limit granularity (byte/page units)*/ },
1252 /* GTLS_START+1 16 TLS */
1253 { 0x0, /* segment base address */
1255 0, /* segment type */
1256 0, /* segment descriptor priority level */
1257 0, /* segment descriptor present */
1259 0, /* default 32 vs 16 bit size */
1260 0 /* limit granularity (byte/page units)*/ },
1261 /* GTLS_END 17 TLS */
1262 { 0x0, /* segment base address */
1264 0, /* segment type */
1265 0, /* segment descriptor priority level */
1266 0, /* segment descriptor present */
1268 0, /* default 32 vs 16 bit size */
1269 0 /* limit granularity (byte/page units)*/ },
1272 static struct soft_segment_descriptor ldt_segs[] = {
1273 /* Null Descriptor - overwritten by call gate */
1274 { 0x0, /* segment base address */
1275 0x0, /* length - all address space */
1276 0, /* segment type */
1277 0, /* segment descriptor priority level */
1278 0, /* segment descriptor present */
1280 0, /* default 32 vs 16 bit size */
1281 0 /* limit granularity (byte/page units)*/ },
1282 /* Null Descriptor - overwritten by call gate */
1283 { 0x0, /* segment base address */
1284 0x0, /* length - all address space */
1285 0, /* segment type */
1286 0, /* segment descriptor priority level */
1287 0, /* segment descriptor present */
1289 0, /* default 32 vs 16 bit size */
1290 0 /* limit granularity (byte/page units)*/ },
1291 /* Null Descriptor - overwritten by call gate */
1292 { 0x0, /* segment base address */
1293 0x0, /* length - all address space */
1294 0, /* segment type */
1295 0, /* segment descriptor priority level */
1296 0, /* segment descriptor present */
1298 0, /* default 32 vs 16 bit size */
1299 0 /* limit granularity (byte/page units)*/ },
1300 /* Code Descriptor for user */
1301 { 0x0, /* segment base address */
1302 0xfffff, /* length - all address space */
1303 SDT_MEMERA, /* segment type */
1304 SEL_UPL, /* segment descriptor priority level */
1305 1, /* segment descriptor present */
1307 1, /* default 32 vs 16 bit size */
1308 1 /* limit granularity (byte/page units)*/ },
1309 /* Null Descriptor - overwritten by call gate */
1310 { 0x0, /* segment base address */
1311 0x0, /* length - all address space */
1312 0, /* segment type */
1313 0, /* segment descriptor priority level */
1314 0, /* segment descriptor present */
1316 0, /* default 32 vs 16 bit size */
1317 0 /* limit granularity (byte/page units)*/ },
1318 /* Data Descriptor for user */
1319 { 0x0, /* segment base address */
1320 0xfffff, /* length - all address space */
1321 SDT_MEMRWA, /* segment type */
1322 SEL_UPL, /* segment descriptor priority level */
1323 1, /* segment descriptor present */
1325 1, /* default 32 vs 16 bit size */
1326 1 /* limit granularity (byte/page units)*/ },
1330 setidt(int idx, inthand_t *func, int typ, int dpl, int selec)
1332 struct gate_descriptor *ip;
1335 ip->gd_looffset = (int)func;
1336 ip->gd_selector = selec;
1342 ip->gd_hioffset = ((int)func)>>16 ;
1345 #define IDTVEC(name) __CONCAT(X,name)
1348 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1349 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1350 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1351 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
1352 IDTVEC(xmm), IDTVEC(syscall),
1355 IDTVEC(int0x80_syscall);
1357 #ifdef DEBUG_INTERRUPTS
1358 extern inthand_t *Xrsvdary[256];
1362 sdtossd(struct segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1364 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1365 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1366 ssd->ssd_type = sd->sd_type;
1367 ssd->ssd_dpl = sd->sd_dpl;
1368 ssd->ssd_p = sd->sd_p;
1369 ssd->ssd_def32 = sd->sd_def32;
1370 ssd->ssd_gran = sd->sd_gran;
1374 * Populate the (physmap) array with base/bound pairs describing the
1375 * available physical memory in the system, then test this memory and
1376 * build the phys_avail array describing the actually-available memory.
1378 * If we cannot accurately determine the physical memory map, then use
1379 * value from the 0xE801 call, and failing that, the RTC.
1381 * Total memory size may be set by the kernel environment variable
1382 * hw.physmem or the compile-time define MAXMEM.
1385 getmemsize(int first)
1387 int i, physmap_idx, pa_indx, da_indx;
1389 u_int basemem, extmem;
1390 struct vm86frame vmf;
1391 struct vm86context vmc;
1393 vm_offset_t physmap[PHYSMAP_ENTRIES*2];
1401 quad_t dcons_addr, dcons_size;
1403 bzero(&vmf, sizeof(struct vm86frame));
1404 bzero(physmap, sizeof(physmap));
1408 * Some newer BIOSes has broken INT 12H implementation which cause
1409 * kernel panic immediately. In this case, we need to scan SMAP
1410 * with INT 15:E820 first, then determine base memory size.
1413 TUNABLE_INT_FETCH("hw.hasbrokenint12", &hasbrokenint12);
1414 if (hasbrokenint12) {
1419 * Perform "base memory" related probes & setup. If we get a crazy
1420 * value give the bios some scribble space just in case.
1422 vm86_intcall(0x12, &vmf);
1423 basemem = vmf.vmf_ax;
1424 if (basemem > 640) {
1425 kprintf("Preposterous BIOS basemem of %uK, "
1426 "truncating to < 640K\n", basemem);
1431 * XXX if biosbasemem is now < 640, there is a `hole'
1432 * between the end of base memory and the start of
1433 * ISA memory. The hole may be empty or it may
1434 * contain BIOS code or data. Map it read/write so
1435 * that the BIOS can write to it. (Memory from 0 to
1436 * the physical end of the kernel is mapped read-only
1437 * to begin with and then parts of it are remapped.
1438 * The parts that aren't remapped form holes that
1439 * remain read-only and are unused by the kernel.
1440 * The base memory area is below the physical end of
1441 * the kernel and right now forms a read-only hole.
1442 * The part of it from PAGE_SIZE to
1443 * (trunc_page(biosbasemem * 1024) - 1) will be
1444 * remapped and used by the kernel later.)
1446 * This code is similar to the code used in
1447 * pmap_mapdev, but since no memory needs to be
1448 * allocated we simply change the mapping.
1450 for (pa = trunc_page(basemem * 1024);
1451 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1452 pte = vtopte(pa + KERNBASE);
1453 *pte = pa | PG_RW | PG_V;
1457 * if basemem != 640, map pages r/w into vm86 page table so
1458 * that the bios can scribble on it.
1461 for (i = basemem / 4; i < 160; i++)
1462 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1466 * map page 1 R/W into the kernel page table so we can use it
1467 * as a buffer. The kernel will unmap this page later.
1469 pte = vtopte(KERNBASE + (1 << PAGE_SHIFT));
1470 *pte = (1 << PAGE_SHIFT) | PG_RW | PG_V;
1473 * get memory map with INT 15:E820
1475 #define SMAPSIZ sizeof(*smap)
1476 #define SMAP_SIG 0x534D4150 /* 'SMAP' */
1479 smap = (void *)vm86_addpage(&vmc, 1, KERNBASE + (1 << PAGE_SHIFT));
1480 vm86_getptr(&vmc, (vm_offset_t)smap, &vmf.vmf_es, &vmf.vmf_di);
1485 vmf.vmf_eax = 0xE820;
1486 vmf.vmf_edx = SMAP_SIG;
1487 vmf.vmf_ecx = SMAPSIZ;
1488 i = vm86_datacall(0x15, &vmf, &vmc);
1489 if (i || vmf.vmf_eax != SMAP_SIG)
1491 if (boothowto & RB_VERBOSE)
1492 kprintf("SMAP type=%02x base=%08x %08x len=%08x %08x\n",
1494 *(u_int32_t *)((char *)&smap->base + 4),
1495 (u_int32_t)smap->base,
1496 *(u_int32_t *)((char *)&smap->length + 4),
1497 (u_int32_t)smap->length);
1499 if (smap->type != 0x01)
1502 if (smap->length == 0)
1505 if (smap->base >= 0xffffffff) {
1506 kprintf("%uK of memory above 4GB ignored\n",
1507 (u_int)(smap->length / 1024));
1511 for (i = 0; i <= physmap_idx; i += 2) {
1512 if (smap->base < physmap[i + 1]) {
1513 if (boothowto & RB_VERBOSE)
1515 "Overlapping or non-montonic memory region, ignoring second region\n");
1520 if (smap->base == physmap[physmap_idx + 1]) {
1521 physmap[physmap_idx + 1] += smap->length;
1526 if (physmap_idx == PHYSMAP_ENTRIES*2) {
1528 "Too many segments in the physical address map, giving up\n");
1531 physmap[physmap_idx] = smap->base;
1532 physmap[physmap_idx + 1] = smap->base + smap->length;
1534 ; /* fix GCC3.x warning */
1535 } while (vmf.vmf_ebx != 0);
1538 * Perform "base memory" related probes & setup based on SMAP
1541 for (i = 0; i <= physmap_idx; i += 2) {
1542 if (physmap[i] == 0x00000000) {
1543 basemem = physmap[i + 1] / 1024;
1552 if (basemem > 640) {
1553 kprintf("Preposterous BIOS basemem of %uK, truncating to 640K\n",
1558 for (pa = trunc_page(basemem * 1024);
1559 pa < ISA_HOLE_START; pa += PAGE_SIZE) {
1560 pte = vtopte(pa + KERNBASE);
1561 *pte = pa | PG_RW | PG_V;
1565 for (i = basemem / 4; i < 160; i++)
1566 pte[i] = (i << PAGE_SHIFT) | PG_V | PG_RW | PG_U;
1569 if (physmap[1] != 0)
1573 * If we failed above, try memory map with INT 15:E801
1575 vmf.vmf_ax = 0xE801;
1576 if (vm86_intcall(0x15, &vmf) == 0) {
1577 extmem = vmf.vmf_cx + vmf.vmf_dx * 64;
1581 vm86_intcall(0x15, &vmf);
1582 extmem = vmf.vmf_ax;
1585 * Prefer the RTC value for extended memory.
1587 extmem = rtcin(RTC_EXTLO) + (rtcin(RTC_EXTHI) << 8);
1592 * Special hack for chipsets that still remap the 384k hole when
1593 * there's 16MB of memory - this really confuses people that
1594 * are trying to use bus mastering ISA controllers with the
1595 * "16MB limit"; they only have 16MB, but the remapping puts
1596 * them beyond the limit.
1598 * If extended memory is between 15-16MB (16-17MB phys address range),
1601 if ((extmem > 15 * 1024) && (extmem < 16 * 1024))
1605 physmap[1] = basemem * 1024;
1607 physmap[physmap_idx] = 0x100000;
1608 physmap[physmap_idx + 1] = physmap[physmap_idx] + extmem * 1024;
1612 * Now, physmap contains a map of physical memory.
1616 /* make hole for AP bootstrap code YYY */
1617 physmap[1] = mp_bootaddress(physmap[1]);
1619 /* Save EBDA address, if any */
1620 ebda_addr = (u_long)(*(u_short *)(KERNBASE + 0x40e));
1625 * Maxmem isn't the "maximum memory", it's one larger than the
1626 * highest page of the physical address space. It should be
1627 * called something like "Maxphyspage". We may adjust this
1628 * based on ``hw.physmem'' and the results of the memory test.
1630 Maxmem = atop(physmap[physmap_idx + 1]);
1633 Maxmem = MAXMEM / 4;
1636 if (kgetenv_quad("hw.physmem", &maxmem))
1637 Maxmem = atop(maxmem);
1639 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1640 (boothowto & RB_VERBOSE))
1641 kprintf("Physical memory use set to %lluK\n", Maxmem * 4);
1644 * If Maxmem has been increased beyond what the system has detected,
1645 * extend the last memory segment to the new limit.
1647 if (atop(physmap[physmap_idx + 1]) < Maxmem)
1648 physmap[physmap_idx + 1] = ptoa(Maxmem);
1650 /* call pmap initialization to make new kernel address space */
1651 pmap_bootstrap(first, 0);
1654 * Size up each available chunk of physical memory.
1656 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1659 phys_avail[pa_indx++] = physmap[0];
1660 phys_avail[pa_indx] = physmap[0];
1661 dump_avail[da_indx] = physmap[0];
1666 * Get dcons buffer address
1668 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1669 kgetenv_quad("dcons.size", &dcons_size) == 0)
1673 * physmap is in bytes, so when converting to page boundaries,
1674 * round up the start address and round down the end address.
1676 for (i = 0; i <= physmap_idx; i += 2) {
1680 if (physmap[i + 1] < end)
1681 end = trunc_page(physmap[i + 1]);
1682 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1683 int tmp, page_bad, full;
1687 int *ptr = (int *)CADDR1;
1692 * block out kernel memory as not available.
1694 if (pa >= 0x100000 && pa < first)
1698 * block out dcons buffer
1701 && pa >= trunc_page(dcons_addr)
1702 && pa < dcons_addr + dcons_size)
1708 * map page into kernel: valid, read/write,non-cacheable
1710 *pte = pa | PG_V | PG_RW | PG_N;
1715 * Test for alternating 1's and 0's
1717 *(volatile int *)ptr = 0xaaaaaaaa;
1718 if (*(volatile int *)ptr != 0xaaaaaaaa) {
1722 * Test for alternating 0's and 1's
1724 *(volatile int *)ptr = 0x55555555;
1725 if (*(volatile int *)ptr != 0x55555555) {
1731 *(volatile int *)ptr = 0xffffffff;
1732 if (*(volatile int *)ptr != 0xffffffff) {
1738 *(volatile int *)ptr = 0x0;
1739 if (*(volatile int *)ptr != 0x0) {
1743 * Restore original value.
1748 * Adjust array of valid/good pages.
1750 if (page_bad == TRUE) {
1754 * If this good page is a continuation of the
1755 * previous set of good pages, then just increase
1756 * the end pointer. Otherwise start a new chunk.
1757 * Note that "end" points one higher than end,
1758 * making the range >= start and < end.
1759 * If we're also doing a speculative memory
1760 * test and we at or past the end, bump up Maxmem
1761 * so that we keep going. The first bad page
1762 * will terminate the loop.
1764 if (phys_avail[pa_indx] == pa) {
1765 phys_avail[pa_indx] += PAGE_SIZE;
1768 if (pa_indx >= PHYSMAP_ENTRIES*2) {
1769 kprintf("Too many holes in the physical address space, giving up\n");
1774 phys_avail[pa_indx++] = pa; /* start */
1775 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1779 if (dump_avail[da_indx] == pa) {
1780 dump_avail[da_indx] += PAGE_SIZE;
1783 if (da_indx >= PHYSMAP_ENTRIES*2) {
1787 dump_avail[da_indx++] = pa; /* start */
1788 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1801 * The last chunk must contain at least one page plus the message
1802 * buffer to avoid complicating other code (message buffer address
1803 * calculation, etc.).
1805 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1806 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1807 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1808 phys_avail[pa_indx--] = 0;
1809 phys_avail[pa_indx--] = 0;
1812 Maxmem = atop(phys_avail[pa_indx]);
1814 /* Trim off space for the message buffer. */
1815 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1817 avail_end = phys_avail[pa_indx];
1829 * 7 Device Not Available (x87)
1831 * 9 Coprocessor Segment overrun (unsupported, reserved)
1833 * 11 Segment not present
1835 * 13 General Protection
1838 * 16 x87 FP Exception pending
1839 * 17 Alignment Check
1841 * 19 SIMD floating point
1843 * 32-255 INTn/external sources
1848 struct gate_descriptor *gdp;
1849 int gsel_tss, metadata_missing, off, x;
1850 struct mdglobaldata *gd;
1853 * Prevent lowering of the ipl if we call tsleep() early.
1855 gd = &CPU_prvspace[0].mdglobaldata;
1856 bzero(gd, sizeof(*gd));
1858 gd->mi.gd_curthread = &thread0;
1859 thread0.td_gd = &gd->mi;
1861 atdevbase = ISA_HOLE_START + KERNBASE;
1863 metadata_missing = 0;
1864 if (bootinfo.bi_modulep) {
1865 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1866 preload_bootstrap_relocate(KERNBASE);
1868 metadata_missing = 1;
1870 if (bootinfo.bi_envp)
1871 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1874 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1875 * and ncpus_fit_mask remain 0.
1880 /* Init basic tunables, hz etc */
1884 * make gdt memory segments, the code segment goes up to end of the
1885 * page with etext in it, the data segment goes to the end of
1889 * XXX text protection is temporarily (?) disabled. The limit was
1890 * i386_btop(round_page(etext)) - 1.
1892 gdt_segs[GCODE_SEL].ssd_limit = atop(0 - 1);
1893 gdt_segs[GDATA_SEL].ssd_limit = atop(0 - 1);
1895 gdt_segs[GPRIV_SEL].ssd_limit =
1896 atop(sizeof(struct privatespace) - 1);
1897 gdt_segs[GPRIV_SEL].ssd_base = (int) &CPU_prvspace[0];
1898 gdt_segs[GPROC0_SEL].ssd_base =
1899 (int) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1901 gd->mi.gd_prvspace = &CPU_prvspace[0];
1904 * Note: on both UP and SMP curthread must be set non-NULL
1905 * early in the boot sequence because the system assumes
1906 * that 'curthread' is never NULL.
1909 for (x = 0; x < NGDT; x++) {
1911 /* avoid overwriting db entries with APM ones */
1912 if (x >= GAPMCODE32_SEL && x <= GAPMDATA_SEL)
1915 ssdtosd(&gdt_segs[x], &gdt[x].sd);
1918 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1919 r_gdt.rd_base = (int) gdt;
1922 mi_gdinit(&gd->mi, 0);
1924 mi_proc0init(&gd->mi, proc0paddr);
1925 safepri = TDPRI_MAX;
1927 /* make ldt memory segments */
1929 * XXX - VM_MAX_USER_ADDRESS is an end address, not a max. And it
1930 * should be spelled ...MAX_USER...
1932 ldt_segs[LUCODE_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1933 ldt_segs[LUDATA_SEL].ssd_limit = atop(VM_MAX_USER_ADDRESS - 1);
1934 for (x = 0; x < sizeof ldt_segs / sizeof ldt_segs[0]; x++)
1935 ssdtosd(&ldt_segs[x], &ldt[x].sd);
1937 _default_ldt = GSEL(GLDT_SEL, SEL_KPL);
1939 gd->gd_currentldt = _default_ldt;
1940 /* spinlocks and the BGL */
1944 * Setup the hardware exception table. Most exceptions use
1945 * SDT_SYS386TGT, known as a 'trap gate'. Trap gates leave
1946 * interrupts enabled. VM page faults use SDT_SYS386IGT, known as
1947 * an 'interrupt trap gate', which disables interrupts on entry,
1948 * in order to be able to poll the appropriate CRn register to
1949 * determine the fault address.
1951 for (x = 0; x < NIDT; x++) {
1952 #ifdef DEBUG_INTERRUPTS
1953 setidt(x, Xrsvdary[x], SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1955 setidt(x, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1958 setidt(0, &IDTVEC(div), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1959 setidt(1, &IDTVEC(dbg), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1960 setidt(2, &IDTVEC(nmi), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1961 setidt(3, &IDTVEC(bpt), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1962 setidt(4, &IDTVEC(ofl), SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1963 setidt(5, &IDTVEC(bnd), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1964 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1965 setidt(7, &IDTVEC(dna), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1966 setidt(8, 0, SDT_SYSTASKGT, SEL_KPL, GSEL(GPANIC_SEL, SEL_KPL));
1967 setidt(9, &IDTVEC(fpusegm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1968 setidt(10, &IDTVEC(tss), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1969 setidt(11, &IDTVEC(missing), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1970 setidt(12, &IDTVEC(stk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1971 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1972 setidt(14, &IDTVEC(page), SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1973 setidt(15, &IDTVEC(rsvd0), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1974 setidt(16, &IDTVEC(fpu), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1975 setidt(17, &IDTVEC(align), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1976 setidt(18, &IDTVEC(mchk), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1977 setidt(19, &IDTVEC(xmm), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1978 setidt(0x80, &IDTVEC(int0x80_syscall),
1979 SDT_SYS386TGT, SEL_UPL, GSEL(GCODE_SEL, SEL_KPL));
1981 r_idt.rd_limit = sizeof(idt0) - 1;
1982 r_idt.rd_base = (int) idt;
1986 * Initialize the console before we print anything out.
1990 if (metadata_missing)
1991 kprintf("WARNING: loader(8) metadata is missing!\n");
2000 if (boothowto & RB_KDB)
2001 Debugger("Boot flags requested debugger");
2004 finishidentcpu(); /* Final stage of CPU initialization */
2005 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2006 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
2007 initializecpu(); /* Initialize CPU registers */
2010 * make an initial tss so cpu can get interrupt stack on syscall!
2011 * The 16 bytes is to save room for a VM86 context.
2013 gd->gd_common_tss.tss_esp0 = (int) thread0.td_pcb - 16;
2014 gd->gd_common_tss.tss_ss0 = GSEL(GDATA_SEL, SEL_KPL) ;
2015 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
2016 gd->gd_tss_gdt = &gdt[GPROC0_SEL].sd;
2017 gd->gd_common_tssd = *gd->gd_tss_gdt;
2018 gd->gd_common_tss.tss_ioopt = (sizeof gd->gd_common_tss) << 16;
2021 dblfault_tss.tss_esp = dblfault_tss.tss_esp0 = dblfault_tss.tss_esp1 =
2022 dblfault_tss.tss_esp2 = (int) &dblfault_stack[sizeof(dblfault_stack)];
2023 dblfault_tss.tss_ss = dblfault_tss.tss_ss0 = dblfault_tss.tss_ss1 =
2024 dblfault_tss.tss_ss2 = GSEL(GDATA_SEL, SEL_KPL);
2025 dblfault_tss.tss_cr3 = (int)IdlePTD;
2026 dblfault_tss.tss_eip = (int) dblfault_handler;
2027 dblfault_tss.tss_eflags = PSL_KERNEL;
2028 dblfault_tss.tss_ds = dblfault_tss.tss_es =
2029 dblfault_tss.tss_gs = GSEL(GDATA_SEL, SEL_KPL);
2030 dblfault_tss.tss_fs = GSEL(GPRIV_SEL, SEL_KPL);
2031 dblfault_tss.tss_cs = GSEL(GCODE_SEL, SEL_KPL);
2032 dblfault_tss.tss_ldt = GSEL(GLDT_SEL, SEL_KPL);
2036 init_param2(physmem);
2038 /* now running on new page tables, configured,and u/iom is accessible */
2040 /* Map the message buffer. */
2041 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
2042 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
2044 msgbufinit(msgbufp, MSGBUF_SIZE);
2046 /* make a call gate to reenter kernel with */
2047 gdp = &ldt[LSYS5CALLS_SEL].gd;
2049 x = (int) &IDTVEC(syscall);
2050 gdp->gd_looffset = x++;
2051 gdp->gd_selector = GSEL(GCODE_SEL,SEL_KPL);
2053 gdp->gd_type = SDT_SYS386CGT;
2054 gdp->gd_dpl = SEL_UPL;
2056 gdp->gd_hioffset = ((int) &IDTVEC(syscall)) >>16;
2058 /* XXX does this work? */
2059 ldt[LBSDICALLS_SEL] = ldt[LSYS5CALLS_SEL];
2060 ldt[LSOL26CALLS_SEL] = ldt[LSYS5CALLS_SEL];
2062 /* transfer to user mode */
2064 _ucodesel = LSEL(LUCODE_SEL, SEL_UPL);
2065 _udatasel = LSEL(LUDATA_SEL, SEL_UPL);
2067 /* setup proc 0's pcb */
2068 thread0.td_pcb->pcb_flags = 0;
2069 thread0.td_pcb->pcb_cr3 = (int)IdlePTD; /* should already be setup */
2070 thread0.td_pcb->pcb_ext = 0;
2071 lwp0.lwp_md.md_regs = &proc0_tf;
2075 * Initialize machine-dependant portions of the global data structure.
2076 * Note that the global data area and cpu0's idlestack in the private
2077 * data space were allocated in locore.
2079 * Note: the idlethread's cpl is 0
2081 * WARNING! Called from early boot, 'mycpu' may not work yet.
2084 cpu_gdinit(struct mdglobaldata *gd, int cpu)
2087 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
2089 lwkt_init_thread(&gd->mi.gd_idlethread,
2090 gd->mi.gd_prvspace->idlestack,
2091 sizeof(gd->mi.gd_prvspace->idlestack),
2092 TDF_MPSAFE, &gd->mi);
2093 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
2094 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
2095 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
2096 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
2100 is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
2102 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
2103 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
2110 globaldata_find(int cpu)
2112 KKASSERT(cpu >= 0 && cpu < ncpus);
2113 return(&CPU_prvspace[cpu].mdglobaldata.mi);
2116 #if defined(I586_CPU) && !defined(NO_F00F_HACK)
2117 static void f00f_hack(void *unused);
2118 SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
2121 f00f_hack(void *unused)
2123 struct gate_descriptor *new_idt;
2129 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
2131 r_idt.rd_limit = sizeof(idt0) - 1;
2133 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
2135 panic("kmem_alloc returned 0");
2136 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
2137 panic("kmem_alloc returned non-page-aligned memory");
2138 /* Put the first seven entries in the lower page */
2139 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
2140 bcopy(idt, new_idt, sizeof(idt0));
2141 r_idt.rd_base = (int)new_idt;
2144 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
2145 VM_PROT_READ, FALSE) != KERN_SUCCESS)
2146 panic("vm_map_protect failed");
2149 #endif /* defined(I586_CPU) && !NO_F00F_HACK */
2152 ptrace_set_pc(struct lwp *lp, unsigned long addr)
2154 lp->lwp_md.md_regs->tf_eip = addr;
2159 ptrace_single_step(struct lwp *lp)
2161 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
2166 fill_regs(struct lwp *lp, struct reg *regs)
2169 struct trapframe *tp;
2171 tp = lp->lwp_md.md_regs;
2172 regs->r_gs = tp->tf_gs;
2173 regs->r_fs = tp->tf_fs;
2174 regs->r_es = tp->tf_es;
2175 regs->r_ds = tp->tf_ds;
2176 regs->r_edi = tp->tf_edi;
2177 regs->r_esi = tp->tf_esi;
2178 regs->r_ebp = tp->tf_ebp;
2179 regs->r_ebx = tp->tf_ebx;
2180 regs->r_edx = tp->tf_edx;
2181 regs->r_ecx = tp->tf_ecx;
2182 regs->r_eax = tp->tf_eax;
2183 regs->r_eip = tp->tf_eip;
2184 regs->r_cs = tp->tf_cs;
2185 regs->r_eflags = tp->tf_eflags;
2186 regs->r_esp = tp->tf_esp;
2187 regs->r_ss = tp->tf_ss;
2188 pcb = lp->lwp_thread->td_pcb;
2193 set_regs(struct lwp *lp, struct reg *regs)
2196 struct trapframe *tp;
2198 tp = lp->lwp_md.md_regs;
2199 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
2200 !CS_SECURE(regs->r_cs))
2202 tp->tf_gs = regs->r_gs;
2203 tp->tf_fs = regs->r_fs;
2204 tp->tf_es = regs->r_es;
2205 tp->tf_ds = regs->r_ds;
2206 tp->tf_edi = regs->r_edi;
2207 tp->tf_esi = regs->r_esi;
2208 tp->tf_ebp = regs->r_ebp;
2209 tp->tf_ebx = regs->r_ebx;
2210 tp->tf_edx = regs->r_edx;
2211 tp->tf_ecx = regs->r_ecx;
2212 tp->tf_eax = regs->r_eax;
2213 tp->tf_eip = regs->r_eip;
2214 tp->tf_cs = regs->r_cs;
2215 tp->tf_eflags = regs->r_eflags;
2216 tp->tf_esp = regs->r_esp;
2217 tp->tf_ss = regs->r_ss;
2218 pcb = lp->lwp_thread->td_pcb;
2222 #ifndef CPU_DISABLE_SSE
2224 fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2226 struct env87 *penv_87 = &sv_87->sv_env;
2227 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2230 /* FPU control/status */
2231 penv_87->en_cw = penv_xmm->en_cw;
2232 penv_87->en_sw = penv_xmm->en_sw;
2233 penv_87->en_tw = penv_xmm->en_tw;
2234 penv_87->en_fip = penv_xmm->en_fip;
2235 penv_87->en_fcs = penv_xmm->en_fcs;
2236 penv_87->en_opcode = penv_xmm->en_opcode;
2237 penv_87->en_foo = penv_xmm->en_foo;
2238 penv_87->en_fos = penv_xmm->en_fos;
2241 for (i = 0; i < 8; ++i)
2242 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2244 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2248 set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2250 struct env87 *penv_87 = &sv_87->sv_env;
2251 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2254 /* FPU control/status */
2255 penv_xmm->en_cw = penv_87->en_cw;
2256 penv_xmm->en_sw = penv_87->en_sw;
2257 penv_xmm->en_tw = penv_87->en_tw;
2258 penv_xmm->en_fip = penv_87->en_fip;
2259 penv_xmm->en_fcs = penv_87->en_fcs;
2260 penv_xmm->en_opcode = penv_87->en_opcode;
2261 penv_xmm->en_foo = penv_87->en_foo;
2262 penv_xmm->en_fos = penv_87->en_fos;
2265 for (i = 0; i < 8; ++i)
2266 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2268 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2270 #endif /* CPU_DISABLE_SSE */
2273 fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2275 #ifndef CPU_DISABLE_SSE
2277 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2278 (struct save87 *)fpregs);
2281 #endif /* CPU_DISABLE_SSE */
2282 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2287 set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2289 #ifndef CPU_DISABLE_SSE
2291 set_fpregs_xmm((struct save87 *)fpregs,
2292 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2295 #endif /* CPU_DISABLE_SSE */
2296 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2301 fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2304 dbregs->dr0 = rdr0();
2305 dbregs->dr1 = rdr1();
2306 dbregs->dr2 = rdr2();
2307 dbregs->dr3 = rdr3();
2308 dbregs->dr4 = rdr4();
2309 dbregs->dr5 = rdr5();
2310 dbregs->dr6 = rdr6();
2311 dbregs->dr7 = rdr7();
2315 pcb = lp->lwp_thread->td_pcb;
2316 dbregs->dr0 = pcb->pcb_dr0;
2317 dbregs->dr1 = pcb->pcb_dr1;
2318 dbregs->dr2 = pcb->pcb_dr2;
2319 dbregs->dr3 = pcb->pcb_dr3;
2322 dbregs->dr6 = pcb->pcb_dr6;
2323 dbregs->dr7 = pcb->pcb_dr7;
2329 set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2332 load_dr0(dbregs->dr0);
2333 load_dr1(dbregs->dr1);
2334 load_dr2(dbregs->dr2);
2335 load_dr3(dbregs->dr3);
2336 load_dr4(dbregs->dr4);
2337 load_dr5(dbregs->dr5);
2338 load_dr6(dbregs->dr6);
2339 load_dr7(dbregs->dr7);
2342 struct ucred *ucred;
2344 uint32_t mask1, mask2;
2347 * Don't let an illegal value for dr7 get set. Specifically,
2348 * check for undefined settings. Setting these bit patterns
2349 * result in undefined behaviour and can lead to an unexpected
2352 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 8;
2353 i++, mask1 <<= 2, mask2 <<= 2)
2354 if ((dbregs->dr7 & mask1) == mask2)
2357 pcb = lp->lwp_thread->td_pcb;
2358 ucred = lp->lwp_proc->p_ucred;
2361 * Don't let a process set a breakpoint that is not within the
2362 * process's address space. If a process could do this, it
2363 * could halt the system by setting a breakpoint in the kernel
2364 * (if ddb was enabled). Thus, we need to check to make sure
2365 * that no breakpoints are being enabled for addresses outside
2366 * process's address space, unless, perhaps, we were called by
2369 * XXX - what about when the watched area of the user's
2370 * address space is written into from within the kernel
2371 * ... wouldn't that still cause a breakpoint to be generated
2372 * from within kernel mode?
2375 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
2376 if (dbregs->dr7 & 0x3) {
2377 /* dr0 is enabled */
2378 if (dbregs->dr0 >= VM_MAX_USER_ADDRESS)
2382 if (dbregs->dr7 & (0x3<<2)) {
2383 /* dr1 is enabled */
2384 if (dbregs->dr1 >= VM_MAX_USER_ADDRESS)
2388 if (dbregs->dr7 & (0x3<<4)) {
2389 /* dr2 is enabled */
2390 if (dbregs->dr2 >= VM_MAX_USER_ADDRESS)
2394 if (dbregs->dr7 & (0x3<<6)) {
2395 /* dr3 is enabled */
2396 if (dbregs->dr3 >= VM_MAX_USER_ADDRESS)
2401 pcb->pcb_dr0 = dbregs->dr0;
2402 pcb->pcb_dr1 = dbregs->dr1;
2403 pcb->pcb_dr2 = dbregs->dr2;
2404 pcb->pcb_dr3 = dbregs->dr3;
2405 pcb->pcb_dr6 = dbregs->dr6;
2406 pcb->pcb_dr7 = dbregs->dr7;
2408 pcb->pcb_flags |= PCB_DBREGS;
2415 * Return > 0 if a hardware breakpoint has been hit, and the
2416 * breakpoint was in user space. Return 0, otherwise.
2419 user_dbreg_trap(void)
2421 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
2422 u_int32_t bp; /* breakpoint bits extracted from dr6 */
2423 int nbp; /* number of breakpoints that triggered */
2424 caddr_t addr[4]; /* breakpoint addresses */
2428 if ((dr7 & 0x000000ff) == 0) {
2430 * all GE and LE bits in the dr7 register are zero,
2431 * thus the trap couldn't have been caused by the
2432 * hardware debug registers
2439 bp = dr6 & 0x0000000f;
2443 * None of the breakpoint bits are set meaning this
2444 * trap was not caused by any of the debug registers
2450 * at least one of the breakpoints were hit, check to see
2451 * which ones and if any of them are user space addresses
2455 addr[nbp++] = (caddr_t)rdr0();
2458 addr[nbp++] = (caddr_t)rdr1();
2461 addr[nbp++] = (caddr_t)rdr2();
2464 addr[nbp++] = (caddr_t)rdr3();
2467 for (i=0; i<nbp; i++) {
2469 (caddr_t)VM_MAX_USER_ADDRESS) {
2471 * addr[i] is in user space
2478 * None of the breakpoints are in user space.
2486 Debugger(const char *msg)
2488 kprintf("Debugger(\"%s\") called.\n", msg);
2495 * Provide inb() and outb() as functions. They are normally only
2496 * available as macros calling inlined functions, thus cannot be
2497 * called inside DDB.
2499 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2505 /* silence compiler warnings */
2507 void outb(u_int, u_char);
2514 * We use %%dx and not %1 here because i/o is done at %dx and not at
2515 * %edx, while gcc generates inferior code (movw instead of movl)
2516 * if we tell it to load (u_short) port.
2518 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2523 outb(u_int port, u_char data)
2527 * Use an unnecessary assignment to help gcc's register allocator.
2528 * This make a large difference for gcc-1.40 and a tiny difference
2529 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2530 * best results. gcc-2.6.0 can't handle this.
2533 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2540 #include "opt_cpu.h"
2544 * initialize all the SMP locks
2547 /* critical region when masking or unmasking interupts */
2548 struct spinlock_deprecated imen_spinlock;
2550 /* Make FAST_INTR() routines sequential */
2551 struct spinlock_deprecated fast_intr_spinlock;
2553 /* critical region for old style disable_intr/enable_intr */
2554 struct spinlock_deprecated mpintr_spinlock;
2556 /* critical region around INTR() routines */
2557 struct spinlock_deprecated intr_spinlock;
2559 /* lock region used by kernel profiling */
2560 struct spinlock_deprecated mcount_spinlock;
2562 /* locks com (tty) data/hardware accesses: a FASTINTR() */
2563 struct spinlock_deprecated com_spinlock;
2565 /* locks kernel kprintfs */
2566 struct spinlock_deprecated cons_spinlock;
2568 /* lock regions around the clock hardware */
2569 struct spinlock_deprecated clock_spinlock;
2571 /* lock around the MP rendezvous */
2572 struct spinlock_deprecated smp_rv_spinlock;
2578 * mp_lock = 0; BSP already owns the MP lock
2581 * Get the initial mp_lock with a count of 1 for the BSP.
2582 * This uses a LOGICAL cpu ID, ie BSP == 0.
2585 cpu_get_initial_mplock();
2588 spin_lock_init(&mcount_spinlock);
2589 spin_lock_init(&fast_intr_spinlock);
2590 spin_lock_init(&intr_spinlock);
2591 spin_lock_init(&mpintr_spinlock);
2592 spin_lock_init(&imen_spinlock);
2593 spin_lock_init(&smp_rv_spinlock);
2594 spin_lock_init(&com_spinlock);
2595 spin_lock_init(&clock_spinlock);
2596 spin_lock_init(&cons_spinlock);
2598 /* our token pool needs to work early */
2599 lwkt_token_pool_init();