2 * Copyright 2008 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 * Author: Stanislaw Skowronek
25 #include <linux/module.h>
26 #include <linux/sched.h>
27 #include <asm/unaligned.h>
32 #include "atom-names.h"
33 #include "atom-bits.h"
35 #include <linux/delay.h>
37 #define ATOM_COND_ABOVE 0
38 #define ATOM_COND_ABOVEOREQUAL 1
39 #define ATOM_COND_ALWAYS 2
40 #define ATOM_COND_BELOW 3
41 #define ATOM_COND_BELOWOREQUAL 4
42 #define ATOM_COND_EQUAL 5
43 #define ATOM_COND_NOTEQUAL 6
45 #define ATOM_PORT_ATI 0
46 #define ATOM_PORT_PCI 1
47 #define ATOM_PORT_SYSIO 2
49 #define ATOM_UNIT_MICROSEC 0
50 #define ATOM_UNIT_MILLISEC 1
56 struct atom_context *ctx;
61 unsigned long last_jump_jiffies;
66 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
68 static uint32_t atom_arg_mask[8] = {
69 0xFFFFFFFF, 0x0000FFFF, 0x00FFFF00, 0xFFFF0000,
70 0x000000FF, 0x0000FF00, 0x00FF0000, 0xFF000000
72 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
74 static int atom_dst_to_src[8][4] = {
75 /* translate destination alignment field to the source alignment encoding */
85 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
87 static int debug_depth = 0;
89 static void debug_print_spaces(int n)
102 #define DEBUG(...) do if (atom_debug) { kprintf(__FILE__ __VA_ARGS__); } while (0)
103 #define SDEBUG(...) do if (atom_debug) { kprintf(__FILE__); debug_print_spaces(debug_depth); kprintf(__VA_ARGS__); } while (0)
105 #else /* !ATOM_DEBUG */
107 #define DEBUG(...) do { } while (0)
108 #define SDEBUG(...) do { } while (0)
110 #endif /* ATOM_DEBUG */
112 static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
113 uint32_t index, uint32_t data)
115 struct radeon_device *rdev = ctx->card->dev->dev_private;
116 uint32_t temp = 0xCDCDCDCD;
124 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
128 if (rdev->family == CHIP_RV515)
129 (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1));
130 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
135 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
141 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
145 case ATOM_IIO_MOVE_INDEX:
147 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
150 ((index >> CU8(base + 2)) &
151 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
155 case ATOM_IIO_MOVE_DATA:
157 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
160 ((data >> CU8(base + 2)) &
161 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
165 case ATOM_IIO_MOVE_ATTR:
167 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
171 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
182 DRM_INFO("Unknown IIO opcode.\n");
187 static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
188 int *ptr, uint32_t *saved, int print)
190 uint32_t idx, val = 0xCDCDCDCD, align, arg;
191 struct atom_context *gctx = ctx->ctx;
193 align = (attr >> 3) & 7;
196 *saved = 0; /* avoid bogus gcc warning */
203 DEBUG("REG[0x%04X]", idx);
204 idx += gctx->reg_block;
205 switch (gctx->io_mode) {
207 val = gctx->card->reg_read(gctx->card, idx);
211 "PCI registers are not implemented.\n");
215 "SYSIO registers are not implemented.\n");
218 if (!(gctx->io_mode & 0x80)) {
219 DRM_INFO("Bad IO mode.\n");
222 if (!gctx->iio[gctx->io_mode & 0x7F]) {
224 "Undefined indirect IO read method %d.\n",
225 gctx->io_mode & 0x7F);
229 atom_iio_execute(gctx,
230 gctx->iio[gctx->io_mode & 0x7F],
237 /* get_unaligned_le32 avoids unaligned accesses from atombios
238 * tables, noticed on a DEC Alpha. */
239 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
241 DEBUG("PS[0x%02X,0x%04X]", idx, val);
247 DEBUG("WS[0x%02X]", idx);
249 case ATOM_WS_QUOTIENT:
250 val = gctx->divmul[0];
252 case ATOM_WS_REMAINDER:
253 val = gctx->divmul[1];
255 case ATOM_WS_DATAPTR:
256 val = gctx->data_block;
261 case ATOM_WS_OR_MASK:
262 val = 1 << gctx->shift;
264 case ATOM_WS_AND_MASK:
265 val = ~(1 << gctx->shift);
267 case ATOM_WS_FB_WINDOW:
270 case ATOM_WS_ATTRIBUTES:
274 val = gctx->reg_block;
284 if (gctx->data_block)
285 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
287 DEBUG("ID[0x%04X]", idx);
289 val = U32(idx + gctx->data_block);
294 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
295 DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n",
296 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
299 val = gctx->scratch[(gctx->fb_base / 4) + idx];
301 DEBUG("FB[0x%02X]", idx);
309 DEBUG("IMM 0x%08X\n", val);
313 case ATOM_SRC_WORD16:
317 DEBUG("IMM 0x%04X\n", val);
321 case ATOM_SRC_BYTE16:
322 case ATOM_SRC_BYTE24:
326 DEBUG("IMM 0x%02X\n", val);
334 DEBUG("PLL[0x%02X]", idx);
335 val = gctx->card->pll_read(gctx->card, idx);
341 DEBUG("MC[0x%02X]", idx);
342 val = gctx->card->mc_read(gctx->card, idx);
347 val &= atom_arg_mask[align];
348 val >>= atom_arg_shift[align];
352 DEBUG(".[31:0] -> 0x%08X\n", val);
355 DEBUG(".[15:0] -> 0x%04X\n", val);
358 DEBUG(".[23:8] -> 0x%04X\n", val);
360 case ATOM_SRC_WORD16:
361 DEBUG(".[31:16] -> 0x%04X\n", val);
364 DEBUG(".[7:0] -> 0x%02X\n", val);
367 DEBUG(".[15:8] -> 0x%02X\n", val);
369 case ATOM_SRC_BYTE16:
370 DEBUG(".[23:16] -> 0x%02X\n", val);
372 case ATOM_SRC_BYTE24:
373 DEBUG(".[31:24] -> 0x%02X\n", val);
379 static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
381 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
401 case ATOM_SRC_WORD16:
406 case ATOM_SRC_BYTE16:
407 case ATOM_SRC_BYTE24:
415 static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
417 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
420 static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
422 uint32_t val = 0xCDCDCDCD;
431 case ATOM_SRC_WORD16:
437 case ATOM_SRC_BYTE16:
438 case ATOM_SRC_BYTE24:
446 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
447 int *ptr, uint32_t *saved, int print)
449 return atom_get_src_int(ctx,
450 arg | atom_dst_to_src[(attr >> 3) &
451 7][(attr >> 6) & 3] << 3,
455 static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
457 atom_skip_src_int(ctx,
458 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
462 static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
463 int *ptr, uint32_t val, uint32_t saved)
466 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
468 struct atom_context *gctx = ctx->ctx;
469 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
470 val <<= atom_arg_shift[align];
471 val &= atom_arg_mask[align];
472 saved &= ~atom_arg_mask[align];
478 DEBUG("REG[0x%04X]", idx);
479 idx += gctx->reg_block;
480 switch (gctx->io_mode) {
483 gctx->card->reg_write(gctx->card, idx,
486 gctx->card->reg_write(gctx->card, idx, val);
490 "PCI registers are not implemented.\n");
494 "SYSIO registers are not implemented.\n");
497 if (!(gctx->io_mode & 0x80)) {
498 DRM_INFO("Bad IO mode.\n");
501 if (!gctx->iio[gctx->io_mode & 0xFF]) {
503 "Undefined indirect IO write method %d.\n",
504 gctx->io_mode & 0x7F);
507 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
514 DEBUG("PS[0x%02X]", idx);
515 ctx->ps[idx] = cpu_to_le32(val);
520 DEBUG("WS[0x%02X]", idx);
522 case ATOM_WS_QUOTIENT:
523 gctx->divmul[0] = val;
525 case ATOM_WS_REMAINDER:
526 gctx->divmul[1] = val;
528 case ATOM_WS_DATAPTR:
529 gctx->data_block = val;
534 case ATOM_WS_OR_MASK:
535 case ATOM_WS_AND_MASK:
537 case ATOM_WS_FB_WINDOW:
540 case ATOM_WS_ATTRIBUTES:
544 gctx->reg_block = val;
553 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) {
554 DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n",
555 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes);
557 gctx->scratch[(gctx->fb_base / 4) + idx] = val;
558 DEBUG("FB[0x%02X]", idx);
563 DEBUG("PLL[0x%02X]", idx);
564 gctx->card->pll_write(gctx->card, idx, val);
569 DEBUG("MC[0x%02X]", idx);
570 gctx->card->mc_write(gctx->card, idx, val);
575 DEBUG(".[31:0] <- 0x%08X\n", old_val);
578 DEBUG(".[15:0] <- 0x%04X\n", old_val);
581 DEBUG(".[23:8] <- 0x%04X\n", old_val);
583 case ATOM_SRC_WORD16:
584 DEBUG(".[31:16] <- 0x%04X\n", old_val);
587 DEBUG(".[7:0] <- 0x%02X\n", old_val);
590 DEBUG(".[15:8] <- 0x%02X\n", old_val);
592 case ATOM_SRC_BYTE16:
593 DEBUG(".[23:16] <- 0x%02X\n", old_val);
595 case ATOM_SRC_BYTE24:
596 DEBUG(".[31:24] <- 0x%02X\n", old_val);
601 static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
603 uint8_t attr = U8((*ptr)++);
604 uint32_t dst, src, saved;
607 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
609 src = atom_get_src(ctx, attr, ptr);
612 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
615 static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
617 uint8_t attr = U8((*ptr)++);
618 uint32_t dst, src, saved;
621 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
623 src = atom_get_src(ctx, attr, ptr);
626 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
629 static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
631 DRM_INFO("ATOM BIOS beeped!\n");
634 static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
636 int idx = U8((*ptr)++);
639 if (idx < ATOM_TABLE_NAMES_CNT)
640 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
642 SDEBUG(" table: %d\n", idx);
643 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
644 r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
650 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
652 uint8_t attr = U8((*ptr)++);
656 attr |= atom_def_dst[attr >> 3] << 6;
657 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
659 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
662 static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
664 uint8_t attr = U8((*ptr)++);
667 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
669 src = atom_get_src(ctx, attr, ptr);
670 ctx->ctx->cs_equal = (dst == src);
671 ctx->ctx->cs_above = (dst > src);
672 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
673 ctx->ctx->cs_above ? "GT" : "LE");
676 static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
678 unsigned count = U8((*ptr)++);
679 SDEBUG(" count: %d\n", count);
680 if (arg == ATOM_UNIT_MICROSEC)
682 else if (!drm_can_sleep())
688 static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
690 uint8_t attr = U8((*ptr)++);
693 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
695 src = atom_get_src(ctx, attr, ptr);
697 ctx->ctx->divmul[0] = dst / src;
698 ctx->ctx->divmul[1] = dst % src;
700 ctx->ctx->divmul[0] = 0;
701 ctx->ctx->divmul[1] = 0;
705 static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
707 /* functionally, a nop */
710 static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
712 int execute = 0, target = U16(*ptr);
713 unsigned long cjiffies;
717 case ATOM_COND_ABOVE:
718 execute = ctx->ctx->cs_above;
720 case ATOM_COND_ABOVEOREQUAL:
721 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
723 case ATOM_COND_ALWAYS:
726 case ATOM_COND_BELOW:
727 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
729 case ATOM_COND_BELOWOREQUAL:
730 execute = !ctx->ctx->cs_above;
732 case ATOM_COND_EQUAL:
733 execute = ctx->ctx->cs_equal;
735 case ATOM_COND_NOTEQUAL:
736 execute = !ctx->ctx->cs_equal;
739 if (arg != ATOM_COND_ALWAYS)
740 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
741 SDEBUG(" target: 0x%04X\n", target);
743 if (ctx->last_jump == (ctx->start + target)) {
745 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
746 cjiffies -= ctx->last_jump_jiffies;
747 if ((jiffies_to_msecs(cjiffies) > 5000)) {
748 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
752 /* jiffies wrap around we will just wait a little longer */
753 ctx->last_jump_jiffies = jiffies;
756 ctx->last_jump = ctx->start + target;
757 ctx->last_jump_jiffies = jiffies;
759 *ptr = ctx->start + target;
763 static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
765 uint8_t attr = U8((*ptr)++);
766 uint32_t dst, mask, src, saved;
769 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
770 mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
771 SDEBUG(" mask: 0x%08x", mask);
773 src = atom_get_src(ctx, attr, ptr);
777 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
780 static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
782 uint8_t attr = U8((*ptr)++);
785 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
786 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
788 atom_skip_dst(ctx, arg, attr, ptr);
792 src = atom_get_src(ctx, attr, ptr);
794 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
797 static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
799 uint8_t attr = U8((*ptr)++);
802 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
804 src = atom_get_src(ctx, attr, ptr);
805 ctx->ctx->divmul[0] = dst * src;
808 static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
813 static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
815 uint8_t attr = U8((*ptr)++);
816 uint32_t dst, src, saved;
819 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
821 src = atom_get_src(ctx, attr, ptr);
824 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
827 static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
829 uint8_t val = U8((*ptr)++);
830 SDEBUG("POST card output: 0x%02X\n", val);
833 static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
835 DRM_INFO("unimplemented!\n");
838 static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
840 DRM_INFO("unimplemented!\n");
843 static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
845 DRM_INFO("unimplemented!\n");
848 static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
852 SDEBUG(" block: %d\n", idx);
854 ctx->ctx->data_block = 0;
856 ctx->ctx->data_block = ctx->start;
858 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
859 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
862 static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
864 uint8_t attr = U8((*ptr)++);
865 SDEBUG(" fb_base: ");
866 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
869 static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
875 if (port < ATOM_IO_NAMES_CNT)
876 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
878 SDEBUG(" port: %d\n", port);
880 ctx->ctx->io_mode = ATOM_IO_MM;
882 ctx->ctx->io_mode = ATOM_IO_IIO | port;
886 ctx->ctx->io_mode = ATOM_IO_PCI;
889 case ATOM_PORT_SYSIO:
890 ctx->ctx->io_mode = ATOM_IO_SYSIO;
896 static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
898 ctx->ctx->reg_block = U16(*ptr);
900 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
903 static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
905 uint8_t attr = U8((*ptr)++), shift;
909 attr |= atom_def_dst[attr >> 3] << 6;
911 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
912 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
913 SDEBUG(" shift: %d\n", shift);
916 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
919 static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
921 uint8_t attr = U8((*ptr)++), shift;
925 attr |= atom_def_dst[attr >> 3] << 6;
927 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
928 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
929 SDEBUG(" shift: %d\n", shift);
932 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
935 static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
937 uint8_t attr = U8((*ptr)++), shift;
940 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
942 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
943 /* op needs to full dst value */
945 shift = atom_get_src(ctx, attr, ptr);
946 SDEBUG(" shift: %d\n", shift);
948 dst &= atom_arg_mask[dst_align];
949 dst >>= atom_arg_shift[dst_align];
951 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
954 static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
956 uint8_t attr = U8((*ptr)++), shift;
959 uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3];
961 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
962 /* op needs to full dst value */
964 shift = atom_get_src(ctx, attr, ptr);
965 SDEBUG(" shift: %d\n", shift);
967 dst &= atom_arg_mask[dst_align];
968 dst >>= atom_arg_shift[dst_align];
970 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
973 static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
975 uint8_t attr = U8((*ptr)++);
976 uint32_t dst, src, saved;
979 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
981 src = atom_get_src(ctx, attr, ptr);
984 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
987 static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
989 uint8_t attr = U8((*ptr)++);
990 uint32_t src, val, target;
992 src = atom_get_src(ctx, attr, ptr);
993 while (U16(*ptr) != ATOM_CASE_END)
994 if (U8(*ptr) == ATOM_CASE_MAGIC) {
998 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
1002 SDEBUG(" target: %04X\n", target);
1003 *ptr = ctx->start + target;
1008 DRM_INFO("Bad case.\n");
1014 static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
1016 uint8_t attr = U8((*ptr)++);
1019 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
1021 src = atom_get_src(ctx, attr, ptr);
1022 ctx->ctx->cs_equal = ((dst & src) == 0);
1023 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
1026 static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
1028 uint8_t attr = U8((*ptr)++);
1029 uint32_t dst, src, saved;
1032 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
1034 src = atom_get_src(ctx, attr, ptr);
1037 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
1040 static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
1042 DRM_INFO("unimplemented!\n");
1046 void (*func) (atom_exec_context *, int *, int);
1048 } opcode_table[ATOM_OP_CNT] = {
1051 atom_op_move, ATOM_ARG_REG}, {
1052 atom_op_move, ATOM_ARG_PS}, {
1053 atom_op_move, ATOM_ARG_WS}, {
1054 atom_op_move, ATOM_ARG_FB}, {
1055 atom_op_move, ATOM_ARG_PLL}, {
1056 atom_op_move, ATOM_ARG_MC}, {
1057 atom_op_and, ATOM_ARG_REG}, {
1058 atom_op_and, ATOM_ARG_PS}, {
1059 atom_op_and, ATOM_ARG_WS}, {
1060 atom_op_and, ATOM_ARG_FB}, {
1061 atom_op_and, ATOM_ARG_PLL}, {
1062 atom_op_and, ATOM_ARG_MC}, {
1063 atom_op_or, ATOM_ARG_REG}, {
1064 atom_op_or, ATOM_ARG_PS}, {
1065 atom_op_or, ATOM_ARG_WS}, {
1066 atom_op_or, ATOM_ARG_FB}, {
1067 atom_op_or, ATOM_ARG_PLL}, {
1068 atom_op_or, ATOM_ARG_MC}, {
1069 atom_op_shift_left, ATOM_ARG_REG}, {
1070 atom_op_shift_left, ATOM_ARG_PS}, {
1071 atom_op_shift_left, ATOM_ARG_WS}, {
1072 atom_op_shift_left, ATOM_ARG_FB}, {
1073 atom_op_shift_left, ATOM_ARG_PLL}, {
1074 atom_op_shift_left, ATOM_ARG_MC}, {
1075 atom_op_shift_right, ATOM_ARG_REG}, {
1076 atom_op_shift_right, ATOM_ARG_PS}, {
1077 atom_op_shift_right, ATOM_ARG_WS}, {
1078 atom_op_shift_right, ATOM_ARG_FB}, {
1079 atom_op_shift_right, ATOM_ARG_PLL}, {
1080 atom_op_shift_right, ATOM_ARG_MC}, {
1081 atom_op_mul, ATOM_ARG_REG}, {
1082 atom_op_mul, ATOM_ARG_PS}, {
1083 atom_op_mul, ATOM_ARG_WS}, {
1084 atom_op_mul, ATOM_ARG_FB}, {
1085 atom_op_mul, ATOM_ARG_PLL}, {
1086 atom_op_mul, ATOM_ARG_MC}, {
1087 atom_op_div, ATOM_ARG_REG}, {
1088 atom_op_div, ATOM_ARG_PS}, {
1089 atom_op_div, ATOM_ARG_WS}, {
1090 atom_op_div, ATOM_ARG_FB}, {
1091 atom_op_div, ATOM_ARG_PLL}, {
1092 atom_op_div, ATOM_ARG_MC}, {
1093 atom_op_add, ATOM_ARG_REG}, {
1094 atom_op_add, ATOM_ARG_PS}, {
1095 atom_op_add, ATOM_ARG_WS}, {
1096 atom_op_add, ATOM_ARG_FB}, {
1097 atom_op_add, ATOM_ARG_PLL}, {
1098 atom_op_add, ATOM_ARG_MC}, {
1099 atom_op_sub, ATOM_ARG_REG}, {
1100 atom_op_sub, ATOM_ARG_PS}, {
1101 atom_op_sub, ATOM_ARG_WS}, {
1102 atom_op_sub, ATOM_ARG_FB}, {
1103 atom_op_sub, ATOM_ARG_PLL}, {
1104 atom_op_sub, ATOM_ARG_MC}, {
1105 atom_op_setport, ATOM_PORT_ATI}, {
1106 atom_op_setport, ATOM_PORT_PCI}, {
1107 atom_op_setport, ATOM_PORT_SYSIO}, {
1108 atom_op_setregblock, 0}, {
1109 atom_op_setfbbase, 0}, {
1110 atom_op_compare, ATOM_ARG_REG}, {
1111 atom_op_compare, ATOM_ARG_PS}, {
1112 atom_op_compare, ATOM_ARG_WS}, {
1113 atom_op_compare, ATOM_ARG_FB}, {
1114 atom_op_compare, ATOM_ARG_PLL}, {
1115 atom_op_compare, ATOM_ARG_MC}, {
1116 atom_op_switch, 0}, {
1117 atom_op_jump, ATOM_COND_ALWAYS}, {
1118 atom_op_jump, ATOM_COND_EQUAL}, {
1119 atom_op_jump, ATOM_COND_BELOW}, {
1120 atom_op_jump, ATOM_COND_ABOVE}, {
1121 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1122 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1123 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1124 atom_op_test, ATOM_ARG_REG}, {
1125 atom_op_test, ATOM_ARG_PS}, {
1126 atom_op_test, ATOM_ARG_WS}, {
1127 atom_op_test, ATOM_ARG_FB}, {
1128 atom_op_test, ATOM_ARG_PLL}, {
1129 atom_op_test, ATOM_ARG_MC}, {
1130 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1131 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1132 atom_op_calltable, 0}, {
1133 atom_op_repeat, 0}, {
1134 atom_op_clear, ATOM_ARG_REG}, {
1135 atom_op_clear, ATOM_ARG_PS}, {
1136 atom_op_clear, ATOM_ARG_WS}, {
1137 atom_op_clear, ATOM_ARG_FB}, {
1138 atom_op_clear, ATOM_ARG_PLL}, {
1139 atom_op_clear, ATOM_ARG_MC}, {
1142 atom_op_mask, ATOM_ARG_REG}, {
1143 atom_op_mask, ATOM_ARG_PS}, {
1144 atom_op_mask, ATOM_ARG_WS}, {
1145 atom_op_mask, ATOM_ARG_FB}, {
1146 atom_op_mask, ATOM_ARG_PLL}, {
1147 atom_op_mask, ATOM_ARG_MC}, {
1148 atom_op_postcard, 0}, {
1150 atom_op_savereg, 0}, {
1151 atom_op_restorereg, 0}, {
1152 atom_op_setdatablock, 0}, {
1153 atom_op_xor, ATOM_ARG_REG}, {
1154 atom_op_xor, ATOM_ARG_PS}, {
1155 atom_op_xor, ATOM_ARG_WS}, {
1156 atom_op_xor, ATOM_ARG_FB}, {
1157 atom_op_xor, ATOM_ARG_PLL}, {
1158 atom_op_xor, ATOM_ARG_MC}, {
1159 atom_op_shl, ATOM_ARG_REG}, {
1160 atom_op_shl, ATOM_ARG_PS}, {
1161 atom_op_shl, ATOM_ARG_WS}, {
1162 atom_op_shl, ATOM_ARG_FB}, {
1163 atom_op_shl, ATOM_ARG_PLL}, {
1164 atom_op_shl, ATOM_ARG_MC}, {
1165 atom_op_shr, ATOM_ARG_REG}, {
1166 atom_op_shr, ATOM_ARG_PS}, {
1167 atom_op_shr, ATOM_ARG_WS}, {
1168 atom_op_shr, ATOM_ARG_FB}, {
1169 atom_op_shr, ATOM_ARG_PLL}, {
1170 atom_op_shr, ATOM_ARG_MC}, {
1171 atom_op_debug, 0},};
1173 static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1175 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1176 int len, ws, ps, ptr;
1178 atom_exec_context ectx;
1184 len = CU16(base + ATOM_CT_SIZE_PTR);
1185 ws = CU8(base + ATOM_CT_WS_PTR);
1186 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1187 ptr = base + ATOM_CT_CODE_PTR;
1189 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1192 ectx.ps_shift = ps / 4;
1198 ectx.ws = kzalloc(4 * ws, GFP_KERNEL);
1205 if (op < ATOM_OP_NAMES_CNT)
1206 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1208 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1210 DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n",
1211 base, len, ws, ps, ptr - 1);
1216 if (op < ATOM_OP_CNT && op > 0)
1217 opcode_table[op].func(&ectx, &ptr,
1218 opcode_table[op].arg);
1222 if (op == ATOM_OP_EOT)
1234 int atom_execute_table_scratch_unlocked(struct atom_context *ctx, int index, uint32_t * params)
1238 mutex_lock(&ctx->mutex);
1239 /* reset data block */
1240 ctx->data_block = 0;
1241 /* reset reg block */
1243 /* reset fb window */
1246 ctx->io_mode = ATOM_IO_MM;
1250 r = atom_execute_table_locked(ctx, index, params);
1251 mutex_unlock(&ctx->mutex);
1255 int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1258 mutex_lock(&ctx->scratch_mutex);
1259 r = atom_execute_table_scratch_unlocked(ctx, index, params);
1260 mutex_unlock(&ctx->scratch_mutex);
1264 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1266 static void atom_index_iio(struct atom_context *ctx, int base)
1268 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1271 while (CU8(base) == ATOM_IIO_START) {
1272 ctx->iio[CU8(base + 1)] = base + 2;
1274 while (CU8(base) != ATOM_IIO_END)
1275 base += atom_iio_len[CU8(base)];
1280 struct atom_context *atom_parse(struct card_info *card, void *bios)
1283 struct atom_context *ctx =
1284 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1295 if (CU16(0) != ATOM_BIOS_MAGIC) {
1296 DRM_INFO("Invalid BIOS magic.\n");
1301 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1302 strlen(ATOM_ATI_MAGIC))) {
1303 DRM_INFO("Invalid ATI magic.\n");
1308 base = CU16(ATOM_ROM_TABLE_PTR);
1310 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1311 strlen(ATOM_ROM_MAGIC))) {
1312 DRM_INFO("Invalid ATOM magic.\n");
1317 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1318 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1319 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1325 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1326 while (*str && ((*str == '\n') || (*str == '\r')))
1328 /* name string isn't always 0 terminated */
1329 for (i = 0; i < 511; i++) {
1331 if (name[i] < '.' || name[i] > 'z') {
1336 DRM_INFO("ATOM BIOS: %s\n", name);
1341 int atom_asic_init(struct atom_context *ctx)
1343 struct radeon_device *rdev = ctx->card->dev->dev_private;
1344 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1350 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1351 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1352 if (!ps[0] || !ps[1])
1355 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1357 ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1363 if (rdev->family < CHIP_R600) {
1364 if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL))
1365 atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps);
1370 void atom_destroy(struct atom_context *ctx)
1376 bool atom_parse_data_header(struct atom_context *ctx, int index,
1377 uint16_t * size, uint8_t * frev, uint8_t * crev,
1378 uint16_t * data_start)
1380 int offset = index * 2 + 4;
1381 int idx = CU16(ctx->data_table + offset);
1382 u16 *mdt = (u16 *)((char *)ctx->bios + ctx->data_table + 4);
1390 *frev = CU8(idx + 2);
1392 *crev = CU8(idx + 3);
1397 bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1400 int offset = index * 2 + 4;
1401 int idx = CU16(ctx->cmd_table + offset);
1402 u16 *mct = (u16 *)((char *)ctx->bios + ctx->cmd_table + 4);
1408 *frev = CU8(idx + 2);
1410 *crev = CU8(idx + 3);
1414 int atom_allocate_fb_scratch(struct atom_context *ctx)
1416 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1417 uint16_t data_offset;
1418 int usage_bytes = 0;
1419 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1421 if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) {
1422 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)((char *)ctx->bios + data_offset);
1424 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1425 le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),
1426 le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb));
1428 usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024;
1430 ctx->scratch_size_bytes = 0;
1431 if (usage_bytes == 0)
1432 usage_bytes = 20 * 1024;
1433 /* allocate some scratch memory */
1434 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1437 ctx->scratch_size_bytes = usage_bytes;