amd64: first steps towards 64-bit pmap
[dragonfly.git] / sys / platform / pc64 / amd64 / machdep.c
CommitLineData
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1/*-
2 * Copyright (c) 1982, 1987, 1990 The Regents of the University of California.
3 * Copyright (c) 1992 Terrence R. Lambert.
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 2008 The DragonFly Project.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to Berkeley by
9 * William Jolitz.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the University of
22 * California, Berkeley and its contributors.
23 * 4. Neither the name of the University nor the names of its contributors
24 * may be used to endorse or promote products derived from this software
25 * without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * SUCH DAMAGE.
38 *
39 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
40 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
41 * $DragonFly: src/sys/platform/pc64/amd64/machdep.c,v 1.1 2008/08/29 17:07:10 dillon Exp $
42 */
43
44#include "use_ether.h"
45//#include "use_npx.h"
46#include "use_isa.h"
47#include "opt_atalk.h"
48#include "opt_compat.h"
49#include "opt_cpu.h"
50#include "opt_ddb.h"
51#include "opt_directio.h"
52#include "opt_inet.h"
53#include "opt_ipx.h"
54#include "opt_msgbuf.h"
55#include "opt_swap.h"
56
57#include <sys/param.h>
58#include <sys/systm.h>
59#include <sys/sysproto.h>
60#include <sys/signalvar.h>
61#include <sys/kernel.h>
62#include <sys/linker.h>
63#include <sys/malloc.h>
64#include <sys/proc.h>
895c1f85 65#include <sys/priv.h>
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66#include <sys/buf.h>
67#include <sys/reboot.h>
68#include <sys/mbuf.h>
69#include <sys/msgbuf.h>
70#include <sys/sysent.h>
71#include <sys/sysctl.h>
72#include <sys/vmmeter.h>
73#include <sys/bus.h>
74#include <sys/upcall.h>
75#include <sys/usched.h>
76#include <sys/reg.h>
77
78#include <vm/vm.h>
79#include <vm/vm_param.h>
80#include <sys/lock.h>
81#include <vm/vm_kern.h>
82#include <vm/vm_object.h>
83#include <vm/vm_page.h>
84#include <vm/vm_map.h>
85#include <vm/vm_pager.h>
86#include <vm/vm_extern.h>
87
88#include <sys/thread2.h>
89
90#include <sys/user.h>
91#include <sys/exec.h>
92#include <sys/cons.h>
93
94#include <ddb/ddb.h>
95
96#include <machine/cpu.h>
97#include <machine/clock.h>
98#include <machine/specialreg.h>
99#if JG
100#include <machine/bootinfo.h>
101#endif
102#include <machine/intr_machdep.h> /* for inthand_t */
103#include <machine/md_var.h>
104#include <machine/metadata.h>
105#include <machine/pc/bios.h>
106#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
107#include <machine/globaldata.h> /* CPU_prvspace */
108#include <machine/smp.h>
109#ifdef PERFMON
110#include <machine/perfmon.h>
111#endif
112#include <machine/cputypes.h>
113
114#ifdef OLD_BUS_ARCH
115#include <bus/isa/i386/isa_device.h>
116#endif
117#include <machine_base/isa/intr_machdep.h>
118#include <bus/isa/rtc.h>
119#include <sys/random.h>
120#include <sys/ptrace.h>
121#include <machine/sigframe.h>
122
123#define PHYSMAP_ENTRIES 10
124
125extern void init386(int first);
126extern void dblfault_handler(void);
127extern u_int64_t hammer_time(u_int64_t, u_int64_t);
128
129extern void printcpuinfo(void); /* XXX header file */
130extern void identify_cpu(void);
131#if JG
132extern void finishidentcpu(void);
133#endif
134extern void panicifcpuunsupported(void);
135extern void initializecpu(void);
136
137extern void init_paging(vm_paddr_t *);
138
139static void cpu_startup(void *);
140#ifndef CPU_DISABLE_SSE
141static void set_fpregs_xmm(struct save87 *, struct savexmm *);
142static void fill_fpregs_xmm(struct savexmm *, struct save87 *);
143#endif /* CPU_DISABLE_SSE */
144#ifdef DIRECTIO
145extern void ffs_rawread_setup(void);
146#endif /* DIRECTIO */
147static void init_locks(void);
148
149SYSINIT(cpu, SI_BOOT2_SMP, SI_ORDER_FIRST, cpu_startup, NULL)
150
151#ifdef DDB
152extern vm_offset_t ksym_start, ksym_end;
153#endif
154
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155uint64_t KPTphys;
156uint64_t SMPptpa;
157pt_entry_t *SMPpt;
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158
159
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160/* JG SMP */
161struct privatespace CPU_prvspace[1];
162
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163int _udatasel, _ucodesel, _ucode32sel;
164u_long atdevbase;
165#ifdef SMP
166int64_t tsc_offsets[MAXCPU];
167#else
168int64_t tsc_offsets[1];
169#endif
170
171#if defined(SWTCH_OPTIM_STATS)
172extern int swtch_optim_stats;
173SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
174 CTLFLAG_RD, &swtch_optim_stats, 0, "");
175SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
176 CTLFLAG_RD, &tlb_flush_count, 0, "");
177#endif
178
179int physmem = 0;
180
181static int
182sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
183{
184 int error = sysctl_handle_int(oidp, 0, ctob(physmem), req);
185 return (error);
186}
187
188SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_INT|CTLFLAG_RD,
189 0, 0, sysctl_hw_physmem, "IU", "");
190
191static int
192sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
193{
194 int error = sysctl_handle_int(oidp, 0,
195 ctob(physmem - vmstats.v_wire_count), req);
196 return (error);
197}
198
199SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
200 0, 0, sysctl_hw_usermem, "IU", "");
201
202static int
203sysctl_hw_availpages(SYSCTL_HANDLER_ARGS)
204{
205#if JG
206 int error = sysctl_handle_int(oidp, 0,
207 i386_btop(avail_end - avail_start), req);
208 return (error);
209#else
210 return -1;
211#endif
212}
213
214SYSCTL_PROC(_hw, OID_AUTO, availpages, CTLTYPE_INT|CTLFLAG_RD,
215 0, 0, sysctl_hw_availpages, "I", "");
216
217static int
218sysctl_machdep_msgbuf(SYSCTL_HANDLER_ARGS)
219{
220 int error;
221
222 /* Unwind the buffer, so that it's linear (possibly starting with
223 * some initial nulls).
224 */
225 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr+msgbufp->msg_bufr,
226 msgbufp->msg_size-msgbufp->msg_bufr,req);
227 if(error) return(error);
228 if(msgbufp->msg_bufr>0) {
229 error=sysctl_handle_opaque(oidp,msgbufp->msg_ptr,
230 msgbufp->msg_bufr,req);
231 }
232 return(error);
233}
234
235SYSCTL_PROC(_machdep, OID_AUTO, msgbuf, CTLTYPE_STRING|CTLFLAG_RD,
236 0, 0, sysctl_machdep_msgbuf, "A","Contents of kernel message buffer");
237
238static int msgbuf_clear;
239
240static int
241sysctl_machdep_msgbuf_clear(SYSCTL_HANDLER_ARGS)
242{
243 int error;
244 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
245 req);
246 if (!error && req->newptr) {
247 /* Clear the buffer and reset write pointer */
248 bzero(msgbufp->msg_ptr,msgbufp->msg_size);
249 msgbufp->msg_bufr=msgbufp->msg_bufx=0;
250 msgbuf_clear=0;
251 }
252 return (error);
253}
254
255SYSCTL_PROC(_machdep, OID_AUTO, msgbuf_clear, CTLTYPE_INT|CTLFLAG_RW,
256 &msgbuf_clear, 0, sysctl_machdep_msgbuf_clear, "I",
257 "Clear kernel message buffer");
258
259vm_paddr_t Maxmem = 0;
260
261/*
262 * The number of PHYSMAP entries must be one less than the number of
263 * PHYSSEG entries because the PHYSMAP entry that spans the largest
264 * physical address that is accessible by ISA DMA is split into two
265 * PHYSSEG entries.
266 */
267#define PHYSMAP_SIZE (2 * (VM_PHYSSEG_MAX - 1))
268
269vm_paddr_t phys_avail[PHYSMAP_SIZE + 2];
270vm_paddr_t dump_avail[PHYSMAP_SIZE + 2];
271
272/* must be 2 less so 0 0 can signal end of chunks */
273#define PHYS_AVAIL_ARRAY_END ((sizeof(phys_avail) / sizeof(phys_avail[0])) - 2)
274#define DUMP_AVAIL_ARRAY_END ((sizeof(dump_avail) / sizeof(dump_avail[0])) - 2)
275
276static vm_offset_t buffer_sva, buffer_eva;
277vm_offset_t clean_sva, clean_eva;
278static vm_offset_t pager_sva, pager_eva;
279static struct trapframe proc0_tf;
280
281static void
282cpu_startup(void *dummy)
283{
284 caddr_t v;
285 vm_size_t size = 0;
286 vm_offset_t firstaddr;
287
288 if (boothowto & RB_VERBOSE)
289 bootverbose++;
290
291 /*
292 * Good {morning,afternoon,evening,night}.
293 */
294 kprintf("%s", version);
295 startrtclock();
296 printcpuinfo();
297 panicifcpuunsupported();
298#ifdef PERFMON
299 perfmon_init();
300#endif
48ffc236 301 kprintf("real memory = %llu (%lluK bytes)\n", ptoa(Maxmem), ptoa(Maxmem) / 1024);
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302 /*
303 * Display any holes after the first chunk of extended memory.
304 */
305 if (bootverbose) {
306 int indx;
307
308 kprintf("Physical memory chunk(s):\n");
309 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
310 vm_paddr_t size1 = phys_avail[indx + 1] - phys_avail[indx];
311
312 kprintf("0x%08llx - 0x%08llx, %llu bytes (%llu pages)\n",
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313 phys_avail[indx], phys_avail[indx + 1] - 1, size1,
314 size1 / PAGE_SIZE);
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315 }
316 }
317
318 /*
319 * Allocate space for system data structures.
320 * The first available kernel virtual address is in "v".
321 * As pages of kernel virtual memory are allocated, "v" is incremented.
322 * As pages of memory are allocated and cleared,
323 * "firstaddr" is incremented.
324 * An index into the kernel page table corresponding to the
325 * virtual memory address maintained in "v" is kept in "mapaddr".
326 */
327
328 /*
329 * Make two passes. The first pass calculates how much memory is
330 * needed and allocates it. The second pass assigns virtual
331 * addresses to the various data structures.
332 */
333 firstaddr = 0;
334again:
335 v = (caddr_t)firstaddr;
336
337#define valloc(name, type, num) \
338 (name) = (type *)v; v = (caddr_t)((name)+(num))
339#define valloclim(name, type, num, lim) \
340 (name) = (type *)v; v = (caddr_t)((lim) = ((name)+(num)))
341
342 /*
343 * The nominal buffer size (and minimum KVA allocation) is BKVASIZE.
344 * For the first 64MB of ram nominally allocate sufficient buffers to
345 * cover 1/4 of our ram. Beyond the first 64MB allocate additional
346 * buffers to cover 1/20 of our ram over 64MB. When auto-sizing
347 * the buffer cache we limit the eventual kva reservation to
348 * maxbcache bytes.
349 *
350 * factor represents the 1/4 x ram conversion.
351 */
352 if (nbuf == 0) {
353 int factor = 4 * BKVASIZE / 1024;
354 int kbytes = physmem * (PAGE_SIZE / 1024);
355
356 nbuf = 50;
357 if (kbytes > 4096)
358 nbuf += min((kbytes - 4096) / factor, 65536 / factor);
359 if (kbytes > 65536)
360 nbuf += (kbytes - 65536) * 2 / (factor * 5);
361 if (maxbcache && nbuf > maxbcache / BKVASIZE)
362 nbuf = maxbcache / BKVASIZE;
363 }
364
365 /*
366 * Do not allow the buffer_map to be more then 1/2 the size of the
367 * kernel_map.
368 */
369 if (nbuf > (virtual_end - virtual_start) / (BKVASIZE * 2)) {
370 nbuf = (virtual_end - virtual_start) / (BKVASIZE * 2);
371 kprintf("Warning: nbufs capped at %d\n", nbuf);
372 }
373
374 nswbuf = max(min(nbuf/4, 256), 16);
375#ifdef NSWBUF_MIN
376 if (nswbuf < NSWBUF_MIN)
377 nswbuf = NSWBUF_MIN;
378#endif
379#ifdef DIRECTIO
380 ffs_rawread_setup();
381#endif
382
383 valloc(swbuf, struct buf, nswbuf);
384 valloc(buf, struct buf, nbuf);
385
386 /*
387 * End of first pass, size has been calculated so allocate memory
388 */
389 if (firstaddr == 0) {
390 size = (vm_size_t)(v - firstaddr);
391 firstaddr = kmem_alloc(&kernel_map, round_page(size));
392 if (firstaddr == 0)
393 panic("startup: no room for tables");
394 goto again;
395 }
396
397 /*
398 * End of second pass, addresses have been assigned
399 */
400 if ((vm_size_t)(v - firstaddr) != size)
401 panic("startup: table size inconsistency");
402
403 kmem_suballoc(&kernel_map, &clean_map, &clean_sva, &clean_eva,
404 (nbuf*BKVASIZE) + (nswbuf*MAXPHYS) + pager_map_size);
405 kmem_suballoc(&clean_map, &buffer_map, &buffer_sva, &buffer_eva,
406 (nbuf*BKVASIZE));
407 buffer_map.system_map = 1;
408 kmem_suballoc(&clean_map, &pager_map, &pager_sva, &pager_eva,
409 (nswbuf*MAXPHYS) + pager_map_size);
410 pager_map.system_map = 1;
411
412#if defined(USERCONFIG)
413 userconfig();
414 cninit(); /* the preferred console may have changed */
415#endif
416
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417 kprintf("avail memory = %lu (%luK bytes)\n",
418 ptoa(vmstats.v_free_count),
419 ptoa(vmstats.v_free_count) / 1024);
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420
421 /*
422 * Set up buffers, so they can be used to read disk labels.
423 */
424 bufinit();
425 vm_pager_bufferinit();
426
427#ifdef SMP
428 /*
429 * OK, enough kmem_alloc/malloc state should be up, lets get on with it!
430 */
431 mp_start(); /* fire up the APs and APICs */
432 mp_announce();
433#endif /* SMP */
434 cpu_setregs();
435}
436
437/*
438 * Send an interrupt to process.
439 *
440 * Stack is set up to allow sigcode stored
441 * at top to call routine, followed by kcall
442 * to sigreturn routine below. After sigreturn
443 * resets the signal mask, the stack, and the
444 * frame pointer, it returns to the user
445 * specified pc, psl.
446 */
447void
448sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
449{
450 kprintf0("sendsig\n");
451 struct lwp *lp = curthread->td_lwp;
452 struct proc *p = lp->lwp_proc;
453 struct trapframe *regs;
454 struct sigacts *psp = p->p_sigacts;
455 struct sigframe sf, *sfp;
456 int oonstack;
a6a09809 457 char *sp;
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458
459 regs = lp->lwp_md.md_regs;
460 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
461
a6a09809 462 /* Save user context */
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463 bzero(&sf, sizeof(struct sigframe));
464 sf.sf_uc.uc_sigmask = *mask;
465 sf.sf_uc.uc_stack = lp->lwp_sigstk;
466 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
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467 KKASSERT(__offsetof(struct trapframe, tf_rdi) == 0);
468 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_rdi, sizeof(struct trapframe));
c8fe38ae 469
a6a09809 470 /* Make the size of the saved context visible to userland */
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471 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
472
a6a09809 473 /* Save mailbox pending state for syscall interlock semantics */
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474 if (p->p_flag & P_MAILBOX)
475 sf.sf_uc.uc_mcontext.mc_xflags |= PGEX_MAILBOX;
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476
477 /* Allocate and validate space for the signal handler context. */
478 if ((lp->lwp_flag & LWP_ALTSTACK) != 0 && !oonstack &&
479 SIGISMEMBER(psp->ps_sigonstack, sig)) {
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480 sp = (char *)(lp->lwp_sigstk.ss_sp + lp->lwp_sigstk.ss_size -
481 sizeof(struct sigframe));
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482 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
483 } else {
a6a09809 484 sp = (char *)regs->tf_rsp - sizeof(struct sigframe);
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485 }
486
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487 /* Align to 16 bytes */
488 sfp = (struct sigframe *)((intptr_t)sp & ~0xFUL);
489
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490 /* Translate the signal is appropriate */
491 if (p->p_sysent->sv_sigtbl) {
492 if (sig <= p->p_sysent->sv_sigsize)
493 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
494 }
495
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496 /*
497 * Build the argument list for the signal handler.
498 *
499 * Arguments are in registers (%rdi, %rsi, %rdx, %rcx)
500 */
501 regs->tf_rdi = sig; /* argument 1 */
502 regs->tf_rdx = (register_t)&sfp->sf_uc; /* argument 3 */
503
c8fe38ae 504 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
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505 /*
506 * Signal handler installed with SA_SIGINFO.
507 *
508 * action(signo, siginfo, ucontext)
509 */
510 regs->tf_rsi = (register_t)&sfp->sf_si; /* argument 2 */
511 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
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512 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
513
514 /* fill siginfo structure */
515 sf.sf_si.si_signo = sig;
516 sf.sf_si.si_code = code;
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517 sf.sf_si.si_addr = (void *)regs->tf_err;
518 } else {
519 /*
520 * Old FreeBSD-style arguments.
521 *
522 * handler (signo, code, [uc], addr)
523 */
524 regs->tf_rsi = (register_t)code; /* argument 2 */
525 regs->tf_rcx = (register_t)regs->tf_err; /* argument 4 */
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526 sf.sf_ahu.sf_handler = catcher;
527 }
528
529 /*
530 * If we're a vm86 process, we want to save the segment registers.
531 * We also change eflags to be our emulated eflags, not the actual
532 * eflags.
533 */
534#if JG
535 if (regs->tf_eflags & PSL_VM) {
536 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
537 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
538
539 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
540 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
541 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
542 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
543
544 if (vm86->vm86_has_vme == 0)
545 sf.sf_uc.uc_mcontext.mc_eflags =
546 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
547 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
548
549 /*
550 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
551 * syscalls made by the signal handler. This just avoids
552 * wasting time for our lazy fixup of such faults. PSL_NT
553 * does nothing in vm86 mode, but vm86 programs can set it
554 * almost legitimately in probes for old cpu types.
555 */
556 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
557 }
558#endif
559
560 /*
561 * Save the FPU state and reinit the FP unit
562 */
c8fe38ae 563 npxpush(&sf.sf_uc.uc_mcontext);
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564
565 /*
566 * Copy the sigframe out to the user's stack.
567 */
568 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
569 /*
570 * Something is wrong with the stack pointer.
571 * ...Kill the process.
572 */
573 sigexit(lp, SIGILL);
574 }
575
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576 regs->tf_rsp = (register_t)sfp;
577 regs->tf_rip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
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578
579 /*
580 * i386 abi specifies that the direction flag must be cleared
581 * on function entry
582 */
5b9f6cc4 583 regs->tf_rflags &= ~(PSL_T|PSL_D);
c8fe38ae 584
c8fe38ae 585 /*
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586 * 64 bit mode has a code and stack selector but
587 * no data or extra selector. %fs and %gs are not
588 * stored in-context.
c8fe38ae 589 */
a6a09809 590 regs->tf_cs = _ucodesel;
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591 regs->tf_ss = _udatasel;
592}
593
594/*
595 * Sanitize the trapframe for a virtual kernel passing control to a custom
596 * VM context. Remove any items that would otherwise create a privilage
597 * issue.
598 *
599 * XXX at the moment we allow userland to set the resume flag. Is this a
600 * bad idea?
601 */
602int
603cpu_sanitize_frame(struct trapframe *frame)
604{
605 kprintf0("cpu_sanitize_frame\n");
606 frame->tf_cs = _ucodesel;
c8fe38ae 607 frame->tf_ss = _udatasel;
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608 /* XXX VM (8086) mode not supported? */
609 frame->tf_rflags &= (PSL_RF | PSL_USERCHANGE | PSL_VM_UNSUPP);
610 frame->tf_rflags |= PSL_RESERVED_DEFAULT | PSL_I;
611
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612 return(0);
613}
614
615/*
616 * Sanitize the tls so loading the descriptor does not blow up
617 * on us. For AMD64 we don't have to do anything.
618 */
619int
620cpu_sanitize_tls(struct savetls *tls)
621{
622 return(0);
623}
624
625/*
626 * sigreturn(ucontext_t *sigcntxp)
627 *
628 * System call to cleanup state after a signal
629 * has been taken. Reset signal mask and
630 * stack state from context left by sendsig (above).
631 * Return to previous pc and psl as specified by
632 * context left by sendsig. Check carefully to
633 * make sure that the user has not modified the
634 * state to gain improper privileges.
635 */
636#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
637#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
638
639int
640sys_sigreturn(struct sigreturn_args *uap)
641{
642 struct lwp *lp = curthread->td_lwp;
643 struct proc *p = lp->lwp_proc;
644 struct trapframe *regs;
645 ucontext_t uc;
646 ucontext_t *ucp;
5b9f6cc4 647 register_t rflags;
c8fe38ae 648 int cs;
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649 int error;
650
651 /*
652 * We have to copy the information into kernel space so userland
653 * can't modify it while we are sniffing it.
654 */
655 regs = lp->lwp_md.md_regs;
656 error = copyin(uap->sigcntxp, &uc, sizeof(uc));
657 if (error)
658 return (error);
659 ucp = &uc;
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660 rflags = ucp->uc_mcontext.mc_rflags;
661
662 /* VM (8086) mode not supported */
663 rflags &= ~PSL_VM_UNSUPP;
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664
665#if JG
666 if (eflags & PSL_VM) {
667 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
668 struct vm86_kernel *vm86;
669
670 /*
671 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
672 * set up the vm86 area, and we can't enter vm86 mode.
673 */
674 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
675 return (EINVAL);
676 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
677 if (vm86->vm86_inited == 0)
678 return (EINVAL);
679
680 /* go back to user mode if both flags are set */
681 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
682 trapsignal(lp, SIGBUS, 0);
683
684 if (vm86->vm86_has_vme) {
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685 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
686 (eflags & VME_USERCHANGE) | PSL_VM;
c8fe38ae 687 } else {
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688 vm86->vm86_eflags = eflags; /* save VIF, VIP */
689 eflags = (tf->tf_eflags & ~VM_USERCHANGE) |
690 (eflags & VM_USERCHANGE) | PSL_VM;
c8fe38ae 691 }
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692 bcopy(&ucp->uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
693 tf->tf_eflags = eflags;
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694 tf->tf_vm86_ds = tf->tf_ds;
695 tf->tf_vm86_es = tf->tf_es;
696 tf->tf_vm86_fs = tf->tf_fs;
697 tf->tf_vm86_gs = tf->tf_gs;
698 tf->tf_ds = _udatasel;
699 tf->tf_es = _udatasel;
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700 tf->tf_fs = _udatasel;
701 tf->tf_gs = _udatasel;
5b9f6cc4 702 } else
c8fe38ae 703#endif
5b9f6cc4 704 {
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705 /*
706 * Don't allow users to change privileged or reserved flags.
707 */
708 /*
709 * XXX do allow users to change the privileged flag PSL_RF.
710 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
711 * should sometimes set it there too. tf_eflags is kept in
712 * the signal context during signal handling and there is no
713 * other place to remember it, so the PSL_RF bit may be
714 * corrupted by the signal handler without us knowing.
715 * Corruption of the PSL_RF bit at worst causes one more or
716 * one less debugger trap, so allowing it is fairly harmless.
717 */
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718 if (!EFL_SECURE(rflags & ~PSL_RF, regs->tf_rflags & ~PSL_RF)) {
719 kprintf("sigreturn: rflags = 0x%lx\n", (long)rflags);
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720 return(EINVAL);
721 }
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722
723 /*
724 * Don't allow users to load a valid privileged %cs. Let the
725 * hardware check for invalid selectors, excess privilege in
726 * other selectors, invalid %eip's and invalid %esp's.
727 */
728 cs = ucp->uc_mcontext.mc_cs;
729 if (!CS_SECURE(cs)) {
730 kprintf("sigreturn: cs = 0x%x\n", cs);
731 trapsignal(lp, SIGBUS, T_PROTFLT);
732 return(EINVAL);
733 }
5b9f6cc4 734 bcopy(&ucp->uc_mcontext.mc_rdi, regs, sizeof(struct trapframe));
c8fe38ae 735 }
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736
737 /*
738 * Restore the FPU state from the frame
739 */
c8fe38ae 740 npxpop(&ucp->uc_mcontext);
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741
742 /*
743 * Merge saved signal mailbox pending flag to maintain interlock
744 * semantics against system calls.
745 */
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746 if (ucp->uc_mcontext.mc_xflags & PGEX_MAILBOX)
747 p->p_flag |= P_MAILBOX;
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748
749 if (ucp->uc_mcontext.mc_onstack & 1)
750 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
751 else
752 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
753
754 lp->lwp_sigmask = ucp->uc_sigmask;
755 SIG_CANTMASK(lp->lwp_sigmask);
756 return(EJUSTRETURN);
757}
758
759/*
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760 * Stack frame on entry to function. %rax will contain the function vector,
761 * %rcx will contain the function data. flags, rcx, and rax will have
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762 * already been pushed on the stack.
763 */
764struct upc_frame {
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765 register_t rax;
766 register_t rcx;
767 register_t rdx;
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768 register_t flags;
769 register_t oldip;
770};
771
772void
773sendupcall(struct vmupcall *vu, int morepending)
774{
775 struct lwp *lp = curthread->td_lwp;
776 struct trapframe *regs;
777 struct upcall upcall;
778 struct upc_frame upc_frame;
779 int crit_count = 0;
780
781 /*
782 * If we are a virtual kernel running an emulated user process
783 * context, switch back to the virtual kernel context before
784 * trying to post the signal.
785 */
786 if (lp->lwp_vkernel && lp->lwp_vkernel->ve) {
787 lp->lwp_md.md_regs->tf_trapno = 0;
788 vkernel_trap(lp, lp->lwp_md.md_regs);
789 }
790
791 /*
792 * Get the upcall data structure
793 */
794 if (copyin(lp->lwp_upcall, &upcall, sizeof(upcall)) ||
795 copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int))
796 ) {
797 vu->vu_pending = 0;
798 kprintf("bad upcall address\n");
799 return;
800 }
801
802 /*
803 * If the data structure is already marked pending or has a critical
804 * section count, mark the data structure as pending and return
805 * without doing an upcall. vu_pending is left set.
806 */
807 if (upcall.upc_pending || crit_count >= vu->vu_pending) {
808 if (upcall.upc_pending < vu->vu_pending) {
809 upcall.upc_pending = vu->vu_pending;
810 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
811 sizeof(upcall.upc_pending));
812 }
813 return;
814 }
815
816 /*
817 * We can run this upcall now, clear vu_pending.
818 *
819 * Bump our critical section count and set or clear the
820 * user pending flag depending on whether more upcalls are
821 * pending. The user will be responsible for calling
822 * upc_dispatch(-1) to process remaining upcalls.
823 */
824 vu->vu_pending = 0;
825 upcall.upc_pending = morepending;
826 crit_count += TDPRI_CRIT;
827 copyout(&upcall.upc_pending, &lp->lwp_upcall->upc_pending,
828 sizeof(upcall.upc_pending));
829 copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff,
830 sizeof(int));
831
832 /*
833 * Construct a stack frame and issue the upcall
834 */
835 regs = lp->lwp_md.md_regs;
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836 upc_frame.rax = regs->tf_rax;
837 upc_frame.rcx = regs->tf_rcx;
838 upc_frame.rdx = regs->tf_rdx;
839 upc_frame.flags = regs->tf_rflags;
840 upc_frame.oldip = regs->tf_rip;
841 if (copyout(&upc_frame, (void *)(regs->tf_rsp - sizeof(upc_frame)),
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842 sizeof(upc_frame)) != 0) {
843 kprintf("bad stack on upcall\n");
844 } else {
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845 regs->tf_rax = (register_t)vu->vu_func;
846 regs->tf_rcx = (register_t)vu->vu_data;
847 regs->tf_rdx = (register_t)lp->lwp_upcall;
848 regs->tf_rip = (register_t)vu->vu_ctx;
849 regs->tf_rsp -= sizeof(upc_frame);
c8fe38ae 850 }
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851}
852
853/*
854 * fetchupcall occurs in the context of a system call, which means that
855 * we have to return EJUSTRETURN in order to prevent eax and edx from
856 * being overwritten by the syscall return value.
857 *
858 * if vu is not NULL we return the new context in %edx, the new data in %ecx,
859 * and the function pointer in %eax.
860 */
861int
862fetchupcall(struct vmupcall *vu, int morepending, void *rsp)
863{
864 struct upc_frame upc_frame;
865 struct lwp *lp = curthread->td_lwp;
866 struct trapframe *regs;
867 int error;
868 struct upcall upcall;
869 int crit_count;
870
871 regs = lp->lwp_md.md_regs;
872
873 error = copyout(&morepending, &lp->lwp_upcall->upc_pending, sizeof(int));
874 if (error == 0) {
875 if (vu) {
876 /*
877 * This jumps us to the next ready context.
878 */
879 vu->vu_pending = 0;
880 error = copyin(lp->lwp_upcall, &upcall, sizeof(upcall));
881 crit_count = 0;
882 if (error == 0)
883 error = copyin((char *)upcall.upc_uthread + upcall.upc_critoff, &crit_count, sizeof(int));
884 crit_count += TDPRI_CRIT;
885 if (error == 0)
886 error = copyout(&crit_count, (char *)upcall.upc_uthread + upcall.upc_critoff, sizeof(int));
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887 regs->tf_rax = (register_t)vu->vu_func;
888 regs->tf_rcx = (register_t)vu->vu_data;
889 regs->tf_rdx = (register_t)lp->lwp_upcall;
890 regs->tf_rip = (register_t)vu->vu_ctx;
891 regs->tf_rsp = (register_t)rsp;
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892 } else {
893 /*
894 * This returns us to the originally interrupted code.
895 */
896 error = copyin(rsp, &upc_frame, sizeof(upc_frame));
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897 regs->tf_rax = upc_frame.rax;
898 regs->tf_rcx = upc_frame.rcx;
899 regs->tf_rdx = upc_frame.rdx;
900 regs->tf_rflags = (regs->tf_rflags & ~PSL_USERCHANGE) |
c8fe38ae 901 (upc_frame.flags & PSL_USERCHANGE);
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902 regs->tf_rip = upc_frame.oldip;
903 regs->tf_rsp = (register_t)((char *)rsp + sizeof(upc_frame));
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904 }
905 }
906 if (error == 0)
907 error = EJUSTRETURN;
908 return(error);
909}
910
911/*
912 * Machine dependent boot() routine
913 *
914 * I haven't seen anything to put here yet
915 * Possibly some stuff might be grafted back here from boot()
916 */
917void
918cpu_boot(int howto)
919{
920}
921
922/*
923 * Shutdown the CPU as much as possible
924 */
925void
926cpu_halt(void)
927{
928 for (;;)
929 __asm__ __volatile("hlt");
930}
931
932/*
933 * cpu_idle() represents the idle LWKT. You cannot return from this function
934 * (unless you want to blow things up!). Instead we look for runnable threads
935 * and loop or halt as appropriate. Giant is not held on entry to the thread.
936 *
937 * The main loop is entered with a critical section held, we must release
938 * the critical section before doing anything else. lwkt_switch() will
939 * check for pending interrupts due to entering and exiting its own
940 * critical section.
941 *
942 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
943 * to wake a HLTed cpu up. However, there are cases where the idlethread
944 * will be entered with the possibility that no IPI will occur and in such
945 * cases lwkt_switch() sets TDF_IDLE_NOHLT.
946 */
947static int cpu_idle_hlt = 1;
948static int cpu_idle_hltcnt;
949static int cpu_idle_spincnt;
950SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
951 &cpu_idle_hlt, 0, "Idle loop HLT enable");
952SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
953 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
954SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
955 &cpu_idle_spincnt, 0, "Idle loop entry spins");
956
957static void
958cpu_idle_default_hook(void)
959{
960 /*
961 * We must guarentee that hlt is exactly the instruction
962 * following the sti.
963 */
964 __asm __volatile("sti; hlt");
965}
966
967/* Other subsystems (e.g., ACPI) can hook this later. */
968void (*cpu_idle_hook)(void) = cpu_idle_default_hook;
969
970void
971cpu_idle(void)
972{
973 struct thread *td = curthread;
974
975 crit_exit();
976 KKASSERT(td->td_pri < TDPRI_CRIT);
977 for (;;) {
978 /*
979 * See if there are any LWKTs ready to go.
980 */
981 lwkt_switch();
982
983 /*
984 * If we are going to halt call splz unconditionally after
985 * CLIing to catch any interrupt races. Note that we are
986 * at SPL0 and interrupts are enabled.
987 */
988 if (cpu_idle_hlt && !lwkt_runnable() &&
989 (td->td_flags & TDF_IDLE_NOHLT) == 0) {
990 __asm __volatile("cli");
991 splz();
992 if (!lwkt_runnable())
993 cpu_idle_hook();
994#ifdef SMP
995 else
996 __asm __volatile("pause");
997#endif
998 ++cpu_idle_hltcnt;
999 } else {
1000 td->td_flags &= ~TDF_IDLE_NOHLT;
1001 splz();
1002#ifdef SMP
1003 __asm __volatile("sti; pause");
1004#else
1005 __asm __volatile("sti");
1006#endif
1007 ++cpu_idle_spincnt;
1008 }
1009 }
1010}
1011
1012/*
1013 * This routine is called when the only runnable threads require
1014 * the MP lock, and the scheduler couldn't get it. On a real cpu
1015 * we let the scheduler spin.
1016 */
1017void
1018cpu_mplock_contested(void)
1019{
1020 cpu_pause();
1021}
1022
1023/*
1024 * This routine is called if a spinlock has been held through the
1025 * exponential backoff period and is seriously contested. On a real cpu
1026 * we let it spin.
1027 */
1028void
1029cpu_spinlock_contested(void)
1030{
1031 cpu_pause();
1032}
1033
1034/*
1035 * Clear registers on exec
1036 */
1037void
1038exec_setregs(u_long entry, u_long stack, u_long ps_strings)
1039{
1040 struct thread *td = curthread;
1041 struct lwp *lp = td->td_lwp;
1042 struct pcb *pcb = td->td_pcb;
1043 struct trapframe *regs = lp->lwp_md.md_regs;
1044
1045 kprintf0("exec_setregs\n");
1046
1047 /* was i386_user_cleanup() in NetBSD */
1048 user_ldt_free(pcb);
1049
1050 bzero((char *)regs, sizeof(struct trapframe));
1051 regs->tf_rip = entry;
1052 regs->tf_rsp = ((stack - 8) & ~0xFul) + 8; /* align the stack */
1053 regs->tf_rdi = stack; /* argv */
1054 regs->tf_rflags = PSL_USER | (regs->tf_rflags & PSL_T);
1055 regs->tf_ss = _udatasel;
1056 regs->tf_cs = _ucodesel;
1057 regs->tf_rbx = ps_strings;
1058
1059 /*
1060 * Reset the hardware debug registers if they were in use.
1061 * They won't have any meaning for the newly exec'd process.
1062 */
1063 if (pcb->pcb_flags & PCB_DBREGS) {
1064 pcb->pcb_dr0 = 0;
1065 pcb->pcb_dr1 = 0;
1066 pcb->pcb_dr2 = 0;
1067 pcb->pcb_dr3 = 0;
1068 pcb->pcb_dr6 = 0;
0855a2af 1069 pcb->pcb_dr7 = 0; /* JG set bit 10? */
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1070 if (pcb == td->td_pcb) {
1071 /*
1072 * Clear the debug registers on the running
1073 * CPU, otherwise they will end up affecting
1074 * the next process we switch to.
1075 */
1076 reset_dbregs();
1077 }
1078 pcb->pcb_flags &= ~PCB_DBREGS;
1079 }
1080
1081 /*
1082 * Initialize the math emulator (if any) for the current process.
1083 * Actually, just clear the bit that says that the emulator has
1084 * been initialized. Initialization is delayed until the process
1085 * traps to the emulator (if it is done at all) mainly because
1086 * emulators don't provide an entry point for initialization.
1087 */
c8fe38ae 1088 pcb->pcb_flags &= ~FP_SOFTFP;
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1089
1090 /*
5b9f6cc4
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1091 * NOTE: do not set CR0_TS here. npxinit() must do it after clearing
1092 * gd_npxthread. Otherwise a preemptive interrupt thread
1093 * may panic in npxdna().
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1094 */
1095 crit_enter();
1096 load_cr0(rcr0() | CR0_MP);
1097
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1098 /*
1099 * NOTE: The MSR values must be correct so we can return to
1100 * userland. gd_user_fs/gs must be correct so the switch
1101 * code knows what the current MSR values are.
1102 */
1103 pcb->pcb_fsbase = 0; /* Values loaded from PCB on switch */
c8fe38ae 1104 pcb->pcb_gsbase = 0;
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1105 mdcpu->gd_user_fs = 0; /* Cache of current MSR values */
1106 mdcpu->gd_user_gs = 0;
1107 wrmsr(MSR_FSBASE, 0); /* Set MSR values for return to userland */
1108 wrmsr(MSR_KGSBASE, 0);
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1109
1110#if NNPX > 0
1111 /* Initialize the npx (if any) for the current process. */
1112 npxinit(__INITIAL_NPXCW__);
1113#endif
1114 crit_exit();
1115
1116 pcb->pcb_ds = _udatasel;
1117 pcb->pcb_es = _udatasel;
1118 pcb->pcb_fs = _udatasel;
1119 pcb->pcb_gs = _udatasel;
1120}
1121
1122void
1123cpu_setregs(void)
1124{
1125 register_t cr0;
1126
1127 cr0 = rcr0();
1128 cr0 |= CR0_NE; /* Done by npxinit() */
1129 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
1130 cr0 |= CR0_WP | CR0_AM;
1131 load_cr0(cr0);
1132 load_gs(_udatasel);
1133}
1134
1135static int
1136sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
1137{
1138 int error;
1139 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
1140 req);
1141 if (!error && req->newptr)
1142 resettodr();
1143 return (error);
1144}
1145
1146SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
1147 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
1148
1149#if JG
1150SYSCTL_INT(_machdep, CPU_DISRTCSET, disable_rtc_set,
1151 CTLFLAG_RW, &disable_rtc_set, 0, "");
1152#endif
1153
1154#if JG
1155SYSCTL_STRUCT(_machdep, CPU_BOOTINFO, bootinfo,
1156 CTLFLAG_RD, &bootinfo, bootinfo, "");
1157#endif
1158
1159SYSCTL_INT(_machdep, CPU_WALLCLOCK, wall_cmos_clock,
1160 CTLFLAG_RW, &wall_cmos_clock, 0, "");
1161
1162extern u_long bootdev; /* not a cdev_t - encoding is different */
1163SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
1164 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
1165
1166/*
1167 * Initialize 386 and configure to run kernel
1168 */
1169
1170/*
1171 * Initialize segments & interrupt table
1172 */
1173
1174int _default_ldt;
1175struct user_segment_descriptor gdt[NGDT * MAXCPU]; /* global descriptor table */
1176static struct gate_descriptor idt0[NIDT];
1177struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
1178#if JG
1179union descriptor ldt[NLDT]; /* local descriptor table */
1180#endif
1181
1182/* table descriptors - used to load tables by cpu */
1183struct region_descriptor r_gdt, r_idt;
1184
1185#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1186extern int has_f00f_bug;
1187#endif
1188
1189static char dblfault_stack[PAGE_SIZE] __aligned(16);
1190
1191/* JG proc0paddr is a virtual address */
1192void *proc0paddr;
1193/* JG alignment? */
1194char proc0paddr_buff[LWKT_THREAD_STACK];
1195
1196
1197/* software prototypes -- in more palatable form */
1198struct soft_segment_descriptor gdt_segs[] = {
1199/* GNULL_SEL 0 Null Descriptor */
1200{ 0x0, /* segment base address */
1201 0x0, /* length */
1202 0, /* segment type */
1203 0, /* segment descriptor priority level */
1204 0, /* segment descriptor present */
1205 0, /* long */
1206 0, /* default 32 vs 16 bit size */
1207 0 /* limit granularity (byte/page units)*/ },
1208/* GCODE_SEL 1 Code Descriptor for kernel */
1209{ 0x0, /* segment base address */
1210 0xfffff, /* length - all address space */
1211 SDT_MEMERA, /* segment type */
1212 SEL_KPL, /* segment descriptor priority level */
1213 1, /* segment descriptor present */
1214 1, /* long */
1215 0, /* default 32 vs 16 bit size */
1216 1 /* limit granularity (byte/page units)*/ },
1217/* GDATA_SEL 2 Data Descriptor for kernel */
1218{ 0x0, /* segment base address */
1219 0xfffff, /* length - all address space */
1220 SDT_MEMRWA, /* segment type */
1221 SEL_KPL, /* segment descriptor priority level */
1222 1, /* segment descriptor present */
1223 1, /* long */
1224 0, /* default 32 vs 16 bit size */
1225 1 /* limit granularity (byte/page units)*/ },
1226/* GUCODE32_SEL 3 32 bit Code Descriptor for user */
1227{ 0x0, /* segment base address */
1228 0xfffff, /* length - all address space */
1229 SDT_MEMERA, /* segment type */
1230 SEL_UPL, /* segment descriptor priority level */
1231 1, /* segment descriptor present */
1232 0, /* long */
1233 1, /* default 32 vs 16 bit size */
1234 1 /* limit granularity (byte/page units)*/ },
1235/* GUDATA_SEL 4 32/64 bit Data Descriptor for user */
1236{ 0x0, /* segment base address */
1237 0xfffff, /* length - all address space */
1238 SDT_MEMRWA, /* segment type */
1239 SEL_UPL, /* segment descriptor priority level */
1240 1, /* segment descriptor present */
1241 0, /* long */
1242 1, /* default 32 vs 16 bit size */
1243 1 /* limit granularity (byte/page units)*/ },
1244/* GUCODE_SEL 5 64 bit Code Descriptor for user */
1245{ 0x0, /* segment base address */
1246 0xfffff, /* length - all address space */
1247 SDT_MEMERA, /* segment type */
1248 SEL_UPL, /* segment descriptor priority level */
1249 1, /* segment descriptor present */
1250 1, /* long */
1251 0, /* default 32 vs 16 bit size */
1252 1 /* limit granularity (byte/page units)*/ },
1253/* GPROC0_SEL 6 Proc 0 Tss Descriptor */
1254{
1255 0x0, /* segment base address */
1256 sizeof(struct amd64tss)-1,/* length - all address space */
1257 SDT_SYSTSS, /* segment type */
1258 SEL_KPL, /* segment descriptor priority level */
1259 1, /* segment descriptor present */
1260 0, /* long */
1261 0, /* unused - default 32 vs 16 bit size */
1262 0 /* limit granularity (byte/page units)*/ },
1263/* Actually, the TSS is a system descriptor which is double size */
1264{ 0x0, /* segment base address */
1265 0x0, /* length */
1266 0, /* segment type */
1267 0, /* segment descriptor priority level */
1268 0, /* segment descriptor present */
1269 0, /* long */
1270 0, /* default 32 vs 16 bit size */
1271 0 /* limit granularity (byte/page units)*/ },
1272/* GUGS32_SEL 8 32 bit GS Descriptor for user */
1273{ 0x0, /* segment base address */
1274 0xfffff, /* length - all address space */
1275 SDT_MEMRWA, /* segment type */
1276 SEL_UPL, /* segment descriptor priority level */
1277 1, /* segment descriptor present */
1278 0, /* long */
1279 1, /* default 32 vs 16 bit size */
1280 1 /* limit granularity (byte/page units)*/ },
1281};
1282
1283void
1284setidt(int idx, inthand_t *func, int typ, int dpl, int ist)
1285{
1286 struct gate_descriptor *ip;
1287
1288 ip = idt + idx;
1289 ip->gd_looffset = (uintptr_t)func;
1290 ip->gd_selector = GSEL(GCODE_SEL, SEL_KPL);
1291 ip->gd_ist = ist;
1292 ip->gd_xx = 0;
1293 ip->gd_type = typ;
1294 ip->gd_dpl = dpl;
1295 ip->gd_p = 1;
1296 ip->gd_hioffset = ((uintptr_t)func)>>16 ;
1297}
1298
1299#define IDTVEC(name) __CONCAT(X,name)
1300
1301extern inthand_t
1302 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
1303 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
1304 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
1305 IDTVEC(page), IDTVEC(mchk), IDTVEC(rsvd), IDTVEC(fpu), IDTVEC(align),
1306 IDTVEC(xmm), IDTVEC(dblfault),
1307 IDTVEC(fast_syscall), IDTVEC(fast_syscall32);
1308
1309#ifdef DEBUG_INTERRUPTS
1310extern inthand_t *Xrsvdary[256];
1311#endif
1312
1313void
1314sdtossd(struct user_segment_descriptor *sd, struct soft_segment_descriptor *ssd)
1315{
1316 ssd->ssd_base = (sd->sd_hibase << 24) | sd->sd_lobase;
1317 ssd->ssd_limit = (sd->sd_hilimit << 16) | sd->sd_lolimit;
1318 ssd->ssd_type = sd->sd_type;
1319 ssd->ssd_dpl = sd->sd_dpl;
1320 ssd->ssd_p = sd->sd_p;
1321 ssd->ssd_def32 = sd->sd_def32;
1322 ssd->ssd_gran = sd->sd_gran;
1323}
1324
1325void
1326ssdtosd(struct soft_segment_descriptor *ssd, struct user_segment_descriptor *sd)
1327{
1328
1329 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1330 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xff;
1331 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1332 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1333 sd->sd_type = ssd->ssd_type;
1334 sd->sd_dpl = ssd->ssd_dpl;
1335 sd->sd_p = ssd->ssd_p;
1336 sd->sd_long = ssd->ssd_long;
1337 sd->sd_def32 = ssd->ssd_def32;
1338 sd->sd_gran = ssd->ssd_gran;
1339}
1340
1341void
1342ssdtosyssd(struct soft_segment_descriptor *ssd,
1343 struct system_segment_descriptor *sd)
1344{
1345
1346 sd->sd_lobase = (ssd->ssd_base) & 0xffffff;
1347 sd->sd_hibase = (ssd->ssd_base >> 24) & 0xfffffffffful;
1348 sd->sd_lolimit = (ssd->ssd_limit) & 0xffff;
1349 sd->sd_hilimit = (ssd->ssd_limit >> 16) & 0xf;
1350 sd->sd_type = ssd->ssd_type;
1351 sd->sd_dpl = ssd->ssd_dpl;
1352 sd->sd_p = ssd->ssd_p;
1353 sd->sd_gran = ssd->ssd_gran;
1354}
1355
1356u_int basemem;
1357
1358/*
1359 * Populate the (physmap) array with base/bound pairs describing the
1360 * available physical memory in the system, then test this memory and
1361 * build the phys_avail array describing the actually-available memory.
1362 *
1363 * If we cannot accurately determine the physical memory map, then use
1364 * value from the 0xE801 call, and failing that, the RTC.
1365 *
1366 * Total memory size may be set by the kernel environment variable
1367 * hw.physmem or the compile-time define MAXMEM.
1368 *
1369 * XXX first should be vm_paddr_t.
1370 */
1371static void
1372getmemsize(caddr_t kmdp, u_int64_t first)
1373{
1374 int i, off, physmap_idx, pa_indx, da_indx;
1375 vm_paddr_t pa, physmap[PHYSMAP_SIZE];
1376 u_long physmem_tunable;
1377 pt_entry_t *pte;
1378 struct bios_smap *smapbase, *smap, *smapend;
1379 u_int32_t smapsize;
1380 quad_t dcons_addr, dcons_size;
1381
1382 bzero(physmap, sizeof(physmap));
1383 basemem = 0;
1384 physmap_idx = 0;
1385
1386 /*
1387 * get memory map from INT 15:E820, kindly supplied by the loader.
1388 *
1389 * subr_module.c says:
1390 * "Consumer may safely assume that size value precedes data."
1391 * ie: an int32_t immediately precedes smap.
1392 */
1393 smapbase = (struct bios_smap *)preload_search_info(kmdp,
1394 MODINFO_METADATA | MODINFOMD_SMAP);
1395 if (smapbase == NULL)
1396 panic("No BIOS smap info from loader!");
1397
1398 smapsize = *((u_int32_t *)smapbase - 1);
1399 smapend = (struct bios_smap *)((uintptr_t)smapbase + smapsize);
1400
1401 for (smap = smapbase; smap < smapend; smap++) {
1402 if (boothowto & RB_VERBOSE)
1403 kprintf("SMAP type=%02x base=%016lx len=%016lx\n",
1404 smap->type, smap->base, smap->length);
1405
1406 if (smap->type != SMAP_TYPE_MEMORY)
1407 continue;
1408
1409 if (smap->length == 0)
1410 continue;
1411
1412 for (i = 0; i <= physmap_idx; i += 2) {
1413 if (smap->base < physmap[i + 1]) {
1414 if (boothowto & RB_VERBOSE)
1415 kprintf(
1416 "Overlapping or non-monotonic memory region, ignoring second region\n");
1417 continue;
1418 }
1419 }
1420
1421 if (smap->base == physmap[physmap_idx + 1]) {
1422 physmap[physmap_idx + 1] += smap->length;
1423 continue;
1424 }
1425
1426 physmap_idx += 2;
1427 if (physmap_idx == PHYSMAP_SIZE) {
1428 kprintf(
1429 "Too many segments in the physical address map, giving up\n");
1430 break;
1431 }
1432 physmap[physmap_idx] = smap->base;
1433 physmap[physmap_idx + 1] = smap->base + smap->length;
1434 }
1435
1436 /*
1437 * Find the 'base memory' segment for SMP
1438 */
1439 basemem = 0;
1440 for (i = 0; i <= physmap_idx; i += 2) {
1441 if (physmap[i] == 0x00000000) {
1442 basemem = physmap[i + 1] / 1024;
1443 break;
1444 }
1445 }
1446 if (basemem == 0)
1447 panic("BIOS smap did not include a basemem segment!");
1448
1449#ifdef SMP
1450 /* make hole for AP bootstrap code */
1451 physmap[1] = mp_bootaddress(physmap[1] / 1024);
1452#endif
1453
1454 /*
1455 * Maxmem isn't the "maximum memory", it's one larger than the
1456 * highest page of the physical address space. It should be
1457 * called something like "Maxphyspage". We may adjust this
1458 * based on ``hw.physmem'' and the results of the memory test.
1459 */
1460 Maxmem = atop(physmap[physmap_idx + 1]);
1461
1462#ifdef MAXMEM
1463 Maxmem = MAXMEM / 4;
1464#endif
1465
1466 if (TUNABLE_ULONG_FETCH("hw.physmem", &physmem_tunable))
1467 Maxmem = atop(physmem_tunable);
1468
1469 /*
1470 * Don't allow MAXMEM or hw.physmem to extend the amount of memory
1471 * in the system.
1472 */
1473 if (Maxmem > atop(physmap[physmap_idx + 1]))
1474 Maxmem = atop(physmap[physmap_idx + 1]);
1475
1476 if (atop(physmap[physmap_idx + 1]) != Maxmem &&
1477 (boothowto & RB_VERBOSE))
1478 kprintf("Physical memory use set to %ldK\n", Maxmem * 4);
1479
1480 /* call pmap initialization to make new kernel address space */
48ffc236 1481 pmap_bootstrap(&first);
c8fe38ae
MD
1482
1483 /*
1484 * Size up each available chunk of physical memory.
1485 */
1486 physmap[0] = PAGE_SIZE; /* mask off page 0 */
1487 pa_indx = 0;
1488 da_indx = 1;
1489 phys_avail[pa_indx++] = physmap[0];
1490 phys_avail[pa_indx] = physmap[0];
1491 dump_avail[da_indx] = physmap[0];
1492 pte = CMAP1;
1493
1494 /*
1495 * Get dcons buffer address
1496 */
1497 if (kgetenv_quad("dcons.addr", &dcons_addr) == 0 ||
1498 kgetenv_quad("dcons.size", &dcons_size) == 0)
1499 dcons_addr = 0;
1500
1501 /*
1502 * physmap is in bytes, so when converting to page boundaries,
1503 * round up the start address and round down the end address.
1504 */
1505 for (i = 0; i <= physmap_idx; i += 2) {
1506 vm_paddr_t end;
1507
1508 end = ptoa((vm_paddr_t)Maxmem);
1509 if (physmap[i + 1] < end)
1510 end = trunc_page(physmap[i + 1]);
1511 for (pa = round_page(physmap[i]); pa < end; pa += PAGE_SIZE) {
1512 int tmp, page_bad, full;
1513 int *ptr = (int *)CADDR1;
1514
1515 full = FALSE;
1516 /*
1517 * block out kernel memory as not available.
1518 */
1519 if (pa >= 0x100000 && pa < first)
1520 goto do_dump_avail;
1521
1522 /*
1523 * block out dcons buffer
1524 */
1525 if (dcons_addr > 0
1526 && pa >= trunc_page(dcons_addr)
1527 && pa < dcons_addr + dcons_size)
1528 goto do_dump_avail;
1529
1530 page_bad = FALSE;
1531
1532 /*
1533 * map page into kernel: valid, read/write,non-cacheable
1534 */
1535 *pte = pa | PG_V | PG_RW | PG_N;
1536 cpu_invltlb();
1537
1538 tmp = *(int *)ptr;
1539 /*
1540 * Test for alternating 1's and 0's
1541 */
1542 *(volatile int *)ptr = 0xaaaaaaaa;
1543 if (*(volatile int *)ptr != 0xaaaaaaaa)
1544 page_bad = TRUE;
1545 /*
1546 * Test for alternating 0's and 1's
1547 */
1548 *(volatile int *)ptr = 0x55555555;
1549 if (*(volatile int *)ptr != 0x55555555)
1550 page_bad = TRUE;
1551 /*
1552 * Test for all 1's
1553 */
1554 *(volatile int *)ptr = 0xffffffff;
1555 if (*(volatile int *)ptr != 0xffffffff)
1556 page_bad = TRUE;
1557 /*
1558 * Test for all 0's
1559 */
1560 *(volatile int *)ptr = 0x0;
1561 if (*(volatile int *)ptr != 0x0)
1562 page_bad = TRUE;
1563 /*
1564 * Restore original value.
1565 */
1566 *(int *)ptr = tmp;
1567
1568 /*
1569 * Adjust array of valid/good pages.
1570 */
1571 if (page_bad == TRUE)
1572 continue;
1573 /*
1574 * If this good page is a continuation of the
1575 * previous set of good pages, then just increase
1576 * the end pointer. Otherwise start a new chunk.
1577 * Note that "end" points one higher than end,
1578 * making the range >= start and < end.
1579 * If we're also doing a speculative memory
1580 * test and we at or past the end, bump up Maxmem
1581 * so that we keep going. The first bad page
1582 * will terminate the loop.
1583 */
1584 if (phys_avail[pa_indx] == pa) {
1585 phys_avail[pa_indx] += PAGE_SIZE;
1586 } else {
1587 pa_indx++;
1588 if (pa_indx == PHYS_AVAIL_ARRAY_END) {
1589 kprintf(
1590 "Too many holes in the physical address space, giving up\n");
1591 pa_indx--;
1592 full = TRUE;
1593 goto do_dump_avail;
1594 }
1595 phys_avail[pa_indx++] = pa; /* start */
1596 phys_avail[pa_indx] = pa + PAGE_SIZE; /* end */
1597 }
1598 physmem++;
1599do_dump_avail:
1600 if (dump_avail[da_indx] == pa) {
1601 dump_avail[da_indx] += PAGE_SIZE;
1602 } else {
1603 da_indx++;
1604 if (da_indx == DUMP_AVAIL_ARRAY_END) {
1605 da_indx--;
1606 goto do_next;
1607 }
1608 dump_avail[da_indx++] = pa; /* start */
1609 dump_avail[da_indx] = pa + PAGE_SIZE; /* end */
1610 }
1611do_next:
1612 if (full)
1613 break;
1614 }
1615 }
1616 *pte = 0;
1617 cpu_invltlb();
1618
1619 /*
1620 * XXX
1621 * The last chunk must contain at least one page plus the message
1622 * buffer to avoid complicating other code (message buffer address
1623 * calculation, etc.).
1624 */
1625 while (phys_avail[pa_indx - 1] + PAGE_SIZE +
1626 round_page(MSGBUF_SIZE) >= phys_avail[pa_indx]) {
1627 physmem -= atop(phys_avail[pa_indx] - phys_avail[pa_indx - 1]);
1628 phys_avail[pa_indx--] = 0;
1629 phys_avail[pa_indx--] = 0;
1630 }
1631
1632 Maxmem = atop(phys_avail[pa_indx]);
1633
1634 /* Trim off space for the message buffer. */
1635 phys_avail[pa_indx] -= round_page(MSGBUF_SIZE);
1636
1637 /* Map the message buffer. */
1638 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1639 pmap_kenter((vm_offset_t)msgbufp + off, phys_avail[pa_indx] +
1640 off);
1641}
1642
1643/*
1644 * IDT VECTORS:
1645 * 0 Divide by zero
1646 * 1 Debug
1647 * 2 NMI
1648 * 3 BreakPoint
1649 * 4 OverFlow
1650 * 5 Bound-Range
1651 * 6 Invalid OpCode
1652 * 7 Device Not Available (x87)
1653 * 8 Double-Fault
1654 * 9 Coprocessor Segment overrun (unsupported, reserved)
1655 * 10 Invalid-TSS
1656 * 11 Segment not present
1657 * 12 Stack
1658 * 13 General Protection
1659 * 14 Page Fault
1660 * 15 Reserved
1661 * 16 x87 FP Exception pending
1662 * 17 Alignment Check
1663 * 18 Machine Check
1664 * 19 SIMD floating point
1665 * 20-31 reserved
1666 * 32-255 INTn/external sources
1667 */
1668u_int64_t
1669hammer_time(u_int64_t modulep, u_int64_t physfree)
1670{
1671 caddr_t kmdp;
5b9f6cc4
MD
1672 int gsel_tss, x;
1673#if JG
1674 int metadata_missing, off;
1675#endif
c8fe38ae
MD
1676 struct mdglobaldata *gd;
1677 u_int64_t msr;
1678 char *env;
1679
48ffc236 1680#if JG
c8fe38ae
MD
1681 /*
1682 * This must be done before the first references
1683 * to CPU_prvspace[0] are made.
1684 */
1685 init_paging(&physfree);
48ffc236 1686#endif
c8fe38ae
MD
1687
1688 /*
1689 * Prevent lowering of the ipl if we call tsleep() early.
1690 */
1691 gd = &CPU_prvspace[0].mdglobaldata;
1692 bzero(gd, sizeof(*gd));
1693
1694 /*
1695 * Note: on both UP and SMP curthread must be set non-NULL
1696 * early in the boot sequence because the system assumes
1697 * that 'curthread' is never NULL.
1698 */
1699
1700 gd->mi.gd_curthread = &thread0;
1701 thread0.td_gd = &gd->mi;
1702
1703 atdevbase = ISA_HOLE_START + PTOV_OFFSET;
1704
1705#if JG
1706 metadata_missing = 0;
1707 if (bootinfo.bi_modulep) {
1708 preload_metadata = (caddr_t)bootinfo.bi_modulep + KERNBASE;
1709 preload_bootstrap_relocate(KERNBASE);
1710 } else {
1711 metadata_missing = 1;
1712 }
1713 if (bootinfo.bi_envp)
1714 kern_envp = (caddr_t)bootinfo.bi_envp + KERNBASE;
1715#endif
1716
1717 preload_metadata = (caddr_t)(uintptr_t)(modulep + PTOV_OFFSET);
1718 preload_bootstrap_relocate(PTOV_OFFSET);
1719 kmdp = preload_search_by_type("elf kernel");
1720 if (kmdp == NULL)
1721 kmdp = preload_search_by_type("elf64 kernel");
1722 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
1723 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *) + PTOV_OFFSET;
1724#ifdef DDB
1725 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
1726 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
1727#endif
1728
1729 /*
1730 * start with one cpu. Note: with one cpu, ncpus2_shift, ncpus2_mask,
1731 * and ncpus_fit_mask remain 0.
1732 */
1733 ncpus = 1;
1734 ncpus2 = 1;
1735 ncpus_fit = 1;
1736 /* Init basic tunables, hz etc */
1737 init_param1();
1738
1739 /*
1740 * make gdt memory segments
1741 */
1742 gdt_segs[GPROC0_SEL].ssd_base =
1743 (uintptr_t) &CPU_prvspace[0].mdglobaldata.gd_common_tss;
1744
1745 gd->mi.gd_prvspace = &CPU_prvspace[0];
1746
1747 for (x = 0; x < NGDT; x++) {
1748 if (x != GPROC0_SEL && x != (GPROC0_SEL + 1))
1749 ssdtosd(&gdt_segs[x], &gdt[x]);
1750 }
1751 ssdtosyssd(&gdt_segs[GPROC0_SEL],
1752 (struct system_segment_descriptor *)&gdt[GPROC0_SEL]);
48ffc236 1753
c8fe38ae
MD
1754 r_gdt.rd_limit = NGDT * sizeof(gdt[0]) - 1;
1755 r_gdt.rd_base = (long) gdt;
1756 lgdt(&r_gdt);
1757
1758 wrmsr(MSR_FSBASE, 0); /* User value */
1759 wrmsr(MSR_GSBASE, (u_int64_t)&gd->mi);
1760 wrmsr(MSR_KGSBASE, 0); /* User value while in the kernel */
1761
1762 mi_gdinit(&gd->mi, 0);
1763 cpu_gdinit(gd, 0);
1764 proc0paddr = proc0paddr_buff;
1765 mi_proc0init(&gd->mi, proc0paddr);
1766 safepri = TDPRI_MAX;
1767
1768 /* spinlocks and the BGL */
1769 init_locks();
1770
1771 /* exceptions */
1772 for (x = 0; x < NIDT; x++)
1773 setidt(x, &IDTVEC(rsvd), SDT_SYSIGT, SEL_KPL, 0);
1774 setidt(IDT_DE, &IDTVEC(div), SDT_SYSIGT, SEL_KPL, 0);
1775 setidt(IDT_DB, &IDTVEC(dbg), SDT_SYSIGT, SEL_KPL, 0);
1776 setidt(IDT_NMI, &IDTVEC(nmi), SDT_SYSIGT, SEL_KPL, 1);
1777 setidt(IDT_BP, &IDTVEC(bpt), SDT_SYSIGT, SEL_UPL, 0);
1778 setidt(IDT_OF, &IDTVEC(ofl), SDT_SYSIGT, SEL_KPL, 0);
1779 setidt(IDT_BR, &IDTVEC(bnd), SDT_SYSIGT, SEL_KPL, 0);
1780 setidt(IDT_UD, &IDTVEC(ill), SDT_SYSIGT, SEL_KPL, 0);
1781 setidt(IDT_NM, &IDTVEC(dna), SDT_SYSIGT, SEL_KPL, 0);
1782 setidt(IDT_DF, &IDTVEC(dblfault), SDT_SYSIGT, SEL_KPL, 1);
1783 setidt(IDT_FPUGP, &IDTVEC(fpusegm), SDT_SYSIGT, SEL_KPL, 0);
1784 setidt(IDT_TS, &IDTVEC(tss), SDT_SYSIGT, SEL_KPL, 0);
1785 setidt(IDT_NP, &IDTVEC(missing), SDT_SYSIGT, SEL_KPL, 0);
1786 setidt(IDT_SS, &IDTVEC(stk), SDT_SYSIGT, SEL_KPL, 0);
1787 setidt(IDT_GP, &IDTVEC(prot), SDT_SYSIGT, SEL_KPL, 0);
1788 setidt(IDT_PF, &IDTVEC(page), SDT_SYSIGT, SEL_KPL, 0);
1789 setidt(IDT_MF, &IDTVEC(fpu), SDT_SYSIGT, SEL_KPL, 0);
1790 setidt(IDT_AC, &IDTVEC(align), SDT_SYSIGT, SEL_KPL, 0);
1791 setidt(IDT_MC, &IDTVEC(mchk), SDT_SYSIGT, SEL_KPL, 0);
1792 setidt(IDT_XF, &IDTVEC(xmm), SDT_SYSIGT, SEL_KPL, 0);
1793
1794 r_idt.rd_limit = sizeof(idt0) - 1;
1795 r_idt.rd_base = (long) idt;
1796 lidt(&r_idt);
1797
1798 /*
1799 * Initialize the console before we print anything out.
1800 */
1801 cninit();
1802
1803#if JG
1804 if (metadata_missing)
1805 kprintf("WARNING: loader(8) metadata is missing!\n");
1806#endif
1807
1808#if NISA >0
1809 isa_defaultirq();
1810#endif
1811 rand_initialize();
1812
1813#ifdef DDB
1814 kdb_init();
1815 if (boothowto & RB_KDB)
1816 Debugger("Boot flags requested debugger");
1817#endif
1818
1819#if JG
1820 finishidentcpu(); /* Final stage of CPU initialization */
1821 setidt(6, &IDTVEC(ill), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1822 setidt(13, &IDTVEC(prot), SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
1823#endif
1824 identify_cpu(); /* Final stage of CPU initialization */
1825 initializecpu(); /* Initialize CPU registers */
1826
1827 /* make an initial tss so cpu can get interrupt stack on syscall! */
5b9f6cc4
MD
1828 gd->gd_common_tss.tss_rsp0 =
1829 (register_t)(thread0.td_kstack +
1830 KSTACK_PAGES * PAGE_SIZE - sizeof(struct pcb));
c8fe38ae
MD
1831 /* Ensure the stack is aligned to 16 bytes */
1832 gd->gd_common_tss.tss_rsp0 &= ~0xFul;
1833 gd->gd_rsp0 = gd->gd_common_tss.tss_rsp0;
1834
1835 /* doublefault stack space, runs on ist1 */
1836 gd->gd_common_tss.tss_ist1 = (long)&dblfault_stack[sizeof(dblfault_stack)];
1837
1838 /* Set the IO permission bitmap (empty due to tss seg limit) */
1839 gd->gd_common_tss.tss_iobase = sizeof(struct amd64tss);
1840
1841 gsel_tss = GSEL(GPROC0_SEL, SEL_KPL);
1842 gd->gd_tss_gdt = &gdt[GPROC0_SEL];
1843 gd->gd_common_tssd = *gd->gd_tss_gdt;
1844 ltr(gsel_tss);
1845
1846 /* Set up the fast syscall stuff */
1847 msr = rdmsr(MSR_EFER) | EFER_SCE;
1848 wrmsr(MSR_EFER, msr);
1849 wrmsr(MSR_LSTAR, (u_int64_t)IDTVEC(fast_syscall));
1850 wrmsr(MSR_CSTAR, (u_int64_t)IDTVEC(fast_syscall32));
1851 msr = ((u_int64_t)GSEL(GCODE_SEL, SEL_KPL) << 32) |
1852 ((u_int64_t)GSEL(GUCODE32_SEL, SEL_UPL) << 48);
1853 wrmsr(MSR_STAR, msr);
1854 wrmsr(MSR_SF_MASK, PSL_NT|PSL_T|PSL_I|PSL_C|PSL_D);
1855
1856 getmemsize(kmdp, physfree);
1857 init_param2(physmem);
1858
1859 /* now running on new page tables, configured,and u/iom is accessible */
1860
1861 /* Map the message buffer. */
1862#if JG
1863 for (off = 0; off < round_page(MSGBUF_SIZE); off += PAGE_SIZE)
1864 pmap_kenter((vm_offset_t)msgbufp + off, avail_end + off);
1865#endif
1866
1867 msgbufinit(msgbufp, MSGBUF_SIZE);
1868
1869
1870 /* transfer to user mode */
1871
1872 _ucodesel = GSEL(GUCODE_SEL, SEL_UPL);
1873 _udatasel = GSEL(GUDATA_SEL, SEL_UPL);
1874 _ucode32sel = GSEL(GUCODE32_SEL, SEL_UPL);
1875
1876 load_ds(_udatasel);
1877 load_es(_udatasel);
1878 load_fs(_udatasel);
1879
1880 /* setup proc 0's pcb */
1881 thread0.td_pcb->pcb_flags = 0;
c8fe38ae 1882 thread0.td_pcb->pcb_cr3 = KPML4phys;
c8fe38ae
MD
1883 thread0.td_pcb->pcb_ext = 0;
1884 lwp0.lwp_md.md_regs = &proc0_tf;
1885 env = kgetenv("kernelname");
1886 if (env != NULL)
1887 strlcpy(kernelname, env, sizeof(kernelname));
1888
1889 /* Location of kernel stack for locore */
1890 return ((u_int64_t)thread0.td_pcb);
1891}
1892
1893/*
1894 * Initialize machine-dependant portions of the global data structure.
1895 * Note that the global data area and cpu0's idlestack in the private
1896 * data space were allocated in locore.
1897 *
1898 * Note: the idlethread's cpl is 0
1899 *
1900 * WARNING! Called from early boot, 'mycpu' may not work yet.
1901 */
1902void
1903cpu_gdinit(struct mdglobaldata *gd, int cpu)
1904{
1905 if (cpu)
1906 gd->mi.gd_curthread = &gd->mi.gd_idlethread;
1907
1908 lwkt_init_thread(&gd->mi.gd_idlethread,
1909 gd->mi.gd_prvspace->idlestack,
1910 sizeof(gd->mi.gd_prvspace->idlestack),
1911 TDF_MPSAFE, &gd->mi);
1912 lwkt_set_comm(&gd->mi.gd_idlethread, "idle_%d", cpu);
1913 gd->mi.gd_idlethread.td_switch = cpu_lwkt_switch;
1914 gd->mi.gd_idlethread.td_sp -= sizeof(void *);
1915 *(void **)gd->mi.gd_idlethread.td_sp = cpu_idle_restore;
1916}
1917
1918int
1919is_globaldata_space(vm_offset_t saddr, vm_offset_t eaddr)
1920{
1921 if (saddr >= (vm_offset_t)&CPU_prvspace[0] &&
1922 eaddr <= (vm_offset_t)&CPU_prvspace[MAXCPU]) {
1923 return (TRUE);
1924 }
1925 return (FALSE);
1926}
1927
1928struct globaldata *
1929globaldata_find(int cpu)
1930{
1931 KKASSERT(cpu >= 0 && cpu < ncpus);
1932 return(&CPU_prvspace[cpu].mdglobaldata.mi);
1933}
1934
1935#if defined(I586_CPU) && !defined(NO_F00F_HACK)
1936static void f00f_hack(void *unused);
1937SYSINIT(f00f_hack, SI_BOOT2_BIOS, SI_ORDER_ANY, f00f_hack, NULL);
1938
1939static void
1940f00f_hack(void *unused)
1941{
1942 struct gate_descriptor *new_idt;
1943 vm_offset_t tmp;
1944
1945 if (!has_f00f_bug)
1946 return;
1947
1948 kprintf("Intel Pentium detected, installing workaround for F00F bug\n");
1949
1950 r_idt.rd_limit = sizeof(idt0) - 1;
1951
1952 tmp = kmem_alloc(&kernel_map, PAGE_SIZE * 2);
1953 if (tmp == 0)
1954 panic("kmem_alloc returned 0");
1955 if (((unsigned int)tmp & (PAGE_SIZE-1)) != 0)
1956 panic("kmem_alloc returned non-page-aligned memory");
1957 /* Put the first seven entries in the lower page */
1958 new_idt = (struct gate_descriptor*)(tmp + PAGE_SIZE - (7*8));
1959 bcopy(idt, new_idt, sizeof(idt0));
1960 r_idt.rd_base = (int)new_idt;
1961 lidt(&r_idt);
1962 idt = new_idt;
1963 if (vm_map_protect(&kernel_map, tmp, tmp + PAGE_SIZE,
1964 VM_PROT_READ, FALSE) != KERN_SUCCESS)
1965 panic("vm_map_protect failed");
1966 return;
1967}
1968#endif /* defined(I586_CPU) && !NO_F00F_HACK */
1969
1970int
1971ptrace_set_pc(struct lwp *lp, unsigned long addr)
1972{
5b9f6cc4 1973 lp->lwp_md.md_regs->tf_rip = addr;
c8fe38ae
MD
1974 return (0);
1975}
1976
1977int
1978ptrace_single_step(struct lwp *lp)
1979{
5b9f6cc4 1980 lp->lwp_md.md_regs->tf_rflags |= PSL_T;
c8fe38ae
MD
1981 return (0);
1982}
1983
1984int
1985fill_regs(struct lwp *lp, struct reg *regs)
1986{
1987 struct pcb *pcb;
1988 struct trapframe *tp;
1989
1990 tp = lp->lwp_md.md_regs;
5b9f6cc4
MD
1991 bcopy(&tp->tf_rdi, &regs->r_rdi, sizeof(*regs));
1992
c8fe38ae
MD
1993 pcb = lp->lwp_thread->td_pcb;
1994 return (0);
1995}
1996
1997int
1998set_regs(struct lwp *lp, struct reg *regs)
1999{
2000 struct pcb *pcb;
2001 struct trapframe *tp;
2002
2003 tp = lp->lwp_md.md_regs;
5b9f6cc4 2004 if (!EFL_SECURE(regs->r_rflags, tp->tf_rflags) ||
c8fe38ae
MD
2005 !CS_SECURE(regs->r_cs))
2006 return (EINVAL);
5b9f6cc4 2007 bcopy(&regs->r_rdi, &tp->tf_rdi, sizeof(*regs));
c8fe38ae
MD
2008 pcb = lp->lwp_thread->td_pcb;
2009 return (0);
2010}
2011
2012#ifndef CPU_DISABLE_SSE
2013static void
2014fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
2015{
2016 struct env87 *penv_87 = &sv_87->sv_env;
2017 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2018 int i;
2019
2020 /* FPU control/status */
2021 penv_87->en_cw = penv_xmm->en_cw;
2022 penv_87->en_sw = penv_xmm->en_sw;
2023 penv_87->en_tw = penv_xmm->en_tw;
2024 penv_87->en_fip = penv_xmm->en_fip;
2025 penv_87->en_fcs = penv_xmm->en_fcs;
2026 penv_87->en_opcode = penv_xmm->en_opcode;
2027 penv_87->en_foo = penv_xmm->en_foo;
2028 penv_87->en_fos = penv_xmm->en_fos;
2029
2030 /* FPU registers */
2031 for (i = 0; i < 8; ++i)
2032 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
2033
2034 sv_87->sv_ex_sw = sv_xmm->sv_ex_sw;
2035}
2036
2037static void
2038set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
2039{
2040 struct env87 *penv_87 = &sv_87->sv_env;
2041 struct envxmm *penv_xmm = &sv_xmm->sv_env;
2042 int i;
2043
2044 /* FPU control/status */
2045 penv_xmm->en_cw = penv_87->en_cw;
2046 penv_xmm->en_sw = penv_87->en_sw;
2047 penv_xmm->en_tw = penv_87->en_tw;
2048 penv_xmm->en_fip = penv_87->en_fip;
2049 penv_xmm->en_fcs = penv_87->en_fcs;
2050 penv_xmm->en_opcode = penv_87->en_opcode;
2051 penv_xmm->en_foo = penv_87->en_foo;
2052 penv_xmm->en_fos = penv_87->en_fos;
2053
2054 /* FPU registers */
2055 for (i = 0; i < 8; ++i)
2056 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
2057
2058 sv_xmm->sv_ex_sw = sv_87->sv_ex_sw;
2059}
2060#endif /* CPU_DISABLE_SSE */
2061
2062int
2063fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
2064{
2065#ifndef CPU_DISABLE_SSE
2066 if (cpu_fxsr) {
2067 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
2068 (struct save87 *)fpregs);
2069 return (0);
2070 }
2071#endif /* CPU_DISABLE_SSE */
2072 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
2073 return (0);
2074}
2075
2076int
2077set_fpregs(struct lwp *lp, struct fpreg *fpregs)
2078{
2079#ifndef CPU_DISABLE_SSE
2080 if (cpu_fxsr) {
2081 set_fpregs_xmm((struct save87 *)fpregs,
2082 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
2083 return (0);
2084 }
2085#endif /* CPU_DISABLE_SSE */
2086 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
2087 return (0);
2088}
2089
2090int
2091fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
2092{
2093 if (lp == NULL) {
0855a2af
JG
2094 dbregs->dr[0] = rdr0();
2095 dbregs->dr[1] = rdr1();
2096 dbregs->dr[2] = rdr2();
2097 dbregs->dr[3] = rdr3();
2098 dbregs->dr[4] = rdr4();
2099 dbregs->dr[5] = rdr5();
2100 dbregs->dr[6] = rdr6();
2101 dbregs->dr[7] = rdr7();
c8fe38ae
MD
2102 } else {
2103 struct pcb *pcb;
2104
2105 pcb = lp->lwp_thread->td_pcb;
0855a2af
JG
2106 dbregs->dr[0] = pcb->pcb_dr0;
2107 dbregs->dr[1] = pcb->pcb_dr1;
2108 dbregs->dr[2] = pcb->pcb_dr2;
2109 dbregs->dr[3] = pcb->pcb_dr3;
2110 dbregs->dr[4] = 0;
2111 dbregs->dr[5] = 0;
2112 dbregs->dr[6] = pcb->pcb_dr6;
2113 dbregs->dr[7] = pcb->pcb_dr7;
c8fe38ae
MD
2114 }
2115 return (0);
2116}
2117
2118int
2119set_dbregs(struct lwp *lp, struct dbreg *dbregs)
2120{
2121 if (lp == NULL) {
0855a2af
JG
2122 load_dr0(dbregs->dr[0]);
2123 load_dr1(dbregs->dr[1]);
2124 load_dr2(dbregs->dr[2]);
2125 load_dr3(dbregs->dr[3]);
2126 load_dr4(dbregs->dr[4]);
2127 load_dr5(dbregs->dr[5]);
2128 load_dr6(dbregs->dr[6]);
2129 load_dr7(dbregs->dr[7]);
c8fe38ae
MD
2130 } else {
2131 struct pcb *pcb;
2132 struct ucred *ucred;
2133 int i;
0855a2af 2134 uint64_t mask1, mask2;
c8fe38ae
MD
2135
2136 /*
2137 * Don't let an illegal value for dr7 get set. Specifically,
2138 * check for undefined settings. Setting these bit patterns
2139 * result in undefined behaviour and can lead to an unexpected
2140 * TRCTRAP.
2141 */
0855a2af
JG
2142 /* JG this loop looks unreadable */
2143 /* Check 4 2-bit fields for invalid patterns.
2144 * These fields are R/Wi, for i = 0..3
2145 */
2146 /* Is 10 in LENi allowed when running in compatibility mode? */
2147 /* Pattern 10 in R/Wi might be used to indicate
2148 * breakpoint on I/O. Further analysis should be
2149 * carried to decide if it is safe and useful to
2150 * provide access to that capability
2151 */
2152 for (i = 0, mask1 = 0x3<<16, mask2 = 0x2<<16; i < 4;
2153 i++, mask1 <<= 4, mask2 <<= 4)
2154 if ((dbregs->dr[7] & mask1) == mask2)
c8fe38ae 2155 return (EINVAL);
c8fe38ae
MD
2156
2157 pcb = lp->lwp_thread->td_pcb;
2158 ucred = lp->lwp_proc->p_ucred;
2159
2160 /*
2161 * Don't let a process set a breakpoint that is not within the
2162 * process's address space. If a process could do this, it
2163 * could halt the system by setting a breakpoint in the kernel
2164 * (if ddb was enabled). Thus, we need to check to make sure
2165 * that no breakpoints are being enabled for addresses outside
2166 * process's address space, unless, perhaps, we were called by
2167 * uid 0.
2168 *
2169 * XXX - what about when the watched area of the user's
2170 * address space is written into from within the kernel
2171 * ... wouldn't that still cause a breakpoint to be generated
2172 * from within kernel mode?
2173 */
2174
895c1f85 2175 if (priv_check_cred(ucred, PRIV_ROOT, 0) != 0) {
0855a2af 2176 if (dbregs->dr[7] & 0x3) {
c8fe38ae 2177 /* dr0 is enabled */
0855a2af 2178 if (dbregs->dr[0] >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2179 return (EINVAL);
2180 }
2181
0855a2af 2182 if (dbregs->dr[7] & (0x3<<2)) {
c8fe38ae 2183 /* dr1 is enabled */
0855a2af 2184 if (dbregs->dr[1] >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2185 return (EINVAL);
2186 }
2187
0855a2af 2188 if (dbregs->dr[7] & (0x3<<4)) {
c8fe38ae 2189 /* dr2 is enabled */
0855a2af 2190 if (dbregs->dr[2] >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2191 return (EINVAL);
2192 }
2193
0855a2af 2194 if (dbregs->dr[7] & (0x3<<6)) {
c8fe38ae 2195 /* dr3 is enabled */
0855a2af 2196 if (dbregs->dr[3] >= VM_MAX_USER_ADDRESS)
c8fe38ae
MD
2197 return (EINVAL);
2198 }
c8fe38ae
MD
2199 }
2200
0855a2af
JG
2201 pcb->pcb_dr0 = dbregs->dr[0];
2202 pcb->pcb_dr1 = dbregs->dr[1];
2203 pcb->pcb_dr2 = dbregs->dr[2];
2204 pcb->pcb_dr3 = dbregs->dr[3];
2205 pcb->pcb_dr6 = dbregs->dr[6];
2206 pcb->pcb_dr7 = dbregs->dr[7];
c8fe38ae
MD
2207
2208 pcb->pcb_flags |= PCB_DBREGS;
2209 }
2210
2211 return (0);
2212}
2213
2214/*
2215 * Return > 0 if a hardware breakpoint has been hit, and the
2216 * breakpoint was in user space. Return 0, otherwise.
2217 */
2218int
2219user_dbreg_trap(void)
2220{
0855a2af
JG
2221 u_int64_t dr7, dr6; /* debug registers dr6 and dr7 */
2222 u_int64_t bp; /* breakpoint bits extracted from dr6 */
c8fe38ae
MD
2223 int nbp; /* number of breakpoints that triggered */
2224 caddr_t addr[4]; /* breakpoint addresses */
2225 int i;
2226
2227 dr7 = rdr7();
0855a2af 2228 if ((dr7 & 0xff) == 0) {
c8fe38ae
MD
2229 /*
2230 * all GE and LE bits in the dr7 register are zero,
2231 * thus the trap couldn't have been caused by the
2232 * hardware debug registers
2233 */
2234 return 0;
2235 }
2236
2237 nbp = 0;
2238 dr6 = rdr6();
0855a2af 2239 bp = dr6 & 0xf;
c8fe38ae 2240
0855a2af 2241 if (bp == 0) {
c8fe38ae
MD
2242 /*
2243 * None of the breakpoint bits are set meaning this
2244 * trap was not caused by any of the debug registers
2245 */
2246 return 0;
2247 }
2248
2249 /*
2250 * at least one of the breakpoints were hit, check to see
2251 * which ones and if any of them are user space addresses
2252 */
2253
2254 if (bp & 0x01) {
2255 addr[nbp++] = (caddr_t)rdr0();
2256 }
2257 if (bp & 0x02) {
2258 addr[nbp++] = (caddr_t)rdr1();
2259 }
2260 if (bp & 0x04) {
2261 addr[nbp++] = (caddr_t)rdr2();
2262 }
2263 if (bp & 0x08) {
2264 addr[nbp++] = (caddr_t)rdr3();
2265 }
2266
2267 for (i=0; i<nbp; i++) {
2268 if (addr[i] <
2269 (caddr_t)VM_MAX_USER_ADDRESS) {
2270 /*
2271 * addr[i] is in user space
2272 */
2273 return nbp;
2274 }
2275 }
2276
2277 /*
2278 * None of the breakpoints are in user space.
2279 */
2280 return 0;
2281}
2282
2283
2284#ifndef DDB
2285void
2286Debugger(const char *msg)
2287{
2288 kprintf("Debugger(\"%s\") called.\n", msg);
2289}
2290#endif /* no DDB */
2291
2292#ifdef DDB
2293
2294/*
2295 * Provide inb() and outb() as functions. They are normally only
2296 * available as macros calling inlined functions, thus cannot be
2297 * called inside DDB.
2298 *
2299 * The actual code is stolen from <machine/cpufunc.h>, and de-inlined.
2300 */
2301
2302#undef inb
2303#undef outb
2304
2305/* silence compiler warnings */
2306u_char inb(u_int);
2307void outb(u_int, u_char);
2308
2309u_char
2310inb(u_int port)
2311{
2312 u_char data;
2313 /*
2314 * We use %%dx and not %1 here because i/o is done at %dx and not at
2315 * %edx, while gcc generates inferior code (movw instead of movl)
2316 * if we tell it to load (u_short) port.
2317 */
2318 __asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
2319 return (data);
2320}
2321
2322void
2323outb(u_int port, u_char data)
2324{
2325 u_char al;
2326 /*
2327 * Use an unnecessary assignment to help gcc's register allocator.
2328 * This make a large difference for gcc-1.40 and a tiny difference
2329 * for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
2330 * best results. gcc-2.6.0 can't handle this.
2331 */
2332 al = data;
2333 __asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
2334}
2335
2336#endif /* DDB */
2337
2338
2339
2340#include "opt_cpu.h"
2341
2342
2343/*
2344 * initialize all the SMP locks
2345 */
2346
2347/* critical region when masking or unmasking interupts */
2348struct spinlock_deprecated imen_spinlock;
2349
2350/* Make FAST_INTR() routines sequential */
2351struct spinlock_deprecated fast_intr_spinlock;
2352
2353/* critical region for old style disable_intr/enable_intr */
2354struct spinlock_deprecated mpintr_spinlock;
2355
2356/* critical region around INTR() routines */
2357struct spinlock_deprecated intr_spinlock;
2358
2359/* lock region used by kernel profiling */
2360struct spinlock_deprecated mcount_spinlock;
2361
2362/* locks com (tty) data/hardware accesses: a FASTINTR() */
2363struct spinlock_deprecated com_spinlock;
2364
2365/* locks kernel kprintfs */
2366struct spinlock_deprecated cons_spinlock;
2367
2368/* lock regions around the clock hardware */
2369struct spinlock_deprecated clock_spinlock;
2370
2371/* lock around the MP rendezvous */
2372struct spinlock_deprecated smp_rv_spinlock;
2373
2374static void
2375init_locks(void)
2376{
2377 /*
2378 * mp_lock = 0; BSP already owns the MP lock
2379 */
2380 /*
2381 * Get the initial mp_lock with a count of 1 for the BSP.
2382 * This uses a LOGICAL cpu ID, ie BSP == 0.
2383 */
2384#ifdef SMP
2385 cpu_get_initial_mplock();
2386#endif
2387 /* DEPRECATED */
2388 spin_lock_init(&mcount_spinlock);
2389 spin_lock_init(&fast_intr_spinlock);
2390 spin_lock_init(&intr_spinlock);
2391 spin_lock_init(&mpintr_spinlock);
2392 spin_lock_init(&imen_spinlock);
2393 spin_lock_init(&smp_rv_spinlock);
2394 spin_lock_init(&com_spinlock);
2395 spin_lock_init(&clock_spinlock);
2396 spin_lock_init(&cons_spinlock);
2397
2398 /* our token pool needs to work early */
2399 lwkt_token_pool_init();
2400}
2401