2 * Copyright (c) 1998 Doug Rabson.
3 * Copyright (c) 2008 The DragonFly Project.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * $FreeBSD: src/sys/amd64/include/atomic.h,v 1.32 2003/11/21 03:02:00 peter Exp $
28 * $DragonFly: src/sys/cpu/amd64/include/atomic.h,v 1.3 2008/08/29 17:07:06 dillon Exp $
30 #ifndef _CPU_ATOMIC_H_
31 #define _CPU_ATOMIC_H_
34 #include <sys/types.h>
38 * Various simple operations on memory, each of which is atomic in the
39 * presence of interrupts and multiple processors.
41 * atomic_set_char(P, V) (*(u_char *)(P) |= (V))
42 * atomic_clear_char(P, V) (*(u_char *)(P) &= ~(V))
43 * atomic_add_char(P, V) (*(u_char *)(P) += (V))
44 * atomic_subtract_char(P, V) (*(u_char *)(P) -= (V))
46 * atomic_set_short(P, V) (*(u_short *)(P) |= (V))
47 * atomic_clear_short(P, V) (*(u_short *)(P) &= ~(V))
48 * atomic_add_short(P, V) (*(u_short *)(P) += (V))
49 * atomic_subtract_short(P, V) (*(u_short *)(P) -= (V))
51 * atomic_set_int(P, V) (*(u_int *)(P) |= (V))
52 * atomic_clear_int(P, V) (*(u_int *)(P) &= ~(V))
53 * atomic_add_int(P, V) (*(u_int *)(P) += (V))
54 * atomic_subtract_int(P, V) (*(u_int *)(P) -= (V))
55 * atomic_readandclear_int(P) (return (*(u_int *)(P)); *(u_int *)(P) = 0;)
57 * atomic_set_long(P, V) (*(u_long *)(P) |= (V))
58 * atomic_clear_long(P, V) (*(u_long *)(P) &= ~(V))
59 * atomic_add_long(P, V) (*(u_long *)(P) += (V))
60 * atomic_subtract_long(P, V) (*(u_long *)(P) -= (V))
61 * atomic_readandclear_long(P) (return (*(u_long *)(P)); *(u_long *)(P) = 0;)
65 * The above functions are expanded inline in the statically-linked
66 * kernel. Lock prefixes are generated if an SMP kernel is being
69 * Kernel modules call real functions which are built into the kernel.
70 * This allows kernel modules to be portable between UP and SMP systems.
72 #if defined(KLD_MODULE)
73 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
74 void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \
75 void atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v);
77 int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src);
78 int atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src);
79 u_int atomic_fetchadd_int(volatile u_int *p, u_int v);
80 u_long atomic_fetchadd_long(volatile u_long *p, u_long v);
82 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
83 u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
84 void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
86 #else /* !KLD_MODULE */
91 * For userland, always use lock prefixes so that the binaries will run
92 * on both SMP and !SMP systems.
94 #if defined(SMP) || !defined(_KERNEL)
95 #define MPLOCKED "lock ; "
101 * The assembly is volatilized to demark potential before-and-after side
102 * effects if an interrupt or SMP collision were to occur.
104 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
105 static __inline void \
106 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
108 __asm __volatile(MPLOCKED OP \
112 static __inline void \
113 atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v)\
115 __asm __volatile(OP \
120 #else /* !__GNUC__ */
122 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \
123 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \
124 extern void atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v);
126 #endif /* __GNUC__ */
129 * These functions operate on a 32 bit interrupt interlock which is defined
132 * bit 0-30 interrupt handler disabled bits (counter)
133 * bit 31 interrupt handler currently running bit (1 = run)
135 * atomic_intr_cond_test(P) Determine if the interlock is in an
136 * acquired state. Returns 0 if it not
137 * acquired, non-zero if it is.
139 * atomic_intr_cond_try(P)
140 * Increment the request counter and attempt to
141 * set bit 31 to acquire the interlock. If
142 * we are unable to set bit 31 the request
143 * counter is decremented and we return -1,
144 * otherwise we return 0.
146 * atomic_intr_cond_enter(P, func, arg)
147 * Increment the request counter and attempt to
148 * set bit 31 to acquire the interlock. If
149 * we are unable to set bit 31 func(arg) is
150 * called in a loop until we are able to set
153 * atomic_intr_cond_exit(P, func, arg)
154 * Decrement the request counter and clear bit
155 * 31. If the request counter is still non-zero
156 * call func(arg) once.
158 * atomic_intr_handler_disable(P)
159 * Set bit 30, indicating that the interrupt
160 * handler has been disabled. Must be called
161 * after the hardware is disabled.
163 * Returns bit 31 indicating whether a serialized
164 * accessor is active (typically the interrupt
165 * handler is running). 0 == not active,
166 * non-zero == active.
168 * atomic_intr_handler_enable(P)
169 * Clear bit 30, indicating that the interrupt
170 * handler has been enabled. Must be called
171 * before the hardware is actually enabled.
173 * atomic_intr_handler_is_enabled(P)
174 * Returns bit 30, 0 indicates that the handler
175 * is enabled, non-zero indicates that it is
176 * disabled. The request counter portion of
177 * the field is ignored.
180 #ifndef __ATOMIC_INTR_T
181 #define __ATOMIC_INTR_T
182 typedef volatile int atomic_intr_t;
185 #if defined(KLD_MODULE)
187 void atomic_intr_init(atomic_intr_t *p);
188 int atomic_intr_handler_disable(atomic_intr_t *p);
189 void atomic_intr_handler_enable(atomic_intr_t *p);
190 int atomic_intr_handler_is_enabled(atomic_intr_t *p);
191 int atomic_intr_cond_test(atomic_intr_t *p);
192 int atomic_intr_cond_try(atomic_intr_t *p);
193 void atomic_intr_cond_enter(atomic_intr_t *p, void (*func)(void *), void *arg);
194 void atomic_intr_cond_exit(atomic_intr_t *p, void (*func)(void *), void *arg);
196 #else /* !KLD_MODULE */
200 atomic_intr_init(atomic_intr_t *p)
207 atomic_intr_handler_disable(atomic_intr_t *p)
211 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \
212 "andl $0x80000000,%%eax" \
213 : "=a"(data) , "+m"(*p));
219 atomic_intr_handler_enable(atomic_intr_t *p)
221 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p));
226 atomic_intr_handler_is_enabled(atomic_intr_t *p)
230 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \
231 : "=a"(data) : "m"(*p));
237 atomic_intr_cond_enter(atomic_intr_t *p, void (*func)(void *), void *arg)
239 __asm __volatile(MPLOCKED "incl %0; " \
241 MPLOCKED "btsl $31,%0; jnc 2f; " \
242 "movq %2,%%rdi; call *%1; " \
246 : "r"(func), "m"(arg) \
247 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11");
248 /* YYY the function call may clobber even more registers? */
252 * Atomically add the value of v to the integer pointed to by p and return
253 * the previous value of *p.
255 static __inline u_int
256 atomic_fetchadd_int(volatile u_int *p, u_int v)
262 "# atomic_fetchadd_int"
263 : "+r" (v), /* 0 (result) */
271 * Atomically add the value of v to the long integer pointed to by p and return
272 * the previous value of *p.
274 static __inline u_long
275 atomic_fetchadd_long(volatile u_long *p, u_long v)
281 "# atomic_fetchadd_long"
282 : "+r" (v), /* 0 (result) */
289 * Attempt to enter the interrupt condition variable. Returns zero on
290 * success, 1 on failure.
294 atomic_intr_cond_try(atomic_intr_t *p)
298 __asm __volatile(MPLOCKED "incl %0; " \
300 "subl %%eax,%%eax; " \
301 MPLOCKED "btsl $31,%0; jnc 2f; " \
302 MPLOCKED "decl %0; " \
305 : "+m" (*p), "=a"(ret)
307 : : "ax", "cx", "dx");
317 atomic_intr_cond_test(atomic_intr_t *p)
319 return((int)(*p & 0x80000000));
324 atomic_intr_cond_exit(atomic_intr_t *p, void (*func)(void *), void *arg)
326 __asm __volatile(MPLOCKED "decl %0; " \
327 MPLOCKED "btrl $31,%0; " \
328 "testl $0x3FFFFFFF,%0; jz 1f; " \
329 "movq %2,%%rdi; call *%1; " \
332 : "r"(func), "m"(arg) \
333 : "ax", "cx", "dx", "di"); /* XXX clobbers more regs */
339 * Atomic compare and set, used by the mutex functions
341 * if (*dst == exp) *dst = src (all 32 bit words)
343 * Returns 0 on failure, non-zero on success
346 #if defined(__GNUC__)
349 atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
359 "# atomic_cmpset_int"
360 : "+a" (res) /* 0 (result) */
369 atomic_cmpset_long(volatile u_long *dst, u_long exp, u_long src)
379 "# atomic_cmpset_long"
380 : "+a" (res) /* 0 (result) */
387 #endif /* defined(__GNUC__) */
389 #if defined(__GNUC__)
391 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
392 static __inline u_##TYPE \
393 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
397 __asm __volatile(MPLOCKED LOP \
398 : "=a" (res), /* 0 (result) */\
406 * The XCHG instruction asserts LOCK automagically. \
408 static __inline void \
409 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
411 __asm __volatile(SOP \
412 : "+m" (*p), /* 0 */ \
418 #else /* !defined(__GNUC__) */
420 extern int atomic_cmpset_int(volatile u_int *, u_int, u_int);
421 extern int atomic_cmpset_long(volatile u_long *, u_long, u_long);
423 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \
424 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \
425 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)
427 #endif /* defined(__GNUC__) */
429 #endif /* !KLD_MODULE */
431 ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v);
432 ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v);
433 ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v);
434 ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v);
436 ATOMIC_ASM(set, short, "orw %w1,%0", "ir", v);
437 ATOMIC_ASM(clear, short, "andw %w1,%0", "ir", ~v);
438 ATOMIC_ASM(add, short, "addw %w1,%0", "ir", v);
439 ATOMIC_ASM(subtract, short, "subw %w1,%0", "ir", v);
441 ATOMIC_ASM(set, int, "orl %1,%0", "ir", v);
442 ATOMIC_ASM(clear, int, "andl %1,%0", "ir", ~v);
443 ATOMIC_ASM(add, int, "addl %1,%0", "ir", v);
444 ATOMIC_ASM(subtract, int, "subl %1,%0", "ir", v);
446 ATOMIC_ASM(set, long, "orq %1,%0", "ir", v);
447 ATOMIC_ASM(clear, long, "andq %1,%0", "ir", ~v);
448 ATOMIC_ASM(add, long, "addq %1,%0", "ir", v);
449 ATOMIC_ASM(subtract, long, "subq %1,%0", "ir", v);
451 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0");
452 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0");
453 ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0");
454 ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0");
456 #define atomic_cmpset_32 atomic_cmpset_int
459 #undef ATOMIC_STORE_LOAD
461 #define atomic_set_acq_char atomic_set_char
462 #define atomic_set_rel_char atomic_set_char
463 #define atomic_clear_acq_char atomic_clear_char
464 #define atomic_clear_rel_char atomic_clear_char
465 #define atomic_add_acq_char atomic_add_char
466 #define atomic_add_rel_char atomic_add_char
467 #define atomic_subtract_acq_char atomic_subtract_char
468 #define atomic_subtract_rel_char atomic_subtract_char
470 #define atomic_set_acq_short atomic_set_short
471 #define atomic_set_rel_short atomic_set_short
472 #define atomic_clear_acq_short atomic_clear_short
473 #define atomic_clear_rel_short atomic_clear_short
474 #define atomic_add_acq_short atomic_add_short
475 #define atomic_add_rel_short atomic_add_short
476 #define atomic_subtract_acq_short atomic_subtract_short
477 #define atomic_subtract_rel_short atomic_subtract_short
479 #define atomic_set_acq_int atomic_set_int
480 #define atomic_set_rel_int atomic_set_int
481 #define atomic_clear_acq_int atomic_clear_int
482 #define atomic_clear_rel_int atomic_clear_int
483 #define atomic_add_acq_int atomic_add_int
484 #define atomic_add_rel_int atomic_add_int
485 #define atomic_subtract_acq_int atomic_subtract_int
486 #define atomic_subtract_rel_int atomic_subtract_int
487 #define atomic_cmpset_acq_int atomic_cmpset_int
488 #define atomic_cmpset_rel_int atomic_cmpset_int
490 #define atomic_set_acq_long atomic_set_long
491 #define atomic_set_rel_long atomic_set_long
492 #define atomic_clear_acq_long atomic_clear_long
493 #define atomic_clear_rel_long atomic_clear_long
494 #define atomic_add_acq_long atomic_add_long
495 #define atomic_add_rel_long atomic_add_long
496 #define atomic_subtract_acq_long atomic_subtract_long
497 #define atomic_subtract_rel_long atomic_subtract_long
499 #define atomic_set_8 atomic_set_char
500 #define atomic_set_acq_8 atomic_set_acq_char
501 #define atomic_set_rel_8 atomic_set_rel_char
502 #define atomic_clear_8 atomic_clear_char
503 #define atomic_clear_acq_8 atomic_clear_acq_char
504 #define atomic_clear_rel_8 atomic_clear_rel_char
505 #define atomic_add_8 atomic_add_char
506 #define atomic_add_acq_8 atomic_add_acq_char
507 #define atomic_add_rel_8 atomic_add_rel_char
508 #define atomic_subtract_8 atomic_subtract_char
509 #define atomic_subtract_acq_8 atomic_subtract_acq_char
510 #define atomic_subtract_rel_8 atomic_subtract_rel_char
511 #define atomic_load_acq_8 atomic_load_acq_char
512 #define atomic_store_rel_8 atomic_store_rel_char
514 /* Operations on 16-bit words. */
515 #define atomic_set_16 atomic_set_short
516 #define atomic_set_acq_16 atomic_set_acq_short
517 #define atomic_set_rel_16 atomic_set_rel_short
518 #define atomic_clear_16 atomic_clear_short
519 #define atomic_clear_acq_16 atomic_clear_acq_short
520 #define atomic_clear_rel_16 atomic_clear_rel_short
521 #define atomic_add_16 atomic_add_short
522 #define atomic_add_acq_16 atomic_add_acq_short
523 #define atomic_add_rel_16 atomic_add_rel_short
524 #define atomic_subtract_16 atomic_subtract_short
525 #define atomic_subtract_acq_16 atomic_subtract_acq_short
526 #define atomic_subtract_rel_16 atomic_subtract_rel_short
527 #define atomic_load_acq_16 atomic_load_acq_short
528 #define atomic_store_rel_16 atomic_store_rel_short
530 /* Operations on 32-bit double words. */
531 #define atomic_set_32 atomic_set_int
532 #define atomic_set_acq_32 atomic_set_acq_int
533 #define atomic_set_rel_32 atomic_set_rel_int
534 #define atomic_clear_32 atomic_clear_int
535 #define atomic_clear_acq_32 atomic_clear_acq_int
536 #define atomic_clear_rel_32 atomic_clear_rel_int
537 #define atomic_add_32 atomic_add_int
538 #define atomic_add_acq_32 atomic_add_acq_int
539 #define atomic_add_rel_32 atomic_add_rel_int
540 #define atomic_subtract_32 atomic_subtract_int
541 #define atomic_subtract_acq_32 atomic_subtract_acq_int
542 #define atomic_subtract_rel_32 atomic_subtract_rel_int
543 #define atomic_load_acq_32 atomic_load_acq_int
544 #define atomic_store_rel_32 atomic_store_rel_int
545 #define atomic_cmpset_32 atomic_cmpset_int
546 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int
547 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int
548 #define atomic_readandclear_32 atomic_readandclear_int
549 #define atomic_fetchadd_32 atomic_fetchadd_int
551 /* Operations on pointers. */
552 #define atomic_set_ptr atomic_set_long
553 #define atomic_set_acq_ptr atomic_set_acq_long
554 #define atomic_set_rel_ptr atomic_set_rel_long
555 #define atomic_clear_ptr atomic_clear_long
556 #define atomic_clear_acq_ptr atomic_clear_acq_long
557 #define atomic_clear_rel_ptr atomic_clear_rel_long
558 #define atomic_add_ptr atomic_add_long
559 #define atomic_add_acq_ptr atomic_add_acq_long
560 #define atomic_add_rel_ptr atomic_add_rel_long
561 #define atomic_subtract_ptr atomic_subtract_long
562 #define atomic_subtract_acq_ptr atomic_subtract_acq_long
563 #define atomic_subtract_rel_ptr atomic_subtract_rel_long
564 #define atomic_load_acq_ptr atomic_load_acq_long
565 #define atomic_store_rel_ptr atomic_store_rel_long
566 #define atomic_cmpset_ptr atomic_cmpset_long
567 #define atomic_cmpset_acq_ptr atomic_cmpset_acq_long
568 #define atomic_cmpset_rel_ptr atomic_cmpset_rel_long
569 #define atomic_readandclear_ptr atomic_readandclear_long
571 #if defined(__GNUC__)
573 #if defined(KLD_MODULE)
574 extern u_int atomic_readandclear_int(volatile u_int *addr);
575 extern u_long atomic_readandclear_long(volatile u_long *addr);
576 #else /* !KLD_MODULE */
577 static __inline u_int
578 atomic_readandclear_int(volatile u_int *addr)
585 "# atomic_readandclear_int"
586 : "=&r" (result) /* 0 (result) */
587 : "m" (*addr)); /* 1 (addr) */
592 static __inline u_long
593 atomic_readandclear_long(volatile u_long *addr)
600 "# atomic_readandclear_int"
601 : "=&r" (result) /* 0 (result) */
602 : "m" (*addr)); /* 1 (addr) */
606 #endif /* KLD_MODULE */
608 #else /* !defined(__GNUC__) */
610 extern u_long atomic_readandclear_long(volatile u_long *);
611 extern u_int atomic_readandclear_int(volatile u_int *);
613 #endif /* defined(__GNUC__) */
615 #endif /* ! _CPU_ATOMIC_H_ */