kernel - Refactor the kernel message buffer code
[dragonfly.git] / sys / platform / vkernel / i386 / cpu_regs.c
CommitLineData
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1/*-
2 * Copyright (c) 1992 Terrence R. Lambert.
3 * Copyright (C) 1994, David Greenman
4 * Copyright (c) 1982, 1987, 1990, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * William Jolitz.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the University of
21 * California, Berkeley and its contributors.
22 * 4. Neither the name of the University nor the names of its contributors
23 * may be used to endorse or promote products derived from this software
24 * without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
39 * $FreeBSD: src/sys/i386/i386/machdep.c,v 1.385.2.30 2003/05/31 08:48:05 alc Exp $
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40 */
41
6f7b98e0 42#include "use_npx.h"
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43#include "opt_compat.h"
44#include "opt_ddb.h"
45#include "opt_directio.h"
46#include "opt_inet.h"
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47#include "opt_msgbuf.h"
48#include "opt_swap.h"
49
50#include <sys/param.h>
51#include <sys/systm.h>
52#include <sys/sysproto.h>
53#include <sys/signalvar.h>
54#include <sys/kernel.h>
55#include <sys/linker.h>
56#include <sys/malloc.h>
57#include <sys/proc.h>
58#include <sys/buf.h>
59#include <sys/reboot.h>
60#include <sys/mbuf.h>
61#include <sys/msgbuf.h>
62#include <sys/sysent.h>
63#include <sys/sysctl.h>
64#include <sys/vmmeter.h>
65#include <sys/bus.h>
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66#include <sys/usched.h>
67#include <sys/reg.h>
68
69#include <vm/vm.h>
70#include <vm/vm_param.h>
71#include <sys/lock.h>
72#include <vm/vm_kern.h>
73#include <vm/vm_object.h>
74#include <vm/vm_page.h>
75#include <vm/vm_map.h>
76#include <vm/vm_pager.h>
77#include <vm/vm_extern.h>
78
79#include <sys/thread2.h>
684a93c4 80#include <sys/mplock2.h>
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81
82#include <sys/user.h>
83#include <sys/exec.h>
84#include <sys/cons.h>
85
86#include <ddb/ddb.h>
87
88#include <machine/cpu.h>
89#include <machine/clock.h>
90#include <machine/specialreg.h>
91#include <machine/md_var.h>
92#include <machine/pcb_ext.h> /* pcb.h included via sys/user.h */
93#include <machine/globaldata.h> /* CPU_prvspace */
94#include <machine/smp.h>
95#ifdef PERFMON
96#include <machine/perfmon.h>
97#endif
98#include <machine/cputypes.h>
99
100#include <bus/isa/rtc.h>
101#include <machine/vm86.h>
102#include <sys/random.h>
103#include <sys/ptrace.h>
104#include <machine/sigframe.h>
b402c633 105#include <unistd.h> /* umtx_* functions */
b68e846f 106#include <pthread.h> /* pthread_yield */
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107
108extern void dblfault_handler (void);
109
110#ifndef CPU_DISABLE_SSE
111static void set_fpregs_xmm (struct save87 *, struct savexmm *);
112static void fill_fpregs_xmm (struct savexmm *, struct save87 *);
113#endif /* CPU_DISABLE_SSE */
114#ifdef DIRECTIO
115extern void ffs_rawread_setup(void);
116#endif /* DIRECTIO */
117
6f7b98e0 118int64_t tsc_offsets[MAXCPU];
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119
120#if defined(SWTCH_OPTIM_STATS)
121extern int swtch_optim_stats;
122SYSCTL_INT(_debug, OID_AUTO, swtch_optim_stats,
123 CTLFLAG_RD, &swtch_optim_stats, 0, "");
124SYSCTL_INT(_debug, OID_AUTO, tlb_flush_count,
125 CTLFLAG_RD, &tlb_flush_count, 0, "");
126#endif
127
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128static int
129sysctl_hw_physmem(SYSCTL_HANDLER_ARGS)
130{
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131 u_long pmem = ctob(physmem);
132
133 int error = sysctl_handle_long(oidp, &pmem, 0, req);
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134 return (error);
135}
136
39d69dae 137SYSCTL_PROC(_hw, HW_PHYSMEM, physmem, CTLTYPE_ULONG|CTLFLAG_RD,
9b9532a0 138 0, 0, sysctl_hw_physmem, "LU", "Total system memory in bytes (number of pages * page size)");
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139
140static int
141sysctl_hw_usermem(SYSCTL_HANDLER_ARGS)
142{
143 int error = sysctl_handle_int(oidp, 0,
71152ac6 144 ctob((int)Maxmem - vmstats.v_wire_count), req);
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145 return (error);
146}
147
148SYSCTL_PROC(_hw, HW_USERMEM, usermem, CTLTYPE_INT|CTLFLAG_RD,
149 0, 0, sysctl_hw_usermem, "IU", "");
150
201b3f37 151SYSCTL_ULONG(_hw, OID_AUTO, availpages, CTLFLAG_RD, &Maxmem, 0, "");
44afc5dc 152
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153/*
154 * Send an interrupt to process.
155 *
156 * Stack is set up to allow sigcode stored
157 * at top to call routine, followed by kcall
158 * to sigreturn routine below. After sigreturn
159 * resets the signal mask, the stack, and the
160 * frame pointer, it returns to the user
161 * specified pc, psl.
162 */
163void
164sendsig(sig_t catcher, int sig, sigset_t *mask, u_long code)
165{
166 struct lwp *lp = curthread->td_lwp;
167 struct proc *p = lp->lwp_proc;
168 struct trapframe *regs;
169 struct sigacts *psp = p->p_sigacts;
170 struct sigframe sf, *sfp;
171 int oonstack;
172
173 regs = lp->lwp_md.md_regs;
174 oonstack = (lp->lwp_sigstk.ss_flags & SS_ONSTACK) ? 1 : 0;
175
176 /* save user context */
177 bzero(&sf, sizeof(struct sigframe));
178 sf.sf_uc.uc_sigmask = *mask;
179 sf.sf_uc.uc_stack = lp->lwp_sigstk;
180 sf.sf_uc.uc_mcontext.mc_onstack = oonstack;
4e7c41c5 181 bcopy(regs, &sf.sf_uc.uc_mcontext.mc_gs, sizeof(struct trapframe));
6f7b98e0 182
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183 /* make the size of the saved context visible to userland */
184 sf.sf_uc.uc_mcontext.mc_len = sizeof(sf.sf_uc.uc_mcontext);
185
6f7b98e0 186 /* Allocate and validate space for the signal handler context. */
4643740a 187 if ((lp->lwp_flags & LWP_ALTSTACK) != 0 && !oonstack &&
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188 SIGISMEMBER(psp->ps_sigonstack, sig)) {
189 sfp = (struct sigframe *)(lp->lwp_sigstk.ss_sp +
190 lp->lwp_sigstk.ss_size - sizeof(struct sigframe));
191 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
192 }
193 else
194 sfp = (struct sigframe *)regs->tf_esp - 1;
195
196 /* Translate the signal is appropriate */
197 if (p->p_sysent->sv_sigtbl) {
198 if (sig <= p->p_sysent->sv_sigsize)
199 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
200 }
201
202 /* Build the argument list for the signal handler. */
203 sf.sf_signum = sig;
204 sf.sf_ucontext = (register_t)&sfp->sf_uc;
205 if (SIGISMEMBER(psp->ps_siginfo, sig)) {
206 /* Signal handler installed with SA_SIGINFO. */
207 sf.sf_siginfo = (register_t)&sfp->sf_si;
208 sf.sf_ahu.sf_action = (__siginfohandler_t *)catcher;
209
210 /* fill siginfo structure */
211 sf.sf_si.si_signo = sig;
212 sf.sf_si.si_code = code;
bd764d12 213 sf.sf_si.si_addr = (void*)regs->tf_err;
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214 }
215 else {
216 /* Old FreeBSD-style arguments. */
217 sf.sf_siginfo = code;
bd764d12 218 sf.sf_addr = regs->tf_err;
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219 sf.sf_ahu.sf_handler = catcher;
220 }
221
222#if 0
223 /*
224 * If we're a vm86 process, we want to save the segment registers.
225 * We also change eflags to be our emulated eflags, not the actual
226 * eflags.
227 */
228 if (regs->tf_eflags & PSL_VM) {
229 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
230 struct vm86_kernel *vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
231
232 sf.sf_uc.uc_mcontext.mc_gs = tf->tf_vm86_gs;
233 sf.sf_uc.uc_mcontext.mc_fs = tf->tf_vm86_fs;
234 sf.sf_uc.uc_mcontext.mc_es = tf->tf_vm86_es;
235 sf.sf_uc.uc_mcontext.mc_ds = tf->tf_vm86_ds;
236
237 if (vm86->vm86_has_vme == 0)
238 sf.sf_uc.uc_mcontext.mc_eflags =
239 (tf->tf_eflags & ~(PSL_VIF | PSL_VIP)) |
240 (vm86->vm86_eflags & (PSL_VIF | PSL_VIP));
241
242 /*
243 * Clear PSL_NT to inhibit T_TSSFLT faults on return from
244 * syscalls made by the signal handler. This just avoids
245 * wasting time for our lazy fixup of such faults. PSL_NT
246 * does nothing in vm86 mode, but vm86 programs can set it
247 * almost legitimately in probes for old cpu types.
248 */
249 tf->tf_eflags &= ~(PSL_VM | PSL_NT | PSL_VIF | PSL_VIP);
250 }
251#endif
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252
253 /*
254 * Save the FPU state and reinit the FP unit
255 */
256 npxpush(&sf.sf_uc.uc_mcontext);
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257
258 /*
259 * Copy the sigframe out to the user's stack.
260 */
261 if (copyout(&sf, sfp, sizeof(struct sigframe)) != 0) {
262 /*
263 * Something is wrong with the stack pointer.
264 * ...Kill the process.
265 */
b276424c 266 sigexit(lp, SIGILL);
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267 }
268
269 regs->tf_esp = (int)sfp;
270 regs->tf_eip = PS_STRINGS - *(p->p_sysent->sv_szsigcode);
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271
272 /*
273 * i386 abi specifies that the direction flag must be cleared
274 * on function entry
275 */
276 regs->tf_eflags &= ~(PSL_T|PSL_D);
277
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278 regs->tf_cs = _ucodesel;
279 regs->tf_ds = _udatasel;
280 regs->tf_es = _udatasel;
281 if (regs->tf_trapno == T_PROTFLT) {
282 regs->tf_fs = _udatasel;
283 regs->tf_gs = _udatasel;
284 }
285 regs->tf_ss = _udatasel;
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286}
287
288/*
289 * Sanitize the trapframe for a virtual kernel passing control to a custom
290 * VM context.
291 *
292 * Allow userland to set or maintain PSL_RF, the resume flag. This flag
293 * basically controls whether the return PC should skip the first instruction
294 * (as in an explicit system call) or re-execute it (as in an exception).
295 */
296int
297cpu_sanitize_frame(struct trapframe *frame)
298{
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299 frame->tf_cs = _ucodesel;
300 frame->tf_ds = _udatasel;
301 frame->tf_es = _udatasel;
302#if 0
303 frame->tf_fs = _udatasel;
304 frame->tf_gs = _udatasel;
305#endif
306 frame->tf_ss = _udatasel;
307 frame->tf_eflags &= (PSL_RF | PSL_USERCHANGE);
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308 frame->tf_eflags |= PSL_RESERVED_DEFAULT | PSL_I;
309 return(0);
310}
311
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312int
313cpu_sanitize_tls(struct savetls *tls)
314{
315 struct segment_descriptor *desc;
316 int i;
317
318 for (i = 0; i < NGTLS; ++i) {
319 desc = &tls->tls[i];
320 if (desc->sd_dpl == 0 && desc->sd_type == 0)
321 continue;
322 if (desc->sd_def32 == 0)
323 return(ENXIO);
324 if (desc->sd_type != SDT_MEMRWA)
325 return(ENXIO);
326 if (desc->sd_dpl != SEL_UPL)
327 return(ENXIO);
328 if (desc->sd_xx != 0 || desc->sd_p != 1)
329 return(ENXIO);
330 }
331 return(0);
332}
333
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334/*
335 * sigreturn(ucontext_t *sigcntxp)
336 *
337 * System call to cleanup state after a signal
338 * has been taken. Reset signal mask and
339 * stack state from context left by sendsig (above).
340 * Return to previous pc and psl as specified by
341 * context left by sendsig. Check carefully to
342 * make sure that the user has not modified the
343 * state to gain improper privileges.
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344 *
345 * MPSAFE
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346 */
347#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
348#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
349
350int
351sys_sigreturn(struct sigreturn_args *uap)
352{
353 struct lwp *lp = curthread->td_lwp;
354 struct trapframe *regs;
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355 ucontext_t ucp;
356 int cs;
357 int eflags;
358 int error;
6f7b98e0 359
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360 error = copyin(uap->sigcntxp, &ucp, sizeof(ucp));
361 if (error)
362 return (error);
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363
364 regs = lp->lwp_md.md_regs;
aaf8b91f 365 eflags = ucp.uc_mcontext.mc_eflags;
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366
367#if 0
368 if (eflags & PSL_VM) {
369 struct trapframe_vm86 *tf = (struct trapframe_vm86 *)regs;
370 struct vm86_kernel *vm86;
371
372 /*
373 * if pcb_ext == 0 or vm86_inited == 0, the user hasn't
374 * set up the vm86 area, and we can't enter vm86 mode.
375 */
376 if (lp->lwp_thread->td_pcb->pcb_ext == 0)
377 return (EINVAL);
378 vm86 = &lp->lwp_thread->td_pcb->pcb_ext->ext_vm86;
379 if (vm86->vm86_inited == 0)
380 return (EINVAL);
381
382 /* go back to user mode if both flags are set */
383 if ((eflags & PSL_VIP) && (eflags & PSL_VIF))
384 trapsignal(lp->lwp_proc, SIGBUS, 0);
385
386 if (vm86->vm86_has_vme) {
387 eflags = (tf->tf_eflags & ~VME_USERCHANGE) |
388 (eflags & VME_USERCHANGE) | PSL_VM;
389 } else {
390 vm86->vm86_eflags = eflags; /* save VIF, VIP */
391 eflags = (tf->tf_eflags & ~VM_USERCHANGE) | (eflags & VM_USERCHANGE) | PSL_VM;
392 }
aaf8b91f 393 bcopy(&ucp.uc_mcontext.mc_gs, tf, sizeof(struct trapframe));
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394 tf->tf_eflags = eflags;
395 tf->tf_vm86_ds = tf->tf_ds;
396 tf->tf_vm86_es = tf->tf_es;
397 tf->tf_vm86_fs = tf->tf_fs;
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398 tf->tf_vm86_gs = tf->tf_gs;
399 tf->tf_ds = _udatasel;
400 tf->tf_es = _udatasel;
401#if 0
402 tf->tf_fs = _udatasel;
403 tf->tf_gs = _udatasel;
404#endif
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405 } else
406#endif
407 {
408 /*
409 * Don't allow users to change privileged or reserved flags.
410 */
411 /*
412 * XXX do allow users to change the privileged flag PSL_RF.
413 * The cpu sets PSL_RF in tf_eflags for faults. Debuggers
414 * should sometimes set it there too. tf_eflags is kept in
415 * the signal context during signal handling and there is no
416 * other place to remember it, so the PSL_RF bit may be
417 * corrupted by the signal handler without us knowing.
418 * Corruption of the PSL_RF bit at worst causes one more or
419 * one less debugger trap, so allowing it is fairly harmless.
420 */
421 if (!EFL_SECURE(eflags & ~PSL_RF, regs->tf_eflags & ~PSL_RF)) {
422 kprintf("sigreturn: eflags = 0x%x\n", eflags);
423 return(EINVAL);
424 }
425
426 /*
427 * Don't allow users to load a valid privileged %cs. Let the
428 * hardware check for invalid selectors, excess privilege in
429 * other selectors, invalid %eip's and invalid %esp's.
430 */
aaf8b91f 431 cs = ucp.uc_mcontext.mc_cs;
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432 if (!CS_SECURE(cs)) {
433 kprintf("sigreturn: cs = 0x%x\n", cs);
08f2f1bb 434 trapsignal(lp, SIGBUS, T_PROTFLT);
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435 return(EINVAL);
436 }
aaf8b91f 437 bcopy(&ucp.uc_mcontext.mc_gs, regs, sizeof(struct trapframe));
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438 }
439
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440 /*
441 * Restore the FPU state from the frame
442 */
3919ced0 443 crit_enter();
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444 npxpop(&ucp.uc_mcontext);
445
aaf8b91f 446 if (ucp.uc_mcontext.mc_onstack & 1)
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447 lp->lwp_sigstk.ss_flags |= SS_ONSTACK;
448 else
449 lp->lwp_sigstk.ss_flags &= ~SS_ONSTACK;
450
aaf8b91f 451 lp->lwp_sigmask = ucp.uc_sigmask;
6f7b98e0 452 SIG_CANTMASK(lp->lwp_sigmask);
3919ced0 453 crit_exit();
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454 return(EJUSTRETURN);
455}
456
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457/*
458 * cpu_idle() represents the idle LWKT. You cannot return from this function
459 * (unless you want to blow things up!). Instead we look for runnable threads
460 * and loop or halt as appropriate. Giant is not held on entry to the thread.
461 *
462 * The main loop is entered with a critical section held, we must release
463 * the critical section before doing anything else. lwkt_switch() will
464 * check for pending interrupts due to entering and exiting its own
465 * critical section.
466 *
467 * Note on cpu_idle_hlt: On an SMP system we rely on a scheduler IPI
b12defdc 468 * to wake a HLTed cpu up.
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469 */
470static int cpu_idle_hlt = 1;
471static int cpu_idle_hltcnt;
472static int cpu_idle_spincnt;
473SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hlt, CTLFLAG_RW,
474 &cpu_idle_hlt, 0, "Idle loop HLT enable");
475SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_hltcnt, CTLFLAG_RW,
476 &cpu_idle_hltcnt, 0, "Idle loop entry halts");
477SYSCTL_INT(_machdep, OID_AUTO, cpu_idle_spincnt, CTLFLAG_RW,
478 &cpu_idle_spincnt, 0, "Idle loop entry spins");
479
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480void
481cpu_idle(void)
482{
483 struct thread *td = curthread;
b402c633 484 struct mdglobaldata *gd = mdcpu;
c5724852 485 int reqflags;
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486
487 crit_exit();
f9235b6d 488 KKASSERT(td->td_critcount == 0);
792a98ed 489 cpu_enable_intr();
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490 for (;;) {
491 /*
492 * See if there are any LWKTs ready to go.
493 */
494 lwkt_switch();
495
496 /*
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497 * The idle loop halts only if no threads are scheduleable
498 * and no signals have occured.
6f7b98e0 499 */
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500 if (cpu_idle_hlt &&
501 (td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
6f7b98e0 502 splz();
b5d16701 503 KKASSERT(MP_LOCK_HELD() == 0);
cbdd23b1 504 if ((td->td_gd->gd_reqflags & RQF_IDLECHECK_WK_MASK) == 0) {
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505#ifdef DEBUGIDLE
506 struct timeval tv1, tv2;
507 gettimeofday(&tv1, NULL);
508#endif
c5724852 509 reqflags = gd->mi.gd_reqflags &
cbdd23b1 510 ~RQF_IDLECHECK_WK_MASK;
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511 umtx_sleep(&gd->mi.gd_reqflags, reqflags,
512 1000000);
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513#ifdef DEBUGIDLE
514 gettimeofday(&tv2, NULL);
515 if (tv2.tv_usec - tv1.tv_usec +
516 (tv2.tv_sec - tv1.tv_sec) * 1000000
517 > 500000) {
518 kprintf("cpu %d idlelock %08x %08x\n",
519 gd->mi.gd_cpuid,
f9235b6d 520 gd->mi.gd_reqflags,
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521 gd->gd_fpending);
522 }
523#endif
524 }
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525 ++cpu_idle_hltcnt;
526 } else {
6f7b98e0 527 splz();
6f7b98e0 528 __asm __volatile("pause");
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529 ++cpu_idle_spincnt;
530 }
531 }
532}
533
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534/*
535 * Called by the spinlock code with or without a critical section held
536 * when a spinlock is found to be seriously constested.
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537 *
538 * We need to enter a critical section to prevent signals from recursing
539 * into pthreads.
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540 */
541void
542cpu_spinlock_contested(void)
543{
c5724852 544 cpu_pause();
06615ccb
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545}
546
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547/*
548 * Clear registers on exec
549 */
550void
08f2f1bb 551exec_setregs(u_long entry, u_long stack, u_long ps_strings)
6f7b98e0 552{
08f2f1bb
SS
553 struct thread *td = curthread;
554 struct lwp *lp = td->td_lwp;
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555 struct trapframe *regs = lp->lwp_md.md_regs;
556 struct pcb *pcb = lp->lwp_thread->td_pcb;
557
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558 /* was i386_user_cleanup() in NetBSD */
559 user_ldt_free(pcb);
560
561 bzero((char *)regs, sizeof(struct trapframe));
562 regs->tf_eip = entry;
563 regs->tf_esp = stack;
564 regs->tf_eflags = PSL_USER | (regs->tf_eflags & PSL_T);
565 regs->tf_ss = 0;
566 regs->tf_ds = 0;
567 regs->tf_es = 0;
568 regs->tf_fs = 0;
4e7c41c5 569 regs->tf_gs = 0;
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570 regs->tf_cs = 0;
571
572 /* PS_STRINGS value for BSD/OS binaries. It is 0 for non-BSD/OS. */
573 regs->tf_ebx = ps_strings;
574
575 /*
576 * Reset the hardware debug registers if they were in use.
577 * They won't have any meaning for the newly exec'd process.
578 */
579 if (pcb->pcb_flags & PCB_DBREGS) {
580 pcb->pcb_dr0 = 0;
581 pcb->pcb_dr1 = 0;
582 pcb->pcb_dr2 = 0;
583 pcb->pcb_dr3 = 0;
584 pcb->pcb_dr6 = 0;
585 pcb->pcb_dr7 = 0;
08f2f1bb 586 if (pcb == td->td_pcb) {
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587 /*
588 * Clear the debug registers on the running
589 * CPU, otherwise they will end up affecting
590 * the next process we switch to.
591 */
592 reset_dbregs();
593 }
594 pcb->pcb_flags &= ~PCB_DBREGS;
595 }
596
597 /*
598 * Initialize the math emulator (if any) for the current process.
599 * Actually, just clear the bit that says that the emulator has
600 * been initialized. Initialization is delayed until the process
601 * traps to the emulator (if it is done at all) mainly because
602 * emulators don't provide an entry point for initialization.
603 */
08f2f1bb 604 pcb->pcb_flags &= ~FP_SOFTFP;
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605
606 /*
607 * note: do not set CR0_TS here. npxinit() must do it after clearing
608 * gd_npxthread. Otherwise a preemptive interrupt thread may panic
609 * in npxdna().
610 */
611 crit_enter();
612#if 0
613 load_cr0(rcr0() | CR0_MP);
614#endif
615
616#if NNPX > 0
617 /* Initialize the npx (if any) for the current process. */
c2fedf50 618 npxinit();
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619#endif
620 crit_exit();
621
622 /*
623 * note: linux emulator needs edx to be 0x0 on entry, which is
624 * handled in execve simply by setting the 64 bit syscall
625 * return value to 0.
626 */
627}
628
629void
630cpu_setregs(void)
631{
632#if 0
633 unsigned int cr0;
634
635 cr0 = rcr0();
636 cr0 |= CR0_NE; /* Done by npxinit() */
637 cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
4db955e1 638 cr0 |= CR0_WP | CR0_AM;
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639 load_cr0(cr0);
640 load_gs(_udatasel);
641#endif
642}
643
644static int
645sysctl_machdep_adjkerntz(SYSCTL_HANDLER_ARGS)
646{
647 int error;
648 error = sysctl_handle_int(oidp, oidp->oid_arg1, oidp->oid_arg2,
649 req);
650 if (!error && req->newptr)
651 resettodr();
652 return (error);
653}
654
655SYSCTL_PROC(_machdep, CPU_ADJKERNTZ, adjkerntz, CTLTYPE_INT|CTLFLAG_RW,
656 &adjkerntz, 0, sysctl_machdep_adjkerntz, "I", "");
657
658extern u_long bootdev; /* not a cdev_t - encoding is different */
659SYSCTL_ULONG(_machdep, OID_AUTO, guessed_bootdev,
660 CTLFLAG_RD, &bootdev, 0, "Boot device (not in cdev_t format)");
661
662/*
663 * Initialize 386 and configure to run kernel
664 */
665
666/*
667 * Initialize segments & interrupt table
668 */
669
670extern struct user *proc0paddr;
671
672#if 0
673
674extern inthand_t
675 IDTVEC(div), IDTVEC(dbg), IDTVEC(nmi), IDTVEC(bpt), IDTVEC(ofl),
676 IDTVEC(bnd), IDTVEC(ill), IDTVEC(dna), IDTVEC(fpusegm),
677 IDTVEC(tss), IDTVEC(missing), IDTVEC(stk), IDTVEC(prot),
678 IDTVEC(page), IDTVEC(mchk), IDTVEC(fpu), IDTVEC(align),
679 IDTVEC(xmm), IDTVEC(syscall),
680 IDTVEC(rsvd0);
681extern inthand_t
682 IDTVEC(int0x80_syscall);
683
684#endif
685
686#ifdef DEBUG_INTERRUPTS
687extern inthand_t *Xrsvdary[256];
688#endif
689
690int
08f2f1bb 691ptrace_set_pc(struct lwp *lp, unsigned long addr)
6f7b98e0 692{
08f2f1bb 693 lp->lwp_md.md_regs->tf_eip = addr;
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694 return (0);
695}
696
697int
698ptrace_single_step(struct lwp *lp)
699{
700 lp->lwp_md.md_regs->tf_eflags |= PSL_T;
701 return (0);
702}
703
704int
705fill_regs(struct lwp *lp, struct reg *regs)
706{
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707 struct trapframe *tp;
708
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709 if ((tp = lp->lwp_md.md_regs) == NULL)
710 return EINVAL;
4e7c41c5 711 regs->r_gs = tp->tf_gs;
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712 regs->r_fs = tp->tf_fs;
713 regs->r_es = tp->tf_es;
714 regs->r_ds = tp->tf_ds;
715 regs->r_edi = tp->tf_edi;
716 regs->r_esi = tp->tf_esi;
717 regs->r_ebp = tp->tf_ebp;
718 regs->r_ebx = tp->tf_ebx;
719 regs->r_edx = tp->tf_edx;
720 regs->r_ecx = tp->tf_ecx;
721 regs->r_eax = tp->tf_eax;
722 regs->r_eip = tp->tf_eip;
723 regs->r_cs = tp->tf_cs;
724 regs->r_eflags = tp->tf_eflags;
725 regs->r_esp = tp->tf_esp;
726 regs->r_ss = tp->tf_ss;
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727 return (0);
728}
729
730int
731set_regs(struct lwp *lp, struct reg *regs)
732{
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733 struct trapframe *tp;
734
735 tp = lp->lwp_md.md_regs;
736 if (!EFL_SECURE(regs->r_eflags, tp->tf_eflags) ||
737 !CS_SECURE(regs->r_cs))
738 return (EINVAL);
4e7c41c5 739 tp->tf_gs = regs->r_gs;
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740 tp->tf_fs = regs->r_fs;
741 tp->tf_es = regs->r_es;
742 tp->tf_ds = regs->r_ds;
743 tp->tf_edi = regs->r_edi;
744 tp->tf_esi = regs->r_esi;
745 tp->tf_ebp = regs->r_ebp;
746 tp->tf_ebx = regs->r_ebx;
747 tp->tf_edx = regs->r_edx;
748 tp->tf_ecx = regs->r_ecx;
749 tp->tf_eax = regs->r_eax;
750 tp->tf_eip = regs->r_eip;
751 tp->tf_cs = regs->r_cs;
752 tp->tf_eflags = regs->r_eflags;
753 tp->tf_esp = regs->r_esp;
754 tp->tf_ss = regs->r_ss;
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755 return (0);
756}
757
758#ifndef CPU_DISABLE_SSE
759static void
760fill_fpregs_xmm(struct savexmm *sv_xmm, struct save87 *sv_87)
761{
762 struct env87 *penv_87 = &sv_87->sv_env;
763 struct envxmm *penv_xmm = &sv_xmm->sv_env;
764 int i;
765
766 /* FPU control/status */
767 penv_87->en_cw = penv_xmm->en_cw;
768 penv_87->en_sw = penv_xmm->en_sw;
769 penv_87->en_tw = penv_xmm->en_tw;
770 penv_87->en_fip = penv_xmm->en_fip;
771 penv_87->en_fcs = penv_xmm->en_fcs;
772 penv_87->en_opcode = penv_xmm->en_opcode;
773 penv_87->en_foo = penv_xmm->en_foo;
774 penv_87->en_fos = penv_xmm->en_fos;
775
776 /* FPU registers */
777 for (i = 0; i < 8; ++i)
778 sv_87->sv_ac[i] = sv_xmm->sv_fp[i].fp_acc;
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779}
780
781static void
782set_fpregs_xmm(struct save87 *sv_87, struct savexmm *sv_xmm)
783{
784 struct env87 *penv_87 = &sv_87->sv_env;
785 struct envxmm *penv_xmm = &sv_xmm->sv_env;
786 int i;
787
788 /* FPU control/status */
789 penv_xmm->en_cw = penv_87->en_cw;
790 penv_xmm->en_sw = penv_87->en_sw;
791 penv_xmm->en_tw = penv_87->en_tw;
792 penv_xmm->en_fip = penv_87->en_fip;
793 penv_xmm->en_fcs = penv_87->en_fcs;
794 penv_xmm->en_opcode = penv_87->en_opcode;
795 penv_xmm->en_foo = penv_87->en_foo;
796 penv_xmm->en_fos = penv_87->en_fos;
797
798 /* FPU registers */
799 for (i = 0; i < 8; ++i)
800 sv_xmm->sv_fp[i].fp_acc = sv_87->sv_ac[i];
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801}
802#endif /* CPU_DISABLE_SSE */
803
804int
805fill_fpregs(struct lwp *lp, struct fpreg *fpregs)
806{
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807 if (lp->lwp_thread == NULL || lp->lwp_thread->td_pcb == NULL)
808 return EINVAL;
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809#ifndef CPU_DISABLE_SSE
810 if (cpu_fxsr) {
811 fill_fpregs_xmm(&lp->lwp_thread->td_pcb->pcb_save.sv_xmm,
812 (struct save87 *)fpregs);
813 return (0);
814 }
815#endif /* CPU_DISABLE_SSE */
816 bcopy(&lp->lwp_thread->td_pcb->pcb_save.sv_87, fpregs, sizeof *fpregs);
817 return (0);
818}
819
820int
821set_fpregs(struct lwp *lp, struct fpreg *fpregs)
822{
823#ifndef CPU_DISABLE_SSE
824 if (cpu_fxsr) {
825 set_fpregs_xmm((struct save87 *)fpregs,
826 &lp->lwp_thread->td_pcb->pcb_save.sv_xmm);
827 return (0);
828 }
829#endif /* CPU_DISABLE_SSE */
830 bcopy(fpregs, &lp->lwp_thread->td_pcb->pcb_save.sv_87, sizeof *fpregs);
831 return (0);
832}
833
834int
835fill_dbregs(struct lwp *lp, struct dbreg *dbregs)
836{
956a62ec 837 return (ENOSYS);
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838}
839
840int
841set_dbregs(struct lwp *lp, struct dbreg *dbregs)
842{
956a62ec 843 return (ENOSYS);
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844}
845
846#if 0
847/*
848 * Return > 0 if a hardware breakpoint has been hit, and the
849 * breakpoint was in user space. Return 0, otherwise.
850 */
851int
852user_dbreg_trap(void)
853{
854 u_int32_t dr7, dr6; /* debug registers dr6 and dr7 */
855 u_int32_t bp; /* breakpoint bits extracted from dr6 */
856 int nbp; /* number of breakpoints that triggered */
857 caddr_t addr[4]; /* breakpoint addresses */
858 int i;
859
860 dr7 = rdr7();
861 if ((dr7 & 0x000000ff) == 0) {
862 /*
863 * all GE and LE bits in the dr7 register are zero,
864 * thus the trap couldn't have been caused by the
865 * hardware debug registers
866 */
867 return 0;
868 }
869
870 nbp = 0;
871 dr6 = rdr6();
872 bp = dr6 & 0x0000000f;
873
874 if (!bp) {
875 /*
876 * None of the breakpoint bits are set meaning this
877 * trap was not caused by any of the debug registers
878 */
879 return 0;
880 }
881
882 /*
883 * at least one of the breakpoints were hit, check to see
884 * which ones and if any of them are user space addresses
885 */
886
887 if (bp & 0x01) {
888 addr[nbp++] = (caddr_t)rdr0();
889 }
890 if (bp & 0x02) {
891 addr[nbp++] = (caddr_t)rdr1();
892 }
893 if (bp & 0x04) {
894 addr[nbp++] = (caddr_t)rdr2();
895 }
896 if (bp & 0x08) {
897 addr[nbp++] = (caddr_t)rdr3();
898 }
899
900 for (i=0; i<nbp; i++) {
901 if (addr[i] <
902 (caddr_t)VM_MAX_USER_ADDRESS) {
903 /*
904 * addr[i] is in user space
905 */
906 return nbp;
907 }
908 }
909
910 /*
911 * None of the breakpoints are in user space.
912 */
913 return 0;
914}
915
916#endif
917
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918void
919identcpu(void)
920{
921 int regs[4];
922
923 do_cpuid(1, regs);
924 cpu_feature = regs[3];
925}
926
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927
928#ifndef DDB
929void
930Debugger(const char *msg)
931{
932 kprintf("Debugger(\"%s\") called.\n", msg);
933}
934#endif /* no DDB */
935