Add missing MODULE_DEPEND().
[dragonfly.git] / sys / dev / netif / acx / if_acx.c
CommitLineData
287603a8
SZ
1/*
2 * Copyright (c) 2006 The DragonFly Project. All rights reserved.
3 *
4 * This code is derived from software contributed to The DragonFly Project
5 * by Sepherosa Ziehau <sepherosa@gmail.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * 3. Neither the name of The DragonFly Project nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific, prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
86b51456 34 * $DragonFly: src/sys/dev/netif/acx/if_acx.c,v 1.6 2006/09/03 05:05:25 sephe Exp $
287603a8
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35 */
36
37/*
38 * Copyright (c) 2003-2004 wlan.kewl.org Project
39 * All rights reserved.
40 *
41 * $Id: LICENSE,v 1.1.1.1 2004/07/01 12:20:39 darron Exp $
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 *
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 *
50 * 2. Redistributions in binary form must reproduce the above copyright
51 * notice, this list of conditions and the following disclaimer in the
52 * documentation and/or other materials provided with the distribution.
53 *
54 * 3. All advertising materials mentioning features or use of this software
55 * must display the following acknowledgement:
56 *
57 * This product includes software developed by the wlan.kewl.org Project.
58 *
59 * 4. Neither the name of the wlan.kewl.org Project nor the names of its
60 * contributors may be used to endorse or promote products derived from
61 * this software without specific prior written permission.
62 *
63 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
64 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
65 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
66 * THE wlan.kewl.org Project BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
67 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
68 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
69 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
70 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
71 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
72 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
73 */
74
75#include <sys/param.h>
76#include <sys/endian.h>
77#include <sys/kernel.h>
78#include <sys/bus.h>
79#include <sys/malloc.h>
80#include <sys/proc.h>
81#include <sys/rman.h>
82#include <sys/serialize.h>
83#include <sys/socket.h>
84#include <sys/sockio.h>
85#include <sys/sysctl.h>
86
87#include <machine/bus.h>
88#include <machine/resource.h>
89
90#include <net/ethernet.h>
91#include <net/if.h>
92#include <net/bpf.h>
93#include <net/if_arp.h>
94#include <net/if_dl.h>
95#include <net/if_media.h>
96#include <net/ifq_var.h>
97
98#include <netproto/802_11/ieee80211_var.h>
99
100#include <bus/pci/pcireg.h>
101#include <bus/pci/pcivar.h>
102#include <bus/pci/pcidevs.h>
103
104#define ACX_DEBUG
105
106#include "if_acxreg.h"
107#include "if_acxvar.h"
108#include "acxcmd.h"
109
110#define ACX_ENABLE_TXCHAN(sc, chan) \
111do { \
112 if (acx_enable_txchan((sc), (chan)) != 0) { \
113 if_printf(&(sc)->sc_ic.ic_if, \
114 "enable TX on channel %d failed\n", (chan)); \
115 } \
116} while (0)
117
118#define ACX_ENABLE_RXCHAN(sc, chan) \
119do { \
120 if (acx_enable_rxchan((sc), (chan)) != 0) { \
121 if_printf(&(sc)->sc_ic.ic_if, \
122 "enable RX on channel %d failed\n", (chan)); \
123 } \
124} while (0)
125
126#define SIOCSLOADFW _IOW('i', 137, struct ifreq) /* load firmware */
127#define SIOCGRADIO _IOW('i', 138, struct ifreq) /* get radio type */
128#define SIOCGSTATS _IOW('i', 139, struct ifreq) /* get acx stats */
129#define SIOCSKILLFW _IOW('i', 140, struct ifreq) /* free firmware */
130#define SIOCGFWVER _IOW('i', 141, struct ifreq) /* get firmware ver */
131#define SIOCGHWID _IOW('i', 142, struct ifreq) /* get hardware id */
132
133static int acx_probe(device_t);
134static int acx_attach(device_t);
135static int acx_detach(device_t);
136static int acx_shutdown(device_t);
137
138static void acx_init(void *);
139static int acx_stop(struct acx_softc *);
140static void acx_init_info_reg(struct acx_softc *);
141static int acx_config(struct acx_softc *);
142static int acx_read_config(struct acx_softc *, struct acx_config *);
143static int acx_write_config(struct acx_softc *, struct acx_config *);
44fd189c 144static int acx_set_crypt_keys(struct acx_softc *);
841ab66c 145#ifdef foo
287603a8 146static void acx_begin_scan(struct acx_softc *);
841ab66c 147#endif
287603a8
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148static void acx_next_scan(void *);
149
150static void acx_start(struct ifnet *);
151static void acx_watchdog(struct ifnet *);
152
153static int acx_ioctl(struct ifnet *, u_long, caddr_t, struct ucred *);
154
155static void acx_intr(void *);
156static void acx_disable_intr(struct acx_softc *);
157static void acx_enable_intr(struct acx_softc *);
158static void acx_txeof(struct acx_softc *);
159static void acx_txerr(struct acx_softc *, uint8_t);
160static void acx_rxeof(struct acx_softc *);
161
162static int acx_dma_alloc(struct acx_softc *);
163static void acx_dma_free(struct acx_softc *);
164static int acx_init_tx_ring(struct acx_softc *);
165static int acx_init_rx_ring(struct acx_softc *);
166static int acx_newbuf(struct acx_softc *, struct acx_rxbuf *, int);
167static int acx_encap(struct acx_softc *, struct acx_txbuf *,
7427ac33 168 struct mbuf *, struct ieee80211_node *);
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169
170static int acx_reset(struct acx_softc *);
171
172static int acx_set_null_tmplt(struct acx_softc *);
173static int acx_set_probe_req_tmplt(struct acx_softc *, const char *, int);
7427ac33
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174static int acx_set_probe_resp_tmplt(struct acx_softc *,
175 struct ieee80211_node *);
176static int acx_set_beacon_tmplt(struct acx_softc *,
177 struct ieee80211_node *);
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178
179static int acx_read_eeprom(struct acx_softc *, uint32_t, uint8_t *);
180static int acx_read_phyreg(struct acx_softc *, uint32_t, uint8_t *);
181
182static int acx_copyin_firmware(struct acx_softc *, struct ifreq *);
183static void acx_free_firmware(struct acx_softc *);
184static int acx_load_firmware(struct acx_softc *, uint32_t,
185 const uint8_t *, int);
186static int acx_load_radio_firmware(struct acx_softc *, const uint8_t *,
187 uint32_t);
188static int acx_load_base_firmware(struct acx_softc *, const uint8_t *,
189 uint32_t);
190
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191static int acx_newstate(struct ieee80211com *, enum ieee80211_state, int);
192
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193static int acx_sysctl_msdu_lifetime(SYSCTL_HANDLER_ARGS);
194
195const struct ieee80211_rateset acx_rates_11b =
196 { 4, { 2, 4, 11, 22 } };
197const struct ieee80211_rateset acx_rates_11g =
198 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
199
200static int acx_chanscan_rate = 5; /* 5/second */
201int acx_beacon_intvl = 100; /* 100 TU */
202
203static const struct acx_device {
204 uint16_t vid;
205 uint16_t did;
206 void (*set_param)(device_t);
207 const char *desc;
208} acx_devices[] = {
209 { PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX100A, acx100_set_param,
210 "Texas Instruments TNETW1100A Wireless Adapter" },
211 { PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX100B, acx100_set_param,
212 "Texas Instruments TNETW1100B Wireless Adapter" },
213 { PCI_VENDOR_TI, PCI_PRODUCT_TI_ACX111, acx111_set_param,
214 "Texas Instruments TNETW1130 Wireless Adapter" },
215 { 0, 0, NULL, NULL }
216};
217
218static device_method_t acx_methods[] = {
219 DEVMETHOD(device_probe, acx_probe),
220 DEVMETHOD(device_attach, acx_attach),
221 DEVMETHOD(device_detach, acx_detach),
222 DEVMETHOD(device_shutdown, acx_shutdown),
223#if 0
224 DEVMETHOD(device_suspend, acx_suspend),
225 DEVMETHOD(device_resume, acx_resume),
226#endif
227 { 0, 0 }
228};
229
230static driver_t acx_driver = {
231 "acx",
232 acx_methods,
233 sizeof(struct acx_softc)
234};
235
236static devclass_t acx_devclass;
237
238DRIVER_MODULE(acx, pci, acx_driver, acx_devclass, 0, 0);
239DRIVER_MODULE(acx, cardbus, acx_driver, acx_devclass, 0, 0);
240
241MODULE_DEPEND(acx, wlan, 1, 1, 1);
86b51456
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242MODULE_DEPEND(acx, wlan_ratectl_onoe, 1, 1, 1);
243MODULE_DEPEND(acx, wlan_ratectl_amrr, 1, 1, 1);
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244MODULE_DEPEND(acx, pci, 1, 1, 1);
245MODULE_DEPEND(acx, cardbus, 1, 1, 1);
246
247static int
248acx_probe(device_t dev)
249{
250 const struct acx_device *a;
251 uint16_t did, vid;
252
253 vid = pci_get_vendor(dev);
254 did = pci_get_device(dev);
255 for (a = acx_devices; a->desc != NULL; ++a) {
256 if (vid == a->vid && did == a->did) {
257 a->set_param(dev);
258 device_set_desc(dev, a->desc);
259 return 0;
260 }
261 }
262 return ENXIO;
263}
264
265static int
266acx_attach(device_t dev)
267{
268 struct acx_softc *sc;
269 struct ifnet *ifp;
270 struct ieee80211com *ic;
271 int i, error;
272
273 sc = device_get_softc(dev);
274 ic = &sc->sc_ic;
275 ifp = &ic->ic_if;
276
277 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
278
279#ifndef BURN_BRIDGES
280 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
281 uint32_t mem1, mem2, irq;
282
283 mem1 = pci_read_config(dev, sc->chip_mem1_rid, 4);
284 mem2 = pci_read_config(dev, sc->chip_mem2_rid, 4);
285 irq = pci_read_config(dev, PCIR_INTLINE, 4);
286
287 device_printf(dev, "chip is in D%d power mode "
288 "-- setting to D0\n", pci_get_powerstate(dev));
289
290 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
291
292 pci_write_config(dev, sc->chip_mem1_rid, mem1, 4);
293 pci_write_config(dev, sc->chip_mem2_rid, mem2, 4);
294 pci_write_config(dev, PCIR_INTLINE, irq, 4);
295 }
296#endif /* !BURN_BRIDGE */
297
298 /* Enable bus mastering */
299 pci_enable_busmaster(dev);
300
301 /* Allocate IO memory 1 */
302 sc->sc_mem1_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
303 &sc->chip_mem1_rid,
304 RF_ACTIVE);
305 if (sc->sc_mem1_res == NULL) {
306 error = ENXIO;
307 device_printf(dev, "can't allocate IO mem1\n");
308 goto fail;
309 }
310 sc->sc_mem1_bt = rman_get_bustag(sc->sc_mem1_res);
311 sc->sc_mem1_bh = rman_get_bushandle(sc->sc_mem1_res);
312
313 /* Allocate IO memory 2 */
314 sc->sc_mem2_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
315 &sc->chip_mem2_rid,
316 RF_ACTIVE);
317 if (sc->sc_mem2_res == NULL) {
318 error = ENXIO;
319 device_printf(dev, "can't allocate IO mem2\n");
320 goto fail;
321 }
322 sc->sc_mem2_bt = rman_get_bustag(sc->sc_mem2_res);
323 sc->sc_mem2_bh = rman_get_bushandle(sc->sc_mem2_res);
324
325 /* Allocate irq */
326 sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
327 &sc->sc_irq_rid,
328 RF_SHAREABLE | RF_ACTIVE);
329 if (sc->sc_irq_res == NULL) {
330 error = ENXIO;
331 device_printf(dev, "can't allocate intr\n");
332 goto fail;
333 }
334
335 /* Initilize channel scanning timer */
336 callout_init(&sc->sc_chanscan_timer);
337
338 /* Allocate busdma stuffs */
339 error = acx_dma_alloc(sc);
340 if (error)
341 goto fail;
342
343 /* Reset Hardware */
344 error = acx_reset(sc);
345 if (error)
346 goto fail;
347
348 /* Disable interrupts before firmware is loaded */
349 acx_disable_intr(sc);
350
351 /* Get radio type and form factor */
352#define EEINFO_RETRY_MAX 50
353 for (i = 0; i < EEINFO_RETRY_MAX; ++i) {
354 uint16_t ee_info;
355
356 ee_info = CSR_READ_2(sc, ACXREG_EEPROM_INFO);
357 if (ACX_EEINFO_HAS_RADIO_TYPE(ee_info)) {
358 sc->sc_form_factor = ACX_EEINFO_FORM_FACTOR(ee_info);
359 sc->sc_radio_type = ACX_EEINFO_RADIO_TYPE(ee_info);
360 break;
361 }
362 DELAY(10000);
363 }
364 if (i == EEINFO_RETRY_MAX) {
365 error = ENXIO;
366 goto fail;
367 }
368#undef EEINFO_RETRY_MAX
369
370 DPRINTF((&sc->sc_ic.ic_if, "radio type %02x\n", sc->sc_radio_type));
371
372#ifdef DUMP_EEPROM
373 for (i = 0; i < 0x40; ++i) {
374 uint8_t val;
375
376 error = acx_read_eeprom(sc, i, &val);
377 if (i % 10 == 0)
378 printf("\n");
379 printf("%02x ", val);
380 }
381 printf("\n");
382#endif /* DUMP_EEPROM */
383
384 /* Get EEPROM version */
385 error = acx_read_eeprom(sc, ACX_EE_VERSION_OFS, &sc->sc_eeprom_ver);
386 if (error)
387 goto fail;
388 DPRINTF((&sc->sc_ic.ic_if, "EEPROM version %u\n", sc->sc_eeprom_ver));
389
390 ifp->if_softc = sc;
391 ifp->if_init = acx_init;
392 ifp->if_ioctl = acx_ioctl;
393 ifp->if_start = acx_start;
394 ifp->if_watchdog = acx_watchdog;
395 ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST;
396 ifq_set_maxlen(&ifp->if_snd, IFQ_MAXLEN);
397 ifq_set_ready(&ifp->if_snd);
398
399 /* Set channels */
400 for (i = 1; i <= 14; ++i) {
401 ic->ic_channels[i].ic_freq =
402 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
403 ic->ic_channels[i].ic_flags = sc->chip_chan_flags;
404 }
405
406 ic->ic_opmode = IEEE80211_M_STA;
407 ic->ic_state = IEEE80211_S_INIT;
7427ac33 408 ic->ic_bintval = acx_beacon_intvl;
287603a8 409
44fd189c
SZ
410 /*
411 * NOTE: Don't overwrite ic_caps set by chip specific code
412 */
413 ic->ic_caps |= IEEE80211_C_WEP | /* WEP */
7427ac33 414 IEEE80211_C_HOSTAP | /* Host AP modes */
44fd189c
SZ
415 IEEE80211_C_IBSS | /* IBSS modes */
416 IEEE80211_C_SHPREAMBLE; /* Short preamble */
287603a8
SZ
417
418 /* Get station id */
419 for (i = 0; i < IEEE80211_ADDR_LEN; ++i) {
420 error = acx_read_eeprom(sc, sc->chip_ee_eaddr_ofs - i,
421 &ic->ic_myaddr[i]);
422 }
423
841ab66c 424 ieee80211_ifattach(ic);
287603a8 425
287603a8
SZ
426 /* Override newstate */
427 sc->sc_newstate = ic->ic_newstate;
428 ic->ic_newstate = acx_newstate;
429
841ab66c 430 ieee80211_media_init(ic, ieee80211_media_change, ieee80211_media_status);
287603a8 431
287603a8 432 sc->sc_long_retry_limit = 4;
287603a8
SZ
433 sc->sc_msdu_lifetime = 4096;
434
435 sysctl_ctx_init(&sc->sc_sysctl_ctx);
436 sc->sc_sysctl_tree = SYSCTL_ADD_NODE(&sc->sc_sysctl_ctx,
437 SYSCTL_STATIC_CHILDREN(_hw),
438 OID_AUTO,
439 device_get_nameunit(dev),
440 CTLFLAG_RD, 0, "");
441 if (sc->sc_sysctl_tree == NULL) {
442 device_printf(dev, "can't add sysctl node\n");
443 error = ENXIO;
444 goto fail1;
445 }
446
287603a8
SZ
447 SYSCTL_ADD_PROC(&sc->sc_sysctl_ctx,
448 SYSCTL_CHILDREN(sc->sc_sysctl_tree),
449 OID_AUTO, "msdu_lifetime",
450 CTLTYPE_INT | CTLFLAG_RW,
451 sc, 0, acx_sysctl_msdu_lifetime, "I",
452 "MSDU life time");
453
454 error = bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE, acx_intr, sc,
455 &sc->sc_irq_handle, ifp->if_serializer);
456 if (error) {
457 device_printf(dev, "can't set up interrupt\n");
458 goto fail1;
459 }
460
841ab66c
SZ
461 if (bootverbose)
462 ieee80211_announce(ic);
463
287603a8
SZ
464 return 0;
465fail1:
841ab66c 466 ieee80211_ifdetach(ic);
287603a8
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467fail:
468 acx_detach(dev);
469 return error;
470}
471
472static int
473acx_detach(device_t dev)
474{
475 struct acx_softc *sc = device_get_softc(dev);
476
477 if (device_is_attached(dev)) {
841ab66c
SZ
478 struct ieee80211com *ic = &sc->sc_ic;
479 struct ifnet *ifp = &ic->ic_if;
287603a8
SZ
480
481 lwkt_serialize_enter(ifp->if_serializer);
482
483 acx_stop(sc);
484 acx_free_firmware(sc);
485 bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_irq_handle);
486
487 lwkt_serialize_exit(ifp->if_serializer);
488
841ab66c 489 ieee80211_ifdetach(ic);
287603a8
SZ
490 }
491
492 if (sc->sc_sysctl_tree != NULL)
493 sysctl_ctx_free(&sc->sc_sysctl_ctx);
494
495 if (sc->sc_irq_res != NULL) {
496 bus_release_resource(dev, SYS_RES_IRQ, sc->sc_irq_rid,
497 sc->sc_irq_res);
498 }
499 if (sc->sc_mem1_res != NULL) {
500 bus_release_resource(dev, SYS_RES_MEMORY, sc->chip_mem1_rid,
501 sc->sc_mem1_res);
502 }
503 if (sc->sc_mem2_res != NULL) {
504 bus_release_resource(dev, SYS_RES_MEMORY, sc->chip_mem2_rid,
505 sc->sc_mem2_res);
506 }
507
508 acx_dma_free(sc);
509 return 0;
510}
511
512static int
513acx_shutdown(device_t dev)
514{
515 struct acx_softc *sc = device_get_softc(dev);
516
517 lwkt_serialize_enter(sc->sc_ic.ic_if.if_serializer);
518 acx_stop(sc);
519 lwkt_serialize_exit(sc->sc_ic.ic_if.if_serializer);
520 return 0;
521}
522
523static void
524acx_init(void *arg)
525{
526 struct acx_softc *sc = arg;
527 struct ifnet *ifp = &sc->sc_ic.ic_if;
528 struct acx_firmware *fw = &sc->sc_firmware;
529 int error;
530
531 error = acx_stop(sc);
532 if (error)
533 return;
534
535 if (fw->base_fw == NULL) {
536 error = EINVAL;
537 if_printf(ifp, "base firmware is not loaded yet\n");
538 return;
539 }
540
541 error = acx_init_tx_ring(sc);
542 if (error) {
543 if_printf(ifp, "can't initialize TX ring\n");
544 goto back;
545 }
546
547 error = acx_init_rx_ring(sc);
548 if (error) {
549 if_printf(ifp, "can't initialize RX ring\n");
550 goto back;
551 }
552
553 error = acx_load_base_firmware(sc, fw->base_fw, fw->base_fw_len);
554 if (error)
555 goto back;
556
557 /*
558 * Initialize command and information registers
559 * NOTE: This should be done after base firmware is loaded
560 */
561 acx_init_cmd_reg(sc);
562 acx_init_info_reg(sc);
563
564 sc->sc_flags |= ACX_FLAG_FW_LOADED;
565
566#if 0
567 if (sc->chip_post_basefw != NULL) {
568 error = sc->chip_post_basefw(sc);
569 if (error)
570 goto back;
571 }
572#endif
573
574 if (fw->radio_fw != NULL) {
575 error = acx_load_radio_firmware(sc, fw->radio_fw,
576 fw->radio_fw_len);
577 if (error)
578 goto back;
579 }
580
581 error = sc->chip_init(sc);
582 if (error)
583 goto back;
584
585 /* Get and set device various configuration */
586 error = acx_config(sc);
587 if (error)
588 goto back;
589
44fd189c 590 /* Setup crypto stuffs */
841ab66c 591 if (sc->sc_ic.ic_flags & IEEE80211_F_PRIVACY) {
44fd189c 592 error = acx_set_crypt_keys(sc);
287603a8
SZ
593 if (error)
594 goto back;
841ab66c 595 sc->sc_ic.ic_flags &= ~IEEE80211_F_DROPUNENC;
287603a8
SZ
596 }
597
598 /* Turn on power led */
599 CSR_CLRB_2(sc, ACXREG_GPIO_OUT, sc->chip_gpio_pled);
600
601 acx_enable_intr(sc);
602
603 ifp->if_flags |= IFF_RUNNING;
604 ifp->if_flags &= ~IFF_OACTIVE;
605
606 /* Begin background scanning */
841ab66c 607#ifdef foo
287603a8 608 acx_begin_scan(sc);
841ab66c
SZ
609#else
610 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_SCAN, -1);
611#endif
612
287603a8
SZ
613back:
614 if (error)
615 acx_stop(sc);
616}
617
618static void
619acx_init_info_reg(struct acx_softc *sc)
620{
621 sc->sc_info = CSR_READ_4(sc, ACXREG_INFO_REG_OFFSET);
622 sc->sc_info_param = sc->sc_info + ACX_INFO_REG_SIZE;
623}
624
625static int
44fd189c 626acx_set_crypt_keys(struct acx_softc *sc)
287603a8
SZ
627{
628 struct ieee80211com *ic = &sc->sc_ic;
629 struct acx_conf_wep_txkey wep_txkey;
841ab66c 630 int i, error, got_wk = 0;
287603a8
SZ
631
632 for (i = 0; i < IEEE80211_WEP_NKID; ++i) {
841ab66c 633 struct ieee80211_key *wk = &ic->ic_nw_keys[i];
287603a8 634
841ab66c 635 if (wk->wk_keylen == 0)
287603a8
SZ
636 continue;
637
44fd189c
SZ
638 if (sc->chip_hw_crypt) {
639 error = sc->chip_set_wepkey(sc, wk, i);
640 if (error)
641 return error;
642 got_wk = 1;
643 } else if (wk->wk_flags & IEEE80211_KEY_XMIT) {
841ab66c 644 wk->wk_flags |= IEEE80211_KEY_SWCRYPT;
44fd189c 645 }
287603a8
SZ
646 }
647
44fd189c
SZ
648 if (!got_wk || sc->chip_hw_crypt ||
649 ic->ic_def_txkey == IEEE80211_KEYIX_NONE)
841ab66c
SZ
650 return 0;
651
287603a8 652 /* Set current WEP key index */
841ab66c 653 wep_txkey.wep_txkey = ic->ic_def_txkey;
287603a8
SZ
654 if (acx_set_wep_txkey_conf(sc, &wep_txkey) != 0) {
655 if_printf(&ic->ic_if, "set WEP txkey failed\n");
656 return ENXIO;
657 }
658 return 0;
659}
660
841ab66c 661#ifdef foo
287603a8
SZ
662static void
663acx_begin_scan(struct acx_softc *sc)
664{
665 struct ieee80211com *ic = &sc->sc_ic;
666 uint8_t chan;
667
841ab66c 668 ieee80211_begin_scan(ic, 1);
287603a8
SZ
669
670 chan = ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan);
671
672 ACX_ENABLE_TXCHAN(sc, chan);
673 ACX_ENABLE_RXCHAN(sc, chan);
674
675 /* Start background scanning */
676 callout_reset(&sc->sc_chanscan_timer, hz / acx_chanscan_rate,
677 acx_next_scan, sc);
678}
841ab66c 679#endif
287603a8
SZ
680
681static void
682acx_next_scan(void *arg)
683{
684 struct acx_softc *sc = arg;
685 struct ieee80211com *ic = &sc->sc_ic;
686 struct ifnet *ifp = &ic->ic_if;
687
688 lwkt_serialize_enter(ifp->if_serializer);
689
690 if (ic->ic_state == IEEE80211_S_SCAN) {
841ab66c 691#if 0
287603a8 692 uint8_t chan;
841ab66c 693#endif
287603a8 694
841ab66c 695 ieee80211_next_scan(ic);
287603a8 696
841ab66c 697#if 0
287603a8
SZ
698 chan = ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan);
699
700 ACX_ENABLE_TXCHAN(sc, chan);
701 ACX_ENABLE_RXCHAN(sc, chan);
702
703 callout_reset(&sc->sc_chanscan_timer, hz / acx_chanscan_rate,
704 acx_next_scan, sc);
841ab66c 705#endif
287603a8
SZ
706 }
707
708 lwkt_serialize_exit(ifp->if_serializer);
709}
710
711static int
712acx_stop(struct acx_softc *sc)
713{
714 struct ieee80211com *ic = &sc->sc_ic;
715 struct ifnet *ifp = &ic->ic_if;
716 struct acx_buf_data *bd = &sc->sc_buf_data;
717 struct acx_ring_data *rd = &sc->sc_ring_data;
718 int i, error;
719
720 ASSERT_SERIALIZED(ifp->if_serializer);
721
722 sc->sc_firmware_ver = 0;
723 sc->sc_hardware_id = 0;
724
725 /* Reset hardware */
726 error = acx_reset(sc);
727 if (error)
728 return error;
729
730 /* Firmware no longer functions after hardware reset */
731 sc->sc_flags &= ~ACX_FLAG_FW_LOADED;
732
733 acx_disable_intr(sc);
734
735 /* Stop backgroud scanning */
736 callout_stop(&sc->sc_chanscan_timer);
737
738 /* Turn off power led */
739 CSR_SETB_2(sc, ACXREG_GPIO_OUT, sc->chip_gpio_pled);
740
741 /* Free TX mbuf */
742 for (i = 0; i < ACX_TX_DESC_CNT; ++i) {
743 struct acx_txbuf *buf;
287603a8
SZ
744
745 buf = &bd->tx_buf[i];
746
747 if (buf->tb_mbuf != NULL) {
748 bus_dmamap_unload(bd->mbuf_dma_tag,
749 buf->tb_mbuf_dmamap);
841ab66c 750 m_freem(buf->tb_mbuf);
287603a8
SZ
751 buf->tb_mbuf = NULL;
752 }
753
7427ac33
SZ
754 if (buf->tb_node != NULL)
755 ieee80211_free_node(buf->tb_node);
287603a8
SZ
756 buf->tb_node = NULL;
757 }
758
759 /* Clear TX host descriptors */
760 bzero(rd->tx_ring, ACX_TX_RING_SIZE);
761
762 /* Free RX mbuf */
763 for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
764 if (bd->rx_buf[i].rb_mbuf != NULL) {
765 bus_dmamap_unload(bd->mbuf_dma_tag,
766 bd->rx_buf[i].rb_mbuf_dmamap);
841ab66c 767 m_freem(bd->rx_buf[i].rb_mbuf);
287603a8
SZ
768 bd->rx_buf[i].rb_mbuf = NULL;
769 }
770 }
771
772 /* Clear RX host descriptors */
773 bzero(rd->rx_ring, ACX_RX_RING_SIZE);
774
775 ifp->if_timer = 0;
776 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
777 ieee80211_new_state(&sc->sc_ic, IEEE80211_S_INIT, -1);
778
779 return 0;
780}
781
782static int
783acx_config(struct acx_softc *sc)
784{
785 struct acx_config conf;
786 int error;
787
788 error = acx_read_config(sc, &conf);
789 if (error)
790 return error;
791
792 error = acx_write_config(sc, &conf);
793 if (error)
794 return error;
795
796 if (acx_set_probe_req_tmplt(sc, "", 0) != 0) {
797 if_printf(&sc->sc_ic.ic_if, "can't set probe req template "
798 "(empty ssid)\n");
799 return ENXIO;
800 }
801
802 /* XXX for PM?? */
803 if (acx_set_null_tmplt(sc) != 0) {
804 if_printf(&sc->sc_ic.ic_if, "can't set null data template\n");
805 return ENXIO;
806 }
807 return 0;
808}
809
810static int
811acx_read_config(struct acx_softc *sc, struct acx_config *conf)
812{
813 struct acx_conf_eaddr addr;
814 struct acx_conf_regdom reg_dom;
815 struct acx_conf_antenna ant;
816 struct acx_conf_fwrev fw_rev;
817 uint32_t fw_rev_no;
818 uint8_t sen;
819 int i, error;
820
821 /* Get station id */
822 if (acx_get_eaddr_conf(sc, &addr) != 0) {
823 if_printf(&sc->sc_ic.ic_if, "can't get station id\n");
824 return ENXIO;
825 }
826
827 /*
828 * Get and print station id in case that EEPROM station id's
829 * offset is not correct
830 */
831 for (i = 0; i < IEEE80211_ADDR_LEN; ++i)
832 conf->eaddr[IEEE80211_ADDR_LEN - 1 - i] = addr.eaddr[i];
833 if_printf(&sc->sc_ic.ic_if, "MAC address (from firmware): %6D\n",
834 conf->eaddr, ":");
835
836 /* Get region domain */
837 if (acx_get_regdom_conf(sc, &reg_dom) != 0) {
838 if_printf(&sc->sc_ic.ic_if, "can't get region domain\n");
839 return ENXIO;
840 }
841 conf->regdom = reg_dom.regdom;
842 DPRINTF((&sc->sc_ic.ic_if, "regdom %02x\n", reg_dom.regdom));
843
844 /* Get antenna */
845 if (acx_get_antenna_conf(sc, &ant) != 0) {
846 if_printf(&sc->sc_ic.ic_if, "can't get antenna\n");
847 return ENXIO;
848 }
849 conf->antenna = ant.antenna;
850 DPRINTF((&sc->sc_ic.ic_if, "antenna %02x\n", ant.antenna));
851
852 /* Get sensitivity XXX not used */
853 if (sc->sc_radio_type == ACX_RADIO_TYPE_MAXIM ||
854 sc->sc_radio_type == ACX_RADIO_TYPE_RFMD ||
855 sc->sc_radio_type == ACX_RADIO_TYPE_RALINK) {
856 error = acx_read_phyreg(sc, ACXRV_PHYREG_SENSITIVITY, &sen);
857 if (error) {
858 if_printf(&sc->sc_ic.ic_if, "can't get sensitivity\n");
859 return error;
860 }
861 } else {
862 sen = 0;
863 }
864 DPRINTF((&sc->sc_ic.ic_if, "sensitivity %02x\n", sen));
865
866 /* Get firmware revision */
867 if (acx_get_fwrev_conf(sc, &fw_rev) != 0) {
868 if_printf(&sc->sc_ic.ic_if, "can't get firmware revision\n");
869 return ENXIO;
870 }
871
872 if (strncmp(fw_rev.fw_rev, "Rev ", 4) != 0) {
873 if_printf(&sc->sc_ic.ic_if, "strange revision string -- %s\n",
874 fw_rev.fw_rev);
875 fw_rev_no = 0x01090407;
876 } else {
877 char *s, *endp;
878
879 /*
880 * 01234
881 * "Rev xx.xx.xx.xx"
882 * ^ Start from here
883 */
884 s = &fw_rev.fw_rev[4];
885 fw_rev_no = 0;
886 for (i = 0; i < 4; ++i) {
887 uint8_t val;
888
889 val = strtoul(s, &endp, 16);
890 fw_rev_no |= val << ((3 - i) * 8);
891
892 if (*endp == '\0')
893 break;
894 else
895 s = ++endp;
896 }
897 }
898 sc->sc_firmware_ver = fw_rev_no;
899 sc->sc_hardware_id = le32toh(fw_rev.hw_id);
900 DPRINTF((&sc->sc_ic.ic_if, "fw rev %08x, hw id %08x\n",
901 sc->sc_firmware_ver, sc->sc_hardware_id));
902
903 if (sc->chip_read_config != NULL) {
904 error = sc->chip_read_config(sc, conf);
905 if (error)
906 return error;
907 }
908 return 0;
909}
910
911static int
912acx_write_config(struct acx_softc *sc, struct acx_config *conf)
913{
914 struct acx_conf_nretry_short sretry;
915 struct acx_conf_nretry_long lretry;
916 struct acx_conf_msdu_lifetime msdu_lifetime;
917 struct acx_conf_rate_fallback rate_fb;
918 struct acx_conf_antenna ant;
919 struct acx_conf_regdom reg_dom;
920 struct acx_conf_rxopt rx_opt;
921 int error;
922
923 /* Set number of long/short retry */
7427ac33
SZ
924 KKASSERT(sc->chip_short_retry_limit > 0);
925 sretry.nretry = sc->chip_short_retry_limit;
287603a8
SZ
926 if (acx_set_nretry_short_conf(sc, &sretry) != 0) {
927 if_printf(&sc->sc_ic.ic_if, "can't set short retry limit\n");
928 return ENXIO;
929 }
930
931 lretry.nretry = sc->sc_long_retry_limit;
932 if (acx_set_nretry_long_conf(sc, &lretry) != 0) {
933 if_printf(&sc->sc_ic.ic_if, "can't set long retry limit\n");
934 return ENXIO;
935 }
936
937 /* Set MSDU lifetime */
938 msdu_lifetime.lifetime = htole32(sc->sc_msdu_lifetime);
939 if (acx_set_msdu_lifetime_conf(sc, &msdu_lifetime) != 0) {
940 if_printf(&sc->sc_ic.ic_if, "can't set MSDU lifetime\n");
941 return ENXIO;
942 }
943
944 /* Enable rate fallback */
945 rate_fb.ratefb_enable = 1;
946 if (acx_set_rate_fallback_conf(sc, &rate_fb) != 0) {
947 if_printf(&sc->sc_ic.ic_if, "can't enable rate fallback\n");
948 return ENXIO;
949 }
950
951 /* Set antenna */
952 ant.antenna = conf->antenna;
953 if (acx_set_antenna_conf(sc, &ant) != 0) {
954 if_printf(&sc->sc_ic.ic_if, "can't set antenna\n");
955 return ENXIO;
956 }
957
958 /* Set region domain */
959 reg_dom.regdom = conf->regdom;
960 if (acx_set_regdom_conf(sc, &reg_dom) != 0) {
961 if_printf(&sc->sc_ic.ic_if, "can't set region domain\n");
962 return ENXIO;
963 }
964
965 if (sc->chip_write_config != NULL) {
966 error = sc->chip_write_config(sc, conf);
967 if (error)
968 return error;
969 }
970
971 /* What we want to receive and how to receive */
972 /* XXX may not belong here, acx_init() */
973 rx_opt.opt1 = RXOPT1_FILT_FDEST | RXOPT1_INCL_RXBUF_HDR;
974 rx_opt.opt2 = RXOPT2_RECV_ASSOC_REQ |
975 RXOPT2_RECV_AUTH |
976 RXOPT2_RECV_BEACON |
977 RXOPT2_RECV_CF |
978 RXOPT2_RECV_CTRL |
979 RXOPT2_RECV_DATA |
980 RXOPT2_RECV_MGMT |
981 RXOPT2_RECV_PROBE_REQ |
982 RXOPT2_RECV_PROBE_RESP |
983 RXOPT2_RECV_OTHER;
984 if (acx_set_rxopt_conf(sc, &rx_opt) != 0) {
985 if_printf(&sc->sc_ic.ic_if, "can't set RX option\n");
986 return ENXIO;
987 }
988 return 0;
989}
990
991static int
992acx_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data, struct ucred *cr)
993{
994 struct acx_softc *sc = ifp->if_softc;
995 struct ifreq *req;
996 int error;
997
998 error = 0;
999 req = (struct ifreq *)data;
1000
1001 switch (cmd) {
1002 case SIOCSLOADFW:
841ab66c 1003 error = suser_cred(cr, NULL_CRED_OKAY);
287603a8
SZ
1004 if (error)
1005 break;
1006
1007 error = acx_copyin_firmware(sc, req);
1008 break;
1009 case SIOCSKILLFW:
841ab66c 1010 error = suser_cred(cr, NULL_CRED_OKAY);
287603a8
SZ
1011 if (error)
1012 break;
1013 acx_free_firmware(sc);
1014 break;
1015 case SIOCGRADIO:
1016 error = copyout(&sc->sc_radio_type, req->ifr_data,
1017 sizeof(sc->sc_radio_type));
1018 break;
1019 case SIOCGFWVER:
1020 error = copyout(&sc->sc_firmware_ver, req->ifr_data,
1021 sizeof(sc->sc_firmware_ver));
1022 break;
1023 case SIOCGHWID:
1024 error = copyout(&sc->sc_hardware_id, req->ifr_data,
1025 sizeof(sc->sc_hardware_id));
1026 break;
1027 case SIOCGSTATS:
1028 error = copyout(&sc->sc_stats, req->ifr_data,
1029 sizeof(sc->sc_stats));
1030 break;
1031 case SIOCSIFFLAGS:
1032 if (ifp->if_flags & IFF_UP) {
1033 if ((ifp->if_flags & IFF_RUNNING) == 0)
1034 acx_init(sc);
1035 } else {
1036 if (ifp->if_flags & IFF_RUNNING)
1037 acx_stop(sc);
1038 }
1039 break;
1040 case SIOCADDMULTI:
1041 case SIOCDELMULTI:
1042 /* TODO */
1043 break;
1044 default:
841ab66c 1045 error = ieee80211_ioctl(&sc->sc_ic, cmd, data, cr);
287603a8
SZ
1046 break;
1047 }
1048
1049 if (error == ENETRESET) {
1050 if ((ifp->if_flags & (IFF_RUNNING | IFF_UP)) ==
1051 (IFF_RUNNING | IFF_UP))
1052 acx_init(sc);
1053 error = 0;
1054 }
1055 return error;
1056}
1057
287603a8
SZ
1058static void
1059acx_start(struct ifnet *ifp)
1060{
1061 struct acx_softc *sc = ifp->if_softc;
1062 struct ieee80211com *ic = &sc->sc_ic;
1063 struct acx_buf_data *bd = &sc->sc_buf_data;
1064 struct acx_txbuf *buf;
1065 int trans, idx;
1066
1067 ASSERT_SERIALIZED(ifp->if_serializer);
1068
1069 if ((sc->sc_flags & ACX_FLAG_FW_LOADED) == 0 ||
1070 (ifp->if_flags & IFF_RUNNING) == 0 ||
1071 (ifp->if_flags & IFF_OACTIVE))
1072 return;
1073
1074 /*
1075 * NOTE:
1076 * We can't start from a random position that TX descriptor
1077 * is free, since hardware will be confused by that.
1078 * We have to follow the order of the TX ring.
1079 */
1080 idx = bd->tx_free_start;
1081 trans = 0;
1082 for (buf = &bd->tx_buf[idx]; buf->tb_mbuf == NULL;
1083 buf = &bd->tx_buf[idx]) {
841ab66c
SZ
1084 struct ieee80211_frame *f;
1085 struct ieee80211_node *ni = NULL;
287603a8 1086 struct mbuf *m;
7427ac33 1087 int mgmt_pkt = 0;
287603a8 1088
287603a8 1089 if (!IF_QEMPTY(&ic->ic_mgtq)) {
287603a8
SZ
1090 IF_DEQUEUE(&ic->ic_mgtq, m);
1091
1092 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1093 m->m_pkthdr.rcvif = NULL;
1094
7427ac33 1095 mgmt_pkt = 1;
287603a8 1096 } else if (!ifq_is_empty(&ifp->if_snd)) {
841ab66c 1097 struct ether_header *eh;
287603a8 1098
287603a8
SZ
1099 if (ic->ic_state != IEEE80211_S_RUN) {
1100 if_printf(ifp, "data packet dropped due to "
1101 "not RUN. Current state %d\n",
1102 ic->ic_state);
1103 break;
1104 }
287603a8
SZ
1105
1106 m = ifq_dequeue(&ifp->if_snd, NULL);
1107 if (m == NULL)
1108 break;
1109
841ab66c
SZ
1110 if (m->m_len < sizeof(struct ether_header)) {
1111 m = m_pullup(m, sizeof(struct ether_header));
1112 if (m == NULL) {
1113 ifp->if_oerrors++;
1114 continue;
1115 }
1116 }
1117 eh = mtod(m, struct ether_header *);
1118
1119 ni = ieee80211_find_txnode(ic, eh->ether_dhost);
1120 if (ni == NULL) {
1121 m_freem(m);
287603a8
SZ
1122 ifp->if_oerrors++;
1123 continue;
1124 }
287603a8 1125
841ab66c
SZ
1126 /* TODO power save */
1127
1128 m = ieee80211_encap(ic, m, ni);
1129 if (m == NULL) {
1130 ieee80211_free_node(ni);
1131 ifp->if_oerrors++;
1132 continue;
287603a8
SZ
1133 }
1134
287603a8
SZ
1135 BPF_MTAP(ifp, m);
1136 } else {
1137 break;
1138 }
1139
841ab66c 1140 f = mtod(m, struct ieee80211_frame *);
44fd189c 1141 if ((f->i_fc[1] & IEEE80211_FC1_WEP) && !sc->chip_hw_crypt) {
841ab66c
SZ
1142 KASSERT(ni != NULL, ("TX node is NULL (WEP)\n"));
1143 if (ieee80211_crypto_encap(ic, ni, m) == NULL) {
1144 ieee80211_free_node(ni);
1145 m_freem(m);
1146 ifp->if_oerrors++;
1147 continue;
1148 }
1149 }
1150
287603a8
SZ
1151 if (ic->ic_rawbpf != NULL)
1152 bpf_mtap(ic->ic_rawbpf, m);
1153
7427ac33
SZ
1154 /*
1155 * Since mgmt data are transmitted at fixed rate
1156 * they will not be used to do rate control.
1157 */
1158 if (mgmt_pkt && ni != NULL) {
1159 ieee80211_free_node(ni);
1160 ni = NULL;
1161 }
1162
1163 if (acx_encap(sc, buf, m, ni) != 0) {
841ab66c
SZ
1164 /*
1165 * NOTE: `m' will be freed in acx_encap()
1166 * if we reach here.
1167 */
1168 if (ni != NULL)
1169 ieee80211_free_node(ni);
287603a8
SZ
1170 ifp->if_oerrors++;
1171 continue;
1172 }
1173
1174 /*
1175 * NOTE:
1176 * 1) `m' should not be touched after acx_encap()
1177 * 2) `node' will be used to do TX rate control during
1178 * acx_txeof(), so it is not freed here. acx_txeof()
1179 * will free it for us
1180 */
1181
1182 trans = 1;
1183 bd->tx_used_count++;
1184 idx = (idx + 1) % ACX_TX_DESC_CNT;
1185 }
1186 bd->tx_free_start = idx;
1187
1188 if (bd->tx_used_count == ACX_TX_DESC_CNT)
1189 ifp->if_flags |= IFF_OACTIVE;
1190
1191 if (trans && ifp->if_timer == 0)
1192 ifp->if_timer = 5;
1193}
1194
1195static void
1196acx_watchdog(struct ifnet *ifp)
1197{
1198 if_printf(ifp, "watchdog timeout\n");
1199 acx_txeof(ifp->if_softc);
1200 /* TODO */
1201}
1202
1203static void
1204acx_intr(void *arg)
1205{
1206 struct acx_softc *sc = arg;
1207 uint16_t intr_status;
1208
1209 if ((sc->sc_flags & ACX_FLAG_FW_LOADED) == 0)
1210 return;
1211
1212 intr_status = CSR_READ_2(sc, ACXREG_INTR_STATUS_CLR);
1213 if (intr_status == ACXRV_INTR_ALL) {
1214 /* not our interrupt */
1215 return;
1216 }
1217
1218 intr_status &= sc->chip_intr_enable;
1219 if (intr_status == 0) {
1220 /* not interrupts we care about */
1221 return;
1222 }
1223
1224 /* Acknowledge all interrupts */
1225 CSR_WRITE_2(sc, ACXREG_INTR_ACK, ACXRV_INTR_ALL);
1226
1227 if (intr_status & ACXRV_INTR_TX_FINI)
1228 acx_txeof(sc);
1229
1230 if (intr_status & ACXRV_INTR_RX_FINI)
1231 acx_rxeof(sc);
1232}
1233
1234static void
1235acx_disable_intr(struct acx_softc *sc)
1236{
1237 CSR_WRITE_2(sc, ACXREG_INTR_MASK, sc->chip_intr_disable);
1238 CSR_WRITE_2(sc, ACXREG_EVENT_MASK, 0);
1239}
1240
1241static void
1242acx_enable_intr(struct acx_softc *sc)
1243{
1244 /* Mask out interrupts that are not in the enable set */
1245 CSR_WRITE_2(sc, ACXREG_INTR_MASK, ~sc->chip_intr_enable);
1246 CSR_WRITE_2(sc, ACXREG_EVENT_MASK, ACXRV_EVENT_DISABLE);
1247}
1248
1249static void
1250acx_txeof(struct acx_softc *sc)
1251{
1252 struct acx_buf_data *bd;
1253 struct acx_txbuf *buf;
1254 struct ifnet *ifp;
1255 int idx;
1256
1257 ifp = &sc->sc_ic.ic_if;
1258 ASSERT_SERIALIZED(ifp->if_serializer);
1259
1260 bd = &sc->sc_buf_data;
1261 idx = bd->tx_used_start;
1262 for (buf = &bd->tx_buf[idx]; buf->tb_mbuf != NULL;
1263 buf = &bd->tx_buf[idx]) {
1264 uint8_t ctrl, error;
7427ac33 1265 int frame_len;
287603a8
SZ
1266
1267 ctrl = FW_TXDESC_GETFIELD_1(sc, buf, f_tx_ctrl);
1268 if ((ctrl & (DESC_CTRL_HOSTOWN | DESC_CTRL_ACXDONE)) !=
1269 (DESC_CTRL_HOSTOWN | DESC_CTRL_ACXDONE))
1270 break;
1271
1272 bus_dmamap_unload(bd->mbuf_dma_tag, buf->tb_mbuf_dmamap);
7427ac33 1273 frame_len = buf->tb_mbuf->m_pkthdr.len;
841ab66c 1274 m_freem(buf->tb_mbuf);
287603a8
SZ
1275 buf->tb_mbuf = NULL;
1276
1277 error = FW_TXDESC_GETFIELD_1(sc, buf, f_tx_error);
1278 if (error) {
1279 acx_txerr(sc, error);
1280 ifp->if_oerrors++;
1281 } else {
1282 ifp->if_opackets++;
1283 }
1284
1285 if (buf->tb_node != NULL) {
7427ac33
SZ
1286 sc->chip_tx_complete(sc, buf, frame_len, error);
1287 ieee80211_free_node(buf->tb_node);
287603a8
SZ
1288 buf->tb_node = NULL;
1289 }
1290
1291 FW_TXDESC_SETFIELD_1(sc, buf, f_tx_ctrl, DESC_CTRL_HOSTOWN);
1292
1293 bd->tx_used_count--;
1294
1295 idx = (idx + 1) % ACX_TX_DESC_CNT;
1296 }
1297 bd->tx_used_start = idx;
1298
1299 ifp->if_timer = bd->tx_used_count == 0 ? 0 : 5;
1300
1301 if (bd->tx_used_count != ACX_TX_DESC_CNT) {
1302 ifp->if_flags &= ~IFF_OACTIVE;
1303 acx_start(ifp);
1304 }
1305}
1306
1307static void
1308acx_txerr(struct acx_softc *sc, uint8_t err)
1309{
1310 struct ifnet *ifp = &sc->sc_ic.ic_if;
1311 struct acx_stats *stats = &sc->sc_stats;
1312
1313 if (err == DESC_ERR_EXCESSIVE_RETRY) {
1314 /*
1315 * This a common error (see comment below),
1316 * so print it using DPRINTF()
1317 */
1318 DPRINTF((ifp, "TX failed -- excessive retry\n"));
1319 } else {
1320 if_printf(ifp, "TX failed -- ");
1321 }
1322
1323 /*
1324 * Although `err' looks like bitmask, it never
1325 * has multiple bits set.
1326 */
1327 switch (err) {
1328#if 0
1329 case DESC_ERR_OTHER_FRAG:
1330 /* XXX what's this */
1331 printf("error in other fragment\n");
1332 stats->err_oth_frag++;
1333 break;
1334#endif
1335 case DESC_ERR_ABORT:
1336 printf("aborted\n");
1337 stats->err_abort++;
1338 break;
1339 case DESC_ERR_PARAM:
1340 printf("wrong paramters in descriptor\n");
1341 stats->err_param++;
1342 break;
1343 case DESC_ERR_NO_WEPKEY:
1344 printf("WEP key missing\n");
1345 stats->err_no_wepkey++;
1346 break;
1347 case DESC_ERR_MSDU_TIMEOUT:
1348 printf("MSDU life timeout\n");
1349 stats->err_msdu_timeout++;
1350 break;
1351 case DESC_ERR_EXCESSIVE_RETRY:
1352 /*
1353 * Possible causes:
1354 * 1) Distance is too long
1355 * 2) Transmit failed (e.g. no MAC level ACK)
1356 * 3) Chip overheated (this should be rare)
1357 */
1358 stats->err_ex_retry++;
1359 break;
1360 case DESC_ERR_BUF_OVERFLOW:
1361 printf("buffer overflow\n");
1362 stats->err_buf_oflow++;
1363 break;
1364 case DESC_ERR_DMA:
1365 printf("DMA error\n");
1366 stats->err_dma++;
1367 break;
1368 default:
1369 printf("unknown error %d\n", err);
1370 stats->err_unkn++;
1371 break;
1372 }
1373}
1374
1375static void
1376acx_rxeof(struct acx_softc *sc)
1377{
1378 struct ieee80211com *ic = &sc->sc_ic;
1379 struct acx_ring_data *rd = &sc->sc_ring_data;
1380 struct acx_buf_data *bd = &sc->sc_buf_data;
1381 struct ifnet *ifp = &ic->ic_if;
1382 int idx, ready;
1383
1384 ASSERT_SERIALIZED(ic->ic_if.if_serializer);
1385
1386 bus_dmamap_sync(rd->rx_ring_dma_tag, rd->rx_ring_dmamap,
1387 BUS_DMASYNC_POSTREAD);
1388
1389 /*
1390 * Locate first "ready" rx buffer,
1391 * start from last stopped position
1392 */
1393 idx = bd->rx_scan_start;
1394 ready = 0;
1395 do {
1396 struct acx_rxbuf *buf;
1397
1398 buf = &bd->rx_buf[idx];
1399 if ((buf->rb_desc->h_ctrl & htole16(DESC_CTRL_HOSTOWN)) &&
1400 (buf->rb_desc->h_status & htole32(DESC_STATUS_FULL))) {
1401 ready = 1;
1402 break;
1403 }
1404 idx = (idx + 1) % ACX_RX_DESC_CNT;
1405 } while (idx != bd->rx_scan_start);
1406
1407 if (!ready)
1408 return;
1409
1410 /*
1411 * NOTE: don't mess up `idx' here, it will
1412 * be used in the following code
1413 */
1414
1415 do {
1416 struct acx_rxbuf_hdr *head;
1417 struct acx_rxbuf *buf;
1418 struct mbuf *m;
1419 uint32_t desc_status;
1420 uint16_t desc_ctrl;
1421 int len, error;
1422
1423 buf = &bd->rx_buf[idx];
1424
1425 desc_ctrl = le16toh(buf->rb_desc->h_ctrl);
1426 desc_status = le32toh(buf->rb_desc->h_status);
1427 if (!(desc_ctrl & DESC_CTRL_HOSTOWN) ||
1428 !(desc_status & DESC_STATUS_FULL))
1429 break;
1430
1431 bus_dmamap_sync(bd->mbuf_dma_tag, buf->rb_mbuf_dmamap,
1432 BUS_DMASYNC_POSTREAD);
1433
1434 m = buf->rb_mbuf;
1435
1436 error = acx_newbuf(sc, buf, 0);
1437 if (error) {
1438 ifp->if_ierrors++;
1439 goto next;
1440 }
1441
1442 head = mtod(m, struct acx_rxbuf_hdr *);
1443
1444 len = le16toh(head->rbh_len) & ACX_RXBUF_LEN_MASK;
1445 if (len >= sizeof(struct ieee80211_frame_min) &&
1446 len < MCLBYTES) {
1447 struct ieee80211_frame *f;
1448 struct ieee80211_node *ni;
1449
1450 m_adj(m, sizeof(struct acx_rxbuf_hdr) +
1451 sc->chip_rxbuf_exhdr);
1452 f = mtod(m, struct ieee80211_frame *);
1453
44fd189c
SZ
1454 if ((f->i_fc[1] & IEEE80211_FC1_WEP) &&
1455 sc->chip_hw_crypt) {
287603a8
SZ
1456 /* Short circuit software WEP */
1457 f->i_fc[1] &= ~IEEE80211_FC1_WEP;
1458
1459 /* Do chip specific RX buffer processing */
841ab66c 1460 if (sc->chip_proc_wep_rxbuf != NULL) {
287603a8 1461 sc->chip_proc_wep_rxbuf(sc, m, &len);
841ab66c
SZ
1462 f = mtod(m, struct ieee80211_frame *);
1463 }
287603a8
SZ
1464 }
1465
841ab66c
SZ
1466 ni = ieee80211_find_rxnode(ic,
1467 (struct ieee80211_frame_min *)f);
1468
287603a8
SZ
1469 m->m_len = m->m_pkthdr.len = len;
1470 m->m_pkthdr.rcvif = &ic->ic_if;
1471
841ab66c 1472 ieee80211_input(ic, m, ni, head->rbh_level,
287603a8
SZ
1473 le32toh(head->rbh_time));
1474
841ab66c 1475 ieee80211_free_node(ni);
287603a8
SZ
1476 ifp->if_ipackets++;
1477 } else {
841ab66c 1478 m_freem(m);
287603a8
SZ
1479 ifp->if_ierrors++;
1480 }
1481
1482next:
1483 buf->rb_desc->h_ctrl = htole16(desc_ctrl & ~DESC_CTRL_HOSTOWN);
1484 buf->rb_desc->h_status = 0;
1485 bus_dmamap_sync(rd->rx_ring_dma_tag, rd->rx_ring_dmamap,
1486 BUS_DMASYNC_PREWRITE);
1487
1488 idx = (idx + 1) % ACX_RX_DESC_CNT;
1489 } while (idx != bd->rx_scan_start);
1490
1491 /*
1492 * Record the position so that next
1493 * time we can start from it
1494 */
1495 bd->rx_scan_start = idx;
1496}
1497
1498static int
1499acx_reset(struct acx_softc *sc)
1500{
1501 uint16_t reg;
1502
1503 /* Halt ECPU */
1504 CSR_SETB_2(sc, ACXREG_ECPU_CTRL, ACXRV_ECPU_HALT);
1505
1506 /* Software reset */
1507 reg = CSR_READ_2(sc, ACXREG_SOFT_RESET);
1508 CSR_WRITE_2(sc, ACXREG_SOFT_RESET, reg | ACXRV_SOFT_RESET);
1509 DELAY(100);
1510 CSR_WRITE_2(sc, ACXREG_SOFT_RESET, reg);
1511
1512 /* Initialize EEPROM */
1513 CSR_SETB_2(sc, ACXREG_EEPROM_INIT, ACXRV_EEPROM_INIT);
1514 DELAY(50000);
1515
1516 /* Test whether ECPU is stopped */
1517 reg = CSR_READ_2(sc, ACXREG_ECPU_CTRL);
1518 if (!(reg & ACXRV_ECPU_HALT)) {
1519 if_printf(&sc->sc_ic.ic_if, "can't halt ECPU\n");
1520 return ENXIO;
1521 }
1522 return 0;
1523}
1524
1525static int
1526acx_read_eeprom(struct acx_softc *sc, uint32_t offset, uint8_t *val)
1527{
1528 int i;
1529
1530 CSR_WRITE_4(sc, ACXREG_EEPROM_CONF, 0);
1531 CSR_WRITE_4(sc, ACXREG_EEPROM_ADDR, offset);
1532 CSR_WRITE_4(sc, ACXREG_EEPROM_CTRL, ACXRV_EEPROM_READ);
1533
1534#define EE_READ_RETRY_MAX 100
1535 for (i = 0; i < EE_READ_RETRY_MAX; ++i) {
1536 if (CSR_READ_2(sc, ACXREG_EEPROM_CTRL) == 0)
1537 break;
1538 DELAY(10000);
1539 }
1540 if (i == EE_READ_RETRY_MAX) {
1541 if_printf(&sc->sc_ic.ic_if, "can't read EEPROM offset %x "
1542 "(timeout)\n", offset);
1543 return ETIMEDOUT;
1544 }
1545#undef EE_READ_RETRY_MAX
1546
1547 *val = CSR_READ_1(sc, ACXREG_EEPROM_DATA);
1548 return 0;
1549}
1550
1551static int
1552acx_read_phyreg(struct acx_softc *sc, uint32_t reg, uint8_t *val)
1553{
1554 int i;
1555
1556 CSR_WRITE_4(sc, ACXREG_PHY_ADDR, reg);
1557 CSR_WRITE_4(sc, ACXREG_PHY_CTRL, ACXRV_PHY_READ);
1558
1559#define PHY_READ_RETRY_MAX 100
1560 for (i = 0; i < PHY_READ_RETRY_MAX; ++i) {
1561 if (CSR_READ_4(sc, ACXREG_PHY_CTRL) == 0)
1562 break;
1563 DELAY(10000);
1564 }
1565 if (i == PHY_READ_RETRY_MAX) {
1566 if_printf(&sc->sc_ic.ic_if, "can't read phy reg %x (timeout)\n",
1567 reg);
1568 return ETIMEDOUT;
1569 }
1570#undef PHY_READ_RETRY_MAX
1571
1572 *val = CSR_READ_1(sc, ACXREG_PHY_DATA);
1573 return 0;
1574}
1575
1576void
1577acx_write_phyreg(struct acx_softc *sc, uint32_t reg, uint8_t val)
1578{
1579 CSR_WRITE_4(sc, ACXREG_PHY_DATA, val);
1580 CSR_WRITE_4(sc, ACXREG_PHY_ADDR, reg);
1581 CSR_WRITE_4(sc, ACXREG_PHY_CTRL, ACXRV_PHY_WRITE);
1582}
1583
1584static int
1585acx_copyin_firmware(struct acx_softc *sc, struct ifreq *req)
1586{
1587 struct acx_firmware ufw, *kfw;
1588 uint8_t *base_fw, *radio_fw;
1589 int error;
1590
1591 kfw = &sc->sc_firmware;
1592 base_fw = NULL;
1593 radio_fw = NULL;
1594
1595 error = copyin(req->ifr_data, &ufw, sizeof(ufw));
1596 if (error)
1597 return error;
1598
1599 /*
1600 * For combined base firmware, there is no radio firmware.
1601 * But base firmware must exist.
1602 */
1603 if (ufw.base_fw_len <= 0 || ufw.radio_fw_len < 0)
1604 return EINVAL;
1605
1606 base_fw = malloc(ufw.base_fw_len, M_DEVBUF, M_INTWAIT);
1607 error = copyin(ufw.base_fw, base_fw, ufw.base_fw_len);
1608 if (error)
1609 goto fail;
1610
1611 if (ufw.radio_fw_len > 0) {
1612 radio_fw = malloc(ufw.radio_fw_len, M_DEVBUF, M_INTWAIT);
1613 error = copyin(ufw.radio_fw, radio_fw, ufw.radio_fw_len);
1614 if (error)
1615 goto fail;
1616 }
1617
1618 kfw->base_fw_len = ufw.base_fw_len;
1619 if (kfw->base_fw != NULL)
1620 free(kfw->base_fw, M_DEVBUF);
1621 kfw->base_fw = base_fw;
1622
1623 kfw->radio_fw_len = ufw.radio_fw_len;
1624 if (kfw->radio_fw != NULL)
1625 free(kfw->radio_fw, M_DEVBUF);
1626 kfw->radio_fw = radio_fw;
1627
1628 return 0;
1629fail:
1630 if (base_fw != NULL)
1631 free(base_fw, M_DEVBUF);
1632 if (radio_fw != NULL)
1633 free(radio_fw, M_DEVBUF);
1634 return error;
1635}
1636
1637static void
1638acx_free_firmware(struct acx_softc *sc)
1639{
1640 struct acx_firmware *fw = &sc->sc_firmware;
1641
1642 if (fw->base_fw != NULL) {
1643 free(fw->base_fw, M_DEVBUF);
1644 fw->base_fw = NULL;
1645 fw->base_fw_len = 0;
1646 }
1647 if (fw->radio_fw != NULL) {
1648 free(fw->radio_fw, M_DEVBUF);
1649 fw->radio_fw = NULL;
1650 fw->radio_fw_len = 0;
1651 }
1652}
1653
1654static int
1655acx_load_base_firmware(struct acx_softc *sc, const uint8_t *base_fw,
1656 uint32_t base_fw_len)
1657{
1658 int i, error;
1659
1660 /* Load base firmware */
1661 error = acx_load_firmware(sc, 0, base_fw, base_fw_len);
1662 if (error) {
1663 if_printf(&sc->sc_ic.ic_if, "can't load base firmware\n");
1664 return error;
1665 }
1666 DPRINTF((&sc->sc_ic.ic_if, "base firmware loaded\n"));
1667
1668 /* Start ECPU */
1669 CSR_WRITE_2(sc, ACXREG_ECPU_CTRL, ACXRV_ECPU_START);
1670
1671 /* Wait for ECPU to be up */
1672 for (i = 0; i < 500; ++i) {
1673 uint16_t reg;
1674
1675 reg = CSR_READ_2(sc, ACXREG_INTR_STATUS);
1676 if (reg & ACXRV_INTR_FCS_THRESH) {
1677 CSR_WRITE_2(sc, ACXREG_INTR_ACK, ACXRV_INTR_FCS_THRESH);
1678 return 0;
1679 }
1680 DELAY(10000);
1681 }
1682
1683 if_printf(&sc->sc_ic.ic_if, "can't initialize ECPU (timeout)\n");
1684 return ENXIO;
1685}
1686
1687static int
1688acx_load_radio_firmware(struct acx_softc *sc, const uint8_t *radio_fw,
1689 uint32_t radio_fw_len)
1690{
1691 struct acx_conf_mmap mem_map;
1692 uint32_t radio_fw_ofs;
1693 int error;
1694
1695 /*
1696 * Get the position, where base firmware is loaded, so that
1697 * radio firmware can be loaded after it.
1698 */
1699 if (acx_get_mmap_conf(sc, &mem_map) != 0)
1700 return ENXIO;
1701 radio_fw_ofs = le32toh(mem_map.code_end);
1702
1703 /* Put ECPU into sleeping state, before loading radio firmware */
1704 if (acx_sleep(sc) != 0)
1705 return ENXIO;
1706
1707 /* Load radio firmware */
1708 error = acx_load_firmware(sc, radio_fw_ofs, radio_fw, radio_fw_len);
1709 if (error) {
1710 if_printf(&sc->sc_ic.ic_if, "can't load radio firmware\n");
1711 return ENXIO;
1712 }
1713 DPRINTF((&sc->sc_ic.ic_if, "radio firmware loaded\n"));
1714
1715 /* Wake up sleeping ECPU, after radio firmware is loaded */
1716 if (acx_wakeup(sc) != 0)
1717 return ENXIO;
1718
1719 /* Initialize radio */
1720 if (acx_init_radio(sc, radio_fw_ofs, radio_fw_len) != 0)
1721 return ENXIO;
1722
1723 /* Verify radio firmware's loading position */
1724 if (acx_get_mmap_conf(sc, &mem_map) != 0)
1725 return ENXIO;
1726 if (le32toh(mem_map.code_end) != radio_fw_ofs + radio_fw_len) {
1727 if_printf(&sc->sc_ic.ic_if, "loaded radio firmware position "
1728 "mismatch\n");
1729 return ENXIO;
1730 }
1731
1732 DPRINTF((&sc->sc_ic.ic_if, "radio firmware initialized\n"));
1733 return 0;
1734}
1735
1736static int
1737acx_load_firmware(struct acx_softc *sc, uint32_t offset, const uint8_t *data,
1738 int data_len)
1739{
1740 const uint32_t *fw;
1741 int i, fw_len;
1742
1743 fw = (const uint32_t *)data;
1744 fw_len = data_len / sizeof(uint32_t);
1745
1746 /*
1747 * LOADFW_AUTO_INC only works with some older firmware:
1748 * 1) acx100's firmware
1749 * 2) acx111's firmware whose rev is 0x00010011
1750 */
1751
1752 /* Load firmware */
1753 CSR_WRITE_4(sc, ACXREG_FWMEM_START, ACXRV_FWMEM_START_OP);
1754#ifndef LOADFW_AUTO_INC
1755 CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, 0);
1756#else
1757 CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, ACXRV_FWMEM_ADDR_AUTOINC);
1758 CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
1759#endif
1760
1761 for (i = 0; i < fw_len; ++i) {
1762#ifndef LOADFW_AUTO_INC
1763 CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
1764#endif
1765 CSR_WRITE_4(sc, ACXREG_FWMEM_DATA, be32toh(fw[i]));
1766 }
1767
1768 /* Verify firmware */
1769 CSR_WRITE_4(sc, ACXREG_FWMEM_START, ACXRV_FWMEM_START_OP);
1770#ifndef LOADFW_AUTO_INC
1771 CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, 0);
1772#else
1773 CSR_WRITE_4(sc, ACXREG_FWMEM_CTRL, ACXRV_FWMEM_ADDR_AUTOINC);
1774 CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset);
1775#endif
1776
1777 for (i = 0; i < fw_len; ++i) {
1778 uint32_t val;
1779
1780#ifndef LOADFW_AUTO_INC
1781 CSR_WRITE_4(sc, ACXREG_FWMEM_ADDR, offset + (i * 4));
1782#endif
1783 val = CSR_READ_4(sc, ACXREG_FWMEM_DATA);
1784 if (be32toh(fw[i]) != val) {
1785 if_printf(&sc->sc_ic.ic_if, "fireware mismatch "
1786 "fw %08x loaded %08x\n", fw[i], val);
1787 return ENXIO;
1788 }
1789 }
1790 return 0;
1791}
1792
287603a8
SZ
1793static int
1794acx_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
1795{
1796 struct acx_softc *sc = ic->ic_if.if_softc;
7427ac33 1797 int error = 0, mode = 0;
287603a8
SZ
1798
1799 ASSERT_SERIALIZED(ic->ic_if.if_serializer);
1800
7427ac33
SZ
1801 ieee80211_ratectl_newstate(ic, nstate);
1802
287603a8 1803 switch (nstate) {
841ab66c
SZ
1804 case IEEE80211_S_SCAN:
1805 if (ic->ic_state != IEEE80211_S_INIT) {
1806 uint8_t chan;
1807
1808 chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
1809 ACX_ENABLE_TXCHAN(sc, chan);
1810 ACX_ENABLE_RXCHAN(sc, chan);
1811
1812 callout_reset(&sc->sc_chanscan_timer,
1813 hz / acx_chanscan_rate,
1814 acx_next_scan, sc);
1815 }
1816 break;
287603a8
SZ
1817 case IEEE80211_S_AUTH:
1818 if (ic->ic_opmode == IEEE80211_M_STA) {
1819 struct ieee80211_node *ni;
1820#ifdef ACX_DEBUG
1821 int i;
1822#endif
1823
1824 ni = ic->ic_bss;
1825
1826 if (acx_join_bss(sc, ACX_MODE_STA, ni) != 0) {
1827 if_printf(&ic->ic_if, "join BSS failed\n");
1828 error = 1;
1829 goto back;
1830 }
1831
1832 DPRINTF((&ic->ic_if, "join BSS\n"));
1833 if (ic->ic_state == IEEE80211_S_ASSOC) {
1834 DPRINTF((&ic->ic_if,
1835 "change from assoc to run\n"));
1836 ic->ic_state = IEEE80211_S_RUN;
1837 }
1838
1839#ifdef ACX_DEBUG
1840 if_printf(&ic->ic_if, "AP rates: ");
1841 for (i = 0; i < ni->ni_rates.rs_nrates; ++i)
1842 printf("%d ", ni->ni_rates.rs_rates[i]);
1843 ieee80211_print_essid(ni->ni_essid, ni->ni_esslen);
1844 printf(" %6D\n", ni->ni_bssid, ":");
1845#endif
1846 }
1847 break;
1848 case IEEE80211_S_RUN:
7427ac33
SZ
1849 if (ic->ic_opmode == IEEE80211_M_IBSS ||
1850 ic->ic_opmode == IEEE80211_M_HOSTAP) {
287603a8
SZ
1851 struct ieee80211_node *ni;
1852 uint8_t chan;
1853
1854 ni = ic->ic_bss;
1855 chan = ieee80211_chan2ieee(ic, ni->ni_chan);
1856
1857 error = 1;
1858
1859 if (acx_enable_txchan(sc, chan) != 0) {
1860 if_printf(&ic->ic_if,
1861 "enable TX on channel %d failed\n",
1862 chan);
1863 goto back;
1864 }
1865
1866 if (acx_enable_rxchan(sc, chan) != 0) {
1867 if_printf(&ic->ic_if,
1868 "enable RX on channel %d failed\n",
1869 chan);
1870 goto back;
1871 }
1872
7427ac33 1873 if (acx_set_beacon_tmplt(sc, ni) != 0) {
287603a8
SZ
1874 if_printf(&ic->ic_if,
1875 "set bescon template failed\n");
1876 goto back;
1877 }
1878
7427ac33 1879 if (acx_set_probe_resp_tmplt(sc, ni) != 0) {
287603a8
SZ
1880 if_printf(&ic->ic_if, "set probe response "
1881 "template failed\n");
1882 goto back;
1883 }
1884
7427ac33
SZ
1885 if (ic->ic_opmode == IEEE80211_M_IBSS)
1886 mode = ACX_MODE_ADHOC;
1887 else
1888 mode = ACX_MODE_AP;
1889
1890 if (acx_join_bss(sc, mode, ni) != 0) {
1891 if_printf(&ic->ic_if, "acx_join_ibss failed\n");
287603a8
SZ
1892 goto back;
1893 }
1894
1895 DPRINTF((&ic->ic_if, "join IBSS\n"));
1896 error = 0;
1897 }
1898 break;
1899 default:
1900 break;
1901 }
1902
1903back:
1904 if (error) {
1905 /* XXX */
1906 nstate = IEEE80211_S_INIT;
1907 arg = -1;
1908 }
1909 return sc->sc_newstate(ic, nstate, arg);
1910}
1911
1912int
1913acx_init_tmplt_ordered(struct acx_softc *sc)
1914{
1915#define INIT_TMPLT(name) \
1916do { \
1917 if (acx_init_##name##_tmplt(sc) != 0) \
1918 return 1; \
1919} while (0)
1920
1921 /*
1922 * NOTE:
1923 * Order of templates initialization:
1924 * 1) Probe request
1925 * 2) NULL data
1926 * 3) Beacon
1927 * 4) TIM
1928 * 5) Probe response
1929 * Above order is critical to get a correct memory map.
1930 */
1931 INIT_TMPLT(probe_req);
1932 INIT_TMPLT(null_data);
1933 INIT_TMPLT(beacon);
1934 INIT_TMPLT(tim);
1935 INIT_TMPLT(probe_resp);
1936
1937#undef CALL_SET_TMPLT
1938 return 0;
1939}
1940
1941static void
1942acx_ring_dma_addr(void *arg, bus_dma_segment_t *seg, int nseg, int error)
1943{
1944 *((uint32_t *)arg) = seg->ds_addr;
1945}
1946
1947static int
1948acx_dma_alloc(struct acx_softc *sc)
1949{
1950 struct acx_ring_data *rd = &sc->sc_ring_data;
1951 struct acx_buf_data *bd = &sc->sc_buf_data;
1952 int i, error;
1953
1954 /* Allocate DMA stuffs for RX descriptors */
1955 error = bus_dma_tag_create(NULL, PAGE_SIZE, 0,
1956 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
1957 NULL, NULL,
1958 ACX_RX_RING_SIZE, 1, ACX_RX_RING_SIZE,
1959 0, &rd->rx_ring_dma_tag);
1960 if (error) {
1961 if_printf(&sc->sc_ic.ic_if, "can't create rx ring dma tag\n");
1962 return error;
1963 }
1964
1965 error = bus_dmamem_alloc(rd->rx_ring_dma_tag, (void **)&rd->rx_ring,
1966 BUS_DMA_WAITOK | BUS_DMA_ZERO,
1967 &rd->rx_ring_dmamap);
1968 if (error) {
1969 if_printf(&sc->sc_ic.ic_if,
1970 "can't allocate rx ring dma memory\n");
1971 bus_dma_tag_destroy(rd->rx_ring_dma_tag);
1972 rd->rx_ring_dma_tag = NULL;
1973 return error;
1974 }
1975
1976 error = bus_dmamap_load(rd->rx_ring_dma_tag, rd->rx_ring_dmamap,
1977 rd->rx_ring, ACX_RX_RING_SIZE,
1978 acx_ring_dma_addr, &rd->rx_ring_paddr,
1979 BUS_DMA_WAITOK);
1980 if (error) {
1981 if_printf(&sc->sc_ic.ic_if, "can't get rx ring dma address\n");
1982 bus_dmamem_free(rd->rx_ring_dma_tag, rd->rx_ring,
1983 rd->rx_ring_dmamap);
1984 bus_dma_tag_destroy(rd->rx_ring_dma_tag);
1985 rd->rx_ring_dma_tag = NULL;
1986 return error;
1987 }
1988
1989 /* Allocate DMA stuffs for TX descriptors */
1990 error = bus_dma_tag_create(NULL, PAGE_SIZE, 0,
1991 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
1992 NULL, NULL,
1993 ACX_TX_RING_SIZE, 1, ACX_TX_RING_SIZE,
1994 0, &rd->tx_ring_dma_tag);
1995 if (error) {
1996 if_printf(&sc->sc_ic.ic_if, "can't create tx ring dma tag\n");
1997 return error;
1998 }
1999
2000 error = bus_dmamem_alloc(rd->tx_ring_dma_tag, (void **)&rd->tx_ring,
2001 BUS_DMA_WAITOK | BUS_DMA_ZERO,
2002 &rd->tx_ring_dmamap);
2003 if (error) {
2004 if_printf(&sc->sc_ic.ic_if,
2005 "can't allocate tx ring dma memory\n");
2006 bus_dma_tag_destroy(rd->tx_ring_dma_tag);
2007 rd->tx_ring_dma_tag = NULL;
2008 return error;
2009 }
2010
2011 error = bus_dmamap_load(rd->tx_ring_dma_tag, rd->tx_ring_dmamap,
2012 rd->tx_ring, ACX_TX_RING_SIZE,
2013 acx_ring_dma_addr, &rd->tx_ring_paddr,
2014 BUS_DMA_WAITOK);
2015 if (error) {
2016 if_printf(&sc->sc_ic.ic_if, "can't get tx ring dma address\n");
2017 bus_dmamem_free(rd->tx_ring_dma_tag, rd->tx_ring,
2018 rd->tx_ring_dmamap);
2019 bus_dma_tag_destroy(rd->tx_ring_dma_tag);
2020 rd->tx_ring_dma_tag = NULL;
2021 return error;
2022 }
2023
2024 /* Create DMA tag for RX/TX mbuf map */
2025 error = bus_dma_tag_create(NULL, 1, 0,
2026 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2027 NULL, NULL,
2028 MCLBYTES, 1, MCLBYTES,
2029 0, &bd->mbuf_dma_tag);
2030 if (error) {
2031 if_printf(&sc->sc_ic.ic_if, "can't create mbuf dma tag\n");
2032 return error;
2033 }
2034
2035 /* Create a spare RX DMA map */
2036 error = bus_dmamap_create(bd->mbuf_dma_tag, 0, &bd->mbuf_tmp_dmamap);
2037 if (error) {
2038 if_printf(&sc->sc_ic.ic_if, "can't create tmp mbuf dma map\n");
2039 bus_dma_tag_destroy(bd->mbuf_dma_tag);
2040 bd->mbuf_dma_tag = NULL;
2041 return error;
2042 }
2043
2044 /* Create DMA map for RX mbufs */
2045 for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
2046 error = bus_dmamap_create(bd->mbuf_dma_tag, 0,
2047 &bd->rx_buf[i].rb_mbuf_dmamap);
2048 if (error) {
2049 if_printf(&sc->sc_ic.ic_if, "can't create rx mbuf "
2050 "dma map (%d)\n", i);
2051 return error;
2052 }
2053 bd->rx_buf[i].rb_desc = &rd->rx_ring[i];
2054 }
2055
2056 /* Create DMA map for TX mbufs */
2057 for (i = 0; i < ACX_TX_DESC_CNT; ++i) {
2058 error = bus_dmamap_create(bd->mbuf_dma_tag, 0,
2059 &bd->tx_buf[i].tb_mbuf_dmamap);
2060 if (error) {
2061 if_printf(&sc->sc_ic.ic_if, "can't create tx mbuf "
2062 "dma map (%d)\n", i);
2063 return error;
2064 }
2065 bd->tx_buf[i].tb_desc1 = &rd->tx_ring[i * 2];
2066 bd->tx_buf[i].tb_desc2 = &rd->tx_ring[(i * 2) + 1];
2067 }
2068
2069 return 0;
2070}
2071
2072static void
2073acx_dma_free(struct acx_softc *sc)
2074{
2075 struct acx_ring_data *rd = &sc->sc_ring_data;
2076 struct acx_buf_data *bd = &sc->sc_buf_data;
2077 int i;
2078
2079 if (rd->rx_ring_dma_tag != NULL) {
2080 bus_dmamap_unload(rd->rx_ring_dma_tag, rd->rx_ring_dmamap);
2081 bus_dmamem_free(rd->rx_ring_dma_tag, rd->rx_ring,
2082 rd->rx_ring_dmamap);
2083 bus_dma_tag_destroy(rd->rx_ring_dma_tag);
2084 }
2085
2086 if (rd->tx_ring_dma_tag != NULL) {
2087 bus_dmamap_unload(rd->tx_ring_dma_tag, rd->tx_ring_dmamap);
2088 bus_dmamem_free(rd->tx_ring_dma_tag, rd->tx_ring,
2089 rd->tx_ring_dmamap);
2090 bus_dma_tag_destroy(rd->tx_ring_dma_tag);
2091 }
2092
2093 for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
2094 if (bd->rx_buf[i].rb_desc != NULL) {
2095 if (bd->rx_buf[i].rb_mbuf != NULL) {
2096 bus_dmamap_unload(bd->mbuf_dma_tag,
2097 bd->rx_buf[i].rb_mbuf_dmamap);
841ab66c 2098 m_freem(bd->rx_buf[i].rb_mbuf);
287603a8
SZ
2099 }
2100 bus_dmamap_destroy(bd->mbuf_dma_tag,
2101 bd->rx_buf[i].rb_mbuf_dmamap);
2102 }
2103 }
2104
2105 for (i = 0; i < ACX_TX_DESC_CNT; ++i) {
2106 if (bd->tx_buf[i].tb_desc1 != NULL) {
2107 if (bd->tx_buf[i].tb_mbuf != NULL) {
2108 bus_dmamap_unload(bd->mbuf_dma_tag,
2109 bd->tx_buf[i].tb_mbuf_dmamap);
841ab66c 2110 m_freem(bd->tx_buf[i].tb_mbuf);
287603a8
SZ
2111 }
2112 bus_dmamap_destroy(bd->mbuf_dma_tag,
2113 bd->tx_buf[i].tb_mbuf_dmamap);
2114 }
2115 }
2116
2117 if (bd->mbuf_dma_tag != NULL) {
2118 bus_dmamap_destroy(bd->mbuf_dma_tag, bd->mbuf_tmp_dmamap);
2119 bus_dma_tag_destroy(bd->mbuf_dma_tag);
2120 }
2121}
2122
2123static int
2124acx_init_tx_ring(struct acx_softc *sc)
2125{
2126 struct acx_ring_data *rd;
2127 struct acx_buf_data *bd;
2128 uint32_t paddr;
2129 int i;
2130
2131 rd = &sc->sc_ring_data;
2132 paddr = rd->tx_ring_paddr;
2133 for (i = 0; i < (ACX_TX_DESC_CNT * 2) - 1; ++i) {
2134 paddr += sizeof(struct acx_host_desc);
2135
2136 rd->tx_ring[i].h_ctrl = htole16(DESC_CTRL_HOSTOWN);
2137
2138 if (i == (ACX_TX_DESC_CNT * 2) - 1)
2139 rd->tx_ring[i].h_next_desc = htole32(rd->tx_ring_paddr);
2140 else
2141 rd->tx_ring[i].h_next_desc = htole32(paddr);
2142 }
2143
2144 bus_dmamap_sync(rd->tx_ring_dma_tag, rd->tx_ring_dmamap,
2145 BUS_DMASYNC_PREWRITE);
2146
2147 bd = &sc->sc_buf_data;
2148 bd->tx_free_start = 0;
2149 bd->tx_used_start = 0;
2150 bd->tx_used_count = 0;
2151
2152 return 0;
2153}
2154
2155static int
2156acx_init_rx_ring(struct acx_softc *sc)
2157{
2158 struct acx_ring_data *rd;
2159 struct acx_buf_data *bd;
2160 uint32_t paddr;
2161 int i;
2162
2163 bd = &sc->sc_buf_data;
2164 rd = &sc->sc_ring_data;
2165 paddr = rd->rx_ring_paddr;
2166
2167 for (i = 0; i < ACX_RX_DESC_CNT; ++i) {
2168 int error;
2169
2170 paddr += sizeof(struct acx_host_desc);
2171
2172 error = acx_newbuf(sc, &bd->rx_buf[i], 1);
2173 if (error)
2174 return error;
2175
2176 if (i == ACX_RX_DESC_CNT - 1)
2177 rd->rx_ring[i].h_next_desc = htole32(rd->rx_ring_paddr);
2178 else
2179 rd->rx_ring[i].h_next_desc = htole32(paddr);
2180 }
2181
2182 bus_dmamap_sync(rd->rx_ring_dma_tag, rd->rx_ring_dmamap,
2183 BUS_DMASYNC_PREWRITE);
2184
2185 bd->rx_scan_start = 0;
2186 return 0;
2187}
2188
2189static void
2190acx_buf_dma_addr(void *arg, bus_dma_segment_t *seg, int nseg,
2191 bus_size_t mapsz, int error)
2192{
2193 if (error)
2194 return;
2195
2196 /* XXX */
2197 KASSERT(nseg == 1, ("too many RX dma segments\n"));
2198 *((uint32_t *)arg) = seg->ds_addr;
2199}
2200
2201static int
2202acx_newbuf(struct acx_softc *sc, struct acx_rxbuf *rb, int wait)
2203{
2204 struct acx_buf_data *bd;
2205 struct mbuf *m;
2206 bus_dmamap_t map;
2207 uint32_t paddr;
2208 int error;
2209
2210 bd = &sc->sc_buf_data;
2211
2212 m = m_getcl(wait ? MB_WAIT : MB_DONTWAIT, MT_DATA, M_PKTHDR);
2213 if (m == NULL)
2214 return ENOBUFS;
2215
2216 m->m_len = m->m_pkthdr.len = MCLBYTES;
2217
2218 error = bus_dmamap_load_mbuf(bd->mbuf_dma_tag, bd->mbuf_tmp_dmamap,
2219 m, acx_buf_dma_addr, &paddr,
2220 wait ? BUS_DMA_WAITOK : BUS_DMA_NOWAIT);
2221 if (error) {
841ab66c 2222 m_freem(m);
287603a8
SZ
2223 if_printf(&sc->sc_ic.ic_if, "can't map rx mbuf %d\n", error);
2224 return error;
2225 }
2226
2227 /* Unload originally mapped mbuf */
2228 bus_dmamap_unload(bd->mbuf_dma_tag, rb->rb_mbuf_dmamap);
2229
2230 /* Swap this dmamap with tmp dmamap */
2231 map = rb->rb_mbuf_dmamap;
2232 rb->rb_mbuf_dmamap = bd->mbuf_tmp_dmamap;
2233 bd->mbuf_tmp_dmamap = map;
2234
2235 rb->rb_mbuf = m;
2236 rb->rb_desc->h_data_paddr = htole32(paddr);
2237 rb->rb_desc->h_data_len = htole16(m->m_len);
2238
2239 bus_dmamap_sync(bd->mbuf_dma_tag, rb->rb_mbuf_dmamap,
2240 BUS_DMASYNC_PREREAD);
2241 return 0;
2242}
2243
2244static int
2245acx_encap(struct acx_softc *sc, struct acx_txbuf *txbuf, struct mbuf *m,
7427ac33 2246 struct ieee80211_node *ni)
287603a8
SZ
2247{
2248 struct acx_buf_data *bd = &sc->sc_buf_data;
2249 struct acx_ring_data *rd = &sc->sc_ring_data;
2250 uint32_t paddr;
2251 uint8_t ctrl;
2252 int error;
2253
2254 KASSERT(txbuf->tb_mbuf == NULL, ("free TX buf has mbuf installed\n"));
2255 error = 0;
2256
2257 if (m->m_pkthdr.len > MCLBYTES) {
2258 if_printf(&sc->sc_ic.ic_if, "mbuf too big\n");
2259 error = E2BIG;
2260 goto back;
2261 } else if (m->m_pkthdr.len < ACX_FRAME_HDRLEN) {
2262 if_printf(&sc->sc_ic.ic_if, "mbuf too small\n");
2263 error = EINVAL;
2264 goto back;
2265 }
2266
2267 error = bus_dmamap_load_mbuf(bd->mbuf_dma_tag, txbuf->tb_mbuf_dmamap,
2268 m, acx_buf_dma_addr, &paddr,
2269 BUS_DMA_NOWAIT);
2270 if (error && error != EFBIG) {
2271 if_printf(&sc->sc_ic.ic_if, "can't map tx mbuf1 %d\n", error);
2272 goto back;
2273 }
2274
2275 if (error) { /* error == EFBIG */
2276 struct mbuf *m_new;
2277
2278 m_new = m_defrag(m, MB_DONTWAIT);
2279 if (m_new == NULL) {
2280 if_printf(&sc->sc_ic.ic_if, "can't defrag tx mbuf\n");
2281 error = ENOBUFS;
2282 goto back;
2283 } else {
2284 m = m_new;
2285 }
2286
2287 error = bus_dmamap_load_mbuf(bd->mbuf_dma_tag,
2288 txbuf->tb_mbuf_dmamap, m,
2289 acx_buf_dma_addr, &paddr,
2290 BUS_DMA_NOWAIT);
2291 if (error) {
2292 if_printf(&sc->sc_ic.ic_if, "can't map tx mbuf2 %d\n",
2293 error);
2294 goto back;
2295 }
2296 }
2297
2298 error = 0;
2299
2300 bus_dmamap_sync(bd->mbuf_dma_tag, txbuf->tb_mbuf_dmamap,
2301 BUS_DMASYNC_PREWRITE);
2302
2303 txbuf->tb_mbuf = m;
7427ac33 2304 txbuf->tb_node = ni;
287603a8
SZ
2305
2306 /*
2307 * TX buffers are accessed in following way:
2308 * acx_fw_txdesc -> acx_host_desc -> buffer
2309 *
2310 * It is quite strange that acx also querys acx_host_desc next to
2311 * the one we have assigned to acx_fw_txdesc even if first one's
2312 * acx_host_desc.h_data_len == acx_fw_txdesc.f_tx_len
2313 *
2314 * So we allocate two acx_host_desc for one acx_fw_txdesc and
2315 * assign the first acx_host_desc to acx_fw_txdesc
2316 *
2317 * For acx111
2318 * host_desc1.h_data_len = buffer_len
2319 * host_desc2.h_data_len = buffer_len - mac_header_len
2320 *
2321 * For acx100
2322 * host_desc1.h_data_len = mac_header_len
2323 * host_desc2.h_data_len = buffer_len - mac_header_len
2324 */
2325
2326 txbuf->tb_desc1->h_data_paddr = htole32(paddr);
2327 txbuf->tb_desc2->h_data_paddr = htole32(paddr + ACX_FRAME_HDRLEN);
2328
2329 txbuf->tb_desc1->h_data_len =
2330 htole16(sc->chip_txdesc1_len ? sc->chip_txdesc1_len
2331 : m->m_pkthdr.len);
2332 txbuf->tb_desc2->h_data_len =
2333 htole16(m->m_pkthdr.len - ACX_FRAME_HDRLEN);
2334
2335 /*
2336 * NOTE:
2337 * We can't simply assign f_tx_ctrl, we will first read it back
2338 * and change it bit by bit
2339 */
2340 ctrl = FW_TXDESC_GETFIELD_1(sc, txbuf, f_tx_ctrl);
2341 ctrl |= sc->chip_fw_txdesc_ctrl; /* extra chip specific flags */
2342 ctrl &= ~(DESC_CTRL_HOSTOWN | DESC_CTRL_ACXDONE);
2343
2344 FW_TXDESC_SETFIELD_4(sc, txbuf, f_tx_len, m->m_pkthdr.len);
2345 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_error, 0);
89999817
SZ
2346 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_data_nretry, 0);
2347 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_rts_nretry, 0);
287603a8 2348 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_rts_ok, 0);
7427ac33 2349 sc->chip_set_fw_txdesc_rate(sc, txbuf, ni, m->m_pkthdr.len);
287603a8
SZ
2350
2351 txbuf->tb_desc1->h_ctrl = 0;
2352 txbuf->tb_desc2->h_ctrl = 0;
2353 bus_dmamap_sync(rd->tx_ring_dma_tag, rd->tx_ring_dmamap,
2354 BUS_DMASYNC_PREWRITE);
2355
2356 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_ctrl2, 0);
2357 FW_TXDESC_SETFIELD_1(sc, txbuf, f_tx_ctrl, ctrl);
2358
2359 /* Tell chip to inform us about TX completion */
2360 CSR_WRITE_2(sc, ACXREG_INTR_TRIG, ACXRV_TRIG_TX_FINI);
2361back:
2362 if (error)
841ab66c 2363 m_freem(m);
287603a8
SZ
2364 return error;
2365}
2366
287603a8
SZ
2367static int
2368acx_set_null_tmplt(struct acx_softc *sc)
2369{
2370 struct acx_tmplt_null_data n;
2371 struct ieee80211_frame *f;
2372
2373 bzero(&n, sizeof(n));
2374
2375 f = &n.data;
2376 f->i_fc[0] = IEEE80211_FC0_SUBTYPE_NODATA | IEEE80211_FC0_TYPE_DATA;
2377 IEEE80211_ADDR_COPY(f->i_addr1, etherbroadcastaddr);
2378 IEEE80211_ADDR_COPY(f->i_addr2, IF_LLADDR(&sc->sc_ic.ic_if));
2379 IEEE80211_ADDR_COPY(f->i_addr3, etherbroadcastaddr);
2380
2381 return _acx_set_null_data_tmplt(sc, &n, sizeof(n));
2382}
2383
2384static int
2385acx_set_probe_req_tmplt(struct acx_softc *sc, const char *ssid, int ssid_len)
2386{
2387 struct acx_tmplt_probe_req req;
2388 struct ieee80211_frame *f;
2389 uint8_t *v;
2390 int vlen;
2391
2392 bzero(&req, sizeof(req));
2393
2394 f = &req.data.u_data.f;
2395 f->i_fc[0] = IEEE80211_FC0_SUBTYPE_PROBE_REQ | IEEE80211_FC0_TYPE_MGT;
2396 IEEE80211_ADDR_COPY(f->i_addr1, etherbroadcastaddr);
2397 IEEE80211_ADDR_COPY(f->i_addr2, IF_LLADDR(&sc->sc_ic.ic_if));
2398 IEEE80211_ADDR_COPY(f->i_addr3, etherbroadcastaddr);
2399
2400 v = req.data.u_data.var;
841ab66c 2401 v = ieee80211_add_ssid(v, ssid, ssid_len);
287603a8
SZ
2402 v = ieee80211_add_rates(v, &sc->sc_ic.ic_sup_rates[sc->chip_phymode]);
2403 v = ieee80211_add_xrates(v, &sc->sc_ic.ic_sup_rates[sc->chip_phymode]);
2404 vlen = v - req.data.u_data.var;
2405
2406 return _acx_set_probe_req_tmplt(sc, &req,
2407 ACX_TMPLT_PROBE_REQ_SIZ(vlen));
2408}
2409
2410static int
7427ac33 2411acx_set_probe_resp_tmplt(struct acx_softc *sc, struct ieee80211_node *ni)
287603a8 2412{
7427ac33 2413 struct ieee80211com *ic = &sc->sc_ic;
287603a8 2414 struct acx_tmplt_probe_resp resp;
7427ac33
SZ
2415 struct ieee80211_beacon_offsets bo;
2416 struct mbuf *m;
2417 int len;
287603a8
SZ
2418
2419 bzero(&resp, sizeof(resp));
2420
7427ac33
SZ
2421 bzero(&bo, sizeof(bo));
2422 m = ieee80211_beacon_alloc(ic, ni, &bo);
2423 DPRINTF((&ic->ic_if, "%s alloc beacon size %d\n", __func__,
2424 m->m_pkthdr.len));
287603a8 2425
7427ac33
SZ
2426 m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&resp.data);
2427 len = m->m_pkthdr.len + sizeof(resp.size);
2428 m_freem(m);
287603a8 2429
7427ac33 2430 return _acx_set_probe_resp_tmplt(sc, &resp, len);
287603a8
SZ
2431}
2432
287603a8 2433static int
7427ac33 2434acx_set_beacon_tmplt(struct acx_softc *sc, struct ieee80211_node *ni)
287603a8 2435{
7427ac33 2436 struct ieee80211com *ic = &sc->sc_ic;
287603a8 2437 struct acx_tmplt_beacon beacon;
7427ac33
SZ
2438 struct ieee80211_beacon_offsets bo;
2439 struct mbuf *m;
2440 int len;
287603a8
SZ
2441
2442 bzero(&beacon, sizeof(beacon));
2443
7427ac33
SZ
2444 bzero(&bo, sizeof(bo));
2445 m = ieee80211_beacon_alloc(ic, ni, &bo);
2446 DPRINTF((&ic->ic_if, "%s alloc beacon size %d\n", __func__,
2447 m->m_pkthdr.len));
287603a8 2448
7427ac33
SZ
2449 m_copydata(m, 0, m->m_pkthdr.len, (caddr_t)&beacon.data);
2450 len = m->m_pkthdr.len + sizeof(beacon.size);
2451 m_freem(m);
287603a8 2452
7427ac33 2453 return _acx_set_beacon_tmplt(sc, &beacon, len);
287603a8
SZ
2454}
2455
2456static int
2457acx_sysctl_msdu_lifetime(SYSCTL_HANDLER_ARGS)
2458{
2459 struct acx_softc *sc = arg1;
2460 struct ifnet *ifp = &sc->sc_ic.ic_if;
2461 int error = 0, v;
2462
2463 lwkt_serialize_enter(ifp->if_serializer);
2464
2465 v = sc->sc_msdu_lifetime;
2466 error = sysctl_handle_int(oidp, &v, 0, req);
2467 if (error || req->newptr == NULL)
2468 goto back;
2469 if (v <= 0) {
2470 error = EINVAL;
2471 goto back;
2472 }
2473
2474 if (sc->sc_flags & ACX_FLAG_FW_LOADED) {
2475 struct acx_conf_msdu_lifetime msdu_lifetime;
2476
2477 msdu_lifetime.lifetime = htole32(v);
2478 if (acx_set_msdu_lifetime_conf(sc, &msdu_lifetime) != 0) {
2479 if_printf(&sc->sc_ic.ic_if,
2480 "can't set MSDU lifetime\n");
2481 error = ENXIO;
2482 goto back;
2483 }
2484 }
2485 sc->sc_msdu_lifetime = v;
2486back:
2487 lwkt_serialize_exit(ifp->if_serializer);
2488 return error;
2489}