Create 'k' versions of the kernel malloc API.
[dragonfly.git] / sys / dev / agp / agp_i810.c
CommitLineData
ab5a0ec8 1/*
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2 * Copyright (c) 2000 Doug Rabson
3 * Copyright (c) 2000 Ruslan Ermilov
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 * $FreeBSD: src/sys/pci/agp_i810.c,v 1.1.2.5 2002/09/15 08:45:41 anholt Exp $
ab5a0ec8 28 * $DragonFly: src/sys/dev/agp/agp_i810.c,v 1.8 2004/07/04 00:24:52 dillon Exp $
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29 */
30
31/*
32 * Fixes for 830/845G support: David Dawes <dawes@xfree86.org>
33 */
34
35#include "opt_bus.h"
36#include "opt_pci.h"
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/malloc.h>
41#include <sys/kernel.h>
42#include <sys/bus.h>
43#include <sys/lock.h>
44
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45#include <bus/pci/pcivar.h>
46#include <bus/pci/pcireg.h>
47#include "agppriv.h"
48#include "agpreg.h"
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49
50#include <vm/vm.h>
51#include <vm/vm_object.h>
52#include <vm/vm_page.h>
53#include <vm/vm_pageout.h>
54#include <vm/pmap.h>
55
56#include <machine/bus.h>
57#include <machine/resource.h>
58#include <sys/rman.h>
59
60MALLOC_DECLARE(M_AGP);
61
62#define READ1(off) bus_space_read_1(sc->bst, sc->bsh, off)
63#define READ4(off) bus_space_read_4(sc->bst, sc->bsh, off)
64#define WRITE4(off,v) bus_space_write_4(sc->bst, sc->bsh, off, v)
65
66#define CHIP_I810 0 /* i810/i815 */
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67#define CHIP_I830 1 /* 830M/845G */
68#define CHIP_I855 2 /* 852GM/855GM/865G */
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69
70struct agp_i810_softc {
71 struct agp_softc agp;
72 u_int32_t initial_aperture; /* aperture size at startup */
73 struct agp_gatt *gatt;
74 int chiptype; /* i810-like or i830 */
75 u_int32_t dcache_size; /* i810 only */
76 u_int32_t stolen; /* number of i830/845 gtt entries for stolen memory */
77 device_t bdev; /* bridge device */
78 struct resource *regs; /* memory mapped GC registers */
79 bus_space_tag_t bst; /* bus_space tag */
80 bus_space_handle_t bsh; /* bus_space handle */
81};
82
83static const char*
84agp_i810_match(device_t dev)
85{
86 if (pci_get_class(dev) != PCIC_DISPLAY
87 || pci_get_subclass(dev) != PCIS_DISPLAY_VGA)
88 return NULL;
89
90 switch (pci_get_devid(dev)) {
91 case 0x71218086:
92 return ("Intel 82810 (i810 GMCH) SVGA controller");
93
94 case 0x71238086:
95 return ("Intel 82810-DC100 (i810-DC100 GMCH) SVGA controller");
96
97 case 0x71258086:
98 return ("Intel 82810E (i810E GMCH) SVGA controller");
99
100 case 0x11328086:
101 return ("Intel 82815 (i815 GMCH) SVGA controller");
102
103 case 0x35778086:
ab5a0ec8 104 return ("Intel 82830M (i830M GMCH) SVGA controller");
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105
106 case 0x25628086:
ab5a0ec8 107 return ("Intel 82845G (i845 GMCH) SVGA controller");
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108
109 case 0x25728086:
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110 return ("Intel 82865G (i865 GMCH) SVGA controller");
111
112 case 0x35828086:
113 switch (pci_read_config(dev, AGP_I85X_CAPID, 1)) {
114 case AGP_I855_GME:
115 return ("Intel 82855GME (855GME GMCH) SVGA controller");
116
117 case AGP_I855_GM:
118 return ("Intel 82855GM (855GM GMCH) SVGA controller");
119
120 case AGP_I852_GME:
121 return ("Intel 82852GME (852GME GMCH) SVGA controller");
122
123 case AGP_I852_GM:
124 return ("Intel 82852GM (852GM GMCH) SVGA controller");
125
126 default:
127 return ("Intel 8285xM (85xGM GMCH) SVGA controller");
128 }
129 /* not reached */
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130 };
131
132 return NULL;
133}
134
135/*
136 * Find bridge device.
137 */
138static device_t
139agp_i810_find_bridge(device_t dev)
140{
141 device_t *children, child;
142 int nchildren, i;
143 u_int32_t devid;
144
145 /*
146 * Calculate bridge device's ID.
147 */
148 devid = pci_get_devid(dev);
149 switch (devid) {
150 case 0x71218086:
151 case 0x71238086:
152 case 0x71258086:
153 devid -= 0x10000;
154 break;
155
156 case 0x11328086:
157 case 0x35778086:
158 case 0x25628086:
be566ddd 159 case 0x25728086:
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160 devid -= 0x20000;
161 break;
162 };
163 if (device_get_children(device_get_parent(dev), &children, &nchildren))
164 return 0;
165
166 for (i = 0; i < nchildren; i++) {
167 child = children[i];
168
169 if (pci_get_devid(child) == devid) {
170 free(children, M_TEMP);
171 return child;
172 }
173 }
174 free(children, M_TEMP);
175 return 0;
176}
177
178static int
179agp_i810_probe(device_t dev)
180{
181 const char *desc;
182
183 desc = agp_i810_match(dev);
184 if (desc) {
185 device_t bdev;
186 u_int8_t smram;
ab5a0ec8 187 unsigned int gcc1;
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188 int devid = pci_get_devid(dev);
189
190 bdev = agp_i810_find_bridge(dev);
191 if (!bdev) {
192 if (bootverbose)
193 printf("I810: can't find bridge device\n");
194 return ENXIO;
195 }
196
197 /*
198 * checking whether internal graphics device has been activated.
199 */
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200 switch(devid) {
201 case 0x71218086:
202 case 0x71238086:
203 case 0x71258086:
204 case 0x11328086:
205 /* i810 */
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206 smram = pci_read_config(bdev, AGP_I810_SMRAM, 1);
207 if ((smram & AGP_I810_SMRAM_GMS)
208 == AGP_I810_SMRAM_GMS_DISABLED) {
209 if (bootverbose)
210 printf("I810: disabled, not probing\n");
211 return ENXIO;
212 }
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213 break;
214 case 0x35778086:
215 case 0x35828086:
216 case 0x25628086:
217 case 0x25728086:
218 /* i830 */
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219 gcc1 = pci_read_config(bdev, AGP_I830_GCC1, 1);
220 if ((gcc1 & AGP_I830_GCC1_DEV2) == AGP_I830_GCC1_DEV2_DISABLED) {
221 if (bootverbose)
222 printf("I830: disabled, not probing\n");
223 return ENXIO;
224 }
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225 break;
226 default:
227 return ENXIO;
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228 }
229
230 device_verbose(dev);
231 device_set_desc(dev, desc);
232 return 0;
233 }
234
235 return ENXIO;
236}
237
238static int
239agp_i810_attach(device_t dev)
240{
241 struct agp_i810_softc *sc = device_get_softc(dev);
242 struct agp_gatt *gatt;
243 int error, rid;
244
245 sc->bdev = agp_i810_find_bridge(dev);
246 if (!sc->bdev)
247 return ENOENT;
248
249 error = agp_generic_attach(dev);
250 if (error)
251 return error;
252
253 switch (pci_get_devid(dev)) {
254 case 0x71218086:
255 case 0x71238086:
256 case 0x71258086:
257 case 0x11328086:
258 sc->chiptype = CHIP_I810;
259 break;
260 case 0x35778086:
261 case 0x25628086:
262 sc->chiptype = CHIP_I830;
263 break;
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264 case 0x25728086:
265 case 0x35828086:
266 sc->chiptype = CHIP_I855;
267 break;
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268 };
269
270 /* Same for i810 and i830 */
271 rid = AGP_I810_MMADR;
272 sc->regs = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
273 0, ~0, 1, RF_ACTIVE);
274 if (!sc->regs) {
275 agp_generic_detach(dev);
276 return ENOMEM;
277 }
278 sc->bst = rman_get_bustag(sc->regs);
279 sc->bsh = rman_get_bushandle(sc->regs);
280
281 sc->initial_aperture = AGP_GET_APERTURE(dev);
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282 if (sc->initial_aperture == 0) {
283 device_printf(dev, "bad initial aperture size, disabling\n");
284 return ENXIO;
285 }
984263bc 286
97fe41b7 287 gatt = malloc( sizeof(struct agp_gatt), M_AGP, M_INTWAIT);
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288 sc->gatt = gatt;
289
290 gatt->ag_entries = AGP_GET_APERTURE(dev) >> AGP_PAGE_SHIFT;
291
292 if ( sc->chiptype == CHIP_I810 ) {
293 /* Some i810s have on-chip memory called dcache */
294 if (READ1(AGP_I810_DRT) & AGP_I810_DRT_POPULATED)
295 sc->dcache_size = 4 * 1024 * 1024;
296 else
297 sc->dcache_size = 0;
298
299 /* According to the specs the gatt on the i810 must be 64k */
300 gatt->ag_virtual = contigmalloc( 64 * 1024, M_AGP, 0,
301 0, ~0, PAGE_SIZE, 0);
302 if (!gatt->ag_virtual) {
303 if (bootverbose)
304 device_printf(dev, "contiguous allocation failed\n");
305 free(gatt, M_AGP);
306 agp_generic_detach(dev);
307 return ENOMEM;
308 }
309 bzero(gatt->ag_virtual, gatt->ag_entries * sizeof(u_int32_t));
310
311 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual);
312 agp_flush_cache();
313 /* Install the GATT. */
314 WRITE4(AGP_I810_PGTBL_CTL, gatt->ag_physical | 1);
ab5a0ec8 315 } else if (sc->chiptype == CHIP_I830) {
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316 /* The i830 automatically initializes the 128k gatt on boot. */
317 unsigned int gcc1, pgtblctl;
318
319 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 1);
320 switch (gcc1 & AGP_I830_GCC1_GMS) {
321 case AGP_I830_GCC1_GMS_STOLEN_512:
322 sc->stolen = (512 - 132) * 1024 / 4096;
323 break;
324 case AGP_I830_GCC1_GMS_STOLEN_1024:
325 sc->stolen = (1024 - 132) * 1024 / 4096;
326 break;
327 case AGP_I830_GCC1_GMS_STOLEN_8192:
328 sc->stolen = (8192 - 132) * 1024 / 4096;
329 break;
330 default:
331 sc->stolen = 0;
332 device_printf(dev, "unknown memory configuration, disabling\n");
333 agp_generic_detach(dev);
334 return EINVAL;
335 }
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336 if (sc->stolen > 0) {
337 device_printf(dev,
338 "detected %dk stolen memory\n", sc->stolen * 4);
339 }
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340 device_printf(dev, "aperture size is %dM\n", sc->initial_aperture / 1024 / 1024);
341
342 /* GATT address is already in there, make sure it's enabled */
343 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
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344 pgtblctl |= 1;
345 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
346
347 gatt->ag_physical = pgtblctl & ~1;
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348 } else { /* CHIP_I855 */
349 /* The i855 automatically initializes the 128k gatt on boot. */
350 unsigned int gcc1, pgtblctl;
984263bc 351
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352 gcc1 = pci_read_config(sc->bdev, AGP_I855_GCC1, 1);
353 switch (gcc1 & AGP_I855_GCC1_GMS) {
354 case AGP_I855_GCC1_GMS_STOLEN_1M:
355 sc->stolen = (1024 - 132) * 1024 / 4096;
356 break;
357 case AGP_I855_GCC1_GMS_STOLEN_4M:
358 sc->stolen = (4096 - 132) * 1024 / 4096;
359 break;
360 case AGP_I855_GCC1_GMS_STOLEN_8M:
361 sc->stolen = (8192 - 132) * 1024 / 4096;
362 break;
363 case AGP_I855_GCC1_GMS_STOLEN_16M:
364 sc->stolen = (16384 - 132) * 1024 / 4096;
365 break;
366 case AGP_I855_GCC1_GMS_STOLEN_32M:
367 sc->stolen = (32768 - 132) * 1024 / 4096;
368 break;
369 default:
370 sc->stolen = 0;
371 device_printf(dev,
372 "unknown memory configuration, disabling\n");
373 agp_generic_detach(dev);
374 return EINVAL;
375 }
376 if (sc->stolen > 0) {
377 device_printf(dev, "detected %dk stolen memory\n",
378 sc->stolen * 4);
379 }
380 device_printf(dev, "aperture size is %dM\n",
381 sc->initial_aperture / 1024 / 1024);
984263bc 382
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383 /* GATT address is already in there, make sure it's enabled */
384 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
385 pgtblctl |= 1;
386 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
387
388 gatt->ag_physical = pgtblctl & ~1;
389 }
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390 return 0;
391}
392
393static int
394agp_i810_detach(device_t dev)
395{
396 struct agp_i810_softc *sc = device_get_softc(dev);
397 int error;
398
399 error = agp_generic_detach(dev);
400 if (error)
401 return error;
402
403 /* Clear the GATT base. */
404 if ( sc->chiptype == CHIP_I810 ) {
405 WRITE4(AGP_I810_PGTBL_CTL, 0);
406 } else {
407 unsigned int pgtblctl;
408 pgtblctl = READ4(AGP_I810_PGTBL_CTL);
409 pgtblctl &= ~1;
410 WRITE4(AGP_I810_PGTBL_CTL, pgtblctl);
411 }
412
413 /* Put the aperture back the way it started. */
414 AGP_SET_APERTURE(dev, sc->initial_aperture);
415
416 if ( sc->chiptype == CHIP_I810 ) {
417 contigfree(sc->gatt->ag_virtual, 64 * 1024, M_AGP);
418 }
419 free(sc->gatt, M_AGP);
420
421 bus_release_resource(dev, SYS_RES_MEMORY,
422 AGP_I810_MMADR, sc->regs);
423
424 return 0;
425}
426
427static u_int32_t
428agp_i810_get_aperture(device_t dev)
429{
430 struct agp_i810_softc *sc = device_get_softc(dev);
431
432 if ( sc->chiptype == CHIP_I810 ) {
433 u_int16_t miscc;
434 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
435 if ((miscc & AGP_I810_MISCC_WINSIZE) == AGP_I810_MISCC_WINSIZE_32)
436 return 32 * 1024 * 1024;
437 else
438 return 64 * 1024 * 1024;
439 } else { /* I830 */
440 unsigned int gcc1;
441
442 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
443 if ((gcc1 & AGP_I830_GCC1_GMASIZE) == AGP_I830_GCC1_GMASIZE_64)
444 return 64 * 1024 * 1024;
445 else
446 return 128 * 1024 * 1024;
447 }
448}
449
450static int
451agp_i810_set_aperture(device_t dev, u_int32_t aperture)
452{
453 struct agp_i810_softc *sc = device_get_softc(dev);
454 u_int16_t miscc;
455
456 if ( sc->chiptype == CHIP_I810 ) {
457 /*
458 * Double check for sanity.
459 */
460 if (aperture != 32 * 1024 * 1024 && aperture != 64 * 1024 * 1024) {
461 device_printf(dev, "bad aperture size %d\n", aperture);
462 return EINVAL;
463 }
464
465 miscc = pci_read_config(sc->bdev, AGP_I810_MISCC, 2);
466 miscc &= ~AGP_I810_MISCC_WINSIZE;
467 if (aperture == 32 * 1024 * 1024)
468 miscc |= AGP_I810_MISCC_WINSIZE_32;
469 else
470 miscc |= AGP_I810_MISCC_WINSIZE_64;
471
472 pci_write_config(sc->bdev, AGP_I810_MISCC, miscc, 2);
473 } else { /* I830 */
474 unsigned int gcc1;
475
476 if (aperture != 64 * 1024 * 1024 && aperture != 128 * 1024 * 1024) {
477 device_printf(dev, "bad aperture size %d\n", aperture);
478 return EINVAL;
479 }
480 gcc1 = pci_read_config(sc->bdev, AGP_I830_GCC1, 2);
481 gcc1 &= ~AGP_I830_GCC1_GMASIZE;
482 if (aperture == 64 * 1024 * 1024)
483 gcc1 |= AGP_I830_GCC1_GMASIZE_64;
484 else
485 gcc1 |= AGP_I830_GCC1_GMASIZE_128;
486
487 pci_write_config(sc->bdev, AGP_I830_GCC1, gcc1, 2);
488 }
489
490 return 0;
491}
492
493static int
494agp_i810_bind_page(device_t dev, int offset, vm_offset_t physical)
495{
496 struct agp_i810_softc *sc = device_get_softc(dev);
497
498 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT)) {
499 device_printf(dev, "failed: offset is 0x%08x, shift is %d, entries is %d\n", offset, AGP_PAGE_SHIFT, sc->gatt->ag_entries);
500 return EINVAL;
501 }
502
503 if ( sc->chiptype == CHIP_I830 ) {
504 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
505 device_printf(dev, "trying to bind into stolen memory");
506 return EINVAL;
507 }
508 }
509
510 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, physical | 1);
511 return 0;
512}
513
514static int
515agp_i810_unbind_page(device_t dev, int offset)
516{
517 struct agp_i810_softc *sc = device_get_softc(dev);
518
519 if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
520 return EINVAL;
521
522 if ( sc->chiptype == CHIP_I830 ) {
523 if ( (offset >> AGP_PAGE_SHIFT) < sc->stolen ) {
524 device_printf(dev, "trying to unbind from stolen memory");
525 return EINVAL;
526 }
527 }
528
529 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4, 0);
530 return 0;
531}
532
533/*
534 * Writing via memory mapped registers already flushes all TLBs.
535 */
536static void
537agp_i810_flush_tlb(device_t dev)
538{
539}
540
541static int
542agp_i810_enable(device_t dev, u_int32_t mode)
543{
544
545 return 0;
546}
547
548static struct agp_memory *
549agp_i810_alloc_memory(device_t dev, int type, vm_size_t size)
550{
551 struct agp_i810_softc *sc = device_get_softc(dev);
552 struct agp_memory *mem;
553
554 if ((size & (AGP_PAGE_SIZE - 1)) != 0)
555 return 0;
556
557 if (sc->agp.as_allocated + size > sc->agp.as_maxmem)
558 return 0;
559
560 if (type == 1) {
561 /*
562 * Mapping local DRAM into GATT.
563 */
564 if ( sc->chiptype == CHIP_I830 )
565 return 0;
566 if (size != sc->dcache_size)
567 return 0;
568 } else if (type == 2) {
569 /*
570 * Bogus mapping of a single page for the hardware cursor.
571 */
572 if (size != AGP_PAGE_SIZE)
573 return 0;
574 }
575
97fe41b7 576 mem = malloc(sizeof *mem, M_AGP, M_INTWAIT);
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577 mem->am_id = sc->agp.as_nextid++;
578 mem->am_size = size;
579 mem->am_type = type;
580 if (type != 1)
581 mem->am_obj = vm_object_allocate(OBJT_DEFAULT,
582 atop(round_page(size)));
583 else
584 mem->am_obj = 0;
585
586 if (type == 2) {
587 /*
588 * Allocate and wire down the page now so that we can
589 * get its physical address.
590 */
591 vm_page_t m;
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592 m = vm_page_grab(mem->am_obj, 0,
593 VM_ALLOC_NORMAL|VM_ALLOC_ZERO|VM_ALLOC_RETRY);
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594 if ((m->flags & PG_ZERO) == 0)
595 vm_page_zero_fill(m);
596 vm_page_wire(m);
597 mem->am_physical = VM_PAGE_TO_PHYS(m);
598 vm_page_wakeup(m);
599 } else {
600 mem->am_physical = 0;
601 }
602
603 mem->am_offset = 0;
604 mem->am_is_bound = 0;
605 TAILQ_INSERT_TAIL(&sc->agp.as_memory, mem, am_link);
606 sc->agp.as_allocated += size;
607
608 return mem;
609}
610
611static int
612agp_i810_free_memory(device_t dev, struct agp_memory *mem)
613{
614 struct agp_i810_softc *sc = device_get_softc(dev);
615
616 if (mem->am_is_bound)
617 return EBUSY;
618
619 if (mem->am_type == 2) {
620 /*
621 * Unwire the page which we wired in alloc_memory.
622 */
623 vm_page_t m = vm_page_lookup(mem->am_obj, 0);
624 vm_page_unwire(m, 0);
625 }
626
627 sc->agp.as_allocated -= mem->am_size;
628 TAILQ_REMOVE(&sc->agp.as_memory, mem, am_link);
629 if (mem->am_obj)
630 vm_object_deallocate(mem->am_obj);
631 free(mem, M_AGP);
632 return 0;
633}
634
635static int
636agp_i810_bind_memory(device_t dev, struct agp_memory *mem,
637 vm_offset_t offset)
638{
639 struct agp_i810_softc *sc = device_get_softc(dev);
640 vm_offset_t i;
641
642 if (mem->am_type != 1)
643 return agp_generic_bind_memory(dev, mem, offset);
644
645 if ( sc->chiptype == CHIP_I830 )
646 return EINVAL;
647
648 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) {
649 WRITE4(AGP_I810_GTT + (offset >> AGP_PAGE_SHIFT) * 4,
650 i | 3);
651 }
652
653 return 0;
654}
655
656static int
657agp_i810_unbind_memory(device_t dev, struct agp_memory *mem)
658{
659 struct agp_i810_softc *sc = device_get_softc(dev);
660 vm_offset_t i;
661
662 if (mem->am_type != 1)
663 return agp_generic_unbind_memory(dev, mem);
664
665 if ( sc->chiptype == CHIP_I830 )
666 return EINVAL;
667
668 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE)
669 WRITE4(AGP_I810_GTT + (i >> AGP_PAGE_SHIFT) * 4, 0);
670
671 return 0;
672}
673
674static device_method_t agp_i810_methods[] = {
675 /* Device interface */
676 DEVMETHOD(device_probe, agp_i810_probe),
677 DEVMETHOD(device_attach, agp_i810_attach),
678 DEVMETHOD(device_detach, agp_i810_detach),
679 DEVMETHOD(device_shutdown, bus_generic_shutdown),
680 DEVMETHOD(device_suspend, bus_generic_suspend),
681 DEVMETHOD(device_resume, bus_generic_resume),
682
683 /* AGP interface */
684 DEVMETHOD(agp_get_aperture, agp_i810_get_aperture),
685 DEVMETHOD(agp_set_aperture, agp_i810_set_aperture),
686 DEVMETHOD(agp_bind_page, agp_i810_bind_page),
687 DEVMETHOD(agp_unbind_page, agp_i810_unbind_page),
688 DEVMETHOD(agp_flush_tlb, agp_i810_flush_tlb),
689 DEVMETHOD(agp_enable, agp_i810_enable),
690 DEVMETHOD(agp_alloc_memory, agp_i810_alloc_memory),
691 DEVMETHOD(agp_free_memory, agp_i810_free_memory),
692 DEVMETHOD(agp_bind_memory, agp_i810_bind_memory),
693 DEVMETHOD(agp_unbind_memory, agp_i810_unbind_memory),
694
695 { 0, 0 }
696};
697
698static driver_t agp_i810_driver = {
699 "agp",
700 agp_i810_methods,
701 sizeof(struct agp_i810_softc),
702};
703
704static devclass_t agp_devclass;
705
706DRIVER_MODULE(agp_i810, pci, agp_i810_driver, agp_devclass, 0, 0);
f7841f3c
MD
707MODULE_DEPEND(agp_i810, agp, 1, 1, 1);
708MODULE_DEPEND(agp_i810, pci, 1, 1, 1);