drm/i915: Update to Linux 3.9.11
[dragonfly.git] / sys / dev / drm / drm_edid.c
CommitLineData
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1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30
21ba7ac9 31#include <linux/export.h>
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32#include <linux/kernel.h>
33#include <linux/i2c.h>
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34#include <drm/drmP.h>
35#include <drm/drm_edid.h>
36#include "drm_edid_modes.h"
30582b45
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37#include <bus/iicbus/iic.h>
38#include <bus/iicbus/iiconf.h>
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39#include "iicbus_if.h"
40
41#define version_greater(edid, maj, min) \
42 (((edid)->version > (maj)) || \
43 ((edid)->version == (maj) && (edid)->revision > (min)))
44
45#define EDID_EST_TIMINGS 16
46#define EDID_STD_TIMINGS 8
47#define EDID_DETAILED_TIMINGS 4
48
49/*
50 * EDID blocks out in the wild have a variety of bugs, try to collect
51 * them here (note that userspace may work around broken monitors first,
52 * but fixes should make their way here so that the kernel "just works"
53 * on as many displays as possible).
54 */
55
56/* First detailed mode wrong, use largest 60Hz mode */
57#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
58/* Reported 135MHz pixel clock is too high, needs adjustment */
59#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
60/* Prefer the largest mode at 75 Hz */
61#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
62/* Detail timing is in cm not mm */
63#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
64/* Detailed timing descriptors have bogus size values, so just take the
65 * maximum size and use that.
66 */
67#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
68/* Monitor forgot to set the first detailed is preferred bit. */
69#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
70/* use +hsync +vsync for detailed mode */
71#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
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72/* Force reduced-blanking timings for detailed modes */
73#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
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74
75struct detailed_mode_closure {
76 struct drm_connector *connector;
77 struct edid *edid;
78 bool preferred;
79 u32 quirks;
80 int modes;
81};
82
83#define LEVEL_DMT 0
84#define LEVEL_GTF 1
85#define LEVEL_GTF2 2
86#define LEVEL_CVT 3
87
88static struct edid_quirk {
6e29dde8 89 char vendor[4];
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90 int product_id;
91 u32 quirks;
92} edid_quirk_list[] = {
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93 /* ASUS VW222S */
94 { "ACI", 0x22a2, EDID_QUIRK_FORCE_REDUCED_BLANKING },
95
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96 /* Acer AL1706 */
97 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
98 /* Acer F51 */
99 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
100 /* Unknown Acer */
101 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
102
103 /* Belinea 10 15 55 */
104 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
105 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
106
107 /* Envision Peripherals, Inc. EN-7100e */
108 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
109 /* Envision EN2028 */
110 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
111
112 /* Funai Electronics PM36B */
113 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
114 EDID_QUIRK_DETAILED_IN_CM },
115
116 /* LG Philips LCD LP154W01-A5 */
117 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
118 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
119
120 /* Philips 107p5 CRT */
121 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
122
123 /* Proview AY765C */
124 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
125
126 /* Samsung SyncMaster 205BW. Note: irony */
127 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
128 /* Samsung SyncMaster 22[5-6]BW */
129 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
130 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
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131
132 /* ViewSonic VA2026w */
133 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
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134};
135
136/*** DDC fetch and block validation ***/
137
138static const u8 edid_header[] = {
139 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
140};
141
142 /*
143 * Sanity check the header of the base EDID block. Return 8 if the header
144 * is perfect, down to 0 if it's totally wrong.
145 */
146int drm_edid_header_is_valid(const u8 *raw_edid)
147{
148 int i, score = 0;
149
150 for (i = 0; i < sizeof(edid_header); i++)
151 if (raw_edid[i] == edid_header[i])
152 score++;
153
154 return score;
155}
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156EXPORT_SYMBOL(drm_edid_header_is_valid);
157
158static int edid_fixup __read_mostly = 6;
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159
160/*
161 * Sanity check the EDID block (base or extension). Return 0 if the block
162 * doesn't check out, or 1 if it's valid.
163 */
ce3d36d7 164bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
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165{
166 int i;
167 u8 csum = 0;
168 struct edid *edid = (struct edid *)raw_edid;
169
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170 if (edid_fixup > 8 || edid_fixup < 0)
171 edid_fixup = 6;
172
173 if (block == 0) {
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174 int score = drm_edid_header_is_valid(raw_edid);
175 if (score == 8) ;
ce3d36d7 176 else if (score >= edid_fixup) {
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177 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
178 memcpy(raw_edid, edid_header, sizeof(edid_header));
179 } else {
180 goto bad;
181 }
182 }
183
184 for (i = 0; i < EDID_LENGTH; i++)
185 csum += raw_edid[i];
186 if (csum) {
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187 if (print_bad_edid) {
188 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
189 }
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190
191 /* allow CEA to slide through, switches mangle this */
192 if (raw_edid[0] != 0x02)
193 goto bad;
194 }
195
196 /* per-block-type checks */
197 switch (raw_edid[0]) {
198 case 0: /* base */
199 if (edid->version != 1) {
200 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
201 goto bad;
202 }
203
204 if (edid->revision > 4)
205 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
206 break;
207
208 default:
209 break;
210 }
211
212 return 1;
213
214bad:
ce3d36d7 215 if (raw_edid && print_bad_edid) {
575ea5a0 216 DRM_DEBUG_KMS("Raw EDID:\n");
1d5dd71d 217 if ((drm_debug & DRM_DEBUGBITS_KMS) != 0) {
575ea5a0 218 for (i = 0; i < EDID_LENGTH; ) {
edace09c 219 kprintf("%02x", raw_edid[i]);
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220 i++;
221 if (i % 16 == 0 || i == EDID_LENGTH)
edace09c 222 kprintf("\n");
575ea5a0 223 else if (i % 8 == 0)
edace09c 224 kprintf(" ");
575ea5a0 225 else
edace09c 226 kprintf(" ");
575ea5a0
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227 }
228 }
229 }
230 return 0;
231}
ce3d36d7 232EXPORT_SYMBOL(drm_edid_block_valid);
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233
234/**
235 * drm_edid_is_valid - sanity check EDID data
236 * @edid: EDID data
237 *
238 * Sanity-check an entire EDID record (including extensions)
239 */
240bool drm_edid_is_valid(struct edid *edid)
241{
242 int i;
243 u8 *raw = (u8 *)edid;
244
245 if (!edid)
246 return false;
247
248 for (i = 0; i <= edid->extensions; i++)
ce3d36d7 249 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
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250 return false;
251
252 return true;
253}
ce3d36d7 254EXPORT_SYMBOL(drm_edid_is_valid);
575ea5a0 255
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256#define DDC_SEGMENT_ADDR 0x30
257/**
258 * Get EDID information via I2C.
259 *
260 * \param adapter : i2c device adaptor
261 * \param buf : EDID data buffer to be filled
262 * \param len : EDID data buffer length
263 * \return 0 on success or -1 on failure.
264 *
265 * Try to fetch EDID information by calling i2c driver function.
266 */
267static int
268drm_do_probe_ddc_edid(device_t adapter, unsigned char *buf,
269 int block, int len)
270{
271 unsigned char start = block * EDID_LENGTH;
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272 unsigned char segment = block >> 1;
273 unsigned char xfers = segment ? 3 : 2;
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274 int ret, retries = 5;
275
276 /* The core i2c driver will automatically retry the transfer if the
277 * adapter reports EAGAIN. However, we find that bit-banging transfers
278 * are susceptible to errors under a heavily loaded machine and
279 * generate spurious NAKs and timeouts. Retrying the transfer
280 * of the individual block a few times seems to overcome this.
281 */
282 do {
6e29dde8 283 struct i2c_msg msgs[] = {
575ea5a0 284 {
6f486c69
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285 .slave = DDC_SEGMENT_ADDR << 1,
286 .flags = 0,
287 .len = 1,
288 .buf = &segment,
289 }, {
ef56dbd7 290 .slave = DDC_ADDR << 1,
6e29dde8 291 .flags = 0,
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292 .len = 1,
293 .buf = &start,
294 }, {
ef56dbd7 295 .slave = DDC_ADDR << 1,
6e29dde8 296 .flags = I2C_M_RD,
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297 .len = len,
298 .buf = buf,
299 }
300 };
6f486c69
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301
302 /*
303 * Avoid sending the segment addr to not upset non-compliant ddc
304 * monitors.
305 */
306 ret = iicbus_transfer(adapter, &msgs[3 - xfers], xfers);
307
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308 if (ret != 0)
309 DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n",
310 retries, ret);
311 } while (ret != 0 && --retries);
312
313 return (ret == 0 ? 0 : -1);
314}
315
316static bool drm_edid_is_zero(u8 *in_edid, int length)
317{
318 int i;
319 u32 *raw_edid = (u32 *)in_edid;
320
321 for (i = 0; i < length / 4; i++)
322 if (*(raw_edid + i) != 0)
323 return false;
324 return true;
325}
326
327static u8 *
328drm_do_get_edid(struct drm_connector *connector, device_t adapter)
329{
330 int i, j = 0, valid_extensions = 0;
331 u8 *block, *new;
ce3d36d7 332 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
575ea5a0 333
5a3b77d5 334 block = kmalloc(EDID_LENGTH, M_DRM, M_WAITOK | M_ZERO);
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335
336 /* base block fetch */
337 for (i = 0; i < 4; i++) {
338 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
339 goto out;
ce3d36d7 340 if (drm_edid_block_valid(block, 0, print_bad_edid))
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341 break;
342 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
343 connector->null_edid_counter++;
344 goto carp;
345 }
346 }
347 if (i == 4)
348 goto carp;
349
350 /* if there's no extensions, we're done */
351 if (block[0x7e] == 0)
352 return block;
353
5a3b77d5 354 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, M_DRM,
575ea5a0 355 M_WAITOK);
ce3d36d7
FT
356 if (!new)
357 goto out;
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358 block = new;
359
360 for (j = 1; j <= block[0x7e]; j++) {
361 for (i = 0; i < 4; i++) {
362 if (drm_do_probe_ddc_edid(adapter,
363 block + (valid_extensions + 1) * EDID_LENGTH,
364 j, EDID_LENGTH))
365 goto out;
ce3d36d7 366 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
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367 valid_extensions++;
368 break;
369 }
370 }
371 if (i == 4)
ce3d36d7
FT
372 dev_warn(connector->dev->dev,
373 "%s: Ignoring invalid EDID block %d.\n",
374 drm_get_connector_name(connector), j);
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375 }
376
377 if (valid_extensions != block[0x7e]) {
378 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
379 block[0x7e] = valid_extensions;
edace09c 380 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH,
5a3b77d5 381 M_DRM, M_WAITOK);
ce3d36d7
FT
382 if (!new)
383 goto out;
575ea5a0
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384 block = new;
385 }
386
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387 return block;
388
389carp:
ce3d36d7
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390 if (print_bad_edid) {
391 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
392 drm_get_connector_name(connector), j);
393 }
394 connector->bad_edid_counter++;
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395
396out:
5a3b77d5 397 kfree(block, M_DRM);
575ea5a0
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398 return NULL;
399}
400
401/**
402 * Probe DDC presence.
403 *
404 * \param adapter : i2c device adaptor
405 * \return 1 on success
406 */
ce3d36d7 407bool
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408drm_probe_ddc(device_t adapter)
409{
410 unsigned char out;
411
412 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
413}
ce3d36d7 414EXPORT_SYMBOL(drm_probe_ddc);
575ea5a0
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415
416/**
417 * drm_get_edid - get EDID data, if available
418 * @connector: connector we're probing
419 * @adapter: i2c adapter to use for DDC
420 *
421 * Poke the given i2c channel to grab EDID data if possible. If found,
422 * attach it to the connector.
423 *
424 * Return edid data or NULL if we couldn't find any.
425 */
426struct edid *drm_get_edid(struct drm_connector *connector,
427 device_t adapter)
428{
429 struct edid *edid = NULL;
430
431 if (drm_probe_ddc(adapter))
432 edid = (struct edid *)drm_do_get_edid(connector, adapter);
433
575ea5a0 434 return edid;
575ea5a0 435}
af4b81b9 436EXPORT_SYMBOL(drm_get_edid);
575ea5a0
FT
437
438/*** EDID parsing ***/
439
440/**
441 * edid_vendor - match a string against EDID's obfuscated vendor field
442 * @edid: EDID to match
443 * @vendor: vendor string
444 *
445 * Returns true if @vendor is in @edid, false otherwise
446 */
447static bool edid_vendor(struct edid *edid, char *vendor)
448{
449 char edid_vendor[3];
450
451 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
452 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
453 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
454 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
455
456 return !strncmp(edid_vendor, vendor, 3);
457}
458
459/**
460 * edid_get_quirks - return quirk flags for a given EDID
461 * @edid: EDID to process
462 *
463 * This tells subsequent routines what fixes they need to apply.
464 */
465static u32 edid_get_quirks(struct edid *edid)
466{
467 struct edid_quirk *quirk;
468 int i;
469
6e29dde8 470 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
575ea5a0
FT
471 quirk = &edid_quirk_list[i];
472
473 if (edid_vendor(edid, quirk->vendor) &&
474 (EDID_PRODUCT_ID(edid) == quirk->product_id))
475 return quirk->quirks;
476 }
477
478 return 0;
479}
480
481#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
482#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
483
484/**
485 * edid_fixup_preferred - set preferred modes based on quirk list
486 * @connector: has mode list to fix up
487 * @quirks: quirks list
488 *
489 * Walk the mode list for @connector, clearing the preferred status
490 * on existing modes and setting it anew for the right mode ala @quirks.
491 */
492static void edid_fixup_preferred(struct drm_connector *connector,
493 u32 quirks)
494{
495 struct drm_display_mode *t, *cur_mode, *preferred_mode;
496 int target_refresh = 0;
497
498 if (list_empty(&connector->probed_modes))
499 return;
500
501 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
502 target_refresh = 60;
503 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
504 target_refresh = 75;
505
506 preferred_mode = list_first_entry(&connector->probed_modes,
507 struct drm_display_mode, head);
508
509 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
510 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
511
512 if (cur_mode == preferred_mode)
513 continue;
514
515 /* Largest mode is preferred */
516 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
517 preferred_mode = cur_mode;
518
519 /* At a given size, try to get closest to target refresh */
520 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
521 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
522 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
523 preferred_mode = cur_mode;
524 }
525 }
526
527 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
528}
529
ce3d36d7
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530static bool
531mode_is_rb(const struct drm_display_mode *mode)
532{
533 return (mode->htotal - mode->hdisplay == 160) &&
534 (mode->hsync_end - mode->hdisplay == 80) &&
535 (mode->hsync_end - mode->hsync_start == 32) &&
536 (mode->vsync_start - mode->vdisplay == 3);
537}
538
af4b81b9
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539/*
540 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
541 * @dev: Device to duplicate against
542 * @hsize: Mode width
543 * @vsize: Mode height
544 * @fresh: Mode refresh rate
545 * @rb: Mode reduced-blanking-ness
546 *
547 * Walk the DMT mode list looking for a match for the given parameters.
548 * Return a newly allocated copy of the mode, or NULL if not found.
549 */
575ea5a0 550struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
ce3d36d7
FT
551 int hsize, int vsize, int fresh,
552 bool rb)
575ea5a0 553{
575ea5a0
FT
554 int i;
555
556 for (i = 0; i < drm_num_dmt_modes; i++) {
ce3d36d7
FT
557 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
558 if (hsize != ptr->hdisplay)
559 continue;
560 if (vsize != ptr->vdisplay)
561 continue;
562 if (fresh != drm_mode_vrefresh(ptr))
563 continue;
564 if (rb != mode_is_rb(ptr))
565 continue;
566
567 return drm_mode_duplicate(dev, ptr);
575ea5a0 568 }
ce3d36d7
FT
569
570 return NULL;
575ea5a0 571}
af4b81b9 572EXPORT_SYMBOL(drm_mode_find_dmt);
575ea5a0
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573
574typedef void detailed_cb(struct detailed_timing *timing, void *closure);
575
576static void
577cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
578{
579 int i, n = 0;
e3b244c9 580 u8 d = ext[0x02];
575ea5a0
FT
581 u8 *det_base = ext + d;
582
e3b244c9 583 n = (127 - d) / 18;
575ea5a0
FT
584 for (i = 0; i < n; i++)
585 cb((struct detailed_timing *)(det_base + 18 * i), closure);
586}
587
588static void
589vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
590{
591 unsigned int i, n = min((int)ext[0x02], 6);
592 u8 *det_base = ext + 5;
593
594 if (ext[0x01] != 1)
595 return; /* unknown version */
596
597 for (i = 0; i < n; i++)
598 cb((struct detailed_timing *)(det_base + 18 * i), closure);
599}
600
601static void
602drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
603{
604 int i;
605 struct edid *edid = (struct edid *)raw_edid;
606
607 if (edid == NULL)
608 return;
609
610 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
611 cb(&(edid->detailed_timings[i]), closure);
612
613 for (i = 1; i <= raw_edid[0x7e]; i++) {
614 u8 *ext = raw_edid + (i * EDID_LENGTH);
615 switch (*ext) {
616 case CEA_EXT:
617 cea_for_each_detailed_block(ext, cb, closure);
618 break;
619 case VTB_EXT:
620 vtb_for_each_detailed_block(ext, cb, closure);
621 break;
622 default:
623 break;
624 }
625 }
626}
627
628static void
629is_rb(struct detailed_timing *t, void *data)
630{
631 u8 *r = (u8 *)t;
632 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
633 if (r[15] & 0x10)
634 *(bool *)data = true;
635}
636
637/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
638static bool
639drm_monitor_supports_rb(struct edid *edid)
640{
641 if (edid->revision >= 4) {
6e29dde8 642 bool ret = false;
575ea5a0
FT
643 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
644 return ret;
645 }
646
647 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
648}
649
650static void
651find_gtf2(struct detailed_timing *t, void *data)
652{
653 u8 *r = (u8 *)t;
654 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
655 *(u8 **)data = r;
656}
657
658/* Secondary GTF curve kicks in above some break frequency */
659static int
660drm_gtf2_hbreak(struct edid *edid)
661{
662 u8 *r = NULL;
663 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
664 return r ? (r[12] * 2) : 0;
665}
666
667static int
668drm_gtf2_2c(struct edid *edid)
669{
670 u8 *r = NULL;
671 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
672 return r ? r[13] : 0;
673}
674
675static int
676drm_gtf2_m(struct edid *edid)
677{
678 u8 *r = NULL;
679 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
680 return r ? (r[15] << 8) + r[14] : 0;
681}
682
683static int
684drm_gtf2_k(struct edid *edid)
685{
686 u8 *r = NULL;
687 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
688 return r ? r[16] : 0;
689}
690
691static int
692drm_gtf2_2j(struct edid *edid)
693{
694 u8 *r = NULL;
695 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
696 return r ? r[17] : 0;
697}
698
699/**
700 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
701 * @edid: EDID block to scan
702 */
703static int standard_timing_level(struct edid *edid)
704{
705 if (edid->revision >= 2) {
706 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
707 return LEVEL_CVT;
708 if (drm_gtf2_hbreak(edid))
709 return LEVEL_GTF2;
710 return LEVEL_GTF;
711 }
712 return LEVEL_DMT;
713}
714
715/*
716 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
717 * monitors fill with ascii space (0x20) instead.
718 */
719static int
720bad_std_timing(u8 a, u8 b)
721{
722 return (a == 0x00 && b == 0x00) ||
723 (a == 0x01 && b == 0x01) ||
724 (a == 0x20 && b == 0x20);
725}
726
727/**
728 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
729 * @t: standard timing params
730 * @timing_level: standard timing level
731 *
732 * Take the standard timing params (in this case width, aspect, and refresh)
733 * and convert them into a real mode using CVT/GTF/DMT.
734 */
735static struct drm_display_mode *
736drm_mode_std(struct drm_connector *connector, struct edid *edid,
737 struct std_timing *t, int revision)
738{
739 struct drm_device *dev = connector->dev;
740 struct drm_display_mode *m, *mode = NULL;
741 int hsize, vsize;
742 int vrefresh_rate;
743 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
744 >> EDID_TIMING_ASPECT_SHIFT;
745 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
746 >> EDID_TIMING_VFREQ_SHIFT;
747 int timing_level = standard_timing_level(edid);
748
749 if (bad_std_timing(t->hsize, t->vfreq_aspect))
750 return NULL;
751
752 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
753 hsize = t->hsize * 8 + 248;
754 /* vrefresh_rate = vfreq + 60 */
755 vrefresh_rate = vfreq + 60;
756 /* the vdisplay is calculated based on the aspect ratio */
757 if (aspect_ratio == 0) {
758 if (revision < 3)
759 vsize = hsize;
760 else
761 vsize = (hsize * 10) / 16;
762 } else if (aspect_ratio == 1)
763 vsize = (hsize * 3) / 4;
764 else if (aspect_ratio == 2)
765 vsize = (hsize * 4) / 5;
766 else
767 vsize = (hsize * 9) / 16;
768
769 /* HDTV hack, part 1 */
770 if (vrefresh_rate == 60 &&
771 ((hsize == 1360 && vsize == 765) ||
772 (hsize == 1368 && vsize == 769))) {
773 hsize = 1366;
774 vsize = 768;
775 }
776
777 /*
778 * If this connector already has a mode for this size and refresh
779 * rate (because it came from detailed or CVT info), use that
780 * instead. This way we don't have to guess at interlace or
781 * reduced blanking.
782 */
783 list_for_each_entry(m, &connector->probed_modes, head)
784 if (m->hdisplay == hsize && m->vdisplay == vsize &&
785 drm_mode_vrefresh(m) == vrefresh_rate)
786 return NULL;
787
788 /* HDTV hack, part 2 */
789 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
790 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
791 false);
792 mode->hdisplay = 1366;
793 mode->hsync_start = mode->hsync_start - 1;
794 mode->hsync_end = mode->hsync_end - 1;
795 return mode;
796 }
797
798 /* check whether it can be found in default mode table */
ce3d36d7
FT
799 if (drm_monitor_supports_rb(edid)) {
800 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
801 true);
802 if (mode)
803 return mode;
804 }
805 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
575ea5a0
FT
806 if (mode)
807 return mode;
808
ce3d36d7 809 /* okay, generate it */
575ea5a0
FT
810 switch (timing_level) {
811 case LEVEL_DMT:
812 break;
813 case LEVEL_GTF:
814 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
815 break;
816 case LEVEL_GTF2:
817 /*
818 * This is potentially wrong if there's ever a monitor with
819 * more than one ranges section, each claiming a different
820 * secondary GTF curve. Please don't do that.
821 */
822 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
ce3d36d7
FT
823 if (!mode)
824 return NULL;
575ea5a0 825 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
ce3d36d7 826 drm_mode_destroy(dev, mode);
575ea5a0
FT
827 mode = drm_gtf_mode_complex(dev, hsize, vsize,
828 vrefresh_rate, 0, 0,
829 drm_gtf2_m(edid),
830 drm_gtf2_2c(edid),
831 drm_gtf2_k(edid),
832 drm_gtf2_2j(edid));
833 }
834 break;
835 case LEVEL_CVT:
836 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
837 false);
838 break;
839 }
840 return mode;
841}
842
843/*
844 * EDID is delightfully ambiguous about how interlaced modes are to be
845 * encoded. Our internal representation is of frame height, but some
846 * HDTV detailed timings are encoded as field height.
847 *
848 * The format list here is from CEA, in frame size. Technically we
849 * should be checking refresh rate too. Whatever.
850 */
851static void
852drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
853 struct detailed_pixel_timing *pt)
854{
855 int i;
856 static const struct {
857 int w, h;
858 } cea_interlaced[] = {
859 { 1920, 1080 },
860 { 720, 480 },
861 { 1440, 480 },
862 { 2880, 480 },
863 { 720, 576 },
864 { 1440, 576 },
865 { 2880, 576 },
866 };
867
868 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
869 return;
870
6e29dde8 871 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
575ea5a0
FT
872 if ((mode->hdisplay == cea_interlaced[i].w) &&
873 (mode->vdisplay == cea_interlaced[i].h / 2)) {
874 mode->vdisplay *= 2;
875 mode->vsync_start *= 2;
876 mode->vsync_end *= 2;
877 mode->vtotal *= 2;
878 mode->vtotal |= 1;
879 }
880 }
881
882 mode->flags |= DRM_MODE_FLAG_INTERLACE;
883}
884
885/**
886 * drm_mode_detailed - create a new mode from an EDID detailed timing section
887 * @dev: DRM device (needed to create new mode)
888 * @edid: EDID block
889 * @timing: EDID detailed timing info
890 * @quirks: quirks to apply
891 *
892 * An EDID detailed timing block contains enough info for us to create and
893 * return a new struct drm_display_mode.
894 */
895static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
896 struct edid *edid,
897 struct detailed_timing *timing,
898 u32 quirks)
899{
900 struct drm_display_mode *mode;
901 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
902 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
903 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
904 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
905 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
906 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
907 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
908 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
909 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
910
911 /* ignore tiny modes */
912 if (hactive < 64 || vactive < 64)
913 return NULL;
914
915 if (pt->misc & DRM_EDID_PT_STEREO) {
edace09c 916 kprintf("stereo mode not supported\n");
575ea5a0
FT
917 return NULL;
918 }
919 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
edace09c 920 kprintf("composite sync not supported\n");
575ea5a0
FT
921 }
922
923 /* it is incorrect if hsync/vsync width is zero */
924 if (!hsync_pulse_width || !vsync_pulse_width) {
925 DRM_DEBUG_KMS("Incorrect Detailed timing. "
926 "Wrong Hsync/Vsync pulse width\n");
927 return NULL;
928 }
6e29dde8
FT
929
930 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
931 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
932 if (!mode)
933 return NULL;
934
935 goto set_size;
936 }
937
575ea5a0
FT
938 mode = drm_mode_create(dev);
939 if (!mode)
940 return NULL;
941
575ea5a0 942 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
6e29dde8 943 timing->pixel_clock = cpu_to_le16(1088);
575ea5a0 944
6e29dde8 945 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
575ea5a0
FT
946
947 mode->hdisplay = hactive;
948 mode->hsync_start = mode->hdisplay + hsync_offset;
949 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
950 mode->htotal = mode->hdisplay + hblank;
951
952 mode->vdisplay = vactive;
953 mode->vsync_start = mode->vdisplay + vsync_offset;
954 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
955 mode->vtotal = mode->vdisplay + vblank;
956
957 /* Some EDIDs have bogus h/vtotal values */
958 if (mode->hsync_end > mode->htotal)
959 mode->htotal = mode->hsync_end + 1;
960 if (mode->vsync_end > mode->vtotal)
961 mode->vtotal = mode->vsync_end + 1;
962
963 drm_mode_do_interlace_quirk(mode, pt);
964
575ea5a0
FT
965 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
966 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
967 }
968
969 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
970 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
971 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
972 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
973
6e29dde8 974set_size:
575ea5a0
FT
975 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
976 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
977
978 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
979 mode->width_mm *= 10;
980 mode->height_mm *= 10;
981 }
982
983 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
984 mode->width_mm = edid->width_cm * 10;
985 mode->height_mm = edid->height_cm * 10;
986 }
987
6e29dde8
FT
988 mode->type = DRM_MODE_TYPE_DRIVER;
989 drm_mode_set_name(mode);
990
575ea5a0
FT
991 return mode;
992}
993
994static bool
ce3d36d7 995mode_in_hsync_range(const struct drm_display_mode *mode,
575ea5a0
FT
996 struct edid *edid, u8 *t)
997{
998 int hsync, hmin, hmax;
999
1000 hmin = t[7];
1001 if (edid->revision >= 4)
1002 hmin += ((t[4] & 0x04) ? 255 : 0);
1003 hmax = t[8];
1004 if (edid->revision >= 4)
1005 hmax += ((t[4] & 0x08) ? 255 : 0);
1006 hsync = drm_mode_hsync(mode);
1007
1008 return (hsync <= hmax && hsync >= hmin);
1009}
1010
1011static bool
ce3d36d7 1012mode_in_vsync_range(const struct drm_display_mode *mode,
575ea5a0
FT
1013 struct edid *edid, u8 *t)
1014{
1015 int vsync, vmin, vmax;
1016
1017 vmin = t[5];
1018 if (edid->revision >= 4)
1019 vmin += ((t[4] & 0x01) ? 255 : 0);
1020 vmax = t[6];
1021 if (edid->revision >= 4)
1022 vmax += ((t[4] & 0x02) ? 255 : 0);
1023 vsync = drm_mode_vrefresh(mode);
1024
1025 return (vsync <= vmax && vsync >= vmin);
1026}
1027
1028static u32
1029range_pixel_clock(struct edid *edid, u8 *t)
1030{
1031 /* unspecified */
1032 if (t[9] == 0 || t[9] == 255)
1033 return 0;
1034
1035 /* 1.4 with CVT support gives us real precision, yay */
1036 if (edid->revision >= 4 && t[10] == 0x04)
1037 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1038
1039 /* 1.3 is pathetic, so fuzz up a bit */
1040 return t[9] * 10000 + 5001;
1041}
1042
1043static bool
ce3d36d7 1044mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
575ea5a0
FT
1045 struct detailed_timing *timing)
1046{
1047 u32 max_clock;
1048 u8 *t = (u8 *)timing;
1049
1050 if (!mode_in_hsync_range(mode, edid, t))
1051 return false;
1052
1053 if (!mode_in_vsync_range(mode, edid, t))
1054 return false;
1055
1056 if ((max_clock = range_pixel_clock(edid, t)))
1057 if (mode->clock > max_clock)
1058 return false;
1059
1060 /* 1.4 max horizontal check */
1061 if (edid->revision >= 4 && t[10] == 0x04)
1062 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1063 return false;
1064
1065 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1066 return false;
1067
1068 return true;
1069}
1070
6e29dde8
FT
1071static bool valid_inferred_mode(const struct drm_connector *connector,
1072 const struct drm_display_mode *mode)
1073{
1074 struct drm_display_mode *m;
1075 bool ok = false;
1076
1077 list_for_each_entry(m, &connector->probed_modes, head) {
1078 if (mode->hdisplay == m->hdisplay &&
1079 mode->vdisplay == m->vdisplay &&
1080 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1081 return false; /* duplicated */
1082 if (mode->hdisplay <= m->hdisplay &&
1083 mode->vdisplay <= m->vdisplay)
1084 ok = true;
1085 }
1086 return ok;
1087}
1088
575ea5a0 1089static int
6e29dde8 1090drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
575ea5a0
FT
1091 struct detailed_timing *timing)
1092{
1093 int i, modes = 0;
1094 struct drm_display_mode *newmode;
1095 struct drm_device *dev = connector->dev;
1096
1097 for (i = 0; i < drm_num_dmt_modes; i++) {
6e29dde8
FT
1098 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1099 valid_inferred_mode(connector, drm_dmt_modes + i)) {
575ea5a0
FT
1100 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1101 if (newmode) {
1102 drm_mode_probed_add(connector, newmode);
1103 modes++;
1104 }
1105 }
1106 }
1107
1108 return modes;
1109}
1110
6e29dde8
FT
1111/* fix up 1366x768 mode from 1368x768;
1112 * GFT/CVT can't express 1366 width which isn't dividable by 8
1113 */
1114static void fixup_mode_1366x768(struct drm_display_mode *mode)
1115{
1116 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1117 mode->hdisplay = 1366;
1118 mode->hsync_start--;
1119 mode->hsync_end--;
1120 drm_mode_set_name(mode);
1121 }
1122}
1123
1124static int
1125drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1126 struct detailed_timing *timing)
1127{
1128 int i, modes = 0;
1129 struct drm_display_mode *newmode;
1130 struct drm_device *dev = connector->dev;
1131
1132 for (i = 0; i < num_extra_modes; i++) {
1133 const struct minimode *m = &extra_modes[i];
1134 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
1135 if (!newmode)
1136 return modes;
1137
1138 fixup_mode_1366x768(newmode);
1139 if (!mode_in_range(newmode, edid, timing) ||
1140 !valid_inferred_mode(connector, newmode)) {
1141 drm_mode_destroy(dev, newmode);
1142 continue;
1143 }
1144
1145 drm_mode_probed_add(connector, newmode);
1146 modes++;
1147 }
1148
1149 return modes;
1150}
1151
1152static int
1153drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1154 struct detailed_timing *timing)
1155{
1156 int i, modes = 0;
1157 struct drm_display_mode *newmode;
1158 struct drm_device *dev = connector->dev;
1159 bool rb = drm_monitor_supports_rb(edid);
1160
1161 for (i = 0; i < num_extra_modes; i++) {
1162 const struct minimode *m = &extra_modes[i];
1163 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
1164 if (!newmode)
1165 return modes;
1166
1167 fixup_mode_1366x768(newmode);
1168 if (!mode_in_range(newmode, edid, timing) ||
1169 !valid_inferred_mode(connector, newmode)) {
1170 drm_mode_destroy(dev, newmode);
1171 continue;
1172 }
1173
1174 drm_mode_probed_add(connector, newmode);
1175 modes++;
1176 }
1177
1178 return modes;
1179}
1180
575ea5a0
FT
1181static void
1182do_inferred_modes(struct detailed_timing *timing, void *c)
1183{
1184 struct detailed_mode_closure *closure = c;
1185 struct detailed_non_pixel *data = &timing->data.other_data;
6e29dde8
FT
1186 struct detailed_data_monitor_range *range = &data->data.range;
1187
1188 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1189 return;
1190
1191 closure->modes += drm_dmt_modes_for_range(closure->connector,
1192 closure->edid,
1193 timing);
1194
1195 if (!version_greater(closure->edid, 1, 1))
1196 return; /* GTF not defined yet */
575ea5a0 1197
6e29dde8
FT
1198 switch (range->flags) {
1199 case 0x02: /* secondary gtf, XXX could do more */
1200 case 0x00: /* default gtf */
575ea5a0
FT
1201 closure->modes += drm_gtf_modes_for_range(closure->connector,
1202 closure->edid,
1203 timing);
6e29dde8
FT
1204 break;
1205 case 0x04: /* cvt, only in 1.4+ */
1206 if (!version_greater(closure->edid, 1, 3))
1207 break;
1208
1209 closure->modes += drm_cvt_modes_for_range(closure->connector,
1210 closure->edid,
1211 timing);
1212 break;
1213 case 0x01: /* just the ranges, no formula */
1214 default:
1215 break;
1216 }
575ea5a0
FT
1217}
1218
1219static int
1220add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1221{
1222 struct detailed_mode_closure closure = {
1223 connector, edid, 0, 0, 0
1224 };
1225
1226 if (version_greater(edid, 1, 0))
1227 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1228 &closure);
1229
1230 return closure.modes;
1231}
1232
1233static int
1234drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1235{
1236 int i, j, m, modes = 0;
1237 struct drm_display_mode *mode;
1238 u8 *est = ((u8 *)timing) + 5;
1239
1240 for (i = 0; i < 6; i++) {
1241 for (j = 7; j > 0; j--) {
1242 m = (i * 8) + (7 - j);
ce3d36d7 1243 if (m >= ARRAY_SIZE(est3_modes))
575ea5a0
FT
1244 break;
1245 if (est[i] & (1 << j)) {
1246 mode = drm_mode_find_dmt(connector->dev,
1247 est3_modes[m].w,
1248 est3_modes[m].h,
ce3d36d7
FT
1249 est3_modes[m].r,
1250 est3_modes[m].rb);
575ea5a0
FT
1251 if (mode) {
1252 drm_mode_probed_add(connector, mode);
1253 modes++;
1254 }
1255 }
1256 }
1257 }
1258
1259 return modes;
1260}
1261
1262static void
1263do_established_modes(struct detailed_timing *timing, void *c)
1264{
1265 struct detailed_mode_closure *closure = c;
1266 struct detailed_non_pixel *data = &timing->data.other_data;
1267
1268 if (data->type == EDID_DETAIL_EST_TIMINGS)
1269 closure->modes += drm_est3_modes(closure->connector, timing);
1270}
1271
1272/**
1273 * add_established_modes - get est. modes from EDID and add them
1274 * @edid: EDID block to scan
1275 *
1276 * Each EDID block contains a bitmap of the supported "established modes" list
1277 * (defined above). Tease them out and add them to the global modes list.
1278 */
1279static int
1280add_established_modes(struct drm_connector *connector, struct edid *edid)
1281{
1282 struct drm_device *dev = connector->dev;
1283 unsigned long est_bits = edid->established_timings.t1 |
1284 (edid->established_timings.t2 << 8) |
1285 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1286 int i, modes = 0;
1287 struct detailed_mode_closure closure = {
1288 connector, edid, 0, 0, 0
1289 };
1290
1291 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1292 if (est_bits & (1<<i)) {
1293 struct drm_display_mode *newmode;
1294 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1295 if (newmode) {
1296 drm_mode_probed_add(connector, newmode);
1297 modes++;
1298 }
1299 }
1300 }
1301
1302 if (version_greater(edid, 1, 0))
1303 drm_for_each_detailed_block((u8 *)edid,
1304 do_established_modes, &closure);
1305
1306 return modes + closure.modes;
1307}
1308
1309static void
1310do_standard_modes(struct detailed_timing *timing, void *c)
1311{
1312 struct detailed_mode_closure *closure = c;
1313 struct detailed_non_pixel *data = &timing->data.other_data;
1314 struct drm_connector *connector = closure->connector;
1315 struct edid *edid = closure->edid;
1316
1317 if (data->type == EDID_DETAIL_STD_MODES) {
1318 int i;
1319 for (i = 0; i < 6; i++) {
1320 struct std_timing *std;
1321 struct drm_display_mode *newmode;
1322
1323 std = &data->data.timings[i];
1324 newmode = drm_mode_std(connector, edid, std,
1325 edid->revision);
1326 if (newmode) {
1327 drm_mode_probed_add(connector, newmode);
1328 closure->modes++;
1329 }
1330 }
1331 }
1332}
1333
1334/**
1335 * add_standard_modes - get std. modes from EDID and add them
1336 * @edid: EDID block to scan
1337 *
1338 * Standard modes can be calculated using the appropriate standard (DMT,
1339 * GTF or CVT. Grab them from @edid and add them to the list.
1340 */
1341static int
1342add_standard_modes(struct drm_connector *connector, struct edid *edid)
1343{
1344 int i, modes = 0;
1345 struct detailed_mode_closure closure = {
1346 connector, edid, 0, 0, 0
1347 };
1348
1349 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1350 struct drm_display_mode *newmode;
1351
1352 newmode = drm_mode_std(connector, edid,
1353 &edid->standard_timings[i],
1354 edid->revision);
1355 if (newmode) {
1356 drm_mode_probed_add(connector, newmode);
1357 modes++;
1358 }
1359 }
1360
1361 if (version_greater(edid, 1, 0))
1362 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1363 &closure);
1364
1365 /* XXX should also look for standard codes in VTB blocks */
1366
1367 return modes + closure.modes;
1368}
1369
1370static int drm_cvt_modes(struct drm_connector *connector,
1371 struct detailed_timing *timing)
1372{
1373 int i, j, modes = 0;
1374 struct drm_display_mode *newmode;
1375 struct drm_device *dev = connector->dev;
1376 struct cvt_timing *cvt;
1377 const int rates[] = { 60, 85, 75, 60, 50 };
1378 const u8 empty[3] = { 0, 0, 0 };
1379
1380 for (i = 0; i < 4; i++) {
a3faafcb 1381 int width = 0, height;
575ea5a0
FT
1382 cvt = &(timing->data.other_data.data.cvt[i]);
1383
1384 if (!memcmp(cvt->code, empty, 3))
1385 continue;
1386
1387 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1388 switch (cvt->code[1] & 0x0c) {
1389 case 0x00:
1390 width = height * 4 / 3;
1391 break;
1392 case 0x04:
1393 width = height * 16 / 9;
1394 break;
1395 case 0x08:
1396 width = height * 16 / 10;
1397 break;
1398 case 0x0c:
1399 width = height * 15 / 9;
1400 break;
1401 }
1402
1403 for (j = 1; j < 5; j++) {
1404 if (cvt->code[2] & (1 << j)) {
1405 newmode = drm_cvt_mode(dev, width, height,
1406 rates[j], j == 0,
1407 false, false);
1408 if (newmode) {
1409 drm_mode_probed_add(connector, newmode);
1410 modes++;
1411 }
1412 }
1413 }
1414 }
1415
1416 return modes;
1417}
1418
1419static void
1420do_cvt_mode(struct detailed_timing *timing, void *c)
1421{
1422 struct detailed_mode_closure *closure = c;
1423 struct detailed_non_pixel *data = &timing->data.other_data;
1424
1425 if (data->type == EDID_DETAIL_CVT_3BYTE)
1426 closure->modes += drm_cvt_modes(closure->connector, timing);
1427}
1428
1429static int
1430add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1431{
1432 struct detailed_mode_closure closure = {
1433 connector, edid, 0, 0, 0
1434 };
1435
1436 if (version_greater(edid, 1, 2))
1437 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
1438
1439 /* XXX should also look for CVT codes in VTB blocks */
1440
1441 return closure.modes;
1442}
1443
1444static void
1445do_detailed_mode(struct detailed_timing *timing, void *c)
1446{
1447 struct detailed_mode_closure *closure = c;
1448 struct drm_display_mode *newmode;
1449
1450 if (timing->pixel_clock) {
1451 newmode = drm_mode_detailed(closure->connector->dev,
1452 closure->edid, timing,
1453 closure->quirks);
1454 if (!newmode)
1455 return;
1456
1457 if (closure->preferred)
1458 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1459
1460 drm_mode_probed_add(closure->connector, newmode);
1461 closure->modes++;
1462 closure->preferred = 0;
1463 }
1464}
1465
1466/*
1467 * add_detailed_modes - Add modes from detailed timings
1468 * @connector: attached connector
1469 * @edid: EDID block to scan
1470 * @quirks: quirks to apply
1471 */
1472static int
1473add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1474 u32 quirks)
1475{
1476 struct detailed_mode_closure closure = {
1477 connector,
1478 edid,
1479 1,
1480 quirks,
1481 0
1482 };
1483
1484 if (closure.preferred && !version_greater(edid, 1, 3))
1485 closure.preferred =
1486 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1487
1488 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1489
1490 return closure.modes;
1491}
1492
1493#define HDMI_IDENTIFIER 0x000C03
1494#define AUDIO_BLOCK 0x01
6e29dde8 1495#define VIDEO_BLOCK 0x02
575ea5a0
FT
1496#define VENDOR_BLOCK 0x03
1497#define SPEAKER_BLOCK 0x04
a2fdbec6 1498#define VIDEO_CAPABILITY_BLOCK 0x07
575ea5a0 1499#define EDID_BASIC_AUDIO (1 << 6)
6e29dde8
FT
1500#define EDID_CEA_YCRCB444 (1 << 5)
1501#define EDID_CEA_YCRCB422 (1 << 4)
a2fdbec6 1502#define EDID_CEA_VCDB_QS (1 << 6)
575ea5a0
FT
1503
1504/**
1505 * Search EDID for CEA extension block.
1506 */
1507u8 *drm_find_cea_extension(struct edid *edid)
1508{
1509 u8 *edid_ext = NULL;
1510 int i;
1511
1512 /* No EDID or EDID extensions */
1513 if (edid == NULL || edid->extensions == 0)
1514 return NULL;
1515
1516 /* Find CEA extension */
1517 for (i = 0; i < edid->extensions; i++) {
1518 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1519 if (edid_ext[0] == CEA_EXT)
1520 break;
1521 }
1522
1523 if (i == edid->extensions)
1524 return NULL;
1525
1526 return edid_ext;
1527}
ce3d36d7 1528EXPORT_SYMBOL(drm_find_cea_extension);
575ea5a0 1529
6e29dde8
FT
1530/*
1531 * Looks for a CEA mode matching given drm_display_mode.
1532 * Returns its CEA Video ID code, or 0 if not found.
1533 */
a2fdbec6 1534u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
575ea5a0 1535{
6e29dde8
FT
1536 u8 mode;
1537
1538 for (mode = 0; mode < drm_num_cea_modes; mode++) {
1539 const struct drm_display_mode *cea_mode = &edid_cea_modes[mode];
1540
1541 if (drm_mode_equal(to_match, cea_mode))
1542 return mode + 1;
1543 }
1544 return 0;
1545}
1546EXPORT_SYMBOL(drm_match_cea_mode);
1547
575ea5a0 1548
6e29dde8
FT
1549static int
1550do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1551{
1552 struct drm_device *dev = connector->dev;
1553 u8 * mode, cea_mode;
1554 int modes = 0;
575ea5a0 1555
6e29dde8
FT
1556 for (mode = db; mode < db + len; mode++) {
1557 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1558 if (cea_mode < drm_num_cea_modes) {
1559 struct drm_display_mode *newmode;
1560 newmode = drm_mode_duplicate(dev,
1561 &edid_cea_modes[cea_mode]);
1562 if (newmode) {
1563 drm_mode_probed_add(connector, newmode);
1564 modes++;
1565 }
1566 }
1567 }
1568
1569 return modes;
1570}
1571
1572static int
1573cea_db_payload_len(const u8 *db)
1574{
1575 return db[0] & 0x1f;
1576}
1577
1578static int
1579cea_db_tag(const u8 *db)
1580{
1581 return db[0] >> 5;
1582}
1583
1584static int
1585cea_revision(const u8 *cea)
1586{
1587 return cea[1];
1588}
1589
1590static int
1591cea_db_offsets(const u8 *cea, int *start, int *end)
1592{
1593 /* Data block offset in CEA extension block */
1594 *start = 4;
1595 *end = cea[2];
1596 if (*end == 0)
1597 *end = 127;
1598 if (*end < 4 || *end > 127)
1599 return -ERANGE;
1600 return 0;
1601}
1602
1603#define for_each_cea_db(cea, i, start, end) \
1604 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
1605
1606static int
1607add_cea_modes(struct drm_connector *connector, struct edid *edid)
1608{
1609 u8 * cea = drm_find_cea_extension(edid);
1610 u8 * db, dbl;
1611 int modes = 0;
1612
1613 if (cea && cea_revision(cea) >= 3) {
1614 int i, start, end;
1615
1616 if (cea_db_offsets(cea, &start, &end))
1617 return 0;
1618
1619 for_each_cea_db(cea, i, start, end) {
1620 db = &cea[i];
1621 dbl = cea_db_payload_len(db);
1622
1623 if (cea_db_tag(db) == VIDEO_BLOCK)
1624 modes += do_cea_modes (connector, db+1, dbl);
1625 }
1626 }
1627
1628 return modes;
1629}
1630
1631static void
1632parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
1633{
1634 u8 len = cea_db_payload_len(db);
1635
1636 if (len >= 6) {
1637 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1638 connector->dvi_dual = db[6] & 1;
1639 }
1640 if (len >= 7)
1641 connector->max_tmds_clock = db[7] * 5;
1642 if (len >= 8) {
1643 connector->latency_present[0] = db[8] >> 7;
1644 connector->latency_present[1] = (db[8] >> 6) & 1;
1645 }
1646 if (len >= 9)
1647 connector->video_latency[0] = db[9];
1648 if (len >= 10)
1649 connector->audio_latency[0] = db[10];
1650 if (len >= 11)
1651 connector->video_latency[1] = db[11];
1652 if (len >= 12)
1653 connector->audio_latency[1] = db[12];
575ea5a0
FT
1654
1655 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
1656 "max TMDS clock %d, "
1657 "latency present %d %d, "
1658 "video latency %d %d, "
1659 "audio latency %d %d\n",
1660 connector->dvi_dual,
1661 connector->max_tmds_clock,
1662 (int) connector->latency_present[0],
1663 (int) connector->latency_present[1],
1664 connector->video_latency[0],
1665 connector->video_latency[1],
1666 connector->audio_latency[0],
1667 connector->audio_latency[1]);
1668}
1669
1670static void
1671monitor_name(struct detailed_timing *t, void *data)
1672{
1673 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1674 *(u8 **)data = t->data.other_data.data.str.str;
1675}
1676
6e29dde8
FT
1677static bool cea_db_is_hdmi_vsdb(const u8 *db)
1678{
1679 int hdmi_id;
1680
1681 if (cea_db_tag(db) != VENDOR_BLOCK)
1682 return false;
1683
1684 if (cea_db_payload_len(db) < 5)
1685 return false;
1686
1687 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
1688
1689 return hdmi_id == HDMI_IDENTIFIER;
1690}
1691
575ea5a0
FT
1692/**
1693 * drm_edid_to_eld - build ELD from EDID
1694 * @connector: connector corresponding to the HDMI/DP sink
1695 * @edid: EDID to parse
1696 *
1697 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1698 * Some ELD fields are left to the graphics driver caller:
1699 * - Conn_Type
1700 * - HDCP
1701 * - Port_ID
1702 */
1703void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1704{
1705 uint8_t *eld = connector->eld;
1706 u8 *cea;
1707 u8 *name;
1708 u8 *db;
1709 int sad_count = 0;
1710 int mnl;
1711 int dbl;
1712
1713 memset(eld, 0, sizeof(connector->eld));
1714
1715 cea = drm_find_cea_extension(edid);
1716 if (!cea) {
1717 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1718 return;
1719 }
1720
1721 name = NULL;
1722 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1723 for (mnl = 0; name && mnl < 13; mnl++) {
1724 if (name[mnl] == 0x0a)
1725 break;
1726 eld[20 + mnl] = name[mnl];
1727 }
1728 eld[4] = (cea[1] << 5) | mnl;
1729 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1730
1731 eld[0] = 2 << 3; /* ELD version: 2 */
1732
1733 eld[16] = edid->mfg_id[0];
1734 eld[17] = edid->mfg_id[1];
1735 eld[18] = edid->prod_code[0];
1736 eld[19] = edid->prod_code[1];
1737
6e29dde8
FT
1738 if (cea_revision(cea) >= 3) {
1739 int i, start, end;
575ea5a0 1740
6e29dde8
FT
1741 if (cea_db_offsets(cea, &start, &end)) {
1742 start = 0;
1743 end = 0;
1744 }
1745
1746 for_each_cea_db(cea, i, start, end) {
1747 db = &cea[i];
1748 dbl = cea_db_payload_len(db);
1749
1750 switch (cea_db_tag(db)) {
1751 case AUDIO_BLOCK:
1752 /* Audio Data Block, contains SADs */
1753 sad_count = dbl / 3;
1754 if (dbl >= 1)
1755 memcpy(eld + 20 + mnl, &db[1], dbl);
1756 break;
1757 case SPEAKER_BLOCK:
1758 /* Speaker Allocation Data Block */
1759 if (dbl >= 1)
1760 eld[7] = db[1];
1761 break;
1762 case VENDOR_BLOCK:
1763 /* HDMI Vendor-Specific Data Block */
1764 if (cea_db_is_hdmi_vsdb(db))
1765 parse_hdmi_vsdb(connector, db);
1766 break;
1767 default:
1768 break;
1769 }
575ea5a0
FT
1770 }
1771 }
1772 eld[5] |= sad_count << 4;
1773 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1774
1775 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1776}
6e29dde8 1777EXPORT_SYMBOL(drm_edid_to_eld);
575ea5a0
FT
1778
1779/**
1780 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1781 * @connector: connector associated with the HDMI/DP sink
1782 * @mode: the display mode
1783 */
1784int drm_av_sync_delay(struct drm_connector *connector,
1785 struct drm_display_mode *mode)
1786{
1787 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1788 int a, v;
1789
1790 if (!connector->latency_present[0])
1791 return 0;
1792 if (!connector->latency_present[1])
1793 i = 0;
1794
1795 a = connector->audio_latency[i];
1796 v = connector->video_latency[i];
1797
1798 /*
1799 * HDMI/DP sink doesn't support audio or video?
1800 */
1801 if (a == 255 || v == 255)
1802 return 0;
1803
1804 /*
1805 * Convert raw EDID values to millisecond.
1806 * Treat unknown latency as 0ms.
1807 */
1808 if (a)
1809 a = min(2 * (a - 1), 500);
1810 if (v)
1811 v = min(2 * (v - 1), 500);
1812
1813 return max(v - a, 0);
1814}
6e29dde8 1815EXPORT_SYMBOL(drm_av_sync_delay);
575ea5a0
FT
1816
1817/**
1818 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1819 * @encoder: the encoder just changed display mode
1820 * @mode: the adjusted display mode
1821 *
1822 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1823 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1824 */
1825struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1826 struct drm_display_mode *mode)
1827{
1828 struct drm_connector *connector;
1829 struct drm_device *dev = encoder->dev;
1830
1831 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1832 if (connector->encoder == encoder && connector->eld[0])
1833 return connector;
1834
1835 return NULL;
1836}
6e29dde8 1837EXPORT_SYMBOL(drm_select_eld);
575ea5a0
FT
1838
1839/**
1840 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1841 * @edid: monitor EDID information
1842 *
1843 * Parse the CEA extension according to CEA-861-B.
1844 * Return true if HDMI, false if not or unknown.
1845 */
1846bool drm_detect_hdmi_monitor(struct edid *edid)
1847{
1848 u8 *edid_ext;
6e29dde8 1849 int i;
575ea5a0 1850 int start_offset, end_offset;
575ea5a0
FT
1851
1852 edid_ext = drm_find_cea_extension(edid);
1853 if (!edid_ext)
6e29dde8 1854 return false;
575ea5a0 1855
6e29dde8
FT
1856 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
1857 return false;
575ea5a0
FT
1858
1859 /*
1860 * Because HDMI identifier is in Vendor Specific Block,
1861 * search it from all data blocks of CEA extension.
1862 */
6e29dde8
FT
1863 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
1864 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
1865 return true;
575ea5a0
FT
1866 }
1867
6e29dde8 1868 return false;
575ea5a0 1869}
6e29dde8 1870EXPORT_SYMBOL(drm_detect_hdmi_monitor);
575ea5a0
FT
1871
1872/**
1873 * drm_detect_monitor_audio - check monitor audio capability
1874 *
1875 * Monitor should have CEA extension block.
1876 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1877 * audio' only. If there is any audio extension block and supported
1878 * audio format, assume at least 'basic audio' support, even if 'basic
1879 * audio' is not defined in EDID.
1880 *
1881 */
1882bool drm_detect_monitor_audio(struct edid *edid)
1883{
1884 u8 *edid_ext;
1885 int i, j;
1886 bool has_audio = false;
1887 int start_offset, end_offset;
1888
1889 edid_ext = drm_find_cea_extension(edid);
1890 if (!edid_ext)
1891 goto end;
1892
1893 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1894
1895 if (has_audio) {
1896 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1897 goto end;
1898 }
1899
6e29dde8
FT
1900 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
1901 goto end;
575ea5a0 1902
6e29dde8
FT
1903 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
1904 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
575ea5a0 1905 has_audio = true;
6e29dde8 1906 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
575ea5a0
FT
1907 DRM_DEBUG_KMS("CEA audio format %d\n",
1908 (edid_ext[i + j] >> 3) & 0xf);
1909 goto end;
1910 }
1911 }
1912end:
1913 return has_audio;
1914}
6e29dde8 1915EXPORT_SYMBOL(drm_detect_monitor_audio);
575ea5a0 1916
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1917/**
1918 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
1919 *
1920 * Check whether the monitor reports the RGB quantization range selection
1921 * as supported. The AVI infoframe can then be used to inform the monitor
1922 * which quantization range (full or limited) is used.
1923 */
1924bool drm_rgb_quant_range_selectable(struct edid *edid)
1925{
1926 u8 *edid_ext;
1927 int i, start, end;
1928
1929 edid_ext = drm_find_cea_extension(edid);
1930 if (!edid_ext)
1931 return false;
1932
1933 if (cea_db_offsets(edid_ext, &start, &end))
1934 return false;
1935
1936 for_each_cea_db(edid_ext, i, start, end) {
1937 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
1938 cea_db_payload_len(&edid_ext[i]) == 2) {
1939 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
1940 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
1941 }
1942 }
1943
1944 return false;
1945}
1946EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
1947
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1948/**
1949 * drm_add_display_info - pull display info out if present
1950 * @edid: EDID data
1951 * @info: display info (attached to connector)
1952 *
1953 * Grab any available display info and stuff it into the drm_display_info
1954 * structure that's part of the connector. Useful for tracking bpp and
1955 * color spaces.
1956 */
1957static void drm_add_display_info(struct edid *edid,
1958 struct drm_display_info *info)
1959{
1960 u8 *edid_ext;
1961
1962 info->width_mm = edid->width_cm * 10;
1963 info->height_mm = edid->height_cm * 10;
1964
1965 /* driver figures it out in this case */
1966 info->bpc = 0;
1967 info->color_formats = 0;
1968
6e29dde8 1969 if (edid->revision < 3)
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1970 return;
1971
1972 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1973 return;
1974
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1975 /* Get data from CEA blocks if present */
1976 edid_ext = drm_find_cea_extension(edid);
1977 if (edid_ext) {
1978 info->cea_rev = edid_ext[1];
1979
1980 /* The existence of a CEA block should imply RGB support */
1981 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1982 if (edid_ext[3] & EDID_CEA_YCRCB444)
1983 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1984 if (edid_ext[3] & EDID_CEA_YCRCB422)
1985 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1986 }
1987
1988 /* Only defined for 1.4 with digital displays */
1989 if (edid->revision < 4)
1990 return;
1991
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1992 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1993 case DRM_EDID_DIGITAL_DEPTH_6:
1994 info->bpc = 6;
1995 break;
1996 case DRM_EDID_DIGITAL_DEPTH_8:
1997 info->bpc = 8;
1998 break;
1999 case DRM_EDID_DIGITAL_DEPTH_10:
2000 info->bpc = 10;
2001 break;
2002 case DRM_EDID_DIGITAL_DEPTH_12:
2003 info->bpc = 12;
2004 break;
2005 case DRM_EDID_DIGITAL_DEPTH_14:
2006 info->bpc = 14;
2007 break;
2008 case DRM_EDID_DIGITAL_DEPTH_16:
2009 info->bpc = 16;
2010 break;
2011 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
2012 default:
2013 info->bpc = 0;
2014 break;
2015 }
2016
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2017 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
2018 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
2019 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2020 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
2021 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
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2022}
2023
2024/**
2025 * drm_add_edid_modes - add modes from EDID data, if available
2026 * @connector: connector we're probing
2027 * @edid: edid data
2028 *
2029 * Add the specified modes to the connector's mode list.
2030 *
2031 * Return number of modes added or 0 if we couldn't find any.
2032 */
2033int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
2034{
2035 int num_modes = 0;
2036 u32 quirks;
2037
2038 if (edid == NULL) {
2039 return 0;
2040 }
2041 if (!drm_edid_is_valid(edid)) {
6e29dde8 2042 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
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2043 drm_get_connector_name(connector));
2044 return 0;
2045 }
2046
2047 quirks = edid_get_quirks(edid);
2048
2049 /*
2050 * EDID spec says modes should be preferred in this order:
2051 * - preferred detailed mode
2052 * - other detailed modes from base block
2053 * - detailed modes from extension blocks
2054 * - CVT 3-byte code modes
2055 * - standard timing codes
2056 * - established timing codes
2057 * - modes inferred from GTF or CVT range information
2058 *
2059 * We get this pretty much right.
2060 *
2061 * XXX order for additional mode types in extension blocks?
2062 */
2063 num_modes += add_detailed_modes(connector, edid, quirks);
2064 num_modes += add_cvt_modes(connector, edid);
2065 num_modes += add_standard_modes(connector, edid);
2066 num_modes += add_established_modes(connector, edid);
2067 num_modes += add_inferred_modes(connector, edid);
6e29dde8 2068 num_modes += add_cea_modes(connector, edid);
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2069
2070 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2071 edid_fixup_preferred(connector, quirks);
2072
2073 drm_add_display_info(edid, &connector->display_info);
2074
2075 return num_modes;
2076}
6e29dde8 2077EXPORT_SYMBOL(drm_add_edid_modes);
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2078
2079/**
2080 * drm_add_modes_noedid - add modes for the connectors without EDID
2081 * @connector: connector we're probing
2082 * @hdisplay: the horizontal display limit
2083 * @vdisplay: the vertical display limit
2084 *
2085 * Add the specified modes to the connector's mode list. Only when the
2086 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2087 *
2088 * Return number of modes added or 0 if we couldn't find any.
2089 */
2090int drm_add_modes_noedid(struct drm_connector *connector,
2091 int hdisplay, int vdisplay)
2092{
2093 int i, count, num_modes = 0;
2094 struct drm_display_mode *mode;
2095 struct drm_device *dev = connector->dev;
2096
2097 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2098 if (hdisplay < 0)
2099 hdisplay = 0;
2100 if (vdisplay < 0)
2101 vdisplay = 0;
2102
2103 for (i = 0; i < count; i++) {
ce3d36d7 2104 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
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2105 if (hdisplay && vdisplay) {
2106 /*
2107 * Only when two are valid, they will be used to check
2108 * whether the mode should be added to the mode list of
2109 * the connector.
2110 */
2111 if (ptr->hdisplay > hdisplay ||
2112 ptr->vdisplay > vdisplay)
2113 continue;
2114 }
2115 if (drm_mode_vrefresh(ptr) > 61)
2116 continue;
2117 mode = drm_mode_duplicate(dev, ptr);
2118 if (mode) {
2119 drm_mode_probed_add(connector, mode);
2120 num_modes++;
2121 }
2122 }
2123 return num_modes;
2124}
6e29dde8 2125EXPORT_SYMBOL(drm_add_modes_noedid);