drm/i915: Update to Linux 3.9.11
[dragonfly.git] / sys / dev / drm / i915 / i915_gem_context.c
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1/*
2 * Copyright © 2011-2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28/*
29 * This file implements HW context support. On gen5+ a HW context consists of an
30 * opaque GPU object which is referenced at times of context saves and restores.
31 * With RC6 enabled, the context is also referenced as the GPU enters and exists
32 * from RC6 (GPU has it's own internal power context, except on gen5). Though
33 * something like a context does exist for the media ring, the code only
34 * supports contexts for the render ring.
35 *
36 * In software, there is a distinction between contexts created by the user,
37 * and the default HW context. The default HW context is used by GPU clients
38 * that do not request setup of their own hardware context. The default
39 * context's state is never restored to help prevent programming errors. This
40 * would happen if a client ran and piggy-backed off another clients GPU state.
41 * The default context only exists to give the GPU some offset to load as the
42 * current to invoke a save of the context we actually care about. In fact, the
43 * code could likely be constructed, albeit in a more complicated fashion, to
44 * never use the default context, though that limits the driver's ability to
45 * swap out, and/or destroy other contexts.
46 *
47 * All other contexts are created as a request by the GPU client. These contexts
48 * store GPU state, and thus allow GPU clients to not re-emit state (and
49 * potentially query certain state) at any time. The kernel driver makes
50 * certain that the appropriate commands are inserted.
51 *
52 * The context life cycle is semi-complicated in that context BOs may live
53 * longer than the context itself because of the way the hardware, and object
54 * tracking works. Below is a very crude representation of the state machine
55 * describing the context life.
56 * refcount pincount active
57 * S0: initial state 0 0 0
58 * S1: context created 1 0 0
59 * S2: context is currently running 2 1 X
60 * S3: GPU referenced, but not current 2 0 1
61 * S4: context is current, but destroyed 1 1 0
62 * S5: like S3, but destroyed 1 0 1
63 *
64 * The most common (but not all) transitions:
65 * S0->S1: client creates a context
66 * S1->S2: client submits execbuf with context
67 * S2->S3: other clients submits execbuf with context
68 * S3->S1: context object was retired
69 * S3->S2: clients submits another execbuf
70 * S2->S4: context destroy called with current context
71 * S3->S5->S0: destroy path
72 * S4->S5->S0: destroy path on current context
73 *
74 * There are two confusing terms used above:
75 * The "current context" means the context which is currently running on the
76 * GPU. The GPU has loaded it's state already and has stored away the gtt
77 * offset of the BO. The GPU is not actively referencing the data at this
78 * offset, but it will on the next context switch. The only way to avoid this
79 * is to do a GPU reset.
80 *
81 * An "active context' is one which was previously the "current context" and is
82 * on the active list waiting for the next context switch to occur. Until this
83 * happens, the object must remain at the same gtt offset. It is therefore
84 * possible to destroy a context, but it is still active.
85 *
86 */
87
88#include <drm/drmP.h>
89#include <drm/i915_drm.h>
90#include "i915_drv.h"
91#include <linux/err.h>
92
93/* This is a HW constraint. The value below is the largest known requirement
94 * I've seen in a spec to date, and that was a workaround for a non-shipping
95 * part. It should be safe to decrease this, but it's more future proof as is.
96 */
97#define CONTEXT_ALIGN (64<<10)
98
99static struct i915_hw_context *
100i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
101static int do_switch(struct i915_hw_context *to);
102
103static int get_context_size(struct drm_device *dev)
104{
105 struct drm_i915_private *dev_priv = dev->dev_private;
106 int ret;
107 u32 reg;
108
109 switch (INTEL_INFO(dev)->gen) {
110 case 6:
111 reg = I915_READ(CXT_SIZE);
112 ret = GEN6_CXT_TOTAL_SIZE(reg) * 64;
113 break;
114 case 7:
115 reg = I915_READ(GEN7_CXT_SIZE);
116 if (IS_HASWELL(dev))
117 ret = HSW_CXT_TOTAL_SIZE(reg) * 64;
118 else
119 ret = GEN7_CXT_TOTAL_SIZE(reg) * 64;
120 break;
121 default:
122 BUG();
123 }
124
125 return ret;
126}
127
128static void do_destroy(struct i915_hw_context *ctx)
129{
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130 if (ctx->file_priv)
131 idr_remove(&ctx->file_priv->context_idr, ctx->id);
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132
133 drm_gem_object_unreference(&ctx->obj->base);
5a3b77d5 134 kfree(ctx, M_DRM);
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135}
136
137static struct i915_hw_context *
138create_hw_context(struct drm_device *dev,
139 struct drm_i915_file_private *file_priv)
140{
141 struct drm_i915_private *dev_priv = dev->dev_private;
142 struct i915_hw_context *ctx;
143 int ret, id;
144
5a3b77d5 145 ctx = kmalloc(sizeof(*ctx), M_DRM, M_WAITOK | M_ZERO);
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146 if (ctx == NULL)
147 return ERR_PTR(-ENOMEM);
148
149 ctx->obj = i915_gem_alloc_object(dev, dev_priv->hw_context_size);
150 if (ctx->obj == NULL) {
5a3b77d5 151 kfree(ctx, M_DRM);
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152 DRM_DEBUG_DRIVER("Context object allocated failed\n");
153 return ERR_PTR(-ENOMEM);
154 }
155
156 if (INTEL_INFO(dev)->gen >= 7) {
157 ret = i915_gem_object_set_cache_level(ctx->obj,
158 I915_CACHE_LLC_MLC);
159 if (ret)
160 goto err_out;
161 }
162
163 /* The ring associated with the context object is handled by the normal
164 * object tracking code. We give an initial ring value simple to pass an
165 * assertion in the context switch code.
166 */
167 ctx->ring = &dev_priv->ring[RCS];
168
169 /* Default context will never have a file_priv */
170 if (file_priv == NULL)
171 return ctx;
172
173 ctx->file_priv = file_priv;
174
175again:
176 if (idr_pre_get(&file_priv->context_idr, GFP_KERNEL) == 0) {
177 ret = -ENOMEM;
178 DRM_DEBUG_DRIVER("idr allocation failed\n");
179 goto err_out;
180 }
181
182 ret = idr_get_new_above(&file_priv->context_idr, ctx,
183 DEFAULT_CONTEXT_ID + 1, &id);
184 if (ret == 0)
185 ctx->id = id;
186
187 if (ret == -EAGAIN)
188 goto again;
189 else if (ret)
190 goto err_out;
191
192 return ctx;
193
194err_out:
195 do_destroy(ctx);
196 return ERR_PTR(ret);
197}
198
199static inline bool is_default_context(struct i915_hw_context *ctx)
200{
201 return (ctx == ctx->ring->default_context);
202}
203
204/**
205 * The default context needs to exist per ring that uses contexts. It stores the
206 * context state of the GPU for applications that don't utilize HW contexts, as
207 * well as an idle case.
208 */
209static int create_default_context(struct drm_i915_private *dev_priv)
210{
211 struct i915_hw_context *ctx;
212 int ret;
213
214 DRM_LOCK_ASSERT(dev_priv->dev);
215
216 ctx = create_hw_context(dev_priv->dev, NULL);
217 if (IS_ERR(ctx))
218 return PTR_ERR(ctx);
219
220 /* We may need to do things with the shrinker which require us to
221 * immediately switch back to the default context. This can cause a
222 * problem as pinning the default context also requires GTT space which
223 * may not be available. To avoid this we always pin the
224 * default context.
225 */
226 dev_priv->ring[RCS].default_context = ctx;
b00bc81c 227 ret = i915_gem_object_pin(ctx->obj, CONTEXT_ALIGN, false, false);
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228 if (ret)
229 goto err_destroy;
230
231 ret = do_switch(ctx);
232 if (ret)
233 goto err_unpin;
234
235 DRM_DEBUG_DRIVER("Default HW context loaded\n");
236 return 0;
237
238err_unpin:
239 i915_gem_object_unpin(ctx->obj);
240err_destroy:
241 do_destroy(ctx);
242 return ret;
243}
244
245void i915_gem_context_init(struct drm_device *dev)
246{
247 struct drm_i915_private *dev_priv = dev->dev_private;
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248
249 if (!HAS_HW_CONTEXTS(dev)) {
250 dev_priv->hw_contexts_disabled = true;
251 return;
252 }
253
254 /* If called from reset, or thaw... we've been here already */
255 if (dev_priv->hw_contexts_disabled ||
256 dev_priv->ring[RCS].default_context)
257 return;
258
a2fdbec6 259 dev_priv->hw_context_size = round_up(get_context_size(dev), 4096);
e555d299 260
a2fdbec6 261 if (dev_priv->hw_context_size > (1<<20)) {
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262 dev_priv->hw_contexts_disabled = true;
263 return;
264 }
265
266 if (create_default_context(dev_priv)) {
267 dev_priv->hw_contexts_disabled = true;
268 return;
269 }
270
271 DRM_DEBUG_DRIVER("HW context support initialized\n");
272}
273
274void i915_gem_context_fini(struct drm_device *dev)
275{
276 struct drm_i915_private *dev_priv = dev->dev_private;
277
278 if (dev_priv->hw_contexts_disabled)
279 return;
280
281 /* The only known way to stop the gpu from accessing the hw context is
282 * to reset it. Do this as the very last operation to avoid confusing
283 * other code, leading to spurious errors. */
284 intel_gpu_reset(dev);
285
286 i915_gem_object_unpin(dev_priv->ring[RCS].default_context->obj);
287
288 do_destroy(dev_priv->ring[RCS].default_context);
289}
290
291static int context_idr_cleanup(int id, void *p, void *data)
292{
293 struct i915_hw_context *ctx = p;
294
295 BUG_ON(id == DEFAULT_CONTEXT_ID);
296
297 do_destroy(ctx);
298
299 return 0;
300}
301
302void i915_gem_context_close(struct drm_device *dev, struct drm_file *file)
303{
304 struct drm_i915_file_private *file_priv = file->driver_priv;
305
a2fdbec6 306 mutex_lock(&dev->struct_mutex);
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307 idr_for_each(&file_priv->context_idr, context_idr_cleanup, NULL);
308 idr_destroy(&file_priv->context_idr);
a2fdbec6 309 mutex_unlock(&dev->struct_mutex);
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310}
311
312static struct i915_hw_context *
313i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id)
314{
315 return (struct i915_hw_context *)idr_find(&file_priv->context_idr, id);
316}
317
318static inline int
319mi_set_context(struct intel_ring_buffer *ring,
320 struct i915_hw_context *new_context,
321 u32 hw_flags)
322{
323 int ret;
324
325 /* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
326 * invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
327 * explicitly, so we rely on the value at ring init, stored in
328 * itlb_before_ctx_switch.
329 */
330 if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {
331 ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);
332 if (ret)
333 return ret;
334 }
335
336 ret = intel_ring_begin(ring, 6);
337 if (ret)
338 return ret;
339
340 if (IS_GEN7(ring->dev))
341 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_DISABLE);
342 else
343 intel_ring_emit(ring, MI_NOOP);
344
345 intel_ring_emit(ring, MI_NOOP);
346 intel_ring_emit(ring, MI_SET_CONTEXT);
347 intel_ring_emit(ring, new_context->obj->gtt_offset |
348 MI_MM_SPACE_GTT |
349 MI_SAVE_EXT_STATE_EN |
350 MI_RESTORE_EXT_STATE_EN |
351 hw_flags);
352 /* w/a: MI_SET_CONTEXT must always be followed by MI_NOOP */
353 intel_ring_emit(ring, MI_NOOP);
354
355 if (IS_GEN7(ring->dev))
356 intel_ring_emit(ring, MI_ARB_ON_OFF | MI_ARB_ENABLE);
357 else
358 intel_ring_emit(ring, MI_NOOP);
359
360 intel_ring_advance(ring);
361
362 return ret;
363}
364
365static int do_switch(struct i915_hw_context *to)
366{
367 struct intel_ring_buffer *ring = to->ring;
368 struct drm_i915_gem_object *from_obj = ring->last_context_obj;
369 u32 hw_flags = 0;
370 int ret;
371
372 BUG_ON(from_obj != NULL && from_obj->pin_count == 0);
373
374 if (from_obj == to->obj)
375 return 0;
376
b00bc81c 377 ret = i915_gem_object_pin(to->obj, CONTEXT_ALIGN, false, false);
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378 if (ret)
379 return ret;
380
381 /* Clear this page out of any CPU caches for coherent swap-in/out. Note
382 * that thanks to write = false in this call and us not setting any gpu
383 * write domains when putting a context object onto the active list
384 * (when switching away from it), this won't block.
385 * XXX: We need a real interface to do this instead of trickery. */
386 ret = i915_gem_object_set_to_gtt_domain(to->obj, false);
387 if (ret) {
388 i915_gem_object_unpin(to->obj);
389 return ret;
390 }
391
392 if (!to->obj->has_global_gtt_mapping)
393 i915_gem_gtt_bind_object(to->obj, to->obj->cache_level);
394
395 if (!to->is_initialized || is_default_context(to))
396 hw_flags |= MI_RESTORE_INHIBIT;
397 else if (WARN_ON_ONCE(from_obj == to->obj)) /* not yet expected */
398 hw_flags |= MI_FORCE_RESTORE;
399
400 ret = mi_set_context(ring, to, hw_flags);
401 if (ret) {
402 i915_gem_object_unpin(to->obj);
403 return ret;
404 }
405
406 /* The backing object for the context is done after switching to the
407 * *next* context. Therefore we cannot retire the previous context until
408 * the next context has already started running. In fact, the below code
409 * is a bit suboptimal because the retiring can occur simply after the
410 * MI_SET_CONTEXT instead of when the next seqno has completed.
411 */
412 if (from_obj != NULL) {
413 from_obj->base.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
414 i915_gem_object_move_to_active(from_obj, ring);
415 /* As long as MI_SET_CONTEXT is serializing, ie. it flushes the
416 * whole damn pipeline, we don't need to explicitly mark the
417 * object dirty. The only exception is that the context must be
418 * correct in case the object gets swapped out. Ideally we'd be
419 * able to defer doing this until we know the object would be
420 * swapped, but there is no way to do that yet.
421 */
422 from_obj->dirty = 1;
423 BUG_ON(from_obj->ring != ring);
424 i915_gem_object_unpin(from_obj);
425
426 drm_gem_object_unreference(&from_obj->base);
427 }
428
429 drm_gem_object_reference(&to->obj->base);
430 ring->last_context_obj = to->obj;
431 to->is_initialized = true;
432
433 return 0;
434}
435
436/**
437 * i915_switch_context() - perform a GPU context switch.
438 * @ring: ring for which we'll execute the context switch
439 * @file_priv: file_priv associated with the context, may be NULL
440 * @id: context id number
441 * @seqno: sequence number by which the new context will be switched to
442 * @flags:
443 *
444 * The context life cycle is simple. The context refcount is incremented and
445 * decremented by 1 and create and destroy. If the context is in use by the GPU,
446 * it will have a refoucnt > 1. This allows us to destroy the context abstract
447 * object while letting the normal object tracking destroy the backing BO.
448 */
449int i915_switch_context(struct intel_ring_buffer *ring,
450 struct drm_file *file,
451 int to_id)
452{
453 struct drm_i915_private *dev_priv = ring->dev->dev_private;
454 struct i915_hw_context *to;
455
456 if (dev_priv->hw_contexts_disabled)
457 return 0;
458
459 if (ring != &dev_priv->ring[RCS])
460 return 0;
461
462 if (to_id == DEFAULT_CONTEXT_ID) {
463 to = ring->default_context;
464 } else {
465 if (file == NULL)
466 return -EINVAL;
467
468 to = i915_gem_context_get(file->driver_priv, to_id);
469 if (to == NULL)
470 return -ENOENT;
471 }
472
473 return do_switch(to);
474}
475
476int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
477 struct drm_file *file)
478{
479 struct drm_i915_private *dev_priv = dev->dev_private;
480 struct drm_i915_gem_context_create *args = data;
481 struct drm_i915_file_private *file_priv = file->driver_priv;
482 struct i915_hw_context *ctx;
483 int ret;
484
485 if (!(dev->driver->driver_features & DRIVER_GEM))
486 return -ENODEV;
487
488 if (dev_priv->hw_contexts_disabled)
489 return -ENODEV;
490
491 ret = i915_mutex_lock_interruptible(dev);
492 if (ret)
493 return ret;
494
495 ctx = create_hw_context(dev, file_priv);
a2fdbec6 496 mutex_unlock(&dev->struct_mutex);
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497 if (IS_ERR(ctx))
498 return PTR_ERR(ctx);
499
500 args->ctx_id = ctx->id;
501 DRM_DEBUG_DRIVER("HW context %d created\n", args->ctx_id);
502
503 return 0;
504}
505
506int i915_gem_context_destroy_ioctl(struct drm_device *dev, void *data,
507 struct drm_file *file)
508{
509 struct drm_i915_gem_context_destroy *args = data;
510 struct drm_i915_file_private *file_priv = file->driver_priv;
511 struct i915_hw_context *ctx;
512 int ret;
513
514 if (!(dev->driver->driver_features & DRIVER_GEM))
515 return -ENODEV;
516
517 ret = i915_mutex_lock_interruptible(dev);
518 if (ret)
519 return ret;
520
521 ctx = i915_gem_context_get(file_priv, args->ctx_id);
522 if (!ctx) {
a2fdbec6 523 mutex_unlock(&dev->struct_mutex);
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524 return -ENOENT;
525 }
526
527 do_destroy(ctx);
528
a2fdbec6 529 mutex_unlock(&dev->struct_mutex);
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530
531 DRM_DEBUG_DRIVER("HW context %d destroyed\n", args->ctx_id);
532 return 0;
533}