Merge branch 'vendor/GCC50'
[dragonfly.git] / contrib / binutils-2.24 / gas / doc / c-sh64.texi
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1@c Copyright (C) 2002, 2003, 2008, 2011, 2012 Free Software Foundation, Inc.
2@c This is part of the GAS manual.
3@c For copying conditions, see the file as.texinfo.
4@page
5@node SH64-Dependent
6@chapter SuperH SH64 Dependent Features
7
8@cindex SH64 support
9@menu
10* SH64 Options:: Options
11* SH64 Syntax:: Syntax
12* SH64 Directives:: SH64 Machine Directives
13* SH64 Opcodes:: Opcodes
14@end menu
15
16@node SH64 Options
17@section Options
18
19@cindex SH64 options
20@cindex options, SH64
21@table @code
22
23@cindex SH64 ISA options
24@cindex ISA options, SH64
25@item -isa=sh4 | sh4a
26Specify the sh4 or sh4a instruction set.
27@item -isa=dsp
28Enable sh-dsp insns, and disable sh3e / sh4 insns.
29@item -isa=fp
30Enable sh2e, sh3e, sh4, and sh4a insn sets.
31@item -isa=all
32Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
33@item -isa=shmedia | -isa=shcompact
34Specify the default instruction set. @code{SHmedia} specifies the
3532-bit opcodes, and @code{SHcompact} specifies the 16-bit opcodes
36compatible with previous SH families. The default depends on the ABI
37selected; the default for the 64-bit ABI is SHmedia, and the default for
38the 32-bit ABI is SHcompact. If neither the ABI nor the ISA is
39specified, the default is 32-bit SHcompact.
40
41Note that the @code{.mode} pseudo-op is not permitted if the ISA is not
42specified on the command line.
43
44@cindex SH64 ABI options
45@cindex ABI options, SH64
46@item -abi=32 | -abi=64
47Specify the default ABI. If the ISA is specified and the ABI is not,
48the default ABI depends on the ISA, with SHmedia defaulting to 64-bit
49and SHcompact defaulting to 32-bit.
50
51Note that the @code{.abi} pseudo-op is not permitted if the ABI is not
52specified on the command line. When the ABI is specified on the command
53line, any @code{.abi} pseudo-ops in the source must match it.
54
55@item -shcompact-const-crange
56Emit code-range descriptors for constants in SHcompact code sections.
57
58@item -no-mix
59Disallow SHmedia code in the same section as constants and SHcompact
60code.
61
62@item -no-expand
63Do not expand MOVI, PT, PTA or PTB instructions.
64
65@item -expand-pt32
66With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
67
68@item -h-tick-hex
69Support H'00 style hex constants in addition to 0x00 style.
70
71@end table
72
73@node SH64 Syntax
74@section Syntax
75
76@menu
77* SH64-Chars:: Special Characters
78* SH64-Regs:: Register Names
79* SH64-Addressing:: Addressing Modes
80@end menu
81
82@node SH64-Chars
83@subsection Special Characters
84
85@cindex line comment character, SH64
86@cindex SH64 line comment character
87@samp{!} is the line comment character.
88
89If a @samp{#} appears as the first character of a line then the whole
90line is treated as a comment, but in this case the line could also be
91a logical line number directive (@pxref{Comments}) or a preprocessor
92control command (@pxref{Preprocessing}).
93
94@cindex line separator, SH64
95@cindex statement separator, SH64
96@cindex SH64 line separator
97You can use @samp{;} instead of a newline to separate statements.
98
99@cindex symbol names, @samp{$} in
100@cindex @code{$} in symbol names
101Since @samp{$} has no special meaning, you may use it in symbol names.
102
103@node SH64-Regs
104@subsection Register Names
105
106@cindex SH64 registers
107@cindex registers, SH64
108You can use the predefined symbols @samp{r0} through @samp{r63} to refer
109to the SH64 general registers, @samp{cr0} through @code{cr63} for
110control registers, @samp{tr0} through @samp{tr7} for target address
111registers, @samp{fr0} through @samp{fr63} for single-precision floating
112point registers, @samp{dr0} through @samp{dr62} (even numbered registers
113only) for double-precision floating point registers, @samp{fv0} through
114@samp{fv60} (multiples of four only) for single-precision floating point
115vectors, @samp{fp0} through @samp{fp62} (even numbered registers only)
116for single-precision floating point pairs, @samp{mtrx0} through
117@samp{mtrx48} (multiples of 16 only) for 4x4 matrices of
118single-precision floating point registers, @samp{pc} for the program
119counter, and @samp{fpscr} for the floating point status and control
120register.
121
122You can also refer to the control registers by the mnemonics @samp{sr},
123@samp{ssr}, @samp{pssr}, @samp{intevt}, @samp{expevt}, @samp{pexpevt},
124@samp{tra}, @samp{spc}, @samp{pspc}, @samp{resvec}, @samp{vbr},
125@samp{tea}, @samp{dcr}, @samp{kcr0}, @samp{kcr1}, @samp{ctc}, and
126@samp{usr}.
127
128@node SH64-Addressing
129@subsection Addressing Modes
130
131@cindex addressing modes, SH64
132@cindex SH64 addressing modes
133
134SH64 operands consist of either a register or immediate value. The
135immediate value can be a constant or label reference (or portion of a
136label reference), as in this example:
137
138@example
139 movi 4,r2
140 pt function, tr4
141 movi (function >> 16) & 65535,r0
142 shori function & 65535, r0
143 ld.l r0,4,r0
144@end example
145
146@cindex datalabel, SH64
147Instruction label references can reference labels in either SHmedia or
148SHcompact. To differentiate between the two, labels in SHmedia sections
149will always have the least significant bit set (i.e. they will be odd),
150which SHcompact labels will have the least significant bit reset
151(i.e. they will be even). If you need to reference the actual address
152of a label, you can use the @code{datalabel} modifier, as in this
153example:
154
155@example
156 .long function
157 .long datalabel function
158@end example
159
160In that example, the first longword may or may not have the least
161significant bit set depending on whether the label is an SHmedia label
162or an SHcompact label. The second longword will be the actual address
163of the label, regardless of what type of label it is.
164
165@node SH64 Directives
166@section SH64 Machine Directives
167
168In addition to the SH directives, the SH64 provides the following
169directives:
170
171@cindex SH64 machine directives
172@cindex machine directives, SH64
173
174@table @code
175
176@item .mode [shmedia|shcompact]
177@itemx .isa [shmedia|shcompact]
178Specify the ISA for the following instructions (the two directives are
179equivalent). Note that programs such as @code{objdump} rely on symbolic
180labels to determine when such mode switches occur (by checking the least
181significant bit of the label's address), so such mode/isa changes should
182always be followed by a label (in practice, this is true anyway). Note
183that you cannot use these directives if you didn't specify an ISA on the
184command line.
185
186@item .abi [32|64]
187Specify the ABI for the following instructions. Note that you cannot use
188this directive unless you specified an ABI on the command line, and the
189ABIs specified must match.
190
191@end table
192
193@node SH64 Opcodes
194@section Opcodes
195
196@cindex SH64 opcode summary
197@cindex opcode summary, SH64
198@cindex mnemonics, SH64
199@cindex instruction summary, SH64
200For detailed information on the SH64 machine instruction set, see
201@cite{SuperH 64 bit RISC Series Architecture Manual} (SuperH, Inc.).
202
203@code{@value{AS}} implements all the standard SH64 opcodes. In
204addition, the following pseudo-opcodes may be expanded into one or more
205alternate opcodes:
206
207@table @code
208
209@item movi
210If the value doesn't fit into a standard @code{movi} opcode,
211@code{@value{AS}} will replace the @code{movi} with a sequence of
212@code{movi} and @code{shori} opcodes.
213
214@item pt
215This expands to a sequence of @code{movi} and @code{shori} opcode,
216followed by a @code{ptrel} opcode, or to a @code{pta} or @code{ptb}
217opcode, depending on the label referenced.
218
219@end table