Merge branch 'vendor/GCC50'
[dragonfly.git] / contrib / binutils-2.24 / gas / doc / c-z8k.texi
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JM
1@c Copyright 1991, 1992, 1993, 1994, 1995, 2003, 2011
2@c Free Software Foundation, Inc.
3@c This is part of the GAS manual.
4@c For copying conditions, see the file as.texinfo.
5@ifset GENERIC
6@page
7@node Z8000-Dependent
8@chapter Z8000 Dependent Features
9@end ifset
10@ifclear GENERIC
11@node Machine Dependencies
12@chapter Z8000 Dependent Features
13@end ifclear
14
15@cindex Z8000 support
16The Z8000 @value{AS} supports both members of the Z8000 family: the
17unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with
1824 bit addresses.
19
20When the assembler is in unsegmented mode (specified with the
21@code{unsegm} directive), an address takes up one word (16 bit)
22sized register. When the assembler is in segmented mode (specified with
23the @code{segm} directive), a 24-bit address takes up a long (32 bit)
24register. @xref{Z8000 Directives,,Assembler Directives for the Z8000},
25for a list of other Z8000 specific assembler directives.
26
27@menu
28* Z8000 Options:: Command-line options for the Z8000
29* Z8000 Syntax:: Assembler syntax for the Z8000
30* Z8000 Directives:: Special directives for the Z8000
31* Z8000 Opcodes:: Opcodes
32@end menu
33
34@node Z8000 Options
35@section Options
36
37@cindex Z8000 options
38@cindex options, Z8000
39@table @option
40@cindex @code{-z8001} command line option, Z8000
41@item -z8001
42Generate segmented code by default.
43
44@cindex @code{-z8002} command line option, Z8000
45@item -z8002
46Generate unsegmented code by default.
47@end table
48
49@node Z8000 Syntax
50@section Syntax
51@menu
52* Z8000-Chars:: Special Characters
53* Z8000-Regs:: Register Names
54* Z8000-Addressing:: Addressing Modes
55@end menu
56
57@node Z8000-Chars
58@subsection Special Characters
59
60@cindex line comment character, Z8000
61@cindex Z8000 line comment character
62@samp{!} is the line comment character.
63
64If a @samp{#} appears as the first character of a line then the whole
65line is treated as a comment, but in this case the line could also be
66a logical line number directive (@pxref{Comments}) or a preprocessor
67control command (@pxref{Preprocessing}).
68
69@cindex line separator, Z8000
70@cindex statement separator, Z8000
71@cindex Z8000 line separator
72You can use @samp{;} instead of a newline to separate statements.
73
74@node Z8000-Regs
75@subsection Register Names
76
77@cindex Z8000 registers
78@cindex registers, Z8000
79The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
80to different sized groups of registers by register number, with the
81prefix @samp{r} for 16 bit registers, @samp{rr} for 32 bit registers and
82@samp{rq} for 64 bit registers. You can also refer to the contents of
83the first eight (of the sixteen 16 bit registers) by bytes. They are
84named @samp{rl@var{n}} and @samp{rh@var{n}}.
85
86@smallexample
87@exdent @emph{byte registers}
88rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3
89rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7
90
91@exdent @emph{word registers}
92r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
93
94@exdent @emph{long word registers}
95rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
96
97@exdent @emph{quad word registers}
98rq0 rq4 rq8 rq12
99@end smallexample
100
101@node Z8000-Addressing
102@subsection Addressing Modes
103
104@cindex addressing modes, Z8000
105@cindex Z800 addressing modes
106@value{AS} understands the following addressing modes for the Z8000:
107
108@table @code
109@item rl@var{n}
110@itemx rh@var{n}
111@itemx r@var{n}
112@itemx rr@var{n}
113@itemx rq@var{n}
114Register direct: 8bit, 16bit, 32bit, and 64bit registers.
115
116@item @@r@var{n}
117@itemx @@rr@var{n}
118Indirect register: @@rr@var{n} in segmented mode, @@r@var{n} in unsegmented
119mode.
120
121@item @var{addr}
122Direct: the 16 bit or 24 bit address (depending on whether the assembler
123is in segmented or unsegmented mode) of the operand is in the instruction.
124
125@item address(r@var{n})
126Indexed: the 16 or 24 bit address is added to the 16 bit register to produce
127the final address in memory of the operand.
128
129@item r@var{n}(#@var{imm})
130@itemx rr@var{n}(#@var{imm})
131Base Address: the 16 or 24 bit register is added to the 16 bit sign
132extended immediate displacement to produce the final address in memory
133of the operand.
134
135@item r@var{n}(r@var{m})
136@itemx rr@var{n}(r@var{m})
137Base Index: the 16 or 24 bit register r@var{n} or rr@var{n} is added to
138the sign extended 16 bit index register r@var{m} to produce the final
139address in memory of the operand.
140
141@item #@var{xx}
142Immediate data @var{xx}.
143@end table
144
145@node Z8000 Directives
146@section Assembler Directives for the Z8000
147
148@cindex Z8000 directives
149@cindex directives, Z8000
150The Z8000 port of @value{AS} includes additional assembler directives,
151for compatibility with other Z8000 assemblers. These do not begin with
152@samp{.} (unlike the ordinary @value{AS} directives).
153
154@table @code
155@kindex segm
156@item segm
157@kindex .z8001
158@itemx .z8001
159Generate code for the segmented Z8001.
160
161@kindex unsegm
162@item unsegm
163@kindex .z8002
164@itemx .z8002
165Generate code for the unsegmented Z8002.
166
167@kindex name
168@item name
169Synonym for @code{.file}
170
171@kindex global
172@item global
173Synonym for @code{.global}
174
175@kindex wval
176@item wval
177Synonym for @code{.word}
178
179@kindex lval
180@item lval
181Synonym for @code{.long}
182
183@kindex bval
184@item bval
185Synonym for @code{.byte}
186
187@kindex sval
188@item sval
189Assemble a string. @code{sval} expects one string literal, delimited by
190single quotes. It assembles each byte of the string into consecutive
191addresses. You can use the escape sequence @samp{%@var{xx}} (where
192@var{xx} represents a two-digit hexadecimal number) to represent the
193character whose @sc{ascii} value is @var{xx}. Use this feature to
194describe single quote and other characters that may not appear in string
195literals as themselves. For example, the C statement @w{@samp{char *a =
196"he said \"it's 50% off\"";}} is represented in Z8000 assembly language
197(shown with the assembler output in hex at the left) as
198
199@iftex
200@begingroup
201@let@nonarrowing=@comment
202@end iftex
203@smallexample
20468652073 sval 'he said %22it%27s 50%25 off%22%00'
20561696420
20622697427
20773203530
20825206F66
209662200
210@end smallexample
211@iftex
212@endgroup
213@end iftex
214
215@kindex rsect
216@item rsect
217synonym for @code{.section}
218
219@kindex block
220@item block
221synonym for @code{.space}
222
223@kindex even
224@item even
225special case of @code{.align}; aligns output to even byte boundary.
226@end table
227
228@node Z8000 Opcodes
229@section Opcodes
230
231@cindex Z8000 opcode summary
232@cindex opcode summary, Z8000
233@cindex mnemonics, Z8000
234@cindex instruction summary, Z8000
235For detailed information on the Z8000 machine instruction set, see
236@cite{Z8000 Technical Manual}.
237
238@ifset SMALL
239@c this table, due to the multi-col faking and hardcoded order, looks silly
240@c except in smallbook. See comments below "@set SMALL" near top of this file.
241
242The following table summarizes the opcodes and their arguments:
243@iftex
244@begingroup
245@let@nonarrowing=@comment
246@end iftex
247@smallexample
248
249 rs @r{16 bit source register}
250 rd @r{16 bit destination register}
251 rbs @r{8 bit source register}
252 rbd @r{8 bit destination register}
253 rrs @r{32 bit source register}
254 rrd @r{32 bit destination register}
255 rqs @r{64 bit source register}
256 rqd @r{64 bit destination register}
257 addr @r{16/24 bit address}
258 imm @r{immediate data}
259
260adc rd,rs clrb addr cpsir @@rd,@@rs,rr,cc
261adcb rbd,rbs clrb addr(rd) cpsirb @@rd,@@rs,rr,cc
262add rd,@@rs clrb rbd dab rbd
263add rd,addr com @@rd dbjnz rbd,disp7
264add rd,addr(rs) com addr dec @@rd,imm4m1
265add rd,imm16 com addr(rd) dec addr(rd),imm4m1
266add rd,rs com rd dec addr,imm4m1
267addb rbd,@@rs comb @@rd dec rd,imm4m1
268addb rbd,addr comb addr decb @@rd,imm4m1
269addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1
270addb rbd,imm8 comb rbd decb addr,imm4m1
271addb rbd,rbs comflg flags decb rbd,imm4m1
272addl rrd,@@rs cp @@rd,imm16 di i2
273addl rrd,addr cp addr(rd),imm16 div rrd,@@rs
274addl rrd,addr(rs) cp addr,imm16 div rrd,addr
275addl rrd,imm32 cp rd,@@rs div rrd,addr(rs)
276addl rrd,rrs cp rd,addr div rrd,imm16
277and rd,@@rs cp rd,addr(rs) div rrd,rs
278and rd,addr cp rd,imm16 divl rqd,@@rs
279and rd,addr(rs) cp rd,rs divl rqd,addr
280and rd,imm16 cpb @@rd,imm8 divl rqd,addr(rs)
281and rd,rs cpb addr(rd),imm8 divl rqd,imm32
282andb rbd,@@rs cpb addr,imm8 divl rqd,rrs
283andb rbd,addr cpb rbd,@@rs djnz rd,disp7
284andb rbd,addr(rs) cpb rbd,addr ei i2
285andb rbd,imm8 cpb rbd,addr(rs) ex rd,@@rs
286andb rbd,rbs cpb rbd,imm8 ex rd,addr
287bit @@rd,imm4 cpb rbd,rbs ex rd,addr(rs)
288bit addr(rd),imm4 cpd rd,@@rs,rr,cc ex rd,rs
289bit addr,imm4 cpdb rbd,@@rs,rr,cc exb rbd,@@rs
290bit rd,imm4 cpdr rd,@@rs,rr,cc exb rbd,addr
291bit rd,rs cpdrb rbd,@@rs,rr,cc exb rbd,addr(rs)
292bitb @@rd,imm4 cpi rd,@@rs,rr,cc exb rbd,rbs
293bitb addr(rd),imm4 cpib rbd,@@rs,rr,cc ext0e imm8
294bitb addr,imm4 cpir rd,@@rs,rr,cc ext0f imm8
295bitb rbd,imm4 cpirb rbd,@@rs,rr,cc ext8e imm8
296bitb rbd,rs cpl rrd,@@rs ext8f imm8
297bpt cpl rrd,addr exts rrd
298call @@rd cpl rrd,addr(rs) extsb rd
299call addr cpl rrd,imm32 extsl rqd
300call addr(rd) cpl rrd,rrs halt
301calr disp12 cpsd @@rd,@@rs,rr,cc in rd,@@rs
302clr @@rd cpsdb @@rd,@@rs,rr,cc in rd,imm16
303clr addr cpsdr @@rd,@@rs,rr,cc inb rbd,@@rs
304clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16
305clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1
306clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1
307inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
308inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
309incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
310incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@@rs
311incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr
312incb rbd,imm4m1 ldd @@rs,@@rd,rr multl rqd,addr(rs)
313ind @@rd,@@rs,ra lddb @@rs,@@rd,rr multl rqd,imm32
314indb @@rd,@@rs,rba lddr @@rs,@@rd,rr multl rqd,rrs
315inib @@rd,@@rs,ra lddrb @@rs,@@rd,rr neg @@rd
316inibr @@rd,@@rs,ra ldi @@rd,@@rs,rr neg addr
317iret ldib @@rd,@@rs,rr neg addr(rd)
318jp cc,@@rd ldir @@rd,@@rs,rr neg rd
319jp cc,addr ldirb @@rd,@@rs,rr negb @@rd
320jp cc,addr(rd) ldk rd,imm4 negb addr
321jr cc,disp8 ldl @@rd,rrs negb addr(rd)
322ld @@rd,imm16 ldl addr(rd),rrs negb rbd
323ld @@rd,rs ldl addr,rrs nop
324ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@@rs
325ld addr(rd),rs ldl rd(rx),rrs or rd,addr
326ld addr,imm16 ldl rrd,@@rs or rd,addr(rs)
327ld addr,rs ldl rrd,addr or rd,imm16
328ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs
329ld rd(rx),rs ldl rrd,imm32 orb rbd,@@rs
330ld rd,@@rs ldl rrd,rrs orb rbd,addr
331ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs)
332ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8
333ld rd,imm16 ldm @@rd,rs,n orb rbd,rbs
334ld rd,rs ldm addr(rd),rs,n out @@rd,rs
335ld rd,rs(imm16) ldm addr,rs,n out imm16,rs
336ld rd,rs(rx) ldm rd,@@rs,n outb @@rd,rbs
337lda rd,addr ldm rd,addr(rs),n outb imm16,rbs
338lda rd,addr(rs) ldm rd,addr,n outd @@rd,@@rs,ra
339lda rd,rs(imm16) ldps @@rs outdb @@rd,@@rs,rba
340lda rd,rs(rx) ldps addr outib @@rd,@@rs,ra
341ldar rd,disp16 ldps addr(rs) outibr @@rd,@@rs,ra
342ldb @@rd,imm8 ldr disp16,rs pop @@rd,@@rs
343ldb @@rd,rbs ldr rd,disp16 pop addr(rd),@@rs
344ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@@rs
345ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@@rs
346ldb addr,imm8 ldrl disp16,rrs popl @@rd,@@rs
347ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@@rs
348ldb rbd,@@rs mbit popl addr,@@rs
349ldb rbd,addr mreq rd popl rrd,@@rs
350ldb rbd,addr(rs) mres push @@rd,@@rs
351ldb rbd,imm8 mset push @@rd,addr
352ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs)
353ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16
354push @@rd,rs set addr,imm4 subl rrd,imm32
355pushl @@rd,@@rs set rd,imm4 subl rrd,rrs
356pushl @@rd,addr set rd,rs tcc cc,rd
357pushl @@rd,addr(rs) setb @@rd,imm4 tccb cc,rbd
358pushl @@rd,rrs setb addr(rd),imm4 test @@rd
359res @@rd,imm4 setb addr,imm4 test addr
360res addr(rd),imm4 setb rbd,imm4 test addr(rd)
361res addr,imm4 setb rbd,rs test rd
362res rd,imm4 setflg imm4 testb @@rd
363res rd,rs sinb rbd,imm16 testb addr
364resb @@rd,imm4 sinb rd,imm16 testb addr(rd)
365resb addr(rd),imm4 sind @@rd,@@rs,ra testb rbd
366resb addr,imm4 sindb @@rd,@@rs,rba testl @@rd
367resb rbd,imm4 sinib @@rd,@@rs,ra testl addr
368resb rbd,rs sinibr @@rd,@@rs,ra testl addr(rd)
369resflg imm4 sla rd,imm8 testl rrd
370ret cc slab rbd,imm8 trdb @@rd,@@rs,rba
371rl rd,imm1or2 slal rrd,imm8 trdrb @@rd,@@rs,rba
372rlb rbd,imm1or2 sll rd,imm8 trib @@rd,@@rs,rbr
373rlc rd,imm1or2 sllb rbd,imm8 trirb @@rd,@@rs,rbr
374rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @@ra,@@rb,rbr
375rldb rbb,rba sout imm16,rs trtib @@ra,@@rb,rr
376rr rd,imm1or2 soutb imm16,rbs trtirb @@ra,@@rb,rbr
377rrb rbd,imm1or2 soutd @@rd,@@rs,ra trtrb @@ra,@@rb,rbr
378rrc rd,imm1or2 soutdb @@rd,@@rs,rba tset @@rd
379rrcb rbd,imm1or2 soutib @@rd,@@rs,ra tset addr
380rrdb rbb,rba soutibr @@rd,@@rs,ra tset addr(rd)
381rsvd36 sra rd,imm8 tset rd
382rsvd38 srab rbd,imm8 tsetb @@rd
383rsvd78 sral rrd,imm8 tsetb addr
384rsvd7e srl rd,imm8 tsetb addr(rd)
385rsvd9d srlb rbd,imm8 tsetb rbd
386rsvd9f srll rrd,imm8 xor rd,@@rs
387rsvdb9 sub rd,@@rs xor rd,addr
388rsvdbf sub rd,addr xor rd,addr(rs)
389sbc rd,rs sub rd,addr(rs) xor rd,imm16
390sbcb rbd,rbs sub rd,imm16 xor rd,rs
391sc imm8 sub rd,rs xorb rbd,@@rs
392sda rd,rs subb rbd,@@rs xorb rbd,addr
393sdab rbd,rs subb rbd,addr xorb rbd,addr(rs)
394sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8
395sdl rd,rs subb rbd,imm8 xorb rbd,rbs
396sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
397sdll rrd,rs subl rrd,@@rs
398set @@rd,imm4 subl rrd,addr
399set addr(rd),imm4 subl rrd,addr(rs)
400@end smallexample
401@iftex
402@endgroup
403@end iftex
404@end ifset
405