Upgrade GDB from 7.4.1 to 7.6.1 on the vendor branch
[dragonfly.git] / contrib / gdb-7 / gdb / i386-tdep.h
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1/* Target-dependent code for the i386.
2
ef5ccd6c 3 Copyright (C) 2001-2013 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#ifndef I386_TDEP_H
21#define I386_TDEP_H
22
23struct frame_info;
24struct gdbarch;
25struct reggroup;
26struct regset;
27struct regcache;
28
29/* GDB's i386 target supports both the 32-bit Intel Architecture
30 (IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
31 a similar register layout for both.
32
33 - General purpose registers
34 - FPU data registers
35 - FPU control registers
36 - SSE data registers
37 - SSE control register
38
39 The general purpose registers for the x86-64 architecture are quite
40 different from IA-32. Therefore, gdbarch_fp0_regnum
41 determines the register number at which the FPU data registers
42 start. The number of FPU data and control registers is the same
43 for both architectures. The number of SSE registers however,
44 differs and is determined by the num_xmm_regs member of `struct
45 gdbarch_tdep'. */
46
47/* Convention for returning structures. */
48
49enum struct_return
50{
51 pcc_struct_return, /* Return "short" structures in memory. */
52 reg_struct_return /* Return "short" structures in registers. */
53};
54
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55/* Register classes as defined in the AMD x86-64 psABI. */
56
57enum amd64_reg_class
58{
59 AMD64_INTEGER,
60 AMD64_SSE,
61 AMD64_SSEUP,
62 AMD64_X87,
63 AMD64_X87UP,
64 AMD64_COMPLEX_X87,
65 AMD64_NO_CLASS,
66 AMD64_MEMORY
67};
68
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69/* i386 architecture specific information. */
70struct gdbarch_tdep
71{
72 /* General-purpose registers. */
73 struct regset *gregset;
74 int *gregset_reg_offset;
75 int gregset_num_regs;
76 size_t sizeof_gregset;
77
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78 /* The general-purpose registers used to pass integers when making
79 function calls. This only applies to amd64, as all parameters
80 are passed through the stack on x86. */
81 int call_dummy_num_integer_regs;
82 int *call_dummy_integer_regs;
83
84 /* Used on amd64 only. Classify TYPE according to calling conventions,
85 and store the result in CLASS. */
86 void (*classify) (struct type *type, enum amd64_reg_class class[2]);
87
88 /* Used on amd64 only. Non-zero if the first few MEMORY arguments
89 should be passed by pointer.
90
91 More precisely, MEMORY arguments are passed through the stack.
92 But certain architectures require that their address be passed
93 by register as well, if there are still some integer registers
94 available for argument passing. */
95 int memory_args_by_pointer;
96
97 /* Used on amd64 only.
98
99 If non-zero, then the callers of a function are expected to reserve
100 some space in the stack just before the area where the PC is saved
101 so that the callee may save the integer-parameter registers there.
102 The amount of space is dependent on the list of registers used for
103 integer parameter passing (see component call_dummy_num_integer_regs
104 above). */
105 int integer_param_regs_saved_in_caller_frame;
106
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107 /* Floating-point registers. */
108 struct regset *fpregset;
109 size_t sizeof_fpregset;
110
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111 /* XSAVE extended state. */
112 struct regset *xstateregset;
113
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114 /* Register number for %st(0). The register numbers for the other
115 registers follow from this one. Set this to -1 to indicate the
116 absence of an FPU. */
117 int st0_regnum;
118
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119 /* Number of MMX registers. */
120 int num_mmx_regs;
121
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122 /* Register number for %mm0. Set this to -1 to indicate the absence
123 of MMX support. */
124 int mm0_regnum;
125
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126 /* Number of pseudo YMM registers. */
127 int num_ymm_regs;
128
129 /* Register number for %ymm0. Set this to -1 to indicate the absence
130 of pseudo YMM register support. */
131 int ymm0_regnum;
132
133 /* Number of byte registers. */
134 int num_byte_regs;
135
136 /* Register pseudo number for %al. */
137 int al_regnum;
138
139 /* Number of pseudo word registers. */
140 int num_word_regs;
141
142 /* Register number for %ax. */
143 int ax_regnum;
144
145 /* Number of pseudo dword registers. */
146 int num_dword_regs;
147
148 /* Register number for %eax. Set this to -1 to indicate the absence
149 of pseudo dword register support. */
150 int eax_regnum;
151
152 /* Number of core registers. */
153 int num_core_regs;
154
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155 /* Number of SSE registers. */
156 int num_xmm_regs;
157
cf7f2e2d 158 /* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
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159 register), excluding the x87 bit, which are supported by this GDB. */
160
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161 uint64_t xcr0;
162
163 /* Offset of XCR0 in XSAVE extended state. */
164 int xsave_xcr0_offset;
165
166 /* Register names. */
167 const char **register_names;
168
169 /* Register number for %ymm0h. Set this to -1 to indicate the absence
170 of upper YMM register support. */
171 int ymm0h_regnum;
172
173 /* Upper YMM register names. Only used for tdesc_numbered_register. */
174 const char **ymmh_register_names;
175
176 /* Target description. */
177 const struct target_desc *tdesc;
178
179 /* Register group function. */
180 const void *register_reggroup_p;
181
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182 /* Offset of saved PC in jmp_buf. */
183 int jb_pc_offset;
184
185 /* Convention for returning structures. */
186 enum struct_return struct_return;
187
188 /* Address range where sigtramp lives. */
189 CORE_ADDR sigtramp_start;
190 CORE_ADDR sigtramp_end;
191
192 /* Detect sigtramp. */
193 int (*sigtramp_p) (struct frame_info *);
194
195 /* Get address of sigcontext for sigtramp. */
196 CORE_ADDR (*sigcontext_addr) (struct frame_info *);
197
198 /* Offset of registers in `struct sigcontext'. */
199 int *sc_reg_offset;
200 int sc_num_regs;
201
202 /* Offset of saved PC and SP in `struct sigcontext'. Usage of these
203 is deprecated, please use `sc_reg_offset' instead. */
204 int sc_pc_offset;
205 int sc_sp_offset;
206
207 /* ISA-specific data types. */
5796c8dc 208 struct type *i386_mmx_type;
cf7f2e2d 209 struct type *i386_ymm_type;
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210 struct type *i387_ext_type;
211
212 /* Process record/replay target. */
213 /* The map for registers because the AMD64's registers order
214 in GDB is not same as I386 instructions. */
215 const int *record_regmap;
216 /* Parse intx80 args. */
217 int (*i386_intx80_record) (struct regcache *regcache);
218 /* Parse sysenter args. */
219 int (*i386_sysenter_record) (struct regcache *regcache);
220 /* Parse syscall args. */
221 int (*i386_syscall_record) (struct regcache *regcache);
222};
223
224/* Floating-point registers. */
225
226/* All FPU control regusters (except for FIOFF and FOOFF) are 16-bit
227 (at most) in the FPU, but are zero-extended to 32 bits in GDB's
228 register cache. */
229
230/* Return non-zero if REGNUM matches the FP register and the FP
231 register set is active. */
232extern int i386_fp_regnum_p (struct gdbarch *, int);
233extern int i386_fpc_regnum_p (struct gdbarch *, int);
234
235/* Register numbers of various important registers. */
236
237enum i386_regnum
238{
239 I386_EAX_REGNUM, /* %eax */
240 I386_ECX_REGNUM, /* %ecx */
241 I386_EDX_REGNUM, /* %edx */
242 I386_EBX_REGNUM, /* %ebx */
243 I386_ESP_REGNUM, /* %esp */
244 I386_EBP_REGNUM, /* %ebp */
245 I386_ESI_REGNUM, /* %esi */
246 I386_EDI_REGNUM, /* %edi */
247 I386_EIP_REGNUM, /* %eip */
248 I386_EFLAGS_REGNUM, /* %eflags */
249 I386_CS_REGNUM, /* %cs */
250 I386_SS_REGNUM, /* %ss */
251 I386_DS_REGNUM, /* %ds */
252 I386_ES_REGNUM, /* %es */
253 I386_FS_REGNUM, /* %fs */
254 I386_GS_REGNUM, /* %gs */
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255 I386_ST0_REGNUM, /* %st(0) */
256 I386_MXCSR_REGNUM = 40, /* %mxcsr */
257 I386_YMM0H_REGNUM, /* %ymm0h */
258 I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7
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259};
260
261/* Register numbers of RECORD_REGMAP. */
262
263enum record_i386_regnum
264{
265 X86_RECORD_REAX_REGNUM,
266 X86_RECORD_RECX_REGNUM,
267 X86_RECORD_REDX_REGNUM,
268 X86_RECORD_REBX_REGNUM,
269 X86_RECORD_RESP_REGNUM,
270 X86_RECORD_REBP_REGNUM,
271 X86_RECORD_RESI_REGNUM,
272 X86_RECORD_REDI_REGNUM,
273 X86_RECORD_R8_REGNUM,
274 X86_RECORD_R9_REGNUM,
275 X86_RECORD_R10_REGNUM,
276 X86_RECORD_R11_REGNUM,
277 X86_RECORD_R12_REGNUM,
278 X86_RECORD_R13_REGNUM,
279 X86_RECORD_R14_REGNUM,
280 X86_RECORD_R15_REGNUM,
281 X86_RECORD_REIP_REGNUM,
282 X86_RECORD_EFLAGS_REGNUM,
283 X86_RECORD_CS_REGNUM,
284 X86_RECORD_SS_REGNUM,
285 X86_RECORD_DS_REGNUM,
286 X86_RECORD_ES_REGNUM,
287 X86_RECORD_FS_REGNUM,
288 X86_RECORD_GS_REGNUM,
289};
290
291#define I386_NUM_GREGS 16
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292#define I386_NUM_XREGS 9
293
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294#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
295#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
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296
297/* Size of the largest register. */
298#define I386_MAX_REGISTER_SIZE 16
299
300/* Types for i386-specific registers. */
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301extern struct type *i387_ext_type (struct gdbarch *gdbarch);
302
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303/* Checks of different pseudo-registers. */
304extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
305extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
306extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
307extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
308extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
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309
310extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
311 int regnum);
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312extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
313 int regnum);
cf7f2e2d 314
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315extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
316 struct regcache *regcache,
317 int regnum,
318 struct value *result);
319
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320extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
321 struct regcache *regcache,
322 int regnum, const gdb_byte *buf);
323
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324/* Segment selectors. */
325#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
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326#define I386_SEL_UPL 0x0003 /* User Privilige Level. */
327#define I386_SEL_KPL 0x0000 /* Kernel Privilige Level. */
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328
329/* The length of the longest i386 instruction (according to
330 include/asm-i386/kprobes.h in Linux 2.6. */
331#define I386_MAX_INSN_LEN (16)
332
333/* Functions exported from i386-tdep.c. */
334extern CORE_ADDR i386_pe_skip_trampoline_code (struct frame_info *frame,
335 CORE_ADDR pc, char *name);
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336extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
337 CORE_ADDR pc);
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338
339/* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
340extern int i386_sigtramp_p (struct frame_info *this_frame);
341
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342/* Return non-zero if REGNUM is a member of the specified group. */
343extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
344 struct reggroup *group);
345
346/* Supply register REGNUM from the general-purpose register set REGSET
347 to register cache REGCACHE. If REGNUM is -1, do this for all
348 registers in REGSET. */
349extern void i386_supply_gregset (const struct regset *regset,
350 struct regcache *regcache, int regnum,
351 const void *gregs, size_t len);
352
353/* Collect register REGNUM from the register cache REGCACHE and store
354 it in the buffer specified by GREGS and LEN as described by the
355 general-purpose register set REGSET. If REGNUM is -1, do this for
356 all registers in REGSET. */
357extern void i386_collect_gregset (const struct regset *regset,
358 const struct regcache *regcache,
359 int regnum, void *gregs, size_t len);
360
361/* Return the appropriate register set for the core section identified
362 by SECT_NAME and SECT_SIZE. */
363extern const struct regset *
364 i386_regset_from_core_section (struct gdbarch *gdbarch,
365 const char *sect_name, size_t sect_size);
366
367
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368extern struct displaced_step_closure *i386_displaced_step_copy_insn
369 (struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
370 struct regcache *regs);
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371extern void i386_displaced_step_fixup (struct gdbarch *gdbarch,
372 struct displaced_step_closure *closure,
373 CORE_ADDR from, CORE_ADDR to,
374 struct regcache *regs);
375
376/* Initialize a basic ELF architecture variant. */
377extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
378
379/* Initialize a SVR4 architecture variant. */
380extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
381
382extern int i386_process_record (struct gdbarch *gdbarch,
383 struct regcache *regcache, CORE_ADDR addr);
ef5ccd6c 384
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385\f
386
387/* Functions and variables exported from i386bsd-tdep.c. */
388
389extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
390extern CORE_ADDR i386fbsd_sigtramp_start_addr;
391extern CORE_ADDR i386fbsd_sigtramp_end_addr;
392extern CORE_ADDR i386obsd_sigtramp_start_addr;
393extern CORE_ADDR i386obsd_sigtramp_end_addr;
394extern int i386fbsd4_sc_reg_offset[];
395extern int i386fbsd_sc_reg_offset[];
396extern int i386nbsd_sc_reg_offset[];
397extern int i386obsd_sc_reg_offset[];
398extern int i386bsd_sc_reg_offset[];
399
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400/* SystemTap related functions. */
401
402extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
403 const char *s);
404
405extern int i386_stap_parse_special_token (struct gdbarch *gdbarch,
406 struct stap_parse_info *p);
407
5796c8dc 408#endif /* i386-tdep.h */